mirror of
https://github.com/garrettsworkshop/RAM2GS.git
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213 lines
9.7 KiB
Plaintext
Executable File
213 lines
9.7 KiB
Plaintext
Executable File
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
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# Date created = 21:16:34 March 08, 2020
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# RAM4GS_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "MAX II"
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set_global_assignment -name DEVICE EPM240T100C5
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set_global_assignment -name TOP_LEVEL_ENTITY RAM4GS
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:16:34 MARCH 08, 2020"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name SDC_FILE constraints.sdc
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set_global_assignment -name VERILOG_FILE RAM4GS.v
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
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set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE BALANCED
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
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set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS"
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set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
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set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER OFF
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set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
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set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
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set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
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set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
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set_global_assignment -name SMART_RECOMPILE OFF
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set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 10
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set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 10
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set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS"
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set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON
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set_global_assignment -name SAFE_STATE_MACHINE ON
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set_location_assignment PIN_12 -to RCLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK
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set_location_assignment PIN_52 -to PHI2
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2
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set_location_assignment PIN_67 -to nCRAS
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS
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set_location_assignment PIN_53 -to nCCAS
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS
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set_location_assignment PIN_48 -to nFWE
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE
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set_location_assignment PIN_49 -to MAin[0]
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set_location_assignment PIN_51 -to MAin[1]
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set_location_assignment PIN_50 -to MAin[2]
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set_location_assignment PIN_71 -to MAin[3]
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set_location_assignment PIN_70 -to MAin[4]
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set_location_assignment PIN_69 -to MAin[5]
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set_location_assignment PIN_72 -to MAin[6]
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set_location_assignment PIN_68 -to MAin[7]
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set_location_assignment PIN_73 -to MAin[8]
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set_location_assignment PIN_74 -to MAin[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin
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set_location_assignment PIN_54 -to CROW[0]
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set_location_assignment PIN_55 -to CROW[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW
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set_location_assignment PIN_35 -to Din[2]
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set_location_assignment PIN_36 -to Din[1]
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set_location_assignment PIN_37 -to Din[3]
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set_location_assignment PIN_38 -to Din[5]
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set_location_assignment PIN_39 -to Din[4]
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set_location_assignment PIN_40 -to Din[7]
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set_location_assignment PIN_41 -to Din[6]
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set_location_assignment PIN_42 -to Din[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din
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set_location_assignment PIN_33 -to Dout[0]
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set_location_assignment PIN_57 -to Dout[1]
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set_location_assignment PIN_56 -to Dout[2]
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set_location_assignment PIN_47 -to Dout[3]
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set_location_assignment PIN_44 -to Dout[4]
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set_location_assignment PIN_28 -to Dout[5]
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set_location_assignment PIN_34 -to Dout[6]
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set_location_assignment PIN_43 -to Dout[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout
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set_location_assignment PIN_8 -to RCKE
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE
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set_location_assignment PIN_3 -to nRCS
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS
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set_location_assignment PIN_100 -to nRWE
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE
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set_location_assignment PIN_6 -to nRRAS
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS
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set_location_assignment PIN_4 -to nRCAS
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS
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set_location_assignment PIN_5 -to RBA[0]
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set_location_assignment PIN_14 -to RBA[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA
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set_location_assignment PIN_18 -to RA[0]
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set_location_assignment PIN_20 -to RA[1]
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set_location_assignment PIN_30 -to RA[2]
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set_location_assignment PIN_27 -to RA[3]
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set_location_assignment PIN_26 -to RA[4]
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set_location_assignment PIN_29 -to RA[5]
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set_location_assignment PIN_21 -to RA[6]
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set_location_assignment PIN_19 -to RA[7]
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set_location_assignment PIN_17 -to RA[8]
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set_location_assignment PIN_15 -to RA[9]
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set_location_assignment PIN_16 -to RA[10]
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set_location_assignment PIN_7 -to RA[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA
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set_location_assignment PIN_2 -to RDQMH
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH
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set_location_assignment PIN_98 -to RDQML
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML
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set_location_assignment PIN_96 -to RD[0]
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set_location_assignment PIN_90 -to RD[1]
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set_location_assignment PIN_89 -to RD[2]
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set_location_assignment PIN_99 -to RD[3]
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set_location_assignment PIN_92 -to RD[4]
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set_location_assignment PIN_91 -to RD[5]
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set_location_assignment PIN_95 -to RD[6]
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set_location_assignment PIN_97 -to RD[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD
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set_global_assignment -name MIF_FILE RAM4GS.mif
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set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS
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set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS
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set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE
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set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin
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set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW
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set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to Dout
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to RCKE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRCS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRWE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRRAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRCAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to RBA
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RA
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to RA
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RDQMH
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to RDQMH
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RDQML
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set_instance_assignment -name SLOW_SLEW_RATE OFF -to RDQML
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RD
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set_instance_assignment -name SLOW_SLEW_RATE ON -to RD
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set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD
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set_global_assignment -name QIP_FILE UFM.qip |