134 lines
6.2 KiB
Plaintext
134 lines
6.2 KiB
Plaintext
Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 6
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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// Design: RAM2GS
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// Package: TQFP100
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// ncd File: ram2gs_lcmxo2_640hc_impl1.ncd
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// Version: Diamond (64-bit) 3.12.0.240.2
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// Written on Sat Oct 09 01:19:25 2021
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// M: Minimum Performance Grade
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// iotiming RAM2GS_LCMXO2_640HC_impl1.ncd RAM2GS_LCMXO2_640HC_impl1.prf -gui
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 6, 5, 4):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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CROW[0] nCRAS F -0.195 M 1.729 4
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CROW[1] nCRAS F -0.218 M 1.801 4
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Din[0] PHI2 F 6.339 4 1.186 4
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Din[0] nCCAS F 1.641 4 0.107 M
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Din[1] PHI2 F 6.084 4 1.570 4
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Din[1] nCCAS F 0.198 4 1.314 4
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Din[2] PHI2 F 3.778 4 1.771 4
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Din[2] nCCAS F 0.075 4 1.431 4
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Din[3] PHI2 F 4.331 4 1.705 4
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Din[3] nCCAS F -0.116 M 1.722 4
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Din[4] PHI2 F 6.176 4 1.711 4
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Din[4] nCCAS F 1.065 4 0.575 4
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Din[5] PHI2 F 4.684 4 1.261 4
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Din[5] nCCAS F -0.081 M 1.625 4
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Din[6] PHI2 F 5.243 4 0.356 4
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Din[6] nCCAS F 1.414 4 0.309 4
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Din[7] PHI2 F 6.602 4 1.175 4
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Din[7] nCCAS F -0.286 M 2.137 4
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MAin[0] PHI2 F 5.034 4 0.629 4
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MAin[0] nCRAS F 1.094 4 0.380 4
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MAin[1] PHI2 F 6.081 4 1.157 4
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MAin[1] nCRAS F 0.544 4 0.877 4
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MAin[2] PHI2 F 9.979 4 -0.319 M
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MAin[2] nCRAS F -0.050 M 1.401 4
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MAin[3] PHI2 F 9.162 4 -0.219 M
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MAin[3] nCRAS F 1.032 4 0.440 4
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MAin[4] PHI2 F 11.678 4 -0.770 M
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MAin[4] nCRAS F -0.150 M 1.620 4
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MAin[5] PHI2 F 8.668 4 -0.081 M
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MAin[5] nCRAS F -0.050 M 1.401 4
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MAin[6] PHI2 F 8.516 4 -0.025 M
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MAin[6] nCRAS F 1.003 4 0.478 4
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MAin[7] PHI2 F 9.320 4 -0.061 M
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MAin[7] nCRAS F 1.001 4 0.478 4
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MAin[8] nCRAS F -0.146 M 1.657 4
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MAin[9] nCRAS F -0.360 M 2.140 4
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PHI2 RCLK R 3.079 4 -0.602 M
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nCCAS RCLK R 3.574 4 -0.705 M
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nCCAS nCRAS F 3.232 4 -0.351 M
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nCRAS RCLK R 2.757 4 -0.470 M
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nFWE PHI2 F 5.913 4 0.723 4
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nFWE nCRAS F 0.547 4 0.890 4
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// Clock to Output Delay
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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------------------------------------------------------------------------
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LED RCLK R 10.062 4 3.164 M
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RA[0] RCLK R 10.645 4 3.471 M
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RA[0] nCRAS F 11.744 4 3.770 M
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RA[10] RCLK R 9.485 4 3.236 M
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RA[11] PHI2 R 11.513 4 3.824 M
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RA[1] RCLK R 10.921 4 3.549 M
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RA[1] nCRAS F 12.664 4 4.036 M
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RA[2] RCLK R 10.923 4 3.527 M
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RA[2] nCRAS F 12.463 4 3.984 M
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RA[3] RCLK R 11.178 4 3.615 M
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RA[3] nCRAS F 12.304 4 3.917 M
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RA[4] RCLK R 11.365 4 3.630 M
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RA[4] nCRAS F 13.243 4 4.179 M
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RA[5] RCLK R 11.365 4 3.630 M
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RA[5] nCRAS F 12.940 4 4.098 M
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RA[6] RCLK R 11.099 4 3.573 M
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RA[6] nCRAS F 12.162 4 3.870 M
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RA[7] RCLK R 10.948 4 3.552 M
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RA[7] nCRAS F 12.282 4 3.936 M
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RA[8] RCLK R 11.114 4 3.608 M
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RA[8] nCRAS F 12.909 4 4.116 M
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RA[9] RCLK R 11.005 4 3.561 M
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RA[9] nCRAS F 12.959 4 4.081 M
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RBA[0] nCRAS F 11.842 4 3.911 M
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RBA[1] nCRAS F 11.343 4 3.771 M
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RCKE RCLK R 9.884 4 3.362 M
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RDQMH RCLK R 10.941 4 3.559 M
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RDQML RCLK R 10.641 4 3.470 M
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RD[0] nCCAS F 12.628 4 4.413 M
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RD[1] nCCAS F 12.231 4 4.302 M
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RD[2] nCCAS F 12.231 4 4.302 M
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RD[3] nCCAS F 11.928 4 4.221 M
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RD[4] nCCAS F 12.427 4 4.361 M
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RD[5] nCCAS F 12.697 4 4.400 M
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RD[6] nCCAS F 12.427 4 4.361 M
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RD[7] nCCAS F 12.427 4 4.361 M
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nRCAS RCLK R 9.674 4 3.300 M
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nRCS RCLK R 9.674 4 3.300 M
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nRRAS RCLK R 9.797 4 3.322 M
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nRWE RCLK R 9.275 4 3.194 M
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WARNING: you must also run trce with hold speed: 4
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WARNING: you must also run trce with setup speed: M
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