RAM2GS/CPLD/LCMXO256C/impl1/RAM2GS_LCMXO256C_impl1.dir/5_1_par.asd
2023-08-15 05:05:47 -04:00

31 lines
793 B
Common Lisp

[ActiveSupport PAR]
; Global primary clocks
GLOBAL_PRIMARY_USED = 2;
; Global primary clock #0
GLOBAL_PRIMARY_0_SIGNALNAME = RCLK_c;
GLOBAL_PRIMARY_0_DRIVERTYPE = CLK_PIN;
GLOBAL_PRIMARY_0_LOADNUM = 40;
; Global primary clock #1
GLOBAL_PRIMARY_1_SIGNALNAME = PHI2_c;
GLOBAL_PRIMARY_1_DRIVERTYPE = PIO;
GLOBAL_PRIMARY_1_LOADNUM = 13;
; # of global secondary clocks
GLOBAL_SECONDARY_USED = 1;
; Global secondary clock #0
GLOBAL_SECONDARY_0_SIGNALNAME = nCRAS_c;
GLOBAL_SECONDARY_0_DRIVERTYPE = PIO;
GLOBAL_SECONDARY_0_LOADNUM = 9;
GLOBAL_SECONDARY_0_SIGTYPE = CLK;
; I/O Bank 0 Usage
BANK_0_USED = 36;
BANK_0_AVAIL = 41;
BANK_0_VCCIO = 3.3V;
BANK_0_VREF1 = NA;
BANK_0_VREF2 = NA;
; I/O Bank 1 Usage
BANK_1_USED = 31;
BANK_1_AVAIL = 37;
BANK_1_VCCIO = 3.3V;
BANK_1_VREF1 = NA;
BANK_1_VREF2 = NA;