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Update hardware docs for issue #21
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@ -22,48 +22,58 @@ The basic circuit is as follows:
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* Pins D10..D12 control A16..A18 for chips larger than 64K bytes.
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* Pins D10..D12 control A16..A18 for chips larger than 64K bytes.
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Note that the existing design uses 74LS164 shift registers, but another 8-bit parallel out
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Note that the existing design uses 74LS164 shift registers, but another 8-bit parallel out
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shift register, like the 74LS595, could be used instead with some pin changes.
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shift register, like the 74LS595, could be used instead with some pin changes. See the
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[74LS595 Shift Registers](#74ls595-shift-registers) section below for details.
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When using the 74LS595 instead of the 74LS164, there is an additional output latch that
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needs to be pulsed to put the contents of the shift register on the output lines. The
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code supports this by uncommenting the _#define SHIFT_REGISTER_IS_595_ line in
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Configure.h. The D13 line from the Arduino controls the RCLK latch on the '595. The table
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below shows the connections when using either the 74LS164 or the 74LS595 for the address
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shift registers. USR refers to the Upper Shift Register (A<sub>8</sub>..A<sub>15</sub>)
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and LSR refers to the Lower Shift Register (A<sub>0</sub>..A<sub>7</sub>).
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|Arduino |74LS164 |74LS595|
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|:---: |:---: |:---: |
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|A0 |ROM WE |ROM WE|
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|A1 |ROM CE |ROM CE|
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|A2 |ROM OE |ROM OE|
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|A3 |USR CLK |USR SRCLK|
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|A4 |LSR CLK |LSR SRCLK|
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|A5<sup>1</sup> |LSR+USR A |LSR+USR SER|
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|D2..D9 |ROM D<sub>0</sub>..D<sub>7</sub> |ROM D<sub>0</sub>..D<sub>7</sub> |
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|D10..D12<sup>2</sup> |ROM A<sub>16</sub>..A<sub>18</sub>|ROM A<sub>16</sub>..A<sub>18</sub>|
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|D13<sup>3</sup>|-- |LSR+USR RCLK|
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Notes:
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1. The data pin on A5 is connected to both the Upper Shift Register (USR) and the Lower Shift Register (LSR).
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2. The upper address lines are not needed for 28C64 and 28C256 chips, but are used for
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larger chips like the 27C040.
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3. The D13 pin controls the output register on the '595 shift registers. The code for
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this must be enabled in Configure.h. This pin is not connected when using the 74LS164.
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Also note that the 74LS595 has an output enable pin, labeled as either G or OE
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in the datasheet. This pin must be connected to ground for both chips or else
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they will not produce any signal on their output lines.
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The two shift registers can produce a sixteen bit address, although the 28C256 only needs
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The two shift registers can produce a sixteen bit address, although the 28C256 only needs
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15 addresses. Chips larger than 64K are supported by using the shift registers for A<sub>0</sub>..A<sub>15</sub>
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15 addresses. Chips larger than 64K are supported by using the shift registers for
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and connecting Arduino pins D10..D12 to the chip's A<sub>16</sub>..A<sub>18</sub>
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A<sub>0</sub>..A<sub>15</sub> and connecting Arduino pins D10..D12 to the chip's
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A<sub>16</sub>..A<sub>18</sub>
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
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
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**NOTE:**
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**NOTE:**
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The schematic does not show the Vcc and ground pins for the 74LS164 shift registers.
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The schematic does not show the Vcc and ground pins for the shift registers. These must be
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These must be connected to +5 and ground, respectively. It is also good practice to place a decoupling capacitor (0.1uF or 0.01uF is good) on the power rails near the Vcc connections.
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connected to +5 and ground, respectively. It is also good practice to place a decoupling
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capacitor (0.1uF or 0.01uF is good) on the power rails near the Vcc connections.
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## 74LS595 Shift Registers
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When using the 74LS595 instead of the 74LS164, there is an additional output latch that
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is pulsed to put the contents of the shift register on the output lines. The code
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supports the 164s or the 595s by default. No code changes are needed to use either
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version of the shift register hardware.
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The table below shows the connections when using either the 74LS164 or the 74LS595 for the
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address shift registers. USR refers to the Upper Shift Register
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(A<sub>8</sub>..A<sub>15</sub>) and LSR refers to the Lower Shift Register
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(A<sub>0</sub>..A<sub>7</sub>).
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|Arduino |74LS164 |74LS595|
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|:---: |:---: |:---: |
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|A0 |ROM WE |ROM WE|
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|A1 |ROM CE |ROM CE|
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|A2 |ROM OE |ROM OE|
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|A3 |USR CLK |USR SRCLK|
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|A4 |LSR CLK |LSR SRCLK|
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|A5<sup>1</sup> |LSR+USR A |LSR+USR SER|
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|D2..D9 |ROM D<sub>0</sub>..D<sub>7</sub> |ROM D<sub>0</sub>..D<sub>7</sub> |
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|D10..D12<sup>2</sup>|ROM A<sub>16</sub>..A<sub>18</sub>|ROM A<sub>16</sub>..A<sub>18</sub>|
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|D13<sup>3</sup> |-- |LSR+USR RCLK|
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Notes:
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1. The data pin on A5 is connected to both the Upper Shift Register (USR) and the Lower
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Shift Register (LSR).
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2. The upper address lines are not needed for 28C64 and 28C256 chips, but are used for
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larger chips like the 27C040.
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3. The D13 pin controls the output register on the '595 shift registers. This pin is not
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connected when using the 74LS164.
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Note that the 74LS595s have two additional pins that need to be connected.
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* An output enable pin, labeled as either G or OE in the datasheet, must be tied LOW for
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both chips or else they will not produce any signal on their output lines.
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* A reset pin, labeled as RESET or SRCLR must be tied HIGH for both chips or else the
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shift registers will be held in a reset state.
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## Ben Eater EEPROM Programmer
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## Ben Eater EEPROM Programmer
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@ -72,8 +82,9 @@ Programmer](https://github.com/beneater/eeprom-programmer), note that the design
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similar, but the TommyPROM code will not run on that hardware without some significant
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similar, but the TommyPROM code will not run on that hardware without some significant
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changes. If you just need to unlock the Software Data Protection (SDP) on a chip, then
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changes. If you just need to unlock the Software Data Protection (SDP) on a chip, then
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see the
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see the
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[unlock-ben-eater-hardware sketch](https://github.com/TomNisbet/TommyPROM/tree/master/unlock-ben-eater-hardware) for a solution. That sketch is purpose-built to run on the Ben Eater
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[unlock-ben-eater-hardware sketch](https://github.com/TomNisbet/TommyPROM/tree/master/unlock-ben-eater-hardware)
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hardware directly and it will not work with the TommyPROM hardware.
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for a solution. That sketch is purpose-built to run on the Ben Eater hardware directly
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and it **will not work** with the TommyPROM hardware.
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If you want the functionality of the TommyPROM software on the Ben Eater hardware, the
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If you want the functionality of the TommyPROM software on the Ben Eater hardware, the
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easiest path is probably to modify the hardware to match the TommyPROM software rather
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easiest path is probably to modify the hardware to match the TommyPROM software rather
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@ -88,7 +99,7 @@ so a random write on boot would be bad.
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* The OE pin is controlled by the Address shift registers. This doesn't work well with
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* The OE pin is controlled by the Address shift registers. This doesn't work well with
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the modular architecture of TommyPROM and it definitely would not work with 74LS164s
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the modular architecture of TommyPROM and it definitely would not work with 74LS164s
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because it would toggle the OE pin as new addresses are shifted in.
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because it would toggle the OE pin as new addresses are shifted in.
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* The direct port write software is a bit complicated and is more difficult to change than
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* The direct port write software is a bit complicated and is more difficult to modify than
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just renaming a few pin #defines. This was done for performance reasons, particularly
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just renaming a few pin #defines. This was done for performance reasons, particularly
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for the SDP timing, but it means that the code is not easy to change.
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for the SDP timing, but it means that the code is not easy to change.
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