broken doc image links

This commit is contained in:
Tom Nisbet 2022-12-13 08:42:46 -05:00
parent aa1b7cdcc6
commit 947dc24adf
3 changed files with 14 additions and 6 deletions

View File

@ -55,7 +55,7 @@ were unlocked and burned successfully with the TommyProm code.
The capture below shows an unlock command sequence where the tBLC is within 80us for each The capture below shows an unlock command sequence where the tBLC is within 80us for each
byte. byte.
[![Unlock Timing](images/Unlock-Timing.png)](images/Unlock-Timing.png) [![Unlock Timing](images/Unlock-Timing.png)](../images/Unlock-Timing.png)
# References # References

View File

@ -20,7 +20,7 @@ disturbing any of the wires.
The [KiCad design files](https://github.com/TomNisbet/TommyPROM/tree/master/schematics) The [KiCad design files](https://github.com/TomNisbet/TommyPROM/tree/master/schematics)
are in the project repo. are in the project repo.
[![TommyPROM PCB](images/TommyPROM-pcb-with-microcode-500.jpg)](images/TommyPROM-pcb.jpg) [![TommyPROM PCB](images/TommyPROM-pcb-with-microcode-500.jpg)](../images/TommyPROM-pcb.jpg)
## TommyPROM32 ## TommyPROM32
@ -30,7 +30,7 @@ other chips as well. It uses a set of headers that allow any of the signals to
chip to be re-routed. The default configuration, with just jumper shunts installed, is chip to be re-routed. The default configuration, with just jumper shunts installed, is
wired for the SST39SF0x0 chips. wired for the SST39SF0x0 chips.
[![TommyPROM PCB](images/TommyPROM32-SST39SF-500.jpg)](images/TommyPROM32-SST39SF.jpg) [![TommyPROM PCB](images/TommyPROM32-SST39SF-500.jpg)](../images/TommyPROM32-SST39SF.jpg)
Many other chips, particularly if they follow JEDEC standards, can be supported by Many other chips, particularly if they follow JEDEC standards, can be supported by
removing shunts and adding just a few jumper wires. removing shunts and adding just a few jumper wires.
@ -40,7 +40,7 @@ Chips with fewer pins can also be supported. There are power pins in place to s
28C256 with a power jumper on pin 28, the _WE_ signal moved down to pin 27, and the _A14_ 28C256 with a power jumper on pin 28, the _WE_ signal moved down to pin 27, and the _A14_
signal moved from ping 27 to pin 1. signal moved from ping 27 to pin 1.
[![TommyPROM PCB](images/TommyPROM32-28C256-500.jpg)](images/TommyPROM32-28C256.jpg) [![TommyPROM PCB](images/TommyPROM32-28C256-500.jpg)](../images/TommyPROM32-28C256.jpg)
Power inputs and a switch are provided to support older flash and EEPROM chips that need Power inputs and a switch are provided to support older flash and EEPROM chips that need
higher programming voltages. Many of these chips just need a higher voltage, like 12V, higher programming voltages. Many of these chips just need a higher voltage, like 12V,
@ -55,14 +55,14 @@ supply. The _VPP Out_ signal is connected to the chip's VPP on pin 1. The chip
programming mode when the slide switch is set to the _High_ position and is in read mode programming mode when the slide switch is set to the _High_ position and is in read mode
when in the _Low_ position. when in the _Low_ position.
[![TommyPROM PCB](images/TommyPROM32-27C257-pgm-500.jpg)](images/TommyPROM32-27C257-pgm.jpg) [![TommyPROM PCB](images/TommyPROM32-27C257-pgm-500.jpg)](../images/TommyPROM32-27C257-pgm.jpg)
To erase the WE27C257 chip, the external power supply is providing 14V and the _VPP Out_ To erase the WE27C257 chip, the external power supply is providing 14V and the _VPP Out_
is connected to the chip's _VPP_ and _A9_ pins. An external breadboard was needed to is connected to the chip's _VPP_ and _A9_ pins. An external breadboard was needed to
allow the _VPP Out_ signal to be connected to multiple pins. A new spin of the board is allow the _VPP Out_ signal to be connected to multiple pins. A new spin of the board is
planned with multiple _VPP Output_ pins and some general-purpose interconnect pins. planned with multiple _VPP Output_ pins and some general-purpose interconnect pins.
[![TommyPROM PCB](images/TommyPROM32-27C257-erase-500.jpg)](images/TommyPROM32-27C257-erase.jpg) [![TommyPROM PCB](images/TommyPROM32-27C257-erase-500.jpg)](../images/TommyPROM32-27C257-erase.jpg)
For chips that require a high voltage VPP pulse during programming, some external For chips that require a high voltage VPP pulse during programming, some external

View File

@ -205,3 +205,11 @@ Note that some versions of the 29C040 use a 256 byte sector size. This will not
with the TommyPROM code because the XModem transfer buffer is only 128 bytes. Code with the TommyPROM code because the XModem transfer buffer is only 128 bytes. Code
changes would be needed to buffer up two packets of data into a single write operation changes would be needed to buffer up two packets of data into a single write operation
for chips with the 256 byte buffer. for chips with the 256 byte buffer.
# Chips to be Tested
|Model |Manufacturer |Type |Module |Notes|
|:--- |:--- |:--- |:--- |:--- |
|M27C4001 |ST Micro |EEPROM | |VCC=6.5V, VPP=12.75V to pgm|
|SST27SF020|SST |Flash | |12V continuous for pgm/erase|
|SST28SF040|SST |Flash | |5V with cmds|