From dfbd9979ae0cb9694b3f6cdf3cb95bf2eeae8972 Mon Sep 17 00:00:00 2001 From: Tom Nisbet Date: Thu, 20 Jun 2019 16:26:52 -0400 Subject: [PATCH] Add devices to 28C readme --- README-28C.md | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/README-28C.md b/README-28C.md index 028df4e..5b3b16e 100644 --- a/README-28C.md +++ b/README-28C.md @@ -11,7 +11,12 @@ In practice, the Xicor chips seem very forgiving of the timing, doing successful # Solution -The TommyProm programmer uses direct port access to control the data bus and addressing shift register. This is much faster than doing individual DigitalWrite calls and allows the unlock and page write code to run comfortably with the tBLC constraints. It has been tested with Atmel chips and multiple batches of Xicor 28C256 chips with success. +The TommyProm programmer uses direct port access to control the data bus and addressing shift register. This is much faster than doing individual DigitalWrite calls and allows the unlock and page write code to run comfortably with the tBLC constraints. It has been successfully tested with the following 28C256 chips: + +* Atmel AT28C256-15PU +* Catalyst/ON Semi CSI CAT28C256P-12 +* Xicor X28C256P-15 +* Xicor X28C256P-25 The capture below shows an unlock command sequence where the tBLC us within 80us for each byte.