mirror of
https://github.com/TomNisbet/TommyPROM.git
synced 2024-11-24 23:31:42 +00:00
420 lines
18 KiB
Plaintext
420 lines
18 KiB
Plaintext
(kicad_pcb (version 20171130) (host pcbnew "(5.1.9)-1")
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(general
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(thickness 1.6)
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(drawings 6)
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(tracks 28)
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(zones 0)
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(modules 3)
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(nets 29)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 0 0)
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(visible_elements 7FFFFFFF)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(linewidth 0.100000)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(plotvalue true)
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(plotinvisibletext false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 A15)
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(net 2 D2)
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(net 3 D1)
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(net 4 D0)
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(net 5 A0)
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(net 6 A1)
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(net 7 A2)
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(net 8 A3)
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(net 9 A4)
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(net 10 A5)
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(net 11 A6)
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(net 12 A7)
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(net 13 A12)
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(net 14 A14)
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(net 15 D3)
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(net 16 D4)
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(net 17 D5)
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(net 18 D6)
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(net 19 D7)
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(net 20 ~CE)
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(net 21 A10)
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(net 22 ~OE)
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(net 23 A11)
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(net 24 A9)
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(net 25 A8)
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(net 26 A13)
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(net 27 ~WE)
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(net 28 VCC)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net A0)
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(add_net A1)
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(add_net A10)
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(add_net A11)
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(add_net A12)
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(add_net A13)
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(add_net A14)
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(add_net A15)
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(add_net A2)
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(add_net A3)
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(add_net A4)
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(add_net A5)
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(add_net A6)
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(add_net A7)
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(add_net A8)
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(add_net A9)
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(add_net D0)
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(add_net D1)
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(add_net D2)
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(add_net D3)
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(add_net D4)
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(add_net D5)
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(add_net D6)
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(add_net D7)
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(add_net VCC)
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(add_net ~CE)
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(add_net ~OE)
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(add_net ~WE)
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)
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(module Connector_PinSocket_2.54mm:PinSocket_1x14_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A434) (tstamp 619B97B9)
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(at 152.38 62.8)
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(descr "Through hole straight socket strip, 1x14, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
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(tags "Through hole socket strip THT 1x14 2.54mm single row")
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(path /61AFECD6)
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(fp_text reference J4 (at 0 -2.77) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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)
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(fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1))
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(fp_line (start 1.33 1.27) (end 1.33 34.35) (layer F.SilkS) (width 0.12))
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(fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12))
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(fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.75 -1.8) (end 1.75 34.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.75 34.8) (end -1.8 34.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.8 34.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
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(effects (font (size 1 1) (thickness 0.15)))
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(pad 14 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 15 D3))
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(net 16 D4))
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(pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 17 D5))
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(pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 18 D6))
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(pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 19 D7))
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(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 20 ~CE))
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(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 21 A10))
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(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 22 ~OE))
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(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 23 A11))
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(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 24 A9))
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(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 25 A8))
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(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 26 A13))
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(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 27 ~WE))
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(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 28 VCC))
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(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x14_P2.54mm_Vertical.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Connector_PinSocket_2.54mm:PinSocket_1x14_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A434) (tstamp 619B9797)
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(at 144.76 62.8)
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(descr "Through hole straight socket strip, 1x14, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
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(tags "Through hole socket strip THT 1x14 2.54mm single row")
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(path /61AFEB74)
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(fp_text reference J3 (at 0 -2.77) (layer F.SilkS)
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(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 14 A14))
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)
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(module Package_DIP:DIP-28_W15.24mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 619B9825)
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(at 140.9 62.8)
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(descr "28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils)")
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(tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil")
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(net 3 D1))
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(net 25 A8))
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(net 4 D0))
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(net 23 A11))
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(net 6 A1))
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|
(net 22 ~OE))
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|
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|
(net 7 A2))
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