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fake vertical blank refresh period

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Jorj Bauer 2017-07-13 20:29:50 -04:00
parent ddd4fc2eb3
commit 16615e60b1
1 changed files with 9 additions and 1 deletions
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10
apple/applemmu.cpp
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@ -352,7 +352,15 @@ uint8_t AppleMMU::readSwitches(uint16_t address)
case 0xC018: // RD80COL case 0xC018: // RD80COL
return (switches & S_80STORE) ? 0x80 : 0x00; return (switches & S_80STORE) ? 0x80 : 0x00;
// 0xC019: RDVBLBAR -- is the vertical blanking low? case 0xC019: // RDVBLBAR -- vertical blanking, for 4550 cycles of every 17030
// Should return 0 for 4550 of 17030 cycles. Since we're not really
// running full speed video, instead, I'm returning 0 for 4096 (2^12)
// of every 16384 (2^14) cycles; the math is easier.
if ((g_cpu->cycles & 0x3000) == 0x3000) {
return 0x00;
} else {
return 0xFF; // FIXME: is 0xFF correct? Or 0x80?
}
case 0xC01A: // RDTEXT case 0xC01A: // RDTEXT
return ( (switches & S_TEXT) ? 0x80 : 0x00 ); return ( (switches & S_TEXT) ? 0x80 : 0x00 );
case 0xC01B: // RDMIXED case 0xC01B: // RDMIXED