From 18356b92fe757f5a052da42753ca7f6f87b43f97 Mon Sep 17 00:00:00 2001
From: Jorj Bauer <jorj@jorj.org>
Date: Fri, 21 Jan 2022 08:03:40 -0500
Subject: [PATCH] playing with PLL, pixel clock, and SPI bus speed: up to 17
 fps

---
 teensy/RA8875_t4.cpp      | 8 ++++----
 teensy/teensy-display.cpp | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/teensy/RA8875_t4.cpp b/teensy/RA8875_t4.cpp
index e7eba26..3bed5ef 100644
--- a/teensy/RA8875_t4.cpp
+++ b/teensy/RA8875_t4.cpp
@@ -217,11 +217,11 @@ void RA8875_t4::_initializeTFT()
   delay(10);
 
   // Update the sysclock
-  _writeRegister(RA8875_PLLC1, 0x0B); // %0000 1011 == pre-drive /1; input /11
+  _writeRegister(RA8875_PLLC1, 0x1D);
   delay(1);
-  _writeRegister(RA8875_PLLC1+1, 0x02); // %0000 0010 == PLL output /4
+  _writeRegister(RA8875_PLLC1+1, 0x02);
   delay(1);
-  _writeRegister(RA8875_PCSR, 0x81); // %1000 0001 == PDAT at PCLK falling edge; PCLK period is 2* system clock period
+  _writeRegister(RA8875_PCSR, 0x82);
   delay(1);
 
   _clock = _spi_clock; // speed up to full speed now
@@ -241,7 +241,7 @@ void RA8875_t4::_initializeTFT()
   fillWindow(); // defaults to black
 
   // turn on backlight
-  _writeRegister(RA8875_P1CR, (RA8875_PxCR_ENABLE | (RA8875_PWM_CLK_DIV1024 & 0xF)));
+  _writeRegister(RA8875_P1CR, (RA8875_PxCR_ENABLE | (RA8875_PWM_CLK_DIV2048 & 0xF)));
   _writeRegister(RA8875_P1DCR, 255); // brightness
   
   // set graphics mode & default memory write order/behavior
diff --git a/teensy/teensy-display.cpp b/teensy/teensy-display.cpp
index 7c797d2..66b55c8 100644
--- a/teensy/teensy-display.cpp
+++ b/teensy/teensy-display.cpp
@@ -24,7 +24,7 @@ extern const unsigned char interface_glyphs[256];
 DMAMEM uint8_t dmaBuffer[RA8875_HEIGHT][RA8875_WIDTH] /*__attribute__((aligned(32))*/;
 
 #include <SPI.h>
-#define _clock 20000000u // FIXME bring this up - it's under the default now
+#define _clock 79500000u
 
 #define PIN_RST 8
 #define PIN_DC 9