diff --git a/Makefile b/Makefile
index 54b22c6..ed0988b 100755
--- a/Makefile
+++ b/Makefile
@@ -27,12 +27,13 @@ linuxfb: roms $(COMMONOBJS) $(FBOBJS)
g++ $(LDFLAGS) $(FBLIBS) -o aiie-fb $(COMMONOBJS) $(FBOBJS)
clean:
- rm -f *.o *~ */*.o */*~ testharness.basic testharness.verbose testharness.extended apple/diskii-rom.h apple/applemmu-rom.h apple/parallel-rom.h aiie-sdl
+ rm -f *.o *~ */*.o */*~ testharness.basic testharness.verbose testharness.extended testharness apple/diskii-rom.h apple/applemmu-rom.h apple/parallel-rom.h aiie-sdl
test: $(TSRC)
- g++ $(CXXFLAGS) -DEXIT_ON_ILLEGAL -DVERBOSE_CPU_ERRORS -DTESTHARNESS -DBASICTEST $(TSRC) -o testharness.basic
- g++ $(CXXFLAGS) -DEXIT_ON_ILLEGAL -DVERBOSE_CPU_ERRORS -DTESTHARNESS -DVERBOSETEST $(TSRC) -o testharness.verbose
- g++ $(CXXFLAGS) -DEXIT_ON_ILLEGAL -DVERBOSE_CPU_ERRORS -DTESTHARNESS -DEXTENDEDTEST $(TSRC) -o testharness.extended
+ g++ $(CXXFLAGS) -DEXIT_ON_ILLEGAL -DVERBOSE_CPU_ERRORS -DTESTHARNESS $(TSRC) -o testharness
+ ./testharness -f tests/6502_functional_test_verbose.bin -s 0x400 && \
+ ./testharness -f tests/65C02_extended_opcodes_test.bin -s 0x400 && \
+ ./testharness -f tests/65c02-all.bin -s 0x200
roms: apple2e.rom disk.rom parallel.rom HDDRVR.BIN
./util/genrom.pl apple2e.rom disk.rom parallel.rom HDDRVR.BIN
diff --git a/tests/6502_decimal_test.a65 b/tests/6502_decimal_test.a65
new file mode 100644
index 0000000..a4d7c0b
--- /dev/null
+++ b/tests/6502_decimal_test.a65
@@ -0,0 +1,355 @@
+; Verify decimal mode behavior
+; Written by Bruce Clark. This code is public domain.
+; see http://www.6502.org/tutorials/decimal_mode.html
+;
+; Returns:
+; ERROR = 0 if the test passed
+; ERROR = 1 if the test failed
+; modify the code at the DONE label for desired program end
+;
+; This routine requires 17 bytes of RAM -- 1 byte each for:
+; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+; and 2 bytes for N2H
+;
+; Variables:
+; N1 and N2 are the two numbers to be added or subtracted
+; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+; DA and DNVZC are the actual accumulator and flag results in decimal mode
+; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+; added or subtracted using binary arithmetic
+; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+; flag results, calculated using binary arithmetic
+;
+; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+; a 65C02 than a 6502 or 65816)
+;
+
+; Configuration:
+cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+chk_a = 1 ; check accumulator
+chk_n = 0 ; check sign (negative) flag
+chk_v = 0 ; check overflow flag
+chk_z = 0 ; check zero flag
+chk_c = 0 ; check carry flag
+
+end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+ org 0
+; operands - register Y = carry in
+N1 ds 1
+N2 ds 1
+; binary result
+HA ds 1
+HNVZC ds 1
+ ;04
+; decimal result
+DA ds 1
+DNVZC ds 1
+; predicted results
+AR ds 1
+NF ds 1
+ ;08
+VF ds 1
+ZF ds 1
+CF ds 1
+ERROR ds 1
+ ;0C
+; workspace
+N1L ds 1
+N1H ds 1
+N2L ds 1
+N2H ds 2
+
+ code
+ org $200
+TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+ sty ERROR ; store 1 in ERROR until the test passes
+ lda #0 ; initialize N1 and N2
+ sta N1
+ sta N2
+LOOP1 lda N2 ; N2L = N2 & $0F
+ and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+ sta N2L
+ lda N2 ; N2H = N2 & $F0
+ and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+ sta N2H
+ ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+ sta N2H+1
+LOOP2 lda N1 ; N1L = N1 & $0F
+ and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+ sta N1L
+ lda N1 ; N1H = N1 & $F0
+ and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+ sta N1H
+ jsr ADD
+ jsr A6502
+ jsr COMPARE
+ bne DONE
+ jsr SUB
+ jsr S6502
+ jsr COMPARE
+ bne DONE
+NEXT1 inc N1 ; [5] see text
+ bne LOOP2 ; loop through all 256 values of N1
+NEXT2 inc N2 ; [6] see text
+ bne LOOP1 ; loop through all 256 values of N2
+ dey
+ bpl LOOP1 ; loop through both values of the carry flag
+ lda #0 ; test passed, so store 0 in ERROR
+ sta ERROR
+DONE
+ end_of_test
+
+; Calculate the actual decimal mode accumulator and flags, the accumulator
+; and flag results when N1 is added to N2 using binary arithmetic, the
+; predicted accumulator result, the predicted carry flag, and the predicted
+; V flag
+;
+ADD sed ; decimal mode
+ cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1
+ adc N2
+ sta DA ; actual accumulator result in decimal mode
+ php
+ pla
+ sta DNVZC ; actual flags result in decimal mode
+ cld ; binary mode
+ cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1
+ adc N2
+ sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+ php
+ pla
+ sta HNVZC ; flags result of N1+N2 using binary arithmetic
+ cpy #1
+ lda N1L
+ adc N2L
+ cmp #$0A
+ ldx #0
+ bcc A1
+ inx
+ adc #5 ; add 6 (carry is set)
+ and #$0F
+ sec
+A1 ora N1H
+;
+; if N1L + N2L < $0A, then add N2 & $F0
+; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+;
+ adc N2H,x
+ php
+ bcs A2
+ cmp #$A0
+ bcc A3
+A2 adc #$5F ; add $60 (carry is set)
+ sec
+A3 sta AR ; predicted accumulator result
+ php
+ pla
+ sta CF ; predicted carry result
+ pla
+;
+; note that all 8 bits of the P register are stored in VF
+;
+ sta VF ; predicted V flags
+ rts
+
+; Calculate the actual decimal mode accumulator and flags, and the
+; accumulator and flag results when N2 is subtracted from N1 using binary
+; arithmetic
+;
+SUB sed ; decimal mode
+ cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1
+ sbc N2
+ sta DA ; actual accumulator result in decimal mode
+ php
+ pla
+ sta DNVZC ; actual flags result in decimal mode
+ cld ; binary mode
+ cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1
+ sbc N2
+ sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+ php
+ pla
+ sta HNVZC ; flags result of N1-N2 using binary arithmetic
+ rts
+
+ if cputype != 1
+; Calculate the predicted SBC accumulator result for the 6502 and 65816
+;
+SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+S11 ora N1H
+;
+; if N1L - N2L >= 0, then subtract N2 & $F0
+; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+;
+SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S21
+ inx
+ and #$0F
+ clc
+S21 ora N1H
+;
+; if N1L - N2L >= 0, then subtract N2 & $F0
+; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+;
+ sbc N2H,x
+ bcs S22
+ sbc #$5F ; subtract $60 (carry is clear)
+S22 cpx #0
+ beq S23
+ sbc #6
+S23 sta AR ; predicted accumulator result
+ rts
+ endif
+
+; Compare accumulator actual results to predicted results
+;
+; Return:
+; Z flag = 1 (BEQ branch) if same
+; Z flag = 0 (BNE branch) if different
+;
+COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+C1 rts
+
+; These routines store the predicted values for ADC and SBC for the 6502,
+; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+A6502 lda VF ; 6502
+;
+; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+; the N flag for NF
+;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+A6502 lda AR ; 65C02
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+S6502 jsr SUB2
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+ if cputype = 2
+
+A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+ end TEST
diff --git a/tests/6502_functional_test.bin b/tests/6502_functional_test.bin
new file mode 100644
index 0000000..3bbab40
Binary files /dev/null and b/tests/6502_functional_test.bin differ
diff --git a/tests/6502_functional_test.hex b/tests/6502_functional_test.hex
new file mode 100644
index 0000000..500da16
--- /dev/null
+++ b/tests/6502_functional_test.hex
@@ -0,0 +1,427 @@
+:16000A00000000000000000000C38241007F001F71800FFF7F80BE
+:20002000FF0F8F8F1702180219021A021B021F0103020402050206020B014E024F025002D4
+:1A004000510252025302540255024A024B024C024D020302040204010501B1
+:200200000000000000000000290060490060090060690060E90060C38241007F808000022A
+:20022000860482008705830161412000E1C1A0808101800281018000010001028180818012
+:200240007F80FF00010080800200001F71800FFF7F80FF0F8F8F00F11F00F0FFFFFFFFF068
+:0A026000F00F00FF7F800280008095
+:20040000D8A2FF9AA9008D0002A2054C3304A005D0084C120488888888888888888888F048
+:20042000174C2104CACACACACACACACACACAF0DE4C3004D0F44C3504AD0002C900D0FEA9CA
+:20044000018D0002A0FE8898AA1008186902EAEAEAEAEAEAEAEAEAEA497F8DE604A9004CB1
+:20046000E504CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACAE7
+:20048000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA1C
+:2004A000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACAFC
+:2004C000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACADC
+:2004E000CACACACACAF03ECACACACACACACACACACACACACACACACACACACACACACACACACA22
+:20050000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA9B
+:20052000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA7B
+:20054000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA5B
+:20056000CACACACACACAEAEAEAEAEAF0084C6D05EAEAEAEAEAEAEAEAEAEAC000F0034C460E
+:2005800004AD0002C901D0FEA9028D0002C001D0034C9105A900C900D0FE90FE30FEC9019A
+:2005A000F0FEB0FE10FEAAE000D0FE90FE30FEE001F0FEB0FE10FEA8C000D0FE90FE30FE00
+:2005C000C001F0FEB0FE10FEAD0002C902D0FEA9038D0002A2FF9AA95548A9AA48CDFE0145
+:2005E000D0FEBA8AC9FDD0FE68C9AAD0FE68C955D0FECDFF01D0FEBAE0FFD0FEAD0002C9DE
+:2006000003D0FEA9048D0002A9FF4828101A501B901CD01D30034C160670034C1B06B00359
+:200620004C2006F00F4C25064C28064C2B064C2E064C310608BAE0FED0FE68C9FFD0FEBAB2
+:20064000E0FFD0FEA9004828301A701BB01CF01D10034C520650034C570690034C5C06D062
+:200660000F4C61064C64064C67064C6A064C6D060868C930D0FEA9024828D002F0034C7EED
+:2006800006B00290034C8506300210034C8C06700250034C9306A9014828F002D0034C9EA2
+:2006A000069002B0034CA506300210034CAC06700250034CB306A9804828F002D0034CBE83
+:2006C00006B00290034CC506100230034CCC06700250034CD306A9404828F002D0034CDE23
+:2006E00006B00290034CE506300210034CEC06500270034CF306A9FD4828F002D0034CFEC6
+:20070000069002B0034C0507100230034C0C07500270034C1307A9FE4828D002F0034C1E21
+:2007200007B00290034C2507100230034C2C07500270034C3307A97F4828D002F0034C3EFF
+:20074000079002B0034C4507300210034C4C07500270034C5307A9BF4828D002F0034C5E1F
+:20076000079002B0034C6507100230034C6C07700250034C7307AD0002C904D0FEA9058D61
+:200780000002A255A0AAA9FF48A901284808C901D0FE6848C9FFD0FE28A90048A9002848F4
+:2007A00008C900D0FE6848C930D0FE28A9FF48A9FF284808C9FFD0FE6848C9FFD0FE28A93E
+:2007C0000048A901284808C901D0FE6848C930D0FE28A9FF48A900284808C900D0FE684820
+:2007E000C9FFD0FE28A90048A9FF284808C9FFD0FE6848C930D0FE28A9FF48A900286808C4
+:20080000C9FFD0FE6848C9FDD0FE28A90048A9FF286808C900D0FE6848C932D0FE28A9FFC5
+:2008200048A9FE286808C901D0FE6848C97DD0FE28A90048A900286808C9FFD0FE6848C96C
+:20084000B0D0FE28A9FF48A9FF286808C900D0FE6848C97FD0FE28A90048A9FE286808C944
+:2008600001D0FE6848C930D0FE28E055D0FEC0AAD0FEAD0002C905D0FEA9068D0002A9009D
+:2008800048A93C2849C308C9FFD0FE6848C9B0D0FE28A90048A9C32849C308C900D0FE68A2
+:2008A00048C932D0FE28AD0002C906D0FEA9078D0002A224A042A90048A91828EA08C9181F
+:2008C000D0FE6848C930D0FE28E024D0FEC042D0FEA2DBA0BDA9FF48A9E728EA08C9E7D015
+:2008E000FE6848C9FFD0FE28E0DBD0FEC0BDD0FEAD0002C907D0FEA9088D0002A900482812
+:20090000A946A241A0524CEF36EAEAD0FEE8E8F0FE10FE90FE50FEC9ECD0FEE042D0FEC025
+:200920004FD0FECAC8C8C849AA4C3209EAEAD0FEE8E8F0FE30FE90FE50FEC946D0FEE04196
+:20094000D0FEC052D0FEAD0002C908D0FEA9098D0002A9004828A949A24EA0446C1E37EAD0
+:20096000D0FE88880888888828F0FE10FE90FE50FEC9E3D0FEE04FD0FEC03ED0FEBAE0FF1D
+:20098000D0FEAD0002C909D0FEA90A8D0002A9004828A94AA253A052205D37088888882889
+:2009A000F0FE10FE90FE50FEC9E0D0FEE054D0FEC04CD0FEBAE0FFD0FEAD0002C90AD0FE55
+:2009C000A90B8D0002A90048A942A252A04B28008808888888C9E8D0FEE053D0FEC045D074
+:2009E000FE68C930D0FEBAE0FFD0FEA9FF48A9BDA2ADA0B428008808888888C917D0FEE08C
+:200A0000AED0FEC0AED0FE68C9FFD0FEBAE0FFD0FEAD0002C90BD0FEA90C8D0002A9FF4834
+:200A20002818086848C9FED0FE2838086848C9FFD0FE2858086848C9FBD0FE287808684859
+:200A4000C9FFD0FE28D8086848C9F7D0FE28F8086848C9FFD0FE28B8086848C9BFD0FE2836
+:200A6000A9004828086848C930D0FE2838086848C931D0FE2818086848C930D0FE28780897
+:200A80006848C934D0FE2858086848C930D0FE28F8086848C938D0FE28D8086848C930D0B4
+:200AA000FE28A9404828086848C970D0FE28B8086848C930D0FE28AD0002C90CD0FEA90D69
+:200AC0008D0002A2FEA9FF4828E808E0FFD0FE6848C9FDD0FE28E808E000D0FE6848C97F30
+:200AE000D0FE28E808E001D0FE6848C97DD0FE28CA08E000D0FE6848C97FD0FE28CA08E055
+:200B0000FFD0FE6848C9FDD0FE28CAA9004828E808E0FFD0FE6848C9B0D0FE28E808E0002D
+:200B2000D0FE6848C932D0FE28E808E001D0FE6848C930D0FE28CA08E000D0FE6848C932DD
+:200B4000D0FE28CA08E0FFD0FE6848C9B0D0FE28A0FEA9FF4828C808C0FFD0FE6848C9FD78
+:200B6000D0FE28C808C000D0FE6848C97FD0FE28C808C001D0FE6848C97DD0FE288808C098
+:200B800000D0FE6848C97FD0FE288808C0FFD0FE6848C9FDD0FE2888A9004828C808C0FFE0
+:200BA000D0FE6848C9B0D0FE28C808C000D0FE6848C932D0FE28C808C001D0FE6848C93041
+:200BC000D0FE288808C000D0FE6848C932D0FE288808C0FFD0FE6848C9B0D0FE28A2FFA9DA
+:200BE000FF48288A08C9FFD0FE6848C9FDD0FE2808E8288A08C900D0FE6848C97FD0FE28C3
+:200C000008E8288A08C901D0FE6848C97DD0FE28A90048288A08C901D0FE6848C930D0FEEC
+:200C20002808CA288A08C900D0FE6848C932D0FE2808CA288A08C9FFD0FE6848C9B0D0FEAF
+:200C400028A0FFA9FF48289808C9FFD0FE6848C9FDD0FE2808C8289808C900D0FE6848C96B
+:200C60007FD0FE2808C8289808C901D0FE6848C97DD0FE28A90048289808C901D0FE6848E2
+:200C8000C930D0FE280888289808C900D0FE6848C932D0FE280888289808C9FFD0FE684837
+:200CA000C9B0D0FE28A9FF48A2FF8A28A808C0FFD0FE6848C9FDD0FE2808E88A28A808C0C7
+:200CC00000D0FE6848C97FD0FE2808E88A28A808C001D0FE6848C97DD0FE28A90048A900F1
+:200CE0008A28A808C001D0FE6848C930D0FE2808CA8A28A808C000D0FE6848C932D0FE2801
+:200D000008CA8A28A808C0FFD0FE6848C9B0D0FE28A9FF48A0FF9828AA08E0FFD0FE684895
+:200D2000C9FDD0FE2808C89828AA08E000D0FE6848C97FD0FE2808C89828AA08E001D0FE28
+:200D40006848C97DD0FE28A90048A9009828AA08E001D0FE6848C930D0FE2808889828AA53
+:200D600008E000D0FE6848C932D0FE2808889828AA08E0FFD0FE6848C9B0D0FE28AD00029F
+:200D8000C90DD0FEA90E8D0002A201A9FF48289A08AD0101C9FFD0FEA90048289A08AD015E
+:200DA00001C930D0FECAA9FF48289A08AD0001C9FFD0FEA90048289A08AD0001C930D0FE73
+:200DC000CAA9FF48289A08ADFF01C9FFD0FEA90048289A08ADFF01C930A2019AA9FF482896
+:200DE000BA08E001D0FEAD0101C97DD0FEA9FF4828BA08E000D0FEAD0001C97FD0FEA9FFCB
+:200E00004828BA08E0FFD0FEADFF01C9FDD0FEA2019AA9004828BA08E001D0FEAD0101C973
+:200E200030D0FEA9004828BA08E000D0FEAD0001C932D0FEA9004828BA08E0FFD0FEADFF80
+:200E400001C9B0D0FE68AD0002C90ED0FEA90F8D0002A003A9004828B613088A49C3289963
+:200E600003020849C3D91702D0FE684930D91C02D0FE8810DFA003A9FF4828B613088A491D
+:200E8000C3289903020849C3D91702D0FE68497DD91C02D0FE8810DFA003A9004828BE17FA
+:200EA00002088A49C3AA28960C0849C3D91300D0FE684930D91C02D0FE8810DEA003A9FFE9
+:200EC0004828BE1702088A49C3AA28960C0849C3D91300D0FE68497DD91C02D0FE8810DE82
+:200EE000A003A200B90C0049C3D91300D0FE960CB9030249C3D91702D0FE8A990302881036
+:200F0000E3AD0002C90FD0FEA9108D0002A0FDB6198A99090188C0FAB0F5A0FDBE1D0196C2
+:200F20001288C0FAB0F6A003A200B90C00D91300D0FE960CB90302D91702D0FE8A990302AB
+:200F40008810E7AD0002C910D0FEA9118D0002A203A9004828B413089849C3289D03020870
+:200F600049C3DD1702D0FE684930DD1C02D0FECA10DFA203A9FF4828B413089849C3289D49
+:200F800003020849C3DD1702D0FE68497DDD1C02D0FECA10DFA203A9004828BC1702089891
+:200FA00049C3A828940C0849C3D513D0FE684930DD1C02D0FECA10DFA203A9FF4828BC17F8
+:200FC00002089849C3A828940C0849C3D513D0FE68497DDD1C02D0FECA10DFA203A000B57F
+:200FE0000C49C3D513D0FE940CBD030249C3DD1702D0FE8A9D0302CA10E5AD0002C911D0AD
+:20100000FEA9128D0002A2FDB419989D0901CAE0FAB0F5A2FDBC1D019412CAE0FAB0F6A289
+:2010200003A000B50CD513D0FE940CBD0302DD1702D0FE8A9D0302CA10E9AD0002C912D027
+:20104000FEA9138D0002A9004828A613088A49C3AA288E03020849C3AAE0C3D0FE68493062
+:20106000CD1C02D0FEA9004828A614088A49C3AA288E04020849C3AAE082D0FE684930CD44
+:201080001D02D0FEA9004828A615088A49C3AA288E05020849C3AAE041D0FE684930CD1E11
+:2010A00002D0FEA9004828A616088A49C3AA288E06020849C3AAE000D0FE684930CD1F024A
+:2010C000D0FEA9FF4828A613088A49C3AA288E03020849C3AAE0C3D0FE68497DCD1C02D056
+:2010E000FEA9FF4828A614088A49C3AA288E04020849C3AAE082D0FE68497DCD1D02D0FE46
+:20110000A9FF4828A615088A49C3AA288E05020849C3AAE041D0FE68497DCD1E02D0FEA9B8
+:20112000FF4828A616088A49C3AA288E06020849C3AAE000D0FE68497DCD1F02D0FEA9007F
+:201140004828AE1702088A49C3AA28860C0849C3C513D0FE684930CD1C02D0FEA9004828E9
+:20116000AE1802088A49C3AA28860D0849C3C514D0FE684930CD1D02D0FEA9004828AE196E
+:2011800002088A49C3AA28860E0849C3C515D0FE684930CD1E02D0FEA9004828AE1A020806
+:2011A0008A49C3AA28860F0849C3C516D0FE684930CD1F02D0FEA9FF4828AE1702088A491E
+:2011C000C3AA28860C0849C3AAE413D0FE68497DCD1C02D0FEA9FF4828AE1802088A49C300
+:2011E000AA28860D0849C3AAE414D0FE68497DCD1D02D0FEA9FF4828AE1902088A49C3AAF5
+:2012000028860E0849C3AAE415D0FE68497DCD1E02D0FEA9FF4828AE1A02088A49C3AA2852
+:20122000860F0849C3AAE416D0FE68497DCD1F02D0FEA9004828A2C308EC1702D0FE68499F
+:2012400030CD1C02D0FEA9004828A28208EC1802D0FE684930CD1D02D0FEA9004828A241F5
+:2012600008EC1902D0FE684930CD1E02D0FEA9004828A20008EC1A02D0FE684930CD1F028D
+:20128000D0FEA9FF4828A2C308EC1702D0FE68497DCD1C02D0FEA9FF4828A28208EC1802F7
+:2012A000D0FE68497DCD1D02D0FEA9FF4828A24108EC1902D0FE68497DCD1E02D0FEA9FF0F
+:2012C0004828A20008EC1A02D0FE68497DCD1F02D0FEA200A50C49C3C513D0FE860CAD03ED
+:2012E0000249C3CD1702D0FE8E0302A50D49C3C514D0FE860DAD040249C3CD1802D0FE8E9F
+:201300000402A50E49C3C515D0FE860EAD050249C3CD1902D0FE8E0502A50F49C3C516D056
+:20132000FE860FAD060249C3CD1A02D0FE8E0602AD0002C913D0FEA9148D0002A90048284E
+:20134000A413089849C3A8288C03020849C3A8C0C3D0FE684930CD1C02D0FEA9004828A465
+:2013600014089849C3A8288C04020849C3A8C082D0FE684930CD1D02D0FEA9004828A41512
+:20138000089849C3A8288C05020849C3A8C041D0FE684930CD1E02D0FEA9004828A416083C
+:2013A0009849C3A8288C06020849C3A8C000D0FE684930CD1F02D0FEA9FF4828A4130898CF
+:2013C00049C3A8288C03020849C3A8C0C3D0FE68497DCD1C02D0FEA9FF4828A414089849F3
+:2013E000C3A8288C04020849C3A8C082D0FE68497DCD1D02D0FEA9FF4828A415089849C397
+:20140000A8288C05020849C3A8C041D0FE68497DCD1E02D0FEA9FF4828A416089849C3A8CF
+:20142000288C06020849C3A8C000D0FE68497DCD1F02D0FEA9004828AC1702089849C3A88A
+:2014400028840C0849C3A8C413D0FE684930CD1C02D0FEA9004828AC1802089849C3A8287E
+:20146000840D0849C3A8C414D0FE684930CD1D02D0FEA9004828AC1902089849C3A82884FE
+:201480000E0849C3A8C415D0FE684930CD1E02D0FEA9004828AC1A02089849C3A828840F4F
+:2014A0000849C3A8C416D0FE684930CD1F02D0FEA9FF4828AC1702089849C3A828840C083A
+:2014C00049C3A8C513D0FE68497DCD1C02D0FEA9FF4828AC1802089849C3A828840D08498F
+:2014E000C3A8C514D0FE68497DCD1D02D0FEA9FF4828AC1902089849C3A828840E0849C3F1
+:20150000A8C515D0FE68497DCD1E02D0FEA9FF4828AC1A02089849C3A828840F0849C3A8E7
+:20152000C516D0FE68497DCD1F02D0FEA9004828A0C308CC1702D0FE684930CD1C02D0FE47
+:20154000A9004828A08208CC1802D0FE684930CD1D02D0FEA9004828A04108CC1902D0FE42
+:20156000684930CD1E02D0FEA9004828A00008CC1A02D0FE684930CD1F02D0FEA9FF4828A3
+:20158000A0C308CC1702D0FE68497DCD1C02D0FEA9FF4828A08208CC1802D0FE68497DCD55
+:2015A0001D02D0FEA9FF4828A04108CC1902D0FE68497DCD1E02D0FEA9FF4828A00008CC13
+:2015C0001A02D0FE68497DCD1F02D0FEA000A50C49C3C513D0FE840CAD030249C3CD170200
+:2015E000D0FE8C0302A50D49C3C514D0FE840DAD040249C3CD1802D0FE8C0402A50E49C3D1
+:20160000C515D0FE840EAD050249C3CD1902D0FE8C0502A50F49C3C516D0FE840FAD0602D6
+:2016200049C3CD1A02D0FE8C0602AD0002C914D0FEA9158D0002A203A9004828B5130849D5
+:20164000C3289D03020849C3DD1702D0FE684930DD1C02D0FECA10E0A203A9FF4828B5133C
+:201660000849C3289D03020849C3DD1702D0FE68497DDD1C02D0FECA10E0A203A900482845
+:20168000BD17020849C328950C0849C3D513D0FE684930DD1C02D0FECA10E1A203A9FF48D3
+:2016A00028BD17020849C328950C0849C3D513D0FE68497DDD1C02D0FECA10E1A203A0008E
+:2016C000B50C49C3D513D0FE940CBD030249C3DD1702D0FE8A9D0302CA10E5AD0002C915DD
+:2016E000D0FEA9168D0002A003A9004828B1240849C3289903020849C3D91702D0FE6849DE
+:2017000030D91C02D0FE8810E0A003A9FF4828B1240849C3289903020849C3D91702D0FE1E
+:2017200068497DD91C02D0FE8810E0A003A200B9030249C3D91702D0FE8A9903028810EFC0
+:20174000A003A9004828B917020849C32891300849C3D124D0FE684930D91C02D0FE8810E9
+:20176000E1A003A9FF4828B917020849C32891300849C3D124D0FE68497DD91C02D0FE88AC
+:2017800010E1A003A200B9030249C3D91702D0FE8A9903028810EFA206A003A9004828A1D5
+:2017A000240849C32881300849C3D91702D0FE684930D91C02D0FECACA8810DFA206A00348
+:2017C000A9FF4828A1240849C32881300849C3D91702D0FE68497DD91C02D0FECACA88104C
+:2017E000DFA003A200B9030249C3D91702D0FE8A9903028810EFAD0002C916D0FEA9178DE3
+:201800000002A2FDB5199D0901CAE0FAB0F6A2FDBD1D019512CAE0FAB0F6A203A000B50CF7
+:20182000D513D0FE940CBD0302DD1702D0FE8A9D0302CA10E9A0FBA2FEA12C990B01CACA9C
+:2018400088C0F8B0F4A003A200B90302D91702D0FE8A9903028810F1A0FBB91F019138886B
+:20186000C0F8B0F6A003A200B90302D91702D0FE8A9903028810F1A0FBA2FEB12E8138CAF9
+:20188000CA88C0F8B0F5A003A200B90302D91702D0FE8A9903028810F1AD0002C917D0FEC8
+:2018A000A9188D0002A9004828A5130849C3288D03020849C3C9C3D0FE684930CD1C02D02F
+:2018C000FEA9004828A5140849C3288D04020849C3C982D0FE684930CD1D02D0FEA90048B0
+:2018E00028A5150849C3288D05020849C3C941D0FE684930CD1E02D0FEA9004828A51608D2
+:2019000049C3288D06020849C3C900D0FE684930CD1F02D0FEA9FF4828A5130849C3288D1D
+:2019200003020849C3C9C3D0FE68497DCD1C02D0FEA9FF4828A5140849C3288D040208495C
+:20194000C3C982D0FE68497DCD1D02D0FEA9FF4828A5150849C3288D05020849C3C941D033
+:20196000FE68497DCD1E02D0FEA9FF4828A5160849C3288D06020849C3C900D0FE68497D03
+:20198000CD1F02D0FEA9004828AD17020849C328850C0849C3C513D0FE684930CD1C02D089
+:2019A000FEA9004828AD18020849C328850D0849C3C514D0FE684930CD1D02D0FEA9004834
+:2019C00028AD19020849C328850E0849C3C515D0FE684930CD1E02D0FEA9004828AD1A020E
+:2019E0000849C328850F0849C3C516D0FE684930CD1F02D0FEA9FF4828AD17020849C328A3
+:201A0000850C0849C3C513D0FE68497DCD1C02D0FEA9FF4828AD18020849C328850D084996
+:201A2000C3C514D0FE68497DCD1D02D0FEA9FF4828AD19020849C328850E0849C3C515D0E7
+:201A4000FE68497DCD1E02D0FEA9FF4828AD1A020849C328850F0849C3C516D0FE68497D03
+:201A6000CD1F02D0FEA9004828A9C308CD1702D0FE684930CD1C02D0FEA9004828A9820883
+:201A8000CD1802D0FE684930CD1D02D0FEA9004828A94108CD1902D0FE684930CD1E02D097
+:201AA000FEA9004828A90008CD1A02D0FE684930CD1F02D0FEA9FF4828A9C308CD1702D0C8
+:201AC000FE68497DCD1C02D0FEA9FF4828A98208CD1802D0FE68497DCD1D02D0FEA9FF4849
+:201AE00028A94108CD1902D0FE68497DCD1E02D0FEA9FF4828A90008CD1A02D0FE68497D7F
+:201B0000CD1F02D0FEA200A50C49C3C513D0FE860CAD030249C3CD1702D0FE8E0302A50DBB
+:201B200049C3C514D0FE860DAD040249C3CD1802D0FE8E0402A50E49C3C515D0FE860EADAF
+:201B4000050249C3CD1902D0FE8E0502A50F49C3C516D0FE860FAD060249C3CD1A02D0FEB1
+:201B60008E0602AD0002C918D0FEA9198D0002A90048A9FF28241608C9FFD0FE6848C932DC
+:201B8000D0FE28A90048A90128241508C901D0FE6848C970D0FE28A90048A90128241408D1
+:201BA000C901D0FE6848C9B2D0FE28A90048A90128241308C901D0FE6848C9F0D0FE28A9CA
+:201BC000FF48A9FF28241608C9FFD0FE6848C93FD0FE28A9FF48A90128241508C901D0FECD
+:201BE0006848C97DD0FE28A9FF48A90128241408C901D0FE6848C9BFD0FE28A9FF48A90197
+:201C000028241308C901D0FE6848C9FDD0FE28A90048A9FF282C1A0208C9FFD0FE6848C939
+:201C200032D0FE28A90048A901282C190208C901D0FE6848C970D0FE28A90048A901282C04
+:201C4000180208C901D0FE6848C9B2D0FE28A90048A901282C170208C901D0FE6848C9F098
+:201C6000D0FE28A9FF48A9FF282C1A0208C9FFD0FE6848C93FD0FE28A9FF48A901282C1913
+:201C80000208C901D0FE6848C97DD0FE28A9FF48A901282C180208C901D0FE6848C9BFD006
+:201CA000FE28A9FF48A901282C170208C901D0FE6848C9FDD0FE28AD0002C919D0FEA91AC9
+:201CC0008D0002A90048A28028E417086848C931D0FE28CAE417086848C933D0FE28CAE47A
+:201CE0001708E07ED0FE6848C9B0D0FE28A9FF48A28028E417086848C97DD0FE28CAE4178C
+:201D0000086848C97FD0FE28CAE41708E07ED0FE6848C9FCD0FE28A90048A28028EC1B0225
+:201D2000086848C931D0FE28CAEC1B02086848C933D0FE28CAEC1B0208E07ED0FE6848C9FE
+:201D4000B0D0FE28A9FF48A28028EC1B02086848C97DD0FE28CAEC1B02086848C97FD0FE05
+:201D600028CAEC1B0208E07ED0FE6848C9FCD0FE28A90048A28028E07F086848C931D0FEAF
+:201D800028CAE07F086848C933D0FE28CAE07F08E07ED0FE6848C9B0D0FE28A9FF48A280BA
+:201DA00028E07F086848C97DD0FE28CAE07F086848C97FD0FE28CAE07F08E07ED0FE68487C
+:201DC000C9FCD0FE28AD0002C91AD0FEA91B8D0002A90048A08028C417086848C931D0FE01
+:201DE0002888C417086848C933D0FE2888C41708C07ED0FE6848C9B0D0FE28A9FF48A08008
+:201E000028C417086848C97DD0FE2888C417086848C97FD0FE2888C41708C07ED0FE68484B
+:201E2000C9FCD0FE28A90048A08028CC1B02086848C931D0FE2888CC1B02086848C933D028
+:201E4000FE2888CC1B0208C07ED0FE6848C9B0D0FE28A9FF48A08028CC1B02086848C97D99
+:201E6000D0FE2888CC1B02086848C97FD0FE2888CC1B0208C07ED0FE6848C9FCD0FE28A96C
+:201E80000048A08028C07F086848C931D0FE2888C07F086848C933D0FE2888C07F08C07E4D
+:201EA000D0FE6848C9B0D0FE28A9FF48A08028C07F086848C97DD0FE2888C07F086848C982
+:201EC0007FD0FE2888C07F08C07ED0FE6848C9FCD0FE28AD0002C91BD0FEA91C8D0002A9E9
+:201EE0000048A98028C51708C980D0FE6848C931D0FE28A90048A97F28C51708C97FD0FE73
+:201F00006848C933D0FE28A90048A97E28C51708C97ED0FE6848C9B0D0FE28A9FF48A980AE
+:201F200028C51708C980D0FE6848C97DD0FE28A9FF48A97F28C51708C97FD0FE6848C97F60
+:201F4000D0FE28A9FF48A97E28C51708C97ED0FE6848C9FCD0FE28A90048A98028CD1B02BC
+:201F600008C980D0FE6848C931D0FE28A90048A97F28CD1B0208C97FD0FE6848C933D0FEDF
+:201F800028A90048A97E28CD1B0208C97ED0FE6848C9B0D0FE28A9FF48A98028CD1B020880
+:201FA000C980D0FE6848C97DD0FE28A9FF48A97F28CD1B0208C97FD0FE6848C97FD0FE28E8
+:201FC000A9FF48A97E28CD1B0208C97ED0FE6848C9FCD0FE28A90048A98028C97F08C98075
+:201FE000D0FE6848C931D0FE28A90048A97F28C97F08C97FD0FE6848C933D0FE28A9004839
+:20200000A97E28C97F08C97ED0FE6848C9B0D0FE28A9FF48A98028C97F08C980D0FE684895
+:20202000C97DD0FE28A9FF48A97F28C97F08C97FD0FE6848C97FD0FE28A9FF48A97E28C9C8
+:202040007F08C97ED0FE6848C9FCD0FE28A204A90048A98028D51308C980D0FE6848C931E0
+:20206000D0FE28A90048A97F28D51308C97FD0FE6848C933D0FE28A90048A97E28D5130851
+:20208000C97ED0FE6848C9B0D0FE28A9FF48A98028D51308C980D0FE6848C97DD0FE28A92F
+:2020A000FF48A97F28D51308C97FD0FE6848C97FD0FE28A9FF48A97E28D51308C97ED0FE51
+:2020C0006848C9FCD0FE28A90048A98028DD170208C980D0FE6848C931D0FE28A90048A904
+:2020E0007F28DD170208C97FD0FE6848C933D0FE28A90048A97E28DD170208C97ED0FE68C8
+:2021000048C9B0D0FE28A9FF48A98028DD170208C980D0FE6848C97DD0FE28A9FF48A97FAE
+:2021200028DD170208C97FD0FE6848C97FD0FE28A9FF48A97E28DD170208C97ED0FE684873
+:20214000C9FCD0FE28A004A208A90048A98028D9170208C980D0FE6848C931D0FE28A900DA
+:2021600048A97F28D9170208C97FD0FE6848C933D0FE28A90048A97E28D9170208C97ED0C4
+:20218000FE6848C9B0D0FE28A9FF48A98028D9170208C980D0FE6848C97DD0FE28A9FF48F4
+:2021A000A97F28D9170208C97FD0FE6848C97FD0FE28A9FF48A97E28D9170208C97ED0FE83
+:2021C0006848C9FCD0FE28A90048A98028C12408C980D0FE6848C931D0FE28A90048A97F95
+:2021E00028C12408C97FD0FE6848C933D0FE28A90048A97E28C12408C97ED0FE6848C9B0A7
+:20220000D0FE28A9FF48A98028C12408C980D0FE6848C97DD0FE28A9FF48A97F28C124086A
+:20222000C97FD0FE6848C97FD0FE28A9FF48A97E28C12408C97ED0FE6848C9FCD0FE28A945
+:202240000048A98028D12408C980D0FE6848C931D0FE28A90048A97F28D12408C97FD0FEDD
+:202260006848C933D0FE28A90048A97E28D12408C97ED0FE6848C9B0D0FE28A9FF48A98032
+:2022800028D12408C980D0FE6848C97DD0FE28A9FF48A97F28D12408C97FD0FE6848C97FCB
+:2022A000D0FE28A9FF48A97E28D12408C97ED0FE6848C9FCD0FE28AD0002C91CD0FEA91D44
+:2022C0008D0002A203A90048B513280A08DD2002D0FE684930DD3002D0FECA10E8A203A93C
+:2022E000FF48B513280A08DD2002D0FE68497CDD3002D0FECA10E8A203A90048B513284A2C
+:2023000008DD2802D0FE684930DD3802D0FECA10E8A203A9FF48B513284A08DD2802D0FEAC
+:2023200068497CDD3802D0FECA10E8A203A90048B513282A08DD2002D0FE684930DD300254
+:20234000D0FECA10E8A203A9FE48B513282A08DD2002D0FE68497CDD3002D0FECA10E8A2FC
+:2023600003A90148B513282A08DD2402D0FE684930DD3402D0FECA10E8A203A9FF48B51394
+:20238000282A08DD2402D0FE68497CDD3402D0FECA10E8A203A90048B513286A08DD280243
+:2023A000D0FE684930DD3802D0FECA10E8A203A9FE48B513286A08DD2802D0FE68497CDDF2
+:2023C0003802D0FECA10E8A203A90148B513286A08DD2C02D0FE684930DD3C02D0FECA10BD
+:2023E000E8A203A9FF48B513286A08DD2C02D0FE68497CDD3C02D0FECA10E8AD0002C91DB8
+:20240000D0FEA91E8D0002A203A90048B513850C28060C08A50CDD2002D0FE684930DD30FB
+:2024200002D0FECA10E3A203A9FF48B513850C28060C08A50CDD2002D0FE68497CDD300225
+:20244000D0FECA10E3A203A90048B513850C28460C08A50CDD2802D0FE684930DD3802D032
+:20246000FECA10E3A203A9FF48B513850C28460C08A50CDD2802D0FE68497CDD3802D0FE99
+:20248000CA10E3A203A90048B513850C28260C08A50CDD2002D0FE684930DD3002D0FECA28
+:2024A00010E3A203A9FE48B513850C28260C08A50CDD2002D0FE68497CDD3002D0FECA1078
+:2024C000E3A203A90148B513850C28260C08A50CDD2402D0FE684930DD3402D0FECA10E3C6
+:2024E000A203A9FF48B513850C28260C08A50CDD2402D0FE68497CDD3402D0FECA10E3A29D
+:2025000003A90048B513850C28660C08A50CDD2802D0FE684930DD3802D0FECA10E3A2031E
+:20252000A9FE48B513850C28660C08A50CDD2802D0FE68497CDD3802D0FECA10E3A203A90E
+:202540000148B513850C28660C08A50CDD2C02D0FE684930DD3C02D0FECA10E3A203A9FFD9
+:2025600048B513850C28660C08A50CDD2C02D0FE68497CDD3C02D0FECA10E3AD0002C91E25
+:20258000D0FEA91F8D0002A203A90048B5138D0302280E030208AD0302DD2002D0FE6849B3
+:2025A00030DD3002D0FECA10E0A203A9FF48B5138D0302280E030208AD0302DD2002D0FEA3
+:2025C00068497CDD3002D0FECA10E0A203A90048B5138D0302284E030208AD0302DD28020B
+:2025E000D0FE684930DD3802D0FECA10E0A203A9FF48B5138D0302284E030208AD0302DD8C
+:202600002802D0FE68497CDD3802D0FECA10E0A203A90048B5138D0302282E030208AD03F3
+:2026200002DD2002D0FE684930DD3002D0FECA10E0A203A9FE48B5138D0302282E03020802
+:20264000AD0302DD2002D0FE68497CDD3002D0FECA10E0A203A90148B5138D0302282E03ED
+:202660000208AD0302DD2402D0FE684930DD3402D0FECA10E0A203A9FF48B5138D0302283A
+:202680002E030208AD0302DD2402D0FE68497CDD3402D0FECA10E0A203A90048B5138D03C6
+:2026A00002286E030208AD0302DD2802D0FE684930DD3802D0FECA10E0A203A9FE48B51312
+:2026C0008D0302286E030208AD0302DD2802D0FE68497CDD3802D0FECA10E0A203A90148DB
+:2026E000B5138D0302286E030208AD0302DD2C02D0FE684930DD3C02D0FECA10E0A203A980
+:20270000FF48B5138D0302286E030208AD0302DD2C02D0FE68497CDD3C02D0FECA10E0AD6D
+:202720000002C91FD0FEA9208D0002A203A90048B513950C28160C08B50CDD2002D0FE6842
+:202740004930DD3002D0FECA10E3A203A9FF48B513950C28160C08B50CDD2002D0FE6849D7
+:202760007CDD3002D0FECA10E3A203A90048B513950C28560C08B50CDD2802D0FE6849303B
+:20278000DD3802D0FECA10E3A203A9FF48B513950C28560C08B50CDD2802D0FE68497CDD67
+:2027A0003802D0FECA10E3A203A90048B513950C28360C08B50CDD2002D0FE684930DD3067
+:2027C00002D0FECA10E3A203A9FE48B513950C28360C08B50CDD2002D0FE68497CDD300233
+:2027E000D0FECA10E3A203A90148B513950C28360C08B50CDD2402D0FE684930DD3402D086
+:20280000FECA10E3A203A9FF48B513950C28360C08B50CDD2402D0FE68497CDD3402D0FEED
+:20282000CA10E3A203A90048B513950C28760C08B50CDD2802D0FE684930DD3802D0FECA04
+:2028400010E3A203A9FE48B513950C28760C08B50CDD2802D0FE68497CDD3802D0FECA1054
+:20286000E3A203A90148B513950C28760C08B50CDD2C02D0FE684930DD3C02D0FECA10E3A2
+:20288000A203A9FF48B513950C28760C08B50CDD2C02D0FE68497CDD3C02D0FECA10E3AD6E
+:2028A0000002C920D0FEA9218D0002A203A90048B5139D0302281E030208BD0302DD2002F2
+:2028C000D0FE684930DD3002D0FECA10E0A203A9FF48B5139D0302281E030208BD0302DDC1
+:2028E0002002D0FE68497CDD3002D0FECA10E0A203A90048B5139D0302285E030208BD03D1
+:2029000002DD2802D0FE684930DD3802D0FECA10E0A203A9FF48B5139D0302285E030208CE
+:20292000BD0302DD2802D0FE68497CDD3802D0FECA10E0A203A90048B5139D0302283E03CB
+:202940000208BD0302DD2002D0FE684930DD3002D0FECA10E0A203A9FE48B5139D03022840
+:202960003E030208BD0302DD2002D0FE68497CDD3002D0FECA10E0A203A90148B5139D03BA
+:2029800002283E030208BD0302DD2402D0FE684930DD3402D0FECA10E0A203A9FF48B51356
+:2029A0009D0302283E030208BD0302DD2402D0FE68497CDD3402D0FECA10E0A203A9004811
+:2029C000B5139D0302287E030208BD0302DD2802D0FE684930DD3802D0FECA10E0A203A975
+:2029E000FE48B5139D0302287E030208BD0302DD2802D0FE68497CDD3802D0FECA10E0A26F
+:202A000003A90148B5139D0302287E030208BD0302DD2C02D0FE684930DD3C02D0FECA1065
+:202A2000E0A203A9FF48B5139D0302287E030208BD0302DD2C02D0FE68497CDD3C02D0FE53
+:202A4000CA10E0AD0002C921D0FEA9228D0002A200A97E850CA9004828E60C08A50CDD40C0
+:202A600002D0FE684930DD4502D0FEE8E002D004A9FE850CE005D0DDCAE60CA9004828C6B0
+:202A80000C08A50CDD4002D0FE684930DD4502D0FECA300AE001D0E3A981850CD0DDA2000F
+:202AA000A97E850CA9FF4828E60C08A50CDD4002D0FE68497DDD4502D0FEE8E002D004A947
+:202AC000FE850CE005D0DDCAE60CA9FF4828C60C08A50CDD4002D0FE68497DDD4502D0FE69
+:202AE000CA300AE001D0E3A981850CD0DDAD0002C922D0FEA9238D0002A200A97E8D0302B8
+:202B0000A9004828EE030208AD0302DD4002D0FE684930DD4502D0FEE8E002D005A9FE8D5C
+:202B20000302E005D0DACAEE0302A9004828CE030208AD0302DD4002D0FE684930DD4502AC
+:202B4000D0FECA300BE001D0E1A9818D0302D0DAA200A97E8D0302A9FF4828EE030208AD8F
+:202B60000302DD4002D0FE68497DDD4502D0FEE8E002D005A9FE8D0302E005D0DACAEE0321
+:202B800002A9FF4828CE030208AD0302DD4002D0FE68497DDD4502D0FECA300BE001D0E1EA
+:202BA000A9818D0302D0DAAD0002C923D0FEA9248D0002A200A97E950CA9004828F60C085D
+:202BC000B50CDD4002D0FE684930DD4502D0FEB50CE8E002D002A9FEE005D0DBCAA90295D6
+:202BE0000CA9004828D60C08B50CDD4002D0FE684930DD4502D0FEB50CCA3008E001D0DFF2
+:202C0000A981D0DBA200A97E950CA9FF4828F60C08B50CDD4002D0FE68497DDD4502D0FE85
+:202C2000B50CE8E002D002A9FEE005D0DBCAA902950CA9FF4828D60C08B50CDD4002D0FE3A
+:202C400068497DDD4502D0FEB50CCA3008E001D0DFA981D0DBAD0002C924D0FEA9258D0067
+:202C600002A200A97E9D0302A9004828FE030208BD0302DD4002D0FE684930DD4502D0FE41
+:202C8000BD0302E8E002D002A9FEE005D0D7CAA9029D0302A9004828DE030208BD0302DDE9
+:202CA0004002D0FE684930DD4502D0FEBD0302CA3008E001D0DBA981D0D7A200A97E9D03A7
+:202CC00002A9FF4828FE030208BD0302DD4002D0FE68497DDD4502D0FEBD0302E8E002D0A4
+:202CE00002A9FEE005D0D7CAA9029D0302A9FF4828DE030208BD0302DD4002D0FE68497DA8
+:202D0000DD4502D0FEBD0302CA3008E001D0DBA981D0D7AD0002C925D0FEA9268D0002A235
+:202D200003B51C8D0902A90048BD5A022820080208DD6202D0FE684930DD6602D0FECA10E6
+:202D4000E0A203B51C8D0902A9FF48BD5A022820080208DD6202D0FE68497DDD6602D0FED2
+:202D6000CA10E0A203B51C850CA90048BD5A0228250C08DD6202D0FE684930DD6602D0FE24
+:202D8000CA10E2A203B51C850CA9FF48BD5A0228250C08DD6202D0FE68497DDD6602D0FEB6
+:202DA000CA10E2A203B51C8D0302A90048BD5A02282D030208DD6202D0FE684930DD6602AE
+:202DC000D0FECA10E0A203B51C8D0302A9FF48BD5A02282D030208DD6202D0FE68497DDDDE
+:202DE0006602D0FECA1002A203A90048BD5A0228351C08DD6202D0FE684930DD6602D0FE8E
+:202E0000CA10E6A203A9FF48BD5A0228351C08DD6202D0FE68497DDD6602D0FECA10E6A211
+:202E200003A90048BD5A02283D4E0208DD6202D0FE684930DD6602D0FECA10E5A203A9FFB9
+:202E400048BD5A02283D4E0208DD6202D0FE68497DDD6602D0FECA10E5A003A90048B95A9E
+:202E60000228394E0208D96202D0FE684930D96602D0FE8810E5A003A9FF48B95A02283916
+:202E80004E0208D96202D0FE68497DD96602D0FE8810E5A206A003A90048B95A0228213A41
+:202EA00008D96202D0FE684930D96602D0FECACA8810E4A206A003A9FF48B95A0228213A2C
+:202EC00008D96202D0FE68497DD96602D0FECACA8810E4A003A90048B95A0228313A08D975
+:202EE0006202D0FE684930D96602D0FE8810E6A003A9FF48B95A0228313A08D96202D0FEE4
+:202F000068497DD96602D0FE8810E6AD0002C926D0FEA9278D0002A203B5208D0C02A9006D
+:202F200048BD5E0228200B0208DD6202D0FE684930DD6602D0FECA10E0A203B5208D0C02FD
+:202F4000A9FF48BD5E0228200B0208DD6202D0FE68497DDD6602D0FECA10E0A203B52085FE
+:202F60000CA90048BD5E0228450C08DD6202D0FE684930DD6602D0FECA10E2A203B52085F8
+:202F80000CA9FF48BD5E0228450C08DD6202D0FE68497DDD6602D0FECA10E2A203B5208D84
+:202FA0000302A90048BD5E02284D030208DD6202D0FE684930DD6602D0FECA10E0A203B565
+:202FC000208D0302A9FF48BD5E02284D030208DD6202D0FE68497DDD6602D0FECA1002A2E2
+:202FE00003A90048BD5E0228552008DD6202D0FE684930DD6602D0FECA10E6A203A9FF48C3
+:20300000BD5E0228552008DD6202D0FE68497DDD6602D0FECA10E6A203A90048BD5E022803
+:203020005D520208DD6202D0FE684930DD6602D0FECA10E5A203A9FF48BD5E02285D52028A
+:2030400008DD6202D0FE68497DDD6602D0FECA10E5A003A90048B95E022859520208D96294
+:2030600002D0FE684930D96602D0FE8810E5A003A9FF48B95E022859520208D96202D0FE7F
+:2030800068497DD96602D0FE8810E5A206A003A90048B95E0228414208D96202D0FE6849B2
+:2030A00030D96602D0FECACA8810E4A206A003A9FF48B95E0228414208D96202D0FE6849FE
+:2030C0007DD96602D0FECACA8810E4A003A90048B95E0228514208D96202D0FE684930D91F
+:2030E0006602D0FE8810E6A003A9FF48B95E0228514208D96202D0FE68497DD96602D0FE65
+:203100008810E6AD0002C927D0FEA9288D0002A203B5188D0F02A90048BD560228200E02F6
+:2031200008DD6202D0FE684930DD6602D0FECA10E0A203B5188D0F02A9FF48BD560228206D
+:203140000E0208DD6202D0FE68497DDD6602D0FECA10E0A203B518850CA90048BD5602281C
+:20316000050C08DD6202D0FE684930DD6602D0FECA10E2A203B518850CA9FF48BD56022847
+:20318000050C08DD6202D0FE68497DDD6602D0FECA10E2A203B5188D0302A90048BD560200
+:2031A000280D030208DD6202D0FE684930DD6602D0FECA10E0A203B5188D0302A9FF48BD5F
+:2031C0005602280D030208DD6202D0FE68497DDD6602D0FECA1002A203A90048BD56022856
+:2031E000151808DD6202D0FE684930DD6602D0FECA10E6A203A9FF48BD560228151808DDF3
+:203200006202D0FE68497DDD6602D0FECA10E6A203A90048BD5602281D4A0208DD6202D026
+:20322000FE684930DD6602D0FECA10E5A203A9FF48BD5602281D4A0208DD6202D0FE6849DA
+:203240007DDD6602D0FECA10E5A003A90048B9560228194A0208D96202D0FE684930D966BA
+:2032600002D0FE8810E5A003A9FF48B9560228194A0208D96202D0FE68497DD96602D0FE80
+:203280008810E5A206A003A90048B9560228014A08D96202D0FE684930D96602D0FECACA5A
+:2032A0008810E4A206A003A9FF48B9560228014A08D96202D0FE68497DD96602D0FECACAEF
+:2032C0008810E4A003A90048B9560228114A08D96202D0FE684930D96602D0FE8810E6A029
+:2032E00003A9FF48B9560228114A08D96202D0FE68497DD96602D0FE8810E658AD0002C9A9
+:2033000028D0FEA9298D0002D8A20EA0FFA900850C850D850E8D0302850F8510A9FF8512D6
+:203320008D0402A90285111820A235E60CE60F080868298228D002E610051085113820A20B
+:2033400035C60CE60DD0E0A9008510EE0302E60E086829828511C612CE0402A50E850FD02A
+:20336000C6AD0002C929D0FEA92A8D0002F8A20EA0FFA999850D850E8D0302850FA90185B3
+:203380000C8510A90085128D040238206F34C60CA50FD008C610A999850FD012290FD00CBE
+:2033A000C60FC60FC60FC60FC60FC60FC60F18206F34E60CA50DF015290FD00CC60DC60DFC
+:2033C000C60DC60DC60DC60DC60D4C8A33A999850DA50EF030290FD018C60EC60EC60EC6BC
+:2033E0000EC60EC60EE612E612E612E612E612E612C60EE612A5128D0402A50E8D03028567
+:203400000FE610D085AD0002C92AD0FEA92B8D000218D808A9556955C9AAD0FE18F808A9C9
+:20342000556955C910D0FED828A9556955C910D0FE28A9556955C9AAD0FE18A93448A9550F
+:203440004808F8A93448A94C4808D840A9556955C910D0FE40A9556955C9AAD0FEAD000253
+:20346000C92BD0FEA9F08D00024C69344C000408A50D650E08C50FD0FE682901C510D0FE1D
+:203480002808A50DE51208C50FD0FE682901C510D0FE2808A50D6D030208C50FD0FE6829E5
+:2034A00001C510D0FE2808A50DED040208C50FD0FE682901C510D0FE2808A50E8D1202A58B
+:2034C0000D20110208C50FD0FE682901C510D0FE2808A5128D1502A50D20140208C50FD0AE
+:2034E000FE682901C510D0FE2808A50D750008C50FD0FE682901C510D0FE2808A50DF50488
+:2035000008C50FD0FE682901C510D0FE2808A50D7DF50108C50FD0FE682901C510D0FE2870
+:2035200008A50DFDF60108C50FD0FE682901C510D0FE2808A50D79040108C50FD0FE682963
+:2035400001C510D0FE2808A50DF9050108C50FD0FE682901C510D0FE2808A50D614408C5B3
+:203560000FD0FE682901C510D0FE2808A50DE14608C50FD0FE682901C510D0FE2808A50D6F
+:20358000715608C50FD0FE682901C510D0FE2808A50DF15808C50FD0FE682901C510D0FE7B
+:2035A0002860A511298348A50D450E300AA50D450F10046809404868851108A50D650E0854
+:2035C000C50FD0FE6829C3C511D0FE2808A50DE51208C50FD0FE6829C3C511D0FE2808A501
+:2035E0000D6D030208C50FD0FE6829C3C511D0FE2808A50DED040208C50FD0FE6829C3C512
+:2036000011D0FE2808A50E8D1202A50D20110208C50FD0FE6829C3C511D0FE2808A5128D4C
+:203620001502A50D20140208C50FD0FE6829C3C511D0FE2808A50D750008C50FD0FE682957
+:20364000C3C511D0FE2808A50DF50408C50FD0FE6829C3C511D0FE2808A50D7DF50108C564
+:203660000FD0FE6829C3C511D0FE2808A50DFDF60108C50FD0FE6829C3C511D0FE2808A528
+:203680000D79040108C50FD0FE6829C3C511D0FE2808A50DF9050108C50FD0FE6829C3C559
+:2036A00011D0FE2808A50D614408C50FD0FE6829C3C511D0FE2808A50DE14608C50FD0FE4F
+:2036C0006829C3C511D0FE2808A50D715608C50FD0FE6829C3C511D0FE2808A50DF1580874
+:2036E000C50FD0FE6829C3C511D0FE286088880888888828B0FE70FE30FEF0FEC946D0FEBB
+:20370000E041D0FEC04FD0FE488A48BAE0FDD0FE68AAA9FF482868E849AA4C0F090027372F
+:2037200064094C223788880888888828B0FE70FE30FEF0FEC949D0FEE04ED0FEC041D0FEBC
+:20374000488A48BAE0FDD0FE68AAA9FF482868E849AA6C20374C55374C000488880888886A
+:203760008828B0FE70FE30FEF0FEC94AD0FEE053D0FEC04FD0FE488A48BAE0FBD0FEADFF79
+:2037800001C909D0FEADFE01C99AD0FEA9FF482868AA68E849AA604C97374C00044C9D3754
+:2037A0004C00044CA3374C0004888808888888C9BDF042C942D0FEE052D0FEC048D0FE85A7
+:2037C0000A860BBABD0201C930D0FE68C934D0FEBAE0FCD0FEADFF01C909D0FEADFE01C9B4
+:2037E000D1D0FEA9FF48A60BE8A50A49AA28404CEF374C0004E0ADD0FEC0B1D0FE850A8626
+:203800000BBABD0201C9FFD0FE680908C9FFD0FEBAE0FCD0FEADFF01C909D0FEADFE01C958
+:15382000F7D0FEA90448A60BE8A50A49AA28404C2F384C000433
+:06FFFA009D37A337AB3771
+:00040001FB
diff --git a/tests/6502_functional_test.lst b/tests/6502_functional_test.lst
new file mode 100644
index 0000000..6834fa0
--- /dev/null
+++ b/tests/6502_functional_test.lst
@@ -0,0 +1,14354 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+---------------------------------------------------- 6502_functional_test.a65 ----------------------------------------------------
+
+6102 lines read, no errors in pass 1.
+ ;
+ ; 6 5 0 2 F U N C T I O N A L T E S T
+ ;
+ ; Copyright (C) 2012-2015 Klaus Dormann
+ ;
+ ; This program is free software: you can redistribute it and/or modify
+ ; it under the terms of the GNU General Public License as published by
+ ; the Free Software Foundation, either version 3 of the License, or
+ ; (at your option) any later version.
+ ;
+ ; This program is distributed in the hope that it will be useful,
+ ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ ; GNU General Public License for more details.
+ ;
+ ; You should have received a copy of the GNU General Public License
+ ; along with this program. If not, see .
+
+
+ ; This program is designed to test all opcodes of a 6502 emulator using all
+ ; addressing modes with focus on propper setting of the processor status
+ ; register bits.
+ ;
+ ; version 04-dec-2017
+ ; contact info at http://2m5.de or email K@2m5.de
+ ;
+ ; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
+ ; command line switches: -l -m -s2 -w -h0
+ ; | | | | no page headers in listing
+ ; | | | wide listing (133 char/col)
+ ; | | write intel hex file instead of binary
+ ; | expand macros in listing
+ ; generate pass2 listing
+ ;
+ ; No IO - should be run from a monitor with access to registers.
+ ; To run load intel hex image with a load command, than alter PC to 400 hex
+ ; (code_segment) and enter a go command.
+ ; Loop on program counter determines error or successful completion of test.
+ ; Check listing for relevant traps (jump/branch *).
+ ; Please note that in early tests some instructions will have to be used before
+ ; they are actually tested!
+ ;
+ ; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
+ ; Tests documented behavior of the original NMOS 6502 only! No unofficial
+ ; opcodes. Additional opcodes of newer versions of the CPU (65C02, 65816) will
+ ; not be tested. Decimal ops will only be tested with valid BCD operands and
+ ; N V Z flags will be ignored.
+ ;
+ ; Debugging hints:
+ ; Most of the code is written sequentially. if you hit a trap, check the
+ ; immediately preceeding code for the instruction to be tested. Results are
+ ; tested first, flags are checked second by pushing them onto the stack and
+ ; pulling them to the accumulator after the result was checked. The "real"
+ ; flags are no longer valid for the tested instruction at this time!
+ ; If the tested instruction was indexed, the relevant index (X or Y) must
+ ; also be checked. Opposed to the flags, X and Y registers are still valid.
+ ;
+ ; versions:
+ ; 28-jul-2012 1st version distributed for testing
+ ; 29-jul-2012 fixed references to location 0, now #0
+ ; added license - GPLv3
+ ; 30-jul-2012 added configuration options
+ ; 01-aug-2012 added trap macro to allow user to change error handling
+ ; 01-dec-2012 fixed trap in branch field must be a branch
+ ; 02-mar-2013 fixed PLA flags not tested
+ ; 19-jul-2013 allowed ROM vectors to be loaded when load_data_direct = 0
+ ; added test sequence check to detect if tests jump their fence
+ ; 23-jul-2013 added RAM integrity check option
+ ; 16-aug-2013 added error report to standard output option
+ ; 13-dec-2014 added binary/decimal opcode table switch test
+ ; 14-dec-2014 improved relative address test
+ ; 23-aug-2015 added option to disable self modifying tests
+ ; 24-aug-2015 all self modifying immediate opcodes now execute in data RAM
+ ; added small branch offset pretest
+ ; 21-oct-2015 added option to disable decimal mode ADC & SBC tests
+ ; 04-dec-2017 fixed BRK only tested with interrupts enabled
+ ; added option to skip the remainder of a failing test
+ ; in report.i65
+
+
+ ; C O N F I G U R A T I O N
+
+ ;ROM_vectors writable (0=no, 1=yes)
+ ;if ROM vectors can not be used interrupts will not be trapped
+ ;as a consequence BRK can not be tested but will be emulated to test RTI
+0001 = ROM_vectors = 1
+
+ ;load_data_direct (0=move from code segment, 1=load directly)
+ ;loading directly is preferred but may not be supported by your platform
+ ;0 produces only consecutive object code, 1 is not suitable for a binary image
+0001 = load_data_direct = 1
+
+ ;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
+ ;change) 2 requires extra code and is not recommended. SEI & CLI can only be
+ ;tested if you allow changing the interrupt status (I_flag = 3)
+0003 = I_flag = 3
+
+ ;configure memory - try to stay away from memory used by the system
+ ;zero_page memory start address, $50 (80) consecutive Bytes required
+ ; add 2 if I_flag = 2
+000a = zero_page = $a
+
+ ;data_segment memory start address, $6A (106) consecutive Bytes required
+0200 = data_segment = $200
+ if (data_segment & $ff) != 0
+ ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
+ endif
+
+ ;code_segment memory start address, 13kB of consecutive space required
+ ; add 2.5 kB if I_flag = 2
+0400 = code_segment = $400
+
+ ;self modifying code may be disabled to allow running in ROM
+ ;0=part of the code is self modifying and must reside in RAM
+ ;1=tests disabled: branch range
+0000 = disable_selfmod = 0
+
+ ;report errors through I/O channel (0=use standard self trap loops, 1=include
+ ;report.i65 as I/O channel, add 3.5 kB)
+0000 = report = 0
+
+ ;RAM integrity test option. Checks for undesired RAM writes.
+ ;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
+ ;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
+ffff = ram_top = -1
+
+ ;disable test decimal mode ADC & SBC, 0=enable, 1=disable,
+ ;2=disable including decimal flag in processor status
+0000 = disable_decimal = 0
+
+ noopt ;do not take shortcuts
+
+ ;macros for error & success traps to allow user modification
+ ;example:
+ ;trap macro
+ ; jsr my_error_handler
+ ; endm
+ ;trap_eq macro
+ ; bne skip\?
+ ; trap ;failed equal (zero)
+ ;skip\?
+ ; endm
+ ;
+ ; my_error_handler should pop the calling address from the stack and report it.
+ ; putting larger portions of code (more than 3 bytes) inside the trap macro
+ ; may lead to branch range problems for some tests.
+ if report = 0
+ trap macro
+ jmp * ;failed anyway
+ endm
+ trap_eq macro
+ beq * ;failed equal (zero)
+ endm
+ trap_ne macro
+ bne * ;failed not equal (non zero)
+ endm
+ trap_cs macro
+ bcs * ;failed carry set
+ endm
+ trap_cc macro
+ bcc * ;failed carry clear
+ endm
+ trap_mi macro
+ bmi * ;failed minus (bit 7 set)
+ endm
+ trap_pl macro
+ bpl * ;failed plus (bit 7 clear)
+ endm
+ trap_vs macro
+ bvs * ;failed overflow set
+ endm
+ trap_vc macro
+ bvc * ;failed overflow clear
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jmp * ;test passed, no errors
+ endm
+ endif
+ if report = 1
+ trap macro
+ jsr report_error
+ endm
+ trap_eq macro
+ bne skip\?
+ trap ;failed equal (zero)
+ skip\?
+ endm
+ trap_ne macro
+ beq skip\?
+ trap ;failed not equal (non zero)
+ skip\?
+ endm
+ trap_cs macro
+ bcc skip\?
+ trap ;failed carry set
+ skip\?
+ endm
+ trap_cc macro
+ bcs skip\?
+ trap ;failed carry clear
+ skip\?
+ endm
+ trap_mi macro
+ bpl skip\?
+ trap ;failed minus (bit 7 set)
+ skip\?
+ endm
+ trap_pl macro
+ bmi skip\?
+ trap ;failed plus (bit 7 clear)
+ skip\?
+ endm
+ trap_vs macro
+ bvc skip\?
+ trap ;failed overflow set
+ skip\?
+ endm
+ trap_vc macro
+ bvs skip\?
+ trap ;failed overflow clear
+ skip\?
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jsr report_success
+ endm
+ endif
+
+
+0001 = carry equ %00000001 ;flag bits in status
+0002 = zero equ %00000010
+0004 = intdis equ %00000100
+0008 = decmode equ %00001000
+0010 = break equ %00010000
+0020 = reserv equ %00100000
+0040 = overfl equ %01000000
+0080 = minus equ %10000000
+
+0001 = fc equ carry
+0002 = fz equ zero
+0003 = fzc equ carry+zero
+0040 = fv equ overfl
+0042 = fvz equ overfl+zero
+0080 = fn equ minus
+0081 = fnc equ minus+carry
+0082 = fnz equ minus+zero
+0083 = fnzc equ minus+zero+carry
+00c0 = fnv equ minus+overfl
+
+0030 = fao equ break+reserv ;bits always on after PHP, BRK
+0034 = fai equ fao+intdis ;+ forced interrupt disable
+0038 = faod equ fao+decmode ;+ ignore decimal
+003c = faid equ fai+decmode ;+ ignore decimal
+00ff = m8 equ $ff ;8 bit mask
+00fb = m8i equ $ff&~intdis ;8 bit mask - interrupt disable
+
+ ;macros to allow masking of status bits.
+ ;masking test of decimal bit
+ ;masking of interrupt enable/disable on load and compare
+ ;masking of always on bits after PHP or BRK (unused & break) on compare
+ if disable_decimal < 2
+ if I_flag = 0
+ load_flag macro
+ lda #\1&m8i ;force enable interrupts (mask I)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8i ;I_flag is always enabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 1
+ load_flag macro
+ lda #\1|intdis ;force disable interrupts
+ endm
+ cmp_flag macro
+ cmp #(\1|fai)&m8 ;I_flag is always disabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1|fai) ;invert expected flags + always on bits + I
+ endm
+ endif
+ if I_flag = 2
+ load_flag macro
+ lda #\1
+ ora flag_I_on ;restore I-flag
+ and flag_I_off
+ endm
+ cmp_flag macro
+ eor flag_I_on ;I_flag is never changed
+ cmp #(\1|fao)&m8i ;expected flags + always on bits, mask I
+ endm
+ eor_flag macro
+ eor flag_I_on ;I_flag is never changed
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 3
+ load_flag macro
+ lda #\1 ;allow test to change I-flag (no mask)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8 ;expected flags + always on bits
+ endm
+ eor_flag macro
+ eor #\1|fao ;invert expected flags + always on bits
+ endm
+ endif
+ else
+ if I_flag = 0
+ load_flag macro
+ lda #\1&m8i ;force enable interrupts (mask I)
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8i ;I_flag is always enabled + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 1
+ load_flag macro
+ lda #\1|intdis ;force disable interrupts
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faid)&m8 ;I_flag is always disabled + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1|faid) ;invert expected flags + always on bits + I
+ endm
+ endif
+ if I_flag = 2
+ load_flag macro
+ lda #\1
+ ora flag_I_on ;restore I-flag
+ and flag_I_off
+ endm
+ cmp_flag macro
+ eor flag_I_on ;I_flag is never changed
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8i ;expected flags + always on bits, mask I
+ endm
+ eor_flag macro
+ eor flag_I_on ;I_flag is never changed
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 3
+ load_flag macro
+ lda #\1 ;allow test to change I-flag (no mask)
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8 ;expected flags + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #\1|faod ;invert expected flags + always on bits
+ endm
+ endif
+ endif
+
+ ;macros to set (register|memory|zeropage) & status
+ set_stat macro ;setting flags in the processor status register
+ load_flag \1
+ pha ;use stack to load status
+ plp
+ endm
+
+ set_a macro ;precharging accu & status
+ load_flag \2
+ pha ;use stack to load status
+ lda #\1 ;precharge accu
+ plp
+ endm
+
+ set_x macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldx #\1 ;precharge index x
+ plp
+ endm
+
+ set_y macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldy #\1 ;precharge index y
+ plp
+ endm
+
+ set_ax macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;precharge accu
+ plp
+ endm
+
+ set_ay macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,y ;precharge accu
+ plp
+ endm
+
+ set_z macro ;precharging indexed zp & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to zeropage
+ sta zpt
+ plp
+ endm
+
+ set_zx macro ;precharging zp,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed zeropage
+ sta zpt,x
+ plp
+ endm
+
+ set_abs macro ;precharging indexed memory & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to memory
+ sta abst
+ plp
+ endm
+
+ set_absx macro ;precharging abs,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed memory
+ sta abst,x
+ plp
+ endm
+
+ ;macros to test (register|memory|zeropage) & status & (mask)
+ tst_stat macro ;testing flags in the processor status register
+ php ;save status
+ pla ;use stack to retrieve status
+ pha
+ cmp_flag \1
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_a macro ;testing result in accu & flags
+ php ;save flags
+ cmp #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_x macro ;testing result in x index & flags
+ php ;save flags
+ cpx #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_y macro ;testing result in y index & flags
+ php ;save flags
+ cpy #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_ax macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne ;
+ endm
+
+ tst_ay macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,y ;test result
+ trap_ne ;
+ pla ;load status
+ eor_flag \3
+ cmp \2,y ;test flags
+ trap_ne
+ endm
+
+ tst_z macro ;indexed testing result in zp & flags
+ php ;save flags
+ lda zpt
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_zx macro ;testing result in zp,x & flags
+ php ;save flags
+ lda zpt,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_abs macro ;indexed testing result in memory & flags
+ php ;save flags
+ lda abst
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_absx macro ;testing result in abs,x & flags
+ php ;save flags
+ lda abst,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ ; RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ ; uses zpt word as indirect pointer, zpt+2 word as checksum
+ if ram_top > -1
+ check_ram macro
+ cld
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta zpt+3 ;checksum high byte
+ if disable_selfmod = 0
+ sta range_adr ;reset self modifying code
+ endif
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ ccs3\? adc zero_page,x
+ bcc ccs2\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs2\? inx
+ bne ccs3\?
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ ccs5\? adc (zpt),y
+ bcc ccs4\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs4\? iny
+ bne ccs5\?
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne ccs5\?
+ sta zpt+2 ;checksum low is
+ cmp ram_chksm ;checksum low expected
+ trap_ne ;checksum mismatch
+ lda zpt+3 ;checksum high is
+ cmp ram_chksm+1 ;checksum high expected
+ trap_ne ;checksum mismatch
+ endm
+ else
+ check_ram macro
+ ;RAM check disabled - RAM size not set
+ endm
+ endif
+
+ next_test macro ;make sure, tests don't jump the fence
+ lda test_case ;previous test
+ cmp #test_num
+ trap_ne ;test is out of sequence
+ test_num = test_num + 1
+ lda #test_num ;*** next tests' number
+ sta test_case
+ ;check_ram ;uncomment to find altered RAM after each test
+ endm
+
+ if load_data_direct = 1
+ data
+ else
+ bss ;uninitialized segment, copy of data at end of code!
+ endif
+000a = org zero_page
+ ;break test interrupt save
+000a : 00 irq_a ds 1 ;a register
+000b : 00 irq_x ds 1 ;x register
+ if I_flag = 2
+ ;masking for I bit in status
+ flag_I_on ds 1 ;or mask to load flags
+ flag_I_off ds 1 ;and mask to load flags
+ endif
+000c : zpt ;5 bytes store/modify test area
+ ;add/subtract operand generation and result/flag prediction
+000c : 00 adfc ds 1 ;carry flag before op
+000d : 00 ad1 ds 1 ;operand 1 - accumulator
+000e : 00 ad2 ds 1 ;operand 2 - memory / immediate
+000f : 00 adrl ds 1 ;expected result bits 0-7
+0010 : 00 adrh ds 1 ;expected result bit 8 (carry)
+0011 : 00 adrf ds 1 ;expected flags NV0000ZC (only binary mode)
+0012 : 00 sb2 ds 1 ;operand 2 complemented for subtract
+0013 : zp_bss
+0013 : c3824100 zp1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+0017 : 7f zp7f db $7f ;test pattern for compare
+ ;logical zeropage operands
+0018 : 001f7180 zpOR db 0,$1f,$71,$80 ;test pattern for OR
+001c : 0fff7f80 zpAN db $0f,$ff,$7f,$80 ;test pattern for AND
+0020 : ff0f8f8f zpEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+0024 : 1702 ind1 dw abs1 ;indirect pointer to pattern in absolute memory
+0026 : 1802 dw abs1+1
+0028 : 1902 dw abs1+2
+002a : 1a02 dw abs1+3
+002c : 1b02 dw abs7f
+002e : 1f01 inw1 dw abs1-$f8 ;indirect pointer for wrap-test pattern
+0030 : 0302 indt dw abst ;indirect pointer to store area in absolute memory
+0032 : 0402 dw abst+1
+0034 : 0502 dw abst+2
+0036 : 0602 dw abst+3
+0038 : 0b01 inwt dw abst-$f8 ;indirect pointer for wrap-test store
+003a : 4e02 indAN dw absAN ;indirect pointer to AND pattern in absolute memory
+003c : 4f02 dw absAN+1
+003e : 5002 dw absAN+2
+0040 : 5102 dw absAN+3
+0042 : 5202 indEO dw absEO ;indirect pointer to EOR pattern in absolute memory
+0044 : 5302 dw absEO+1
+0046 : 5402 dw absEO+2
+0048 : 5502 dw absEO+3
+004a : 4a02 indOR dw absOR ;indirect pointer to OR pattern in absolute memory
+004c : 4b02 dw absOR+1
+004e : 4c02 dw absOR+2
+0050 : 4d02 dw absOR+3
+ ;add/subtract indirect pointers
+0052 : 0302 adi2 dw ada2 ;indirect pointer to operand 2 in absolute memory
+0054 : 0402 sbi2 dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+0056 : 0401 adiy2 dw ada2-$ff ;with offset for indirect indexed
+0058 : 0501 sbiy2 dw sba2-$ff
+005a : zp_bss_end
+
+0200 = org data_segment
+0200 : 00 test_case ds 1 ;current test number
+0201 : 0000 ram_chksm ds 2 ;checksum for RAM integrity test
+ ;add/subtract operand copy - abs tests write area
+0203 : abst ;5 bytes store/modify test area
+0203 : 00 ada2 ds 1 ;operand 2
+0204 : 00 sba2 ds 1 ;operand 2 complemented for subtract
+0205 : 000000 ds 3 ;fill remaining bytes
+0208 : data_bss
+ if load_data_direct = 1
+0208 : 2900 ex_andi and #0 ;execute immediate opcodes
+020a : 60 rts
+020b : 4900 ex_eori eor #0 ;execute immediate opcodes
+020d : 60 rts
+020e : 0900 ex_orai ora #0 ;execute immediate opcodes
+0210 : 60 rts
+0211 : 6900 ex_adci adc #0 ;execute immediate opcodes
+0213 : 60 rts
+0214 : e900 ex_sbci sbc #0 ;execute immediate opcodes
+0216 : 60 rts
+ else
+ ex_andi ds 3
+ ex_eori ds 3
+ ex_orai ds 3
+ ex_adci ds 3
+ ex_sbci ds 3
+ endif
+0217 : c3824100 abs1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+021b : 7f abs7f db $7f ;test pattern for compare
+ ;loads
+021c : 80800002 fLDx db fn,fn,0,fz ;expected flags for load
+ ;shifts
+0220 : rASL ;expected result ASL & ROL -carry
+0220 : 86048200 rROL db $86,$04,$82,0 ; "
+0224 : 87058301 rROLc db $87,$05,$83,1 ;expected result ROL +carry
+0228 : rLSR ;expected result LSR & ROR -carry
+0228 : 61412000 rROR db $61,$41,$20,0 ; "
+022c : e1c1a080 rRORc db $e1,$c1,$a0,$80 ;expected result ROR +carry
+0230 : fASL ;expected flags for shifts
+0230 : 81018002 fROL db fnc,fc,fn,fz ;no carry in
+0234 : 81018000 fROLc db fnc,fc,fn,0 ;carry in
+0238 : fLSR
+0238 : 01000102 fROR db fc,0,fc,fz ;no carry in
+023c : 81808180 fRORc db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+0240 : 7f80ff0001 rINC db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+0245 : 0080800200 fINC db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+024a : 001f7180 absOR db 0,$1f,$71,$80 ;test pattern for OR
+024e : 0fff7f80 absAN db $0f,$ff,$7f,$80 ;test pattern for AND
+0252 : ff0f8f8f absEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+0256 : 00f11f00 absORa db 0,$f1,$1f,0 ;test pattern for OR
+025a : f0ffffff absANa db $f0,$ff,$ff,$ff ;test pattern for AND
+025e : fff0f00f absEOa db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+0262 : 00ff7f80 absrlo db 0,$ff,$7f,$80
+0266 : 02800080 absflo db fz,fn,0,fn
+026a : data_bss_end
+
+
+ code
+0400 = org code_segment
+0400 : d8 start cld
+0401 : a2ff ldx #$ff
+0403 : 9a txs
+0404 : a900 lda #0 ;*** test 0 = initialize
+0406 : 8d0002 sta test_case
+0000 = test_num = 0
+
+ ;stop interrupts before initializing BSS
+ if I_flag = 1
+ sei
+ endif
+
+ ;initialize I/O for report channel
+ if report = 1
+ jsr report_init
+ endif
+
+ ;pretest small branch offset
+0409 : a205 ldx #5
+040b : 4c3304 jmp psb_test
+040e : psb_bwok
+040e : a005 ldy #5
+0410 : d008 bne psb_forw
+ trap ;branch should be taken
+0412 : 4c1204 > jmp * ;failed anyway
+
+0415 : 88 dey ;forward landing zone
+0416 : 88 dey
+0417 : 88 dey
+0418 : 88 dey
+0419 : 88 dey
+041a : psb_forw
+041a : 88 dey
+041b : 88 dey
+041c : 88 dey
+041d : 88 dey
+041e : 88 dey
+041f : f017 beq psb_fwok
+ trap ;forward offset
+0421 : 4c2104 > jmp * ;failed anyway
+
+
+0424 : ca dex ;backward landing zone
+0425 : ca dex
+0426 : ca dex
+0427 : ca dex
+0428 : ca dex
+0429 : psb_back
+0429 : ca dex
+042a : ca dex
+042b : ca dex
+042c : ca dex
+042d : ca dex
+042e : f0de beq psb_bwok
+ trap ;backward offset
+0430 : 4c3004 > jmp * ;failed anyway
+
+0433 : psb_test
+0433 : d0f4 bne psb_back
+ trap ;branch should be taken
+0435 : 4c3504 > jmp * ;failed anyway
+
+0438 : psb_fwok
+
+ ;initialize BSS segment
+ if load_data_direct != 1
+ ldx #zp_end-zp_init-1
+ ld_zp lda zp_init,x
+ sta zp_bss,x
+ dex
+ bpl ld_zp
+ ldx #data_end-data_init-1
+ ld_data lda data_init,x
+ sta data_bss,x
+ dex
+ bpl ld_data
+ if ROM_vectors = 1
+ ldx #5
+ ld_vect lda vec_init,x
+ sta vec_bss,x
+ dex
+ bpl ld_vect
+ endif
+ endif
+
+ ;retain status of interrupt flag
+ if I_flag = 2
+ php
+ pla
+ and #4 ;isolate flag
+ sta flag_I_on ;or mask
+ eor #lo(~4) ;reverse
+ sta flag_I_off ;and mask
+ endif
+
+ ;generate checksum for RAM integrity test
+ if ram_top > -1
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta ram_chksm+1 ;checksum high byte
+ if disable_selfmod = 0
+ sta range_adr ;reset self modifying code
+ endif
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ gcs3 adc zero_page,x
+ bcc gcs2
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs2 inx
+ bne gcs3
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ gcs5 adc (zpt),y
+ bcc gcs4
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs4 iny
+ bne gcs5
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne gcs5
+ sta ram_chksm ;checksum complete
+ endif
+ next_test
+0438 : ad0002 > lda test_case ;previous test
+043b : c900 > cmp #test_num
+ > trap_ne ;test is out of sequence
+043d : d0fe > bne * ;failed not equal (non zero)
+ >
+0001 = >test_num = test_num + 1
+043f : a901 > lda #test_num ;*** next tests' number
+0441 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if disable_selfmod = 0
+ ;testing relative addressing with BEQ
+0444 : a0fe ldy #$fe ;testing maximum range, not -1/-2 (invalid/self adr)
+0446 : range_loop
+0446 : 88 dey ;next relative address
+0447 : 98 tya
+0448 : aa tax ;precharge count to end of loop
+0449 : 1008 bpl range_fw ;calculate relative address
+044b : 18 clc ;avoid branch self or to relative address of branch
+044c : 6902 adc #2
+044e : ea nop ;offset landing zone - tolerate +/-5 offset to branch
+044f : ea nop
+0450 : ea nop
+0451 : ea nop
+0452 : ea nop
+0453 : range_fw
+0453 : ea nop
+0454 : ea nop
+0455 : ea nop
+0456 : ea nop
+0457 : ea nop
+0458 : 497f eor #$7f ;complement except sign
+045a : 8de604 sta range_adr ;load into test target
+045d : a900 lda #0 ;should set zero flag in status register
+045f : 4ce504 jmp range_op
+
+0462 : ca dex ; offset landing zone - backward branch too far
+0463 : ca dex
+0464 : ca dex
+0465 : ca dex
+0466 : ca dex
+ ;relative address target field with branch under test in the middle
+0467 : ca dex ;-128 - max backward
+0468 : ca dex
+0469 : ca dex
+046a : ca dex
+046b : ca dex
+046c : ca dex
+046d : ca dex
+046e : ca dex
+046f : ca dex ;-120
+0470 : ca dex
+0471 : ca dex
+0472 : ca dex
+0473 : ca dex
+0474 : ca dex
+0475 : ca dex
+0476 : ca dex
+0477 : ca dex
+0478 : ca dex
+0479 : ca dex ;-110
+047a : ca dex
+047b : ca dex
+047c : ca dex
+047d : ca dex
+047e : ca dex
+047f : ca dex
+0480 : ca dex
+0481 : ca dex
+0482 : ca dex
+0483 : ca dex ;-100
+0484 : ca dex
+0485 : ca dex
+0486 : ca dex
+0487 : ca dex
+0488 : ca dex
+0489 : ca dex
+048a : ca dex
+048b : ca dex
+048c : ca dex
+048d : ca dex ;-90
+048e : ca dex
+048f : ca dex
+0490 : ca dex
+0491 : ca dex
+0492 : ca dex
+0493 : ca dex
+0494 : ca dex
+0495 : ca dex
+0496 : ca dex
+0497 : ca dex ;-80
+0498 : ca dex
+0499 : ca dex
+049a : ca dex
+049b : ca dex
+049c : ca dex
+049d : ca dex
+049e : ca dex
+049f : ca dex
+04a0 : ca dex
+04a1 : ca dex ;-70
+04a2 : ca dex
+04a3 : ca dex
+04a4 : ca dex
+04a5 : ca dex
+04a6 : ca dex
+04a7 : ca dex
+04a8 : ca dex
+04a9 : ca dex
+04aa : ca dex
+04ab : ca dex ;-60
+04ac : ca dex
+04ad : ca dex
+04ae : ca dex
+04af : ca dex
+04b0 : ca dex
+04b1 : ca dex
+04b2 : ca dex
+04b3 : ca dex
+04b4 : ca dex
+04b5 : ca dex ;-50
+04b6 : ca dex
+04b7 : ca dex
+04b8 : ca dex
+04b9 : ca dex
+04ba : ca dex
+04bb : ca dex
+04bc : ca dex
+04bd : ca dex
+04be : ca dex
+04bf : ca dex ;-40
+04c0 : ca dex
+04c1 : ca dex
+04c2 : ca dex
+04c3 : ca dex
+04c4 : ca dex
+04c5 : ca dex
+04c6 : ca dex
+04c7 : ca dex
+04c8 : ca dex
+04c9 : ca dex ;-30
+04ca : ca dex
+04cb : ca dex
+04cc : ca dex
+04cd : ca dex
+04ce : ca dex
+04cf : ca dex
+04d0 : ca dex
+04d1 : ca dex
+04d2 : ca dex
+04d3 : ca dex ;-20
+04d4 : ca dex
+04d5 : ca dex
+04d6 : ca dex
+04d7 : ca dex
+04d8 : ca dex
+04d9 : ca dex
+04da : ca dex
+04db : ca dex
+04dc : ca dex
+04dd : ca dex ;-10
+04de : ca dex
+04df : ca dex
+04e0 : ca dex
+04e1 : ca dex
+04e2 : ca dex
+04e3 : ca dex
+04e4 : ca dex ;-3
+04e5 : range_op ;test target with zero flag=0, z=1 if previous dex
+04e6 = range_adr = *+1 ;modifiable relative address
+04e5 : f03e beq *+64 ;+64 if called without modification
+04e7 : ca dex ;+0
+04e8 : ca dex
+04e9 : ca dex
+04ea : ca dex
+04eb : ca dex
+04ec : ca dex
+04ed : ca dex
+04ee : ca dex
+04ef : ca dex
+04f0 : ca dex
+04f1 : ca dex ;+10
+04f2 : ca dex
+04f3 : ca dex
+04f4 : ca dex
+04f5 : ca dex
+04f6 : ca dex
+04f7 : ca dex
+04f8 : ca dex
+04f9 : ca dex
+04fa : ca dex
+04fb : ca dex ;+20
+04fc : ca dex
+04fd : ca dex
+04fe : ca dex
+04ff : ca dex
+0500 : ca dex
+0501 : ca dex
+0502 : ca dex
+0503 : ca dex
+0504 : ca dex
+0505 : ca dex ;+30
+0506 : ca dex
+0507 : ca dex
+0508 : ca dex
+0509 : ca dex
+050a : ca dex
+050b : ca dex
+050c : ca dex
+050d : ca dex
+050e : ca dex
+050f : ca dex ;+40
+0510 : ca dex
+0511 : ca dex
+0512 : ca dex
+0513 : ca dex
+0514 : ca dex
+0515 : ca dex
+0516 : ca dex
+0517 : ca dex
+0518 : ca dex
+0519 : ca dex ;+50
+051a : ca dex
+051b : ca dex
+051c : ca dex
+051d : ca dex
+051e : ca dex
+051f : ca dex
+0520 : ca dex
+0521 : ca dex
+0522 : ca dex
+0523 : ca dex ;+60
+0524 : ca dex
+0525 : ca dex
+0526 : ca dex
+0527 : ca dex
+0528 : ca dex
+0529 : ca dex
+052a : ca dex
+052b : ca dex
+052c : ca dex
+052d : ca dex ;+70
+052e : ca dex
+052f : ca dex
+0530 : ca dex
+0531 : ca dex
+0532 : ca dex
+0533 : ca dex
+0534 : ca dex
+0535 : ca dex
+0536 : ca dex
+0537 : ca dex ;+80
+0538 : ca dex
+0539 : ca dex
+053a : ca dex
+053b : ca dex
+053c : ca dex
+053d : ca dex
+053e : ca dex
+053f : ca dex
+0540 : ca dex
+0541 : ca dex ;+90
+0542 : ca dex
+0543 : ca dex
+0544 : ca dex
+0545 : ca dex
+0546 : ca dex
+0547 : ca dex
+0548 : ca dex
+0549 : ca dex
+054a : ca dex
+054b : ca dex ;+100
+054c : ca dex
+054d : ca dex
+054e : ca dex
+054f : ca dex
+0550 : ca dex
+0551 : ca dex
+0552 : ca dex
+0553 : ca dex
+0554 : ca dex
+0555 : ca dex ;+110
+0556 : ca dex
+0557 : ca dex
+0558 : ca dex
+0559 : ca dex
+055a : ca dex
+055b : ca dex
+055c : ca dex
+055d : ca dex
+055e : ca dex
+055f : ca dex ;+120
+0560 : ca dex
+0561 : ca dex
+0562 : ca dex
+0563 : ca dex
+0564 : ca dex
+0565 : ca dex
+0566 : ea nop ;offset landing zone - forward branch too far
+0567 : ea nop
+0568 : ea nop
+0569 : ea nop
+056a : ea nop
+056b : f008 beq range_ok ;+127 - max forward
+ trap ; bad range
+056d : 4c6d05 > jmp * ;failed anyway
+
+0570 : ea nop ;offset landing zone - tolerate +/-5 offset to branch
+0571 : ea nop
+0572 : ea nop
+0573 : ea nop
+0574 : ea nop
+0575 : range_ok
+0575 : ea nop
+0576 : ea nop
+0577 : ea nop
+0578 : ea nop
+0579 : ea nop
+057a : c000 cpy #0
+057c : f003 beq range_end
+057e : 4c4604 jmp range_loop
+0581 : range_end ;range test successful
+ endif
+ next_test
+0581 : ad0002 > lda test_case ;previous test
+0584 : c901 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0586 : d0fe > bne * ;failed not equal (non zero)
+ >
+0002 = >test_num = test_num + 1
+0588 : a902 > lda #test_num ;*** next tests' number
+058a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;partial test BNE & CMP, CPX, CPY immediate
+058d : c001 cpy #1 ;testing BNE true
+058f : d003 bne test_bne
+ trap
+0591 : 4c9105 > jmp * ;failed anyway
+
+0594 : test_bne
+0594 : a900 lda #0
+0596 : c900 cmp #0 ;test compare immediate
+ trap_ne
+0598 : d0fe > bne * ;failed not equal (non zero)
+
+ trap_cc
+059a : 90fe > bcc * ;failed carry clear
+
+ trap_mi
+059c : 30fe > bmi * ;failed minus (bit 7 set)
+
+059e : c901 cmp #1
+ trap_eq
+05a0 : f0fe > beq * ;failed equal (zero)
+
+ trap_cs
+05a2 : b0fe > bcs * ;failed carry set
+
+ trap_pl
+05a4 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+05a6 : aa tax
+05a7 : e000 cpx #0 ;test compare x immediate
+ trap_ne
+05a9 : d0fe > bne * ;failed not equal (non zero)
+
+ trap_cc
+05ab : 90fe > bcc * ;failed carry clear
+
+ trap_mi
+05ad : 30fe > bmi * ;failed minus (bit 7 set)
+
+05af : e001 cpx #1
+ trap_eq
+05b1 : f0fe > beq * ;failed equal (zero)
+
+ trap_cs
+05b3 : b0fe > bcs * ;failed carry set
+
+ trap_pl
+05b5 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+05b7 : a8 tay
+05b8 : c000 cpy #0 ;test compare y immediate
+ trap_ne
+05ba : d0fe > bne * ;failed not equal (non zero)
+
+ trap_cc
+05bc : 90fe > bcc * ;failed carry clear
+
+ trap_mi
+05be : 30fe > bmi * ;failed minus (bit 7 set)
+
+05c0 : c001 cpy #1
+ trap_eq
+05c2 : f0fe > beq * ;failed equal (zero)
+
+ trap_cs
+05c4 : b0fe > bcs * ;failed carry set
+
+ trap_pl
+05c6 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ next_test
+05c8 : ad0002 > lda test_case ;previous test
+05cb : c902 > cmp #test_num
+ > trap_ne ;test is out of sequence
+05cd : d0fe > bne * ;failed not equal (non zero)
+ >
+0003 = >test_num = test_num + 1
+05cf : a903 > lda #test_num ;*** next tests' number
+05d1 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ ;testing stack operations PHA PHP PLA PLP
+
+05d4 : a2ff ldx #$ff ;initialize stack
+05d6 : 9a txs
+05d7 : a955 lda #$55
+05d9 : 48 pha
+05da : a9aa lda #$aa
+05dc : 48 pha
+05dd : cdfe01 cmp $1fe ;on stack ?
+ trap_ne
+05e0 : d0fe > bne * ;failed not equal (non zero)
+
+05e2 : ba tsx
+05e3 : 8a txa ;overwrite accu
+05e4 : c9fd cmp #$fd ;sp decremented?
+ trap_ne
+05e6 : d0fe > bne * ;failed not equal (non zero)
+
+05e8 : 68 pla
+05e9 : c9aa cmp #$aa ;successful retreived from stack?
+ trap_ne
+05eb : d0fe > bne * ;failed not equal (non zero)
+
+05ed : 68 pla
+05ee : c955 cmp #$55
+ trap_ne
+05f0 : d0fe > bne * ;failed not equal (non zero)
+
+05f2 : cdff01 cmp $1ff ;remains on stack?
+ trap_ne
+05f5 : d0fe > bne * ;failed not equal (non zero)
+
+05f7 : ba tsx
+05f8 : e0ff cpx #$ff ;sp incremented?
+ trap_ne
+05fa : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+05fc : ad0002 > lda test_case ;previous test
+05ff : c903 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0601 : d0fe > bne * ;failed not equal (non zero)
+ >
+0004 = >test_num = test_num + 1
+0603 : a904 > lda #test_num ;*** next tests' number
+0605 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
+ set_stat $ff ;all on
+ > load_flag $ff
+0608 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+060a : 48 > pha ;use stack to load status
+060b : 28 > plp
+
+060c : 101a bpl nbr1 ;branches should not be taken
+060e : 501b bvc nbr2
+0610 : 901c bcc nbr3
+0612 : d01d bne nbr4
+0614 : 3003 bmi br1 ;branches should be taken
+ trap
+0616 : 4c1606 > jmp * ;failed anyway
+
+0619 : 7003 br1 bvs br2
+ trap
+061b : 4c1b06 > jmp * ;failed anyway
+
+061e : b003 br2 bcs br3
+ trap
+0620 : 4c2006 > jmp * ;failed anyway
+
+0623 : f00f br3 beq br4
+ trap
+0625 : 4c2506 > jmp * ;failed anyway
+
+0628 : nbr1
+ trap ;previous bpl taken
+0628 : 4c2806 > jmp * ;failed anyway
+
+062b : nbr2
+ trap ;previous bvc taken
+062b : 4c2b06 > jmp * ;failed anyway
+
+062e : nbr3
+ trap ;previous bcc taken
+062e : 4c2e06 > jmp * ;failed anyway
+
+0631 : nbr4
+ trap ;previous bne taken
+0631 : 4c3106 > jmp * ;failed anyway
+
+0634 : 08 br4 php
+0635 : ba tsx
+0636 : e0fe cpx #$fe ;sp after php?
+ trap_ne
+0638 : d0fe > bne * ;failed not equal (non zero)
+
+063a : 68 pla
+ cmp_flag $ff ;returned all flags on?
+063b : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+063d : d0fe > bne * ;failed not equal (non zero)
+
+063f : ba tsx
+0640 : e0ff cpx #$ff ;sp after php?
+ trap_ne
+0642 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0 ;all off
+ > load_flag 0
+0644 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0646 : 48 > pha ;use stack to load status
+0647 : 28 > plp
+
+0648 : 301a bmi nbr11 ;branches should not be taken
+064a : 701b bvs nbr12
+064c : b01c bcs nbr13
+064e : f01d beq nbr14
+0650 : 1003 bpl br11 ;branches should be taken
+ trap
+0652 : 4c5206 > jmp * ;failed anyway
+
+0655 : 5003 br11 bvc br12
+ trap
+0657 : 4c5706 > jmp * ;failed anyway
+
+065a : 9003 br12 bcc br13
+ trap
+065c : 4c5c06 > jmp * ;failed anyway
+
+065f : d00f br13 bne br14
+ trap
+0661 : 4c6106 > jmp * ;failed anyway
+
+0664 : nbr11
+ trap ;previous bmi taken
+0664 : 4c6406 > jmp * ;failed anyway
+
+0667 : nbr12
+ trap ;previous bvs taken
+0667 : 4c6706 > jmp * ;failed anyway
+
+066a : nbr13
+ trap ;previous bcs taken
+066a : 4c6a06 > jmp * ;failed anyway
+
+066d : nbr14
+ trap ;previous beq taken
+066d : 4c6d06 > jmp * ;failed anyway
+
+0670 : 08 br14 php
+0671 : 68 pla
+ cmp_flag 0 ;flags off except break (pushed by sw) + reserved?
+0672 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0674 : d0fe > bne * ;failed not equal (non zero)
+
+ ;crosscheck flags
+ set_stat zero
+ > load_flag zero
+0676 : a902 > lda #zero ;allow test to change I-flag (no mask)
+ >
+0678 : 48 > pha ;use stack to load status
+0679 : 28 > plp
+
+067a : d002 bne brzs1
+067c : f003 beq brzs2
+067e : brzs1
+ trap ;branch zero/non zero
+067e : 4c7e06 > jmp * ;failed anyway
+
+0681 : b002 brzs2 bcs brzs3
+0683 : 9003 bcc brzs4
+0685 : brzs3
+ trap ;branch carry/no carry
+0685 : 4c8506 > jmp * ;failed anyway
+
+0688 : 3002 brzs4 bmi brzs5
+068a : 1003 bpl brzs6
+068c : brzs5
+ trap ;branch minus/plus
+068c : 4c8c06 > jmp * ;failed anyway
+
+068f : 7002 brzs6 bvs brzs7
+0691 : 5003 bvc brzs8
+0693 : brzs7
+ trap ;branch overflow/no overflow
+0693 : 4c9306 > jmp * ;failed anyway
+
+0696 : brzs8
+ set_stat carry
+ > load_flag carry
+0696 : a901 > lda #carry ;allow test to change I-flag (no mask)
+ >
+0698 : 48 > pha ;use stack to load status
+0699 : 28 > plp
+
+069a : f002 beq brcs1
+069c : d003 bne brcs2
+069e : brcs1
+ trap ;branch zero/non zero
+069e : 4c9e06 > jmp * ;failed anyway
+
+06a1 : 9002 brcs2 bcc brcs3
+06a3 : b003 bcs brcs4
+06a5 : brcs3
+ trap ;branch carry/no carry
+06a5 : 4ca506 > jmp * ;failed anyway
+
+06a8 : 3002 brcs4 bmi brcs5
+06aa : 1003 bpl brcs6
+06ac : brcs5
+ trap ;branch minus/plus
+06ac : 4cac06 > jmp * ;failed anyway
+
+06af : 7002 brcs6 bvs brcs7
+06b1 : 5003 bvc brcs8
+06b3 : brcs7
+ trap ;branch overflow/no overflow
+06b3 : 4cb306 > jmp * ;failed anyway
+
+
+06b6 : brcs8
+ set_stat minus
+ > load_flag minus
+06b6 : a980 > lda #minus ;allow test to change I-flag (no mask)
+ >
+06b8 : 48 > pha ;use stack to load status
+06b9 : 28 > plp
+
+06ba : f002 beq brmi1
+06bc : d003 bne brmi2
+06be : brmi1
+ trap ;branch zero/non zero
+06be : 4cbe06 > jmp * ;failed anyway
+
+06c1 : b002 brmi2 bcs brmi3
+06c3 : 9003 bcc brmi4
+06c5 : brmi3
+ trap ;branch carry/no carry
+06c5 : 4cc506 > jmp * ;failed anyway
+
+06c8 : 1002 brmi4 bpl brmi5
+06ca : 3003 bmi brmi6
+06cc : brmi5
+ trap ;branch minus/plus
+06cc : 4ccc06 > jmp * ;failed anyway
+
+06cf : 7002 brmi6 bvs brmi7
+06d1 : 5003 bvc brmi8
+06d3 : brmi7
+ trap ;branch overflow/no overflow
+06d3 : 4cd306 > jmp * ;failed anyway
+
+06d6 : brmi8
+ set_stat overfl
+ > load_flag overfl
+06d6 : a940 > lda #overfl ;allow test to change I-flag (no mask)
+ >
+06d8 : 48 > pha ;use stack to load status
+06d9 : 28 > plp
+
+06da : f002 beq brvs1
+06dc : d003 bne brvs2
+06de : brvs1
+ trap ;branch zero/non zero
+06de : 4cde06 > jmp * ;failed anyway
+
+06e1 : b002 brvs2 bcs brvs3
+06e3 : 9003 bcc brvs4
+06e5 : brvs3
+ trap ;branch carry/no carry
+06e5 : 4ce506 > jmp * ;failed anyway
+
+06e8 : 3002 brvs4 bmi brvs5
+06ea : 1003 bpl brvs6
+06ec : brvs5
+ trap ;branch minus/plus
+06ec : 4cec06 > jmp * ;failed anyway
+
+06ef : 5002 brvs6 bvc brvs7
+06f1 : 7003 bvs brvs8
+06f3 : brvs7
+ trap ;branch overflow/no overflow
+06f3 : 4cf306 > jmp * ;failed anyway
+
+06f6 : brvs8
+ set_stat $ff-zero
+ > load_flag $ff-zero
+06f6 : a9fd > lda #$ff-zero ;allow test to change I-flag (no mask)
+ >
+06f8 : 48 > pha ;use stack to load status
+06f9 : 28 > plp
+
+06fa : f002 beq brzc1
+06fc : d003 bne brzc2
+06fe : brzc1
+ trap ;branch zero/non zero
+06fe : 4cfe06 > jmp * ;failed anyway
+
+0701 : 9002 brzc2 bcc brzc3
+0703 : b003 bcs brzc4
+0705 : brzc3
+ trap ;branch carry/no carry
+0705 : 4c0507 > jmp * ;failed anyway
+
+0708 : 1002 brzc4 bpl brzc5
+070a : 3003 bmi brzc6
+070c : brzc5
+ trap ;branch minus/plus
+070c : 4c0c07 > jmp * ;failed anyway
+
+070f : 5002 brzc6 bvc brzc7
+0711 : 7003 bvs brzc8
+0713 : brzc7
+ trap ;branch overflow/no overflow
+0713 : 4c1307 > jmp * ;failed anyway
+
+0716 : brzc8
+ set_stat $ff-carry
+ > load_flag $ff-carry
+0716 : a9fe > lda #$ff-carry ;allow test to change I-flag (no mask)
+ >
+0718 : 48 > pha ;use stack to load status
+0719 : 28 > plp
+
+071a : d002 bne brcc1
+071c : f003 beq brcc2
+071e : brcc1
+ trap ;branch zero/non zero
+071e : 4c1e07 > jmp * ;failed anyway
+
+0721 : b002 brcc2 bcs brcc3
+0723 : 9003 bcc brcc4
+0725 : brcc3
+ trap ;branch carry/no carry
+0725 : 4c2507 > jmp * ;failed anyway
+
+0728 : 1002 brcc4 bpl brcc5
+072a : 3003 bmi brcc6
+072c : brcc5
+ trap ;branch minus/plus
+072c : 4c2c07 > jmp * ;failed anyway
+
+072f : 5002 brcc6 bvc brcc7
+0731 : 7003 bvs brcc8
+0733 : brcc7
+ trap ;branch overflow/no overflow
+0733 : 4c3307 > jmp * ;failed anyway
+
+0736 : brcc8
+ set_stat $ff-minus
+ > load_flag $ff-minus
+0736 : a97f > lda #$ff-minus ;allow test to change I-flag (no mask)
+ >
+0738 : 48 > pha ;use stack to load status
+0739 : 28 > plp
+
+073a : d002 bne brpl1
+073c : f003 beq brpl2
+073e : brpl1
+ trap ;branch zero/non zero
+073e : 4c3e07 > jmp * ;failed anyway
+
+0741 : 9002 brpl2 bcc brpl3
+0743 : b003 bcs brpl4
+0745 : brpl3
+ trap ;branch carry/no carry
+0745 : 4c4507 > jmp * ;failed anyway
+
+0748 : 3002 brpl4 bmi brpl5
+074a : 1003 bpl brpl6
+074c : brpl5
+ trap ;branch minus/plus
+074c : 4c4c07 > jmp * ;failed anyway
+
+074f : 5002 brpl6 bvc brpl7
+0751 : 7003 bvs brpl8
+0753 : brpl7
+ trap ;branch overflow/no overflow
+0753 : 4c5307 > jmp * ;failed anyway
+
+0756 : brpl8
+ set_stat $ff-overfl
+ > load_flag $ff-overfl
+0756 : a9bf > lda #$ff-overfl ;allow test to change I-flag (no mask)
+ >
+0758 : 48 > pha ;use stack to load status
+0759 : 28 > plp
+
+075a : d002 bne brvc1
+075c : f003 beq brvc2
+075e : brvc1
+ trap ;branch zero/non zero
+075e : 4c5e07 > jmp * ;failed anyway
+
+0761 : 9002 brvc2 bcc brvc3
+0763 : b003 bcs brvc4
+0765 : brvc3
+ trap ;branch carry/no carry
+0765 : 4c6507 > jmp * ;failed anyway
+
+0768 : 1002 brvc4 bpl brvc5
+076a : 3003 bmi brvc6
+076c : brvc5
+ trap ;branch minus/plus
+076c : 4c6c07 > jmp * ;failed anyway
+
+076f : 7002 brvc6 bvs brvc7
+0771 : 5003 bvc brvc8
+0773 : brvc7
+ trap ;branch overflow/no overflow
+0773 : 4c7307 > jmp * ;failed anyway
+
+0776 : brvc8
+ next_test
+0776 : ad0002 > lda test_case ;previous test
+0779 : c904 > cmp #test_num
+ > trap_ne ;test is out of sequence
+077b : d0fe > bne * ;failed not equal (non zero)
+ >
+0005 = >test_num = test_num + 1
+077d : a905 > lda #test_num ;*** next tests' number
+077f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test PHA does not alter flags or accumulator but PLA does
+0782 : a255 ldx #$55 ;x & y protected
+0784 : a0aa ldy #$aa
+ set_a 1,$ff ;push
+ > load_flag $ff
+0786 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0788 : 48 > pha ;use stack to load status
+0789 : a901 > lda #1 ;precharge accu
+078b : 28 > plp
+
+078c : 48 pha
+ tst_a 1,$ff
+078d : 08 > php ;save flags
+078e : c901 > cmp #1 ;test result
+ > trap_ne
+0790 : d0fe > bne * ;failed not equal (non zero)
+ >
+0792 : 68 > pla ;load status
+0793 : 48 > pha
+ > cmp_flag $ff
+0794 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0796 : d0fe > bne * ;failed not equal (non zero)
+ >
+0798 : 28 > plp ;restore status
+
+ set_a 0,0
+ > load_flag 0
+0799 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+079b : 48 > pha ;use stack to load status
+079c : a900 > lda #0 ;precharge accu
+079e : 28 > plp
+
+079f : 48 pha
+ tst_a 0,0
+07a0 : 08 > php ;save flags
+07a1 : c900 > cmp #0 ;test result
+ > trap_ne
+07a3 : d0fe > bne * ;failed not equal (non zero)
+ >
+07a5 : 68 > pla ;load status
+07a6 : 48 > pha
+ > cmp_flag 0
+07a7 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07a9 : d0fe > bne * ;failed not equal (non zero)
+ >
+07ab : 28 > plp ;restore status
+
+ set_a $ff,$ff
+ > load_flag $ff
+07ac : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+07ae : 48 > pha ;use stack to load status
+07af : a9ff > lda #$ff ;precharge accu
+07b1 : 28 > plp
+
+07b2 : 48 pha
+ tst_a $ff,$ff
+07b3 : 08 > php ;save flags
+07b4 : c9ff > cmp #$ff ;test result
+ > trap_ne
+07b6 : d0fe > bne * ;failed not equal (non zero)
+ >
+07b8 : 68 > pla ;load status
+07b9 : 48 > pha
+ > cmp_flag $ff
+07ba : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07bc : d0fe > bne * ;failed not equal (non zero)
+ >
+07be : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+07bf : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+07c1 : 48 > pha ;use stack to load status
+07c2 : a901 > lda #1 ;precharge accu
+07c4 : 28 > plp
+
+07c5 : 48 pha
+ tst_a 1,0
+07c6 : 08 > php ;save flags
+07c7 : c901 > cmp #1 ;test result
+ > trap_ne
+07c9 : d0fe > bne * ;failed not equal (non zero)
+ >
+07cb : 68 > pla ;load status
+07cc : 48 > pha
+ > cmp_flag 0
+07cd : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07cf : d0fe > bne * ;failed not equal (non zero)
+ >
+07d1 : 28 > plp ;restore status
+
+ set_a 0,$ff
+ > load_flag $ff
+07d2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+07d4 : 48 > pha ;use stack to load status
+07d5 : a900 > lda #0 ;precharge accu
+07d7 : 28 > plp
+
+07d8 : 48 pha
+ tst_a 0,$ff
+07d9 : 08 > php ;save flags
+07da : c900 > cmp #0 ;test result
+ > trap_ne
+07dc : d0fe > bne * ;failed not equal (non zero)
+ >
+07de : 68 > pla ;load status
+07df : 48 > pha
+ > cmp_flag $ff
+07e0 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+07e4 : 28 > plp ;restore status
+
+ set_a $ff,0
+ > load_flag 0
+07e5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+07e7 : 48 > pha ;use stack to load status
+07e8 : a9ff > lda #$ff ;precharge accu
+07ea : 28 > plp
+
+07eb : 48 pha
+ tst_a $ff,0
+07ec : 08 > php ;save flags
+07ed : c9ff > cmp #$ff ;test result
+ > trap_ne
+07ef : d0fe > bne * ;failed not equal (non zero)
+ >
+07f1 : 68 > pla ;load status
+07f2 : 48 > pha
+ > cmp_flag 0
+07f3 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07f5 : d0fe > bne * ;failed not equal (non zero)
+ >
+07f7 : 28 > plp ;restore status
+
+ set_a 0,$ff ;pull
+ > load_flag $ff
+07f8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+07fa : 48 > pha ;use stack to load status
+07fb : a900 > lda #0 ;precharge accu
+07fd : 28 > plp
+
+07fe : 68 pla
+ tst_a $ff,$ff-zero
+07ff : 08 > php ;save flags
+0800 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0802 : d0fe > bne * ;failed not equal (non zero)
+ >
+0804 : 68 > pla ;load status
+0805 : 48 > pha
+ > cmp_flag $ff-zero
+0806 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0808 : d0fe > bne * ;failed not equal (non zero)
+ >
+080a : 28 > plp ;restore status
+
+ set_a $ff,0
+ > load_flag 0
+080b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+080d : 48 > pha ;use stack to load status
+080e : a9ff > lda #$ff ;precharge accu
+0810 : 28 > plp
+
+0811 : 68 pla
+ tst_a 0,zero
+0812 : 08 > php ;save flags
+0813 : c900 > cmp #0 ;test result
+ > trap_ne
+0815 : d0fe > bne * ;failed not equal (non zero)
+ >
+0817 : 68 > pla ;load status
+0818 : 48 > pha
+ > cmp_flag zero
+0819 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+081b : d0fe > bne * ;failed not equal (non zero)
+ >
+081d : 28 > plp ;restore status
+
+ set_a $fe,$ff
+ > load_flag $ff
+081e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0820 : 48 > pha ;use stack to load status
+0821 : a9fe > lda #$fe ;precharge accu
+0823 : 28 > plp
+
+0824 : 68 pla
+ tst_a 1,$ff-zero-minus
+0825 : 08 > php ;save flags
+0826 : c901 > cmp #1 ;test result
+ > trap_ne
+0828 : d0fe > bne * ;failed not equal (non zero)
+ >
+082a : 68 > pla ;load status
+082b : 48 > pha
+ > cmp_flag $ff-zero-minus
+082c : c97d > cmp #($ff-zero-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+082e : d0fe > bne * ;failed not equal (non zero)
+ >
+0830 : 28 > plp ;restore status
+
+ set_a 0,0
+ > load_flag 0
+0831 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0833 : 48 > pha ;use stack to load status
+0834 : a900 > lda #0 ;precharge accu
+0836 : 28 > plp
+
+0837 : 68 pla
+ tst_a $ff,minus
+0838 : 08 > php ;save flags
+0839 : c9ff > cmp #$ff ;test result
+ > trap_ne
+083b : d0fe > bne * ;failed not equal (non zero)
+ >
+083d : 68 > pla ;load status
+083e : 48 > pha
+ > cmp_flag minus
+083f : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0841 : d0fe > bne * ;failed not equal (non zero)
+ >
+0843 : 28 > plp ;restore status
+
+ set_a $ff,$ff
+ > load_flag $ff
+0844 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0846 : 48 > pha ;use stack to load status
+0847 : a9ff > lda #$ff ;precharge accu
+0849 : 28 > plp
+
+084a : 68 pla
+ tst_a 0,$ff-minus
+084b : 08 > php ;save flags
+084c : c900 > cmp #0 ;test result
+ > trap_ne
+084e : d0fe > bne * ;failed not equal (non zero)
+ >
+0850 : 68 > pla ;load status
+0851 : 48 > pha
+ > cmp_flag $ff-minus
+0852 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0854 : d0fe > bne * ;failed not equal (non zero)
+ >
+0856 : 28 > plp ;restore status
+
+ set_a $fe,0
+ > load_flag 0
+0857 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0859 : 48 > pha ;use stack to load status
+085a : a9fe > lda #$fe ;precharge accu
+085c : 28 > plp
+
+085d : 68 pla
+ tst_a 1,0
+085e : 08 > php ;save flags
+085f : c901 > cmp #1 ;test result
+ > trap_ne
+0861 : d0fe > bne * ;failed not equal (non zero)
+ >
+0863 : 68 > pla ;load status
+0864 : 48 > pha
+ > cmp_flag 0
+0865 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0867 : d0fe > bne * ;failed not equal (non zero)
+ >
+0869 : 28 > plp ;restore status
+
+086a : e055 cpx #$55 ;x & y unchanged?
+ trap_ne
+086c : d0fe > bne * ;failed not equal (non zero)
+
+086e : c0aa cpy #$aa
+ trap_ne
+0870 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0872 : ad0002 > lda test_case ;previous test
+0875 : c905 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0877 : d0fe > bne * ;failed not equal (non zero)
+ >
+0006 = >test_num = test_num + 1
+0879 : a906 > lda #test_num ;*** next tests' number
+087b : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; partial pretest EOR #
+ set_a $3c,0
+ > load_flag 0
+087e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0880 : 48 > pha ;use stack to load status
+0881 : a93c > lda #$3c ;precharge accu
+0883 : 28 > plp
+
+0884 : 49c3 eor #$c3
+ tst_a $ff,fn
+0886 : 08 > php ;save flags
+0887 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0889 : d0fe > bne * ;failed not equal (non zero)
+ >
+088b : 68 > pla ;load status
+088c : 48 > pha
+ > cmp_flag fn
+088d : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+088f : d0fe > bne * ;failed not equal (non zero)
+ >
+0891 : 28 > plp ;restore status
+
+ set_a $c3,0
+ > load_flag 0
+0892 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0894 : 48 > pha ;use stack to load status
+0895 : a9c3 > lda #$c3 ;precharge accu
+0897 : 28 > plp
+
+0898 : 49c3 eor #$c3
+ tst_a 0,fz
+089a : 08 > php ;save flags
+089b : c900 > cmp #0 ;test result
+ > trap_ne
+089d : d0fe > bne * ;failed not equal (non zero)
+ >
+089f : 68 > pla ;load status
+08a0 : 48 > pha
+ > cmp_flag fz
+08a1 : c932 > cmp #(fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08a3 : d0fe > bne * ;failed not equal (non zero)
+ >
+08a5 : 28 > plp ;restore status
+
+ next_test
+08a6 : ad0002 > lda test_case ;previous test
+08a9 : c906 > cmp #test_num
+ > trap_ne ;test is out of sequence
+08ab : d0fe > bne * ;failed not equal (non zero)
+ >
+0007 = >test_num = test_num + 1
+08ad : a907 > lda #test_num ;*** next tests' number
+08af : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
+ ; testing NOP
+08b2 : a224 ldx #$24
+08b4 : a042 ldy #$42
+ set_a $18,0
+ > load_flag 0
+08b6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+08b8 : 48 > pha ;use stack to load status
+08b9 : a918 > lda #$18 ;precharge accu
+08bb : 28 > plp
+
+08bc : ea nop
+ tst_a $18,0
+08bd : 08 > php ;save flags
+08be : c918 > cmp #$18 ;test result
+ > trap_ne
+08c0 : d0fe > bne * ;failed not equal (non zero)
+ >
+08c2 : 68 > pla ;load status
+08c3 : 48 > pha
+ > cmp_flag 0
+08c4 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08c6 : d0fe > bne * ;failed not equal (non zero)
+ >
+08c8 : 28 > plp ;restore status
+
+08c9 : e024 cpx #$24
+ trap_ne
+08cb : d0fe > bne * ;failed not equal (non zero)
+
+08cd : c042 cpy #$42
+ trap_ne
+08cf : d0fe > bne * ;failed not equal (non zero)
+
+08d1 : a2db ldx #$db
+08d3 : a0bd ldy #$bd
+ set_a $e7,$ff
+ > load_flag $ff
+08d5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+08d7 : 48 > pha ;use stack to load status
+08d8 : a9e7 > lda #$e7 ;precharge accu
+08da : 28 > plp
+
+08db : ea nop
+ tst_a $e7,$ff
+08dc : 08 > php ;save flags
+08dd : c9e7 > cmp #$e7 ;test result
+ > trap_ne
+08df : d0fe > bne * ;failed not equal (non zero)
+ >
+08e1 : 68 > pla ;load status
+08e2 : 48 > pha
+ > cmp_flag $ff
+08e3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08e5 : d0fe > bne * ;failed not equal (non zero)
+ >
+08e7 : 28 > plp ;restore status
+
+08e8 : e0db cpx #$db
+ trap_ne
+08ea : d0fe > bne * ;failed not equal (non zero)
+
+08ec : c0bd cpy #$bd
+ trap_ne
+08ee : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+08f0 : ad0002 > lda test_case ;previous test
+08f3 : c907 > cmp #test_num
+ > trap_ne ;test is out of sequence
+08f5 : d0fe > bne * ;failed not equal (non zero)
+ >
+0008 = >test_num = test_num + 1
+08f7 : a908 > lda #test_num ;*** next tests' number
+08f9 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump absolute
+ set_stat $0
+ > load_flag $0
+08fc : a900 > lda #$0 ;allow test to change I-flag (no mask)
+ >
+08fe : 48 > pha ;use stack to load status
+08ff : 28 > plp
+
+0900 : a946 lda #'F'
+0902 : a241 ldx #'A'
+0904 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
+0906 : 4cef36 jmp test_far
+0909 : ea nop
+090a : ea nop
+ trap_ne ;runover protection
+090b : d0fe > bne * ;failed not equal (non zero)
+
+090d : e8 inx
+090e : e8 inx
+090f : far_ret
+ trap_eq ;returned flags OK?
+090f : f0fe > beq * ;failed equal (zero)
+
+ trap_pl
+0911 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ trap_cc
+0913 : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+0915 : 50fe > bvc * ;failed overflow clear
+
+0917 : c9ec cmp #('F'^$aa) ;returned registers OK?
+ trap_ne
+0919 : d0fe > bne * ;failed not equal (non zero)
+
+091b : e042 cpx #('A'+1)
+ trap_ne
+091d : d0fe > bne * ;failed not equal (non zero)
+
+091f : c04f cpy #('R'-3)
+ trap_ne
+0921 : d0fe > bne * ;failed not equal (non zero)
+
+0923 : ca dex
+0924 : c8 iny
+0925 : c8 iny
+0926 : c8 iny
+0927 : 49aa eor #$aa ;N=0, V=1, Z=0, C=1
+0929 : 4c3209 jmp test_near
+092c : ea nop
+092d : ea nop
+ trap_ne ;runover protection
+092e : d0fe > bne * ;failed not equal (non zero)
+
+0930 : e8 inx
+0931 : e8 inx
+0932 : test_near
+ trap_eq ;passed flags OK?
+0932 : f0fe > beq * ;failed equal (zero)
+
+ trap_mi
+0934 : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_cc
+0936 : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+0938 : 50fe > bvc * ;failed overflow clear
+
+093a : c946 cmp #'F' ;passed registers OK?
+ trap_ne
+093c : d0fe > bne * ;failed not equal (non zero)
+
+093e : e041 cpx #'A'
+ trap_ne
+0940 : d0fe > bne * ;failed not equal (non zero)
+
+0942 : c052 cpy #'R'
+ trap_ne
+0944 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0946 : ad0002 > lda test_case ;previous test
+0949 : c908 > cmp #test_num
+ > trap_ne ;test is out of sequence
+094b : d0fe > bne * ;failed not equal (non zero)
+ >
+0009 = >test_num = test_num + 1
+094d : a909 > lda #test_num ;*** next tests' number
+094f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump indirect
+ set_stat 0
+ > load_flag 0
+0952 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0954 : 48 > pha ;use stack to load status
+0955 : 28 > plp
+
+0956 : a949 lda #'I'
+0958 : a24e ldx #'N'
+095a : a044 ldy #'D' ;N=0, V=0, Z=0, C=0
+095c : 6c1e37 jmp (ptr_tst_ind)
+095f : ea nop
+ trap_ne ;runover protection
+0960 : d0fe > bne * ;failed not equal (non zero)
+
+0962 : 88 dey
+0963 : 88 dey
+0964 : ind_ret
+0964 : 08 php ;either SP or Y count will fail, if we do not hit
+0965 : 88 dey
+0966 : 88 dey
+0967 : 88 dey
+0968 : 28 plp
+ trap_eq ;returned flags OK?
+0969 : f0fe > beq * ;failed equal (zero)
+
+ trap_pl
+096b : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ trap_cc
+096d : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+096f : 50fe > bvc * ;failed overflow clear
+
+0971 : c9e3 cmp #('I'^$aa) ;returned registers OK?
+ trap_ne
+0973 : d0fe > bne * ;failed not equal (non zero)
+
+0975 : e04f cpx #('N'+1)
+ trap_ne
+0977 : d0fe > bne * ;failed not equal (non zero)
+
+0979 : c03e cpy #('D'-6)
+ trap_ne
+097b : d0fe > bne * ;failed not equal (non zero)
+
+097d : ba tsx ;SP check
+097e : e0ff cpx #$ff
+ trap_ne
+0980 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0982 : ad0002 > lda test_case ;previous test
+0985 : c909 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0987 : d0fe > bne * ;failed not equal (non zero)
+ >
+000a = >test_num = test_num + 1
+0989 : a90a > lda #test_num ;*** next tests' number
+098b : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump subroutine & return from subroutine
+ set_stat 0
+ > load_flag 0
+098e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0990 : 48 > pha ;use stack to load status
+0991 : 28 > plp
+
+0992 : a94a lda #'J'
+0994 : a253 ldx #'S'
+0996 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
+0998 : 205d37 jsr test_jsr
+099a = jsr_ret = *-1 ;last address of jsr = return address
+099b : 08 php ;either SP or Y count will fail, if we do not hit
+099c : 88 dey
+099d : 88 dey
+099e : 88 dey
+099f : 28 plp
+ trap_eq ;returned flags OK?
+09a0 : f0fe > beq * ;failed equal (zero)
+
+ trap_pl
+09a2 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ trap_cc
+09a4 : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+09a6 : 50fe > bvc * ;failed overflow clear
+
+09a8 : c9e0 cmp #('J'^$aa) ;returned registers OK?
+ trap_ne
+09aa : d0fe > bne * ;failed not equal (non zero)
+
+09ac : e054 cpx #('S'+1)
+ trap_ne
+09ae : d0fe > bne * ;failed not equal (non zero)
+
+09b0 : c04c cpy #('R'-6)
+ trap_ne
+09b2 : d0fe > bne * ;failed not equal (non zero)
+
+09b4 : ba tsx ;sp?
+09b5 : e0ff cpx #$ff
+ trap_ne
+09b7 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+09b9 : ad0002 > lda test_case ;previous test
+09bc : c90a > cmp #test_num
+ > trap_ne ;test is out of sequence
+09be : d0fe > bne * ;failed not equal (non zero)
+ >
+000b = >test_num = test_num + 1
+09c0 : a90b > lda #test_num ;*** next tests' number
+09c2 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; break & return from interrupt
+ if ROM_vectors = 1
+ load_flag 0 ;with interrupts enabled if allowed!
+09c5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+09c7 : 48 pha
+09c8 : a942 lda #'B'
+09ca : a252 ldx #'R'
+09cc : a04b ldy #'K'
+09ce : 28 plp ;N=0, V=0, Z=0, C=0
+09cf : 00 brk
+ else
+ lda #hi brk_ret0 ;emulated break
+ pha
+ lda #lo brk_ret0
+ pha
+ load_flag fao ;set break & unused on stack
+ pha
+ load_flag intdis ;during interrupt
+ pha
+ lda #'B'
+ ldx #'R'
+ ldy #'K'
+ plp ;N=0, V=0, Z=0, C=0
+ jmp irq_trap
+ endif
+09d0 : 88 dey ;should not be executed
+09d1 : brk_ret0 ;address of break return
+09d1 : 08 php ;either SP or Y count will fail, if we do not hit
+09d2 : 88 dey
+09d3 : 88 dey
+09d4 : 88 dey
+09d5 : c9e8 cmp #'B'^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+09d7 : d0fe > bne * ;failed not equal (non zero)
+
+09d9 : e053 cpx #'R'+1
+ trap_ne
+09db : d0fe > bne * ;failed not equal (non zero)
+
+09dd : c045 cpy #'K'-6
+ trap_ne
+09df : d0fe > bne * ;failed not equal (non zero)
+
+09e1 : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag 0
+09e2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+09e4 : d0fe > bne * ;failed not equal (non zero)
+
+09e6 : ba tsx ;sp?
+09e7 : e0ff cpx #$ff
+ trap_ne
+09e9 : d0fe > bne * ;failed not equal (non zero)
+
+ if ROM_vectors = 1
+ load_flag $ff ;with interrupts disabled if allowed!
+09eb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+09ed : 48 pha
+09ee : a9bd lda #$ff-'B'
+09f0 : a2ad ldx #$ff-'R'
+09f2 : a0b4 ldy #$ff-'K'
+09f4 : 28 plp ;N=1, V=1, Z=1, C=1
+09f5 : 00 brk
+ else
+ lda #hi brk_ret1 ;emulated break
+ pha
+ lda #lo brk_ret1
+ pha
+ load_flag $ff
+ pha ;set break & unused on stack
+ pha ;actual flags
+ lda #$ff-'B'
+ ldx #$ff-'R'
+ ldy #$ff-'K'
+ plp ;N=1, V=1, Z=1, C=1
+ jmp irq_trap
+ endif
+09f6 : 88 dey ;should not be executed
+09f7 : brk_ret1 ;address of break return
+09f7 : 08 php ;either SP or Y count will fail, if we do not hit
+09f8 : 88 dey
+09f9 : 88 dey
+09fa : 88 dey
+09fb : c917 cmp #($ff-'B')^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+09fd : d0fe > bne * ;failed not equal (non zero)
+
+09ff : e0ae cpx #$ff-'R'+1
+ trap_ne
+0a01 : d0fe > bne * ;failed not equal (non zero)
+
+0a03 : c0ae cpy #$ff-'K'-6
+ trap_ne
+0a05 : d0fe > bne * ;failed not equal (non zero)
+
+0a07 : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag $ff
+0a08 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0a0a : d0fe > bne * ;failed not equal (non zero)
+
+0a0c : ba tsx ;sp?
+0a0d : e0ff cpx #$ff
+ trap_ne
+0a0f : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0a11 : ad0002 > lda test_case ;previous test
+0a14 : c90b > cmp #test_num
+ > trap_ne ;test is out of sequence
+0a16 : d0fe > bne * ;failed not equal (non zero)
+ >
+000c = >test_num = test_num + 1
+0a18 : a90c > lda #test_num ;*** next tests' number
+0a1a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test set and clear flags CLC CLI CLD CLV SEC SEI SED
+ set_stat $ff
+ > load_flag $ff
+0a1d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0a1f : 48 > pha ;use stack to load status
+0a20 : 28 > plp
+
+0a21 : 18 clc
+ tst_stat $ff-carry
+0a22 : 08 > php ;save status
+0a23 : 68 > pla ;use stack to retrieve status
+0a24 : 48 > pha
+ > cmp_flag $ff-carry
+0a25 : c9fe > cmp #($ff-carry|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a27 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a29 : 28 > plp ;restore status
+
+0a2a : 38 sec
+ tst_stat $ff
+0a2b : 08 > php ;save status
+0a2c : 68 > pla ;use stack to retrieve status
+0a2d : 48 > pha
+ > cmp_flag $ff
+0a2e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a30 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a32 : 28 > plp ;restore status
+
+ if I_flag = 3
+0a33 : 58 cli
+ tst_stat $ff-intdis
+0a34 : 08 > php ;save status
+0a35 : 68 > pla ;use stack to retrieve status
+0a36 : 48 > pha
+ > cmp_flag $ff-intdis
+0a37 : c9fb > cmp #($ff-intdis|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a39 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a3b : 28 > plp ;restore status
+
+0a3c : 78 sei
+ tst_stat $ff
+0a3d : 08 > php ;save status
+0a3e : 68 > pla ;use stack to retrieve status
+0a3f : 48 > pha
+ > cmp_flag $ff
+0a40 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a42 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a44 : 28 > plp ;restore status
+
+ endif
+0a45 : d8 cld
+ tst_stat $ff-decmode
+0a46 : 08 > php ;save status
+0a47 : 68 > pla ;use stack to retrieve status
+0a48 : 48 > pha
+ > cmp_flag $ff-decmode
+0a49 : c9f7 > cmp #($ff-decmode|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a4b : d0fe > bne * ;failed not equal (non zero)
+ >
+0a4d : 28 > plp ;restore status
+
+0a4e : f8 sed
+ tst_stat $ff
+0a4f : 08 > php ;save status
+0a50 : 68 > pla ;use stack to retrieve status
+0a51 : 48 > pha
+ > cmp_flag $ff
+0a52 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a54 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a56 : 28 > plp ;restore status
+
+0a57 : b8 clv
+ tst_stat $ff-overfl
+0a58 : 08 > php ;save status
+0a59 : 68 > pla ;use stack to retrieve status
+0a5a : 48 > pha
+ > cmp_flag $ff-overfl
+0a5b : c9bf > cmp #($ff-overfl|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a5d : d0fe > bne * ;failed not equal (non zero)
+ >
+0a5f : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0a60 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0a62 : 48 > pha ;use stack to load status
+0a63 : 28 > plp
+
+ tst_stat 0
+0a64 : 08 > php ;save status
+0a65 : 68 > pla ;use stack to retrieve status
+0a66 : 48 > pha
+ > cmp_flag 0
+0a67 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a69 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a6b : 28 > plp ;restore status
+
+0a6c : 38 sec
+ tst_stat carry
+0a6d : 08 > php ;save status
+0a6e : 68 > pla ;use stack to retrieve status
+0a6f : 48 > pha
+ > cmp_flag carry
+0a70 : c931 > cmp #(carry|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a72 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a74 : 28 > plp ;restore status
+
+0a75 : 18 clc
+ tst_stat 0
+0a76 : 08 > php ;save status
+0a77 : 68 > pla ;use stack to retrieve status
+0a78 : 48 > pha
+ > cmp_flag 0
+0a79 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a7b : d0fe > bne * ;failed not equal (non zero)
+ >
+0a7d : 28 > plp ;restore status
+
+ if I_flag = 3
+0a7e : 78 sei
+ tst_stat intdis
+0a7f : 08 > php ;save status
+0a80 : 68 > pla ;use stack to retrieve status
+0a81 : 48 > pha
+ > cmp_flag intdis
+0a82 : c934 > cmp #(intdis|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a84 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a86 : 28 > plp ;restore status
+
+0a87 : 58 cli
+ tst_stat 0
+0a88 : 08 > php ;save status
+0a89 : 68 > pla ;use stack to retrieve status
+0a8a : 48 > pha
+ > cmp_flag 0
+0a8b : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a8d : d0fe > bne * ;failed not equal (non zero)
+ >
+0a8f : 28 > plp ;restore status
+
+ endif
+0a90 : f8 sed
+ tst_stat decmode
+0a91 : 08 > php ;save status
+0a92 : 68 > pla ;use stack to retrieve status
+0a93 : 48 > pha
+ > cmp_flag decmode
+0a94 : c938 > cmp #(decmode|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a96 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a98 : 28 > plp ;restore status
+
+0a99 : d8 cld
+ tst_stat 0
+0a9a : 08 > php ;save status
+0a9b : 68 > pla ;use stack to retrieve status
+0a9c : 48 > pha
+ > cmp_flag 0
+0a9d : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a9f : d0fe > bne * ;failed not equal (non zero)
+ >
+0aa1 : 28 > plp ;restore status
+
+ set_stat overfl
+ > load_flag overfl
+0aa2 : a940 > lda #overfl ;allow test to change I-flag (no mask)
+ >
+0aa4 : 48 > pha ;use stack to load status
+0aa5 : 28 > plp
+
+ tst_stat overfl
+0aa6 : 08 > php ;save status
+0aa7 : 68 > pla ;use stack to retrieve status
+0aa8 : 48 > pha
+ > cmp_flag overfl
+0aa9 : c970 > cmp #(overfl|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0aab : d0fe > bne * ;failed not equal (non zero)
+ >
+0aad : 28 > plp ;restore status
+
+0aae : b8 clv
+ tst_stat 0
+0aaf : 08 > php ;save status
+0ab0 : 68 > pla ;use stack to retrieve status
+0ab1 : 48 > pha
+ > cmp_flag 0
+0ab2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ab4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ab6 : 28 > plp ;restore status
+
+ next_test
+0ab7 : ad0002 > lda test_case ;previous test
+0aba : c90c > cmp #test_num
+ > trap_ne ;test is out of sequence
+0abc : d0fe > bne * ;failed not equal (non zero)
+ >
+000d = >test_num = test_num + 1
+0abe : a90d > lda #test_num ;*** next tests' number
+0ac0 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ ; testing index register increment/decrement and transfer
+ ; INX INY DEX DEY TAX TXA TAY TYA
+0ac3 : a2fe ldx #$fe
+ set_stat $ff
+ > load_flag $ff
+0ac5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0ac7 : 48 > pha ;use stack to load status
+0ac8 : 28 > plp
+
+0ac9 : e8 inx ;ff
+ tst_x $ff,$ff-zero
+0aca : 08 > php ;save flags
+0acb : e0ff > cpx #$ff ;test result
+ > trap_ne
+0acd : d0fe > bne * ;failed not equal (non zero)
+ >
+0acf : 68 > pla ;load status
+0ad0 : 48 > pha
+ > cmp_flag $ff-zero
+0ad1 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ad3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ad5 : 28 > plp ;restore status
+
+0ad6 : e8 inx ;00
+ tst_x 0,$ff-minus
+0ad7 : 08 > php ;save flags
+0ad8 : e000 > cpx #0 ;test result
+ > trap_ne
+0ada : d0fe > bne * ;failed not equal (non zero)
+ >
+0adc : 68 > pla ;load status
+0add : 48 > pha
+ > cmp_flag $ff-minus
+0ade : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ae0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ae2 : 28 > plp ;restore status
+
+0ae3 : e8 inx ;01
+ tst_x 1,$ff-minus-zero
+0ae4 : 08 > php ;save flags
+0ae5 : e001 > cpx #1 ;test result
+ > trap_ne
+0ae7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ae9 : 68 > pla ;load status
+0aea : 48 > pha
+ > cmp_flag $ff-minus-zero
+0aeb : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0aed : d0fe > bne * ;failed not equal (non zero)
+ >
+0aef : 28 > plp ;restore status
+
+0af0 : ca dex ;00
+ tst_x 0,$ff-minus
+0af1 : 08 > php ;save flags
+0af2 : e000 > cpx #0 ;test result
+ > trap_ne
+0af4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0af6 : 68 > pla ;load status
+0af7 : 48 > pha
+ > cmp_flag $ff-minus
+0af8 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0afa : d0fe > bne * ;failed not equal (non zero)
+ >
+0afc : 28 > plp ;restore status
+
+0afd : ca dex ;ff
+ tst_x $ff,$ff-zero
+0afe : 08 > php ;save flags
+0aff : e0ff > cpx #$ff ;test result
+ > trap_ne
+0b01 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b03 : 68 > pla ;load status
+0b04 : 48 > pha
+ > cmp_flag $ff-zero
+0b05 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b07 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b09 : 28 > plp ;restore status
+
+0b0a : ca dex ;fe
+ set_stat 0
+ > load_flag 0
+0b0b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0b0d : 48 > pha ;use stack to load status
+0b0e : 28 > plp
+
+0b0f : e8 inx ;ff
+ tst_x $ff,minus
+0b10 : 08 > php ;save flags
+0b11 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0b13 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b15 : 68 > pla ;load status
+0b16 : 48 > pha
+ > cmp_flag minus
+0b17 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b19 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b1b : 28 > plp ;restore status
+
+0b1c : e8 inx ;00
+ tst_x 0,zero
+0b1d : 08 > php ;save flags
+0b1e : e000 > cpx #0 ;test result
+ > trap_ne
+0b20 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b22 : 68 > pla ;load status
+0b23 : 48 > pha
+ > cmp_flag zero
+0b24 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b26 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b28 : 28 > plp ;restore status
+
+0b29 : e8 inx ;01
+ tst_x 1,0
+0b2a : 08 > php ;save flags
+0b2b : e001 > cpx #1 ;test result
+ > trap_ne
+0b2d : d0fe > bne * ;failed not equal (non zero)
+ >
+0b2f : 68 > pla ;load status
+0b30 : 48 > pha
+ > cmp_flag 0
+0b31 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b33 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b35 : 28 > plp ;restore status
+
+0b36 : ca dex ;00
+ tst_x 0,zero
+0b37 : 08 > php ;save flags
+0b38 : e000 > cpx #0 ;test result
+ > trap_ne
+0b3a : d0fe > bne * ;failed not equal (non zero)
+ >
+0b3c : 68 > pla ;load status
+0b3d : 48 > pha
+ > cmp_flag zero
+0b3e : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b40 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b42 : 28 > plp ;restore status
+
+0b43 : ca dex ;ff
+ tst_x $ff,minus
+0b44 : 08 > php ;save flags
+0b45 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0b47 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b49 : 68 > pla ;load status
+0b4a : 48 > pha
+ > cmp_flag minus
+0b4b : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b4d : d0fe > bne * ;failed not equal (non zero)
+ >
+0b4f : 28 > plp ;restore status
+
+
+0b50 : a0fe ldy #$fe
+ set_stat $ff
+ > load_flag $ff
+0b52 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0b54 : 48 > pha ;use stack to load status
+0b55 : 28 > plp
+
+0b56 : c8 iny ;ff
+ tst_y $ff,$ff-zero
+0b57 : 08 > php ;save flags
+0b58 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0b5a : d0fe > bne * ;failed not equal (non zero)
+ >
+0b5c : 68 > pla ;load status
+0b5d : 48 > pha
+ > cmp_flag $ff-zero
+0b5e : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b60 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b62 : 28 > plp ;restore status
+
+0b63 : c8 iny ;00
+ tst_y 0,$ff-minus
+0b64 : 08 > php ;save flags
+0b65 : c000 > cpy #0 ;test result
+ > trap_ne
+0b67 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b69 : 68 > pla ;load status
+0b6a : 48 > pha
+ > cmp_flag $ff-minus
+0b6b : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b6d : d0fe > bne * ;failed not equal (non zero)
+ >
+0b6f : 28 > plp ;restore status
+
+0b70 : c8 iny ;01
+ tst_y 1,$ff-minus-zero
+0b71 : 08 > php ;save flags
+0b72 : c001 > cpy #1 ;test result
+ > trap_ne
+0b74 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b76 : 68 > pla ;load status
+0b77 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0b78 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b7a : d0fe > bne * ;failed not equal (non zero)
+ >
+0b7c : 28 > plp ;restore status
+
+0b7d : 88 dey ;00
+ tst_y 0,$ff-minus
+0b7e : 08 > php ;save flags
+0b7f : c000 > cpy #0 ;test result
+ > trap_ne
+0b81 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b83 : 68 > pla ;load status
+0b84 : 48 > pha
+ > cmp_flag $ff-minus
+0b85 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b87 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b89 : 28 > plp ;restore status
+
+0b8a : 88 dey ;ff
+ tst_y $ff,$ff-zero
+0b8b : 08 > php ;save flags
+0b8c : c0ff > cpy #$ff ;test result
+ > trap_ne
+0b8e : d0fe > bne * ;failed not equal (non zero)
+ >
+0b90 : 68 > pla ;load status
+0b91 : 48 > pha
+ > cmp_flag $ff-zero
+0b92 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b94 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b96 : 28 > plp ;restore status
+
+0b97 : 88 dey ;fe
+ set_stat 0
+ > load_flag 0
+0b98 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0b9a : 48 > pha ;use stack to load status
+0b9b : 28 > plp
+
+0b9c : c8 iny ;ff
+ tst_y $ff,0+minus
+0b9d : 08 > php ;save flags
+0b9e : c0ff > cpy #$ff ;test result
+ > trap_ne
+0ba0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ba2 : 68 > pla ;load status
+0ba3 : 48 > pha
+ > cmp_flag 0+minus
+0ba4 : c9b0 > cmp #(0+minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ba6 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ba8 : 28 > plp ;restore status
+
+0ba9 : c8 iny ;00
+ tst_y 0,zero
+0baa : 08 > php ;save flags
+0bab : c000 > cpy #0 ;test result
+ > trap_ne
+0bad : d0fe > bne * ;failed not equal (non zero)
+ >
+0baf : 68 > pla ;load status
+0bb0 : 48 > pha
+ > cmp_flag zero
+0bb1 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bb3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0bb5 : 28 > plp ;restore status
+
+0bb6 : c8 iny ;01
+ tst_y 1,0
+0bb7 : 08 > php ;save flags
+0bb8 : c001 > cpy #1 ;test result
+ > trap_ne
+0bba : d0fe > bne * ;failed not equal (non zero)
+ >
+0bbc : 68 > pla ;load status
+0bbd : 48 > pha
+ > cmp_flag 0
+0bbe : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bc0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0bc2 : 28 > plp ;restore status
+
+0bc3 : 88 dey ;00
+ tst_y 0,zero
+0bc4 : 08 > php ;save flags
+0bc5 : c000 > cpy #0 ;test result
+ > trap_ne
+0bc7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0bc9 : 68 > pla ;load status
+0bca : 48 > pha
+ > cmp_flag zero
+0bcb : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bcd : d0fe > bne * ;failed not equal (non zero)
+ >
+0bcf : 28 > plp ;restore status
+
+0bd0 : 88 dey ;ff
+ tst_y $ff,minus
+0bd1 : 08 > php ;save flags
+0bd2 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0bd4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0bd6 : 68 > pla ;load status
+0bd7 : 48 > pha
+ > cmp_flag minus
+0bd8 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bda : d0fe > bne * ;failed not equal (non zero)
+ >
+0bdc : 28 > plp ;restore status
+
+
+0bdd : a2ff ldx #$ff
+ set_stat $ff
+ > load_flag $ff
+0bdf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0be1 : 48 > pha ;use stack to load status
+0be2 : 28 > plp
+
+0be3 : 8a txa
+ tst_a $ff,$ff-zero
+0be4 : 08 > php ;save flags
+0be5 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0be7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0be9 : 68 > pla ;load status
+0bea : 48 > pha
+ > cmp_flag $ff-zero
+0beb : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bed : d0fe > bne * ;failed not equal (non zero)
+ >
+0bef : 28 > plp ;restore status
+
+0bf0 : 08 php
+0bf1 : e8 inx ;00
+0bf2 : 28 plp
+0bf3 : 8a txa
+ tst_a 0,$ff-minus
+0bf4 : 08 > php ;save flags
+0bf5 : c900 > cmp #0 ;test result
+ > trap_ne
+0bf7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0bf9 : 68 > pla ;load status
+0bfa : 48 > pha
+ > cmp_flag $ff-minus
+0bfb : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bfd : d0fe > bne * ;failed not equal (non zero)
+ >
+0bff : 28 > plp ;restore status
+
+0c00 : 08 php
+0c01 : e8 inx ;01
+0c02 : 28 plp
+0c03 : 8a txa
+ tst_a 1,$ff-minus-zero
+0c04 : 08 > php ;save flags
+0c05 : c901 > cmp #1 ;test result
+ > trap_ne
+0c07 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c09 : 68 > pla ;load status
+0c0a : 48 > pha
+ > cmp_flag $ff-minus-zero
+0c0b : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c0d : d0fe > bne * ;failed not equal (non zero)
+ >
+0c0f : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0c10 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0c12 : 48 > pha ;use stack to load status
+0c13 : 28 > plp
+
+0c14 : 8a txa
+ tst_a 1,0
+0c15 : 08 > php ;save flags
+0c16 : c901 > cmp #1 ;test result
+ > trap_ne
+0c18 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c1a : 68 > pla ;load status
+0c1b : 48 > pha
+ > cmp_flag 0
+0c1c : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c1e : d0fe > bne * ;failed not equal (non zero)
+ >
+0c20 : 28 > plp ;restore status
+
+0c21 : 08 php
+0c22 : ca dex ;00
+0c23 : 28 plp
+0c24 : 8a txa
+ tst_a 0,zero
+0c25 : 08 > php ;save flags
+0c26 : c900 > cmp #0 ;test result
+ > trap_ne
+0c28 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c2a : 68 > pla ;load status
+0c2b : 48 > pha
+ > cmp_flag zero
+0c2c : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c2e : d0fe > bne * ;failed not equal (non zero)
+ >
+0c30 : 28 > plp ;restore status
+
+0c31 : 08 php
+0c32 : ca dex ;ff
+0c33 : 28 plp
+0c34 : 8a txa
+ tst_a $ff,minus
+0c35 : 08 > php ;save flags
+0c36 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0c38 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c3a : 68 > pla ;load status
+0c3b : 48 > pha
+ > cmp_flag minus
+0c3c : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c3e : d0fe > bne * ;failed not equal (non zero)
+ >
+0c40 : 28 > plp ;restore status
+
+
+0c41 : a0ff ldy #$ff
+ set_stat $ff
+ > load_flag $ff
+0c43 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0c45 : 48 > pha ;use stack to load status
+0c46 : 28 > plp
+
+0c47 : 98 tya
+ tst_a $ff,$ff-zero
+0c48 : 08 > php ;save flags
+0c49 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0c4b : d0fe > bne * ;failed not equal (non zero)
+ >
+0c4d : 68 > pla ;load status
+0c4e : 48 > pha
+ > cmp_flag $ff-zero
+0c4f : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c51 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c53 : 28 > plp ;restore status
+
+0c54 : 08 php
+0c55 : c8 iny ;00
+0c56 : 28 plp
+0c57 : 98 tya
+ tst_a 0,$ff-minus
+0c58 : 08 > php ;save flags
+0c59 : c900 > cmp #0 ;test result
+ > trap_ne
+0c5b : d0fe > bne * ;failed not equal (non zero)
+ >
+0c5d : 68 > pla ;load status
+0c5e : 48 > pha
+ > cmp_flag $ff-minus
+0c5f : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c61 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c63 : 28 > plp ;restore status
+
+0c64 : 08 php
+0c65 : c8 iny ;01
+0c66 : 28 plp
+0c67 : 98 tya
+ tst_a 1,$ff-minus-zero
+0c68 : 08 > php ;save flags
+0c69 : c901 > cmp #1 ;test result
+ > trap_ne
+0c6b : d0fe > bne * ;failed not equal (non zero)
+ >
+0c6d : 68 > pla ;load status
+0c6e : 48 > pha
+ > cmp_flag $ff-minus-zero
+0c6f : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c71 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c73 : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0c74 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0c76 : 48 > pha ;use stack to load status
+0c77 : 28 > plp
+
+0c78 : 98 tya
+ tst_a 1,0
+0c79 : 08 > php ;save flags
+0c7a : c901 > cmp #1 ;test result
+ > trap_ne
+0c7c : d0fe > bne * ;failed not equal (non zero)
+ >
+0c7e : 68 > pla ;load status
+0c7f : 48 > pha
+ > cmp_flag 0
+0c80 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c82 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c84 : 28 > plp ;restore status
+
+0c85 : 08 php
+0c86 : 88 dey ;00
+0c87 : 28 plp
+0c88 : 98 tya
+ tst_a 0,zero
+0c89 : 08 > php ;save flags
+0c8a : c900 > cmp #0 ;test result
+ > trap_ne
+0c8c : d0fe > bne * ;failed not equal (non zero)
+ >
+0c8e : 68 > pla ;load status
+0c8f : 48 > pha
+ > cmp_flag zero
+0c90 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c92 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c94 : 28 > plp ;restore status
+
+0c95 : 08 php
+0c96 : 88 dey ;ff
+0c97 : 28 plp
+0c98 : 98 tya
+ tst_a $ff,minus
+0c99 : 08 > php ;save flags
+0c9a : c9ff > cmp #$ff ;test result
+ > trap_ne
+0c9c : d0fe > bne * ;failed not equal (non zero)
+ >
+0c9e : 68 > pla ;load status
+0c9f : 48 > pha
+ > cmp_flag minus
+0ca0 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ca2 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ca4 : 28 > plp ;restore status
+
+
+ load_flag $ff
+0ca5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+0ca7 : 48 pha
+0ca8 : a2ff ldx #$ff ;ff
+0caa : 8a txa
+0cab : 28 plp
+0cac : a8 tay
+ tst_y $ff,$ff-zero
+0cad : 08 > php ;save flags
+0cae : c0ff > cpy #$ff ;test result
+ > trap_ne
+0cb0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cb2 : 68 > pla ;load status
+0cb3 : 48 > pha
+ > cmp_flag $ff-zero
+0cb4 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cb6 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cb8 : 28 > plp ;restore status
+
+0cb9 : 08 php
+0cba : e8 inx ;00
+0cbb : 8a txa
+0cbc : 28 plp
+0cbd : a8 tay
+ tst_y 0,$ff-minus
+0cbe : 08 > php ;save flags
+0cbf : c000 > cpy #0 ;test result
+ > trap_ne
+0cc1 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cc3 : 68 > pla ;load status
+0cc4 : 48 > pha
+ > cmp_flag $ff-minus
+0cc5 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cc7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cc9 : 28 > plp ;restore status
+
+0cca : 08 php
+0ccb : e8 inx ;01
+0ccc : 8a txa
+0ccd : 28 plp
+0cce : a8 tay
+ tst_y 1,$ff-minus-zero
+0ccf : 08 > php ;save flags
+0cd0 : c001 > cpy #1 ;test result
+ > trap_ne
+0cd2 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cd4 : 68 > pla ;load status
+0cd5 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0cd6 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cd8 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cda : 28 > plp ;restore status
+
+ load_flag 0
+0cdb : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+0cdd : 48 pha
+0cde : a900 lda #0
+0ce0 : 8a txa
+0ce1 : 28 plp
+0ce2 : a8 tay
+ tst_y 1,0
+0ce3 : 08 > php ;save flags
+0ce4 : c001 > cpy #1 ;test result
+ > trap_ne
+0ce6 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ce8 : 68 > pla ;load status
+0ce9 : 48 > pha
+ > cmp_flag 0
+0cea : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cec : d0fe > bne * ;failed not equal (non zero)
+ >
+0cee : 28 > plp ;restore status
+
+0cef : 08 php
+0cf0 : ca dex ;00
+0cf1 : 8a txa
+0cf2 : 28 plp
+0cf3 : a8 tay
+ tst_y 0,zero
+0cf4 : 08 > php ;save flags
+0cf5 : c000 > cpy #0 ;test result
+ > trap_ne
+0cf7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cf9 : 68 > pla ;load status
+0cfa : 48 > pha
+ > cmp_flag zero
+0cfb : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cfd : d0fe > bne * ;failed not equal (non zero)
+ >
+0cff : 28 > plp ;restore status
+
+0d00 : 08 php
+0d01 : ca dex ;ff
+0d02 : 8a txa
+0d03 : 28 plp
+0d04 : a8 tay
+ tst_y $ff,minus
+0d05 : 08 > php ;save flags
+0d06 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0d08 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d0a : 68 > pla ;load status
+0d0b : 48 > pha
+ > cmp_flag minus
+0d0c : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d0e : d0fe > bne * ;failed not equal (non zero)
+ >
+0d10 : 28 > plp ;restore status
+
+
+
+ load_flag $ff
+0d11 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+0d13 : 48 pha
+0d14 : a0ff ldy #$ff ;ff
+0d16 : 98 tya
+0d17 : 28 plp
+0d18 : aa tax
+ tst_x $ff,$ff-zero
+0d19 : 08 > php ;save flags
+0d1a : e0ff > cpx #$ff ;test result
+ > trap_ne
+0d1c : d0fe > bne * ;failed not equal (non zero)
+ >
+0d1e : 68 > pla ;load status
+0d1f : 48 > pha
+ > cmp_flag $ff-zero
+0d20 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d22 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d24 : 28 > plp ;restore status
+
+0d25 : 08 php
+0d26 : c8 iny ;00
+0d27 : 98 tya
+0d28 : 28 plp
+0d29 : aa tax
+ tst_x 0,$ff-minus
+0d2a : 08 > php ;save flags
+0d2b : e000 > cpx #0 ;test result
+ > trap_ne
+0d2d : d0fe > bne * ;failed not equal (non zero)
+ >
+0d2f : 68 > pla ;load status
+0d30 : 48 > pha
+ > cmp_flag $ff-minus
+0d31 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d33 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d35 : 28 > plp ;restore status
+
+0d36 : 08 php
+0d37 : c8 iny ;01
+0d38 : 98 tya
+0d39 : 28 plp
+0d3a : aa tax
+ tst_x 1,$ff-minus-zero
+0d3b : 08 > php ;save flags
+0d3c : e001 > cpx #1 ;test result
+ > trap_ne
+0d3e : d0fe > bne * ;failed not equal (non zero)
+ >
+0d40 : 68 > pla ;load status
+0d41 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0d42 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d44 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d46 : 28 > plp ;restore status
+
+ load_flag 0
+0d47 : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+0d49 : 48 pha
+0d4a : a900 lda #0 ;preset status
+0d4c : 98 tya
+0d4d : 28 plp
+0d4e : aa tax
+ tst_x 1,0
+0d4f : 08 > php ;save flags
+0d50 : e001 > cpx #1 ;test result
+ > trap_ne
+0d52 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d54 : 68 > pla ;load status
+0d55 : 48 > pha
+ > cmp_flag 0
+0d56 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d58 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d5a : 28 > plp ;restore status
+
+0d5b : 08 php
+0d5c : 88 dey ;00
+0d5d : 98 tya
+0d5e : 28 plp
+0d5f : aa tax
+ tst_x 0,zero
+0d60 : 08 > php ;save flags
+0d61 : e000 > cpx #0 ;test result
+ > trap_ne
+0d63 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d65 : 68 > pla ;load status
+0d66 : 48 > pha
+ > cmp_flag zero
+0d67 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d69 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d6b : 28 > plp ;restore status
+
+0d6c : 08 php
+0d6d : 88 dey ;ff
+0d6e : 98 tya
+0d6f : 28 plp
+0d70 : aa tax
+ tst_x $ff,minus
+0d71 : 08 > php ;save flags
+0d72 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0d74 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d76 : 68 > pla ;load status
+0d77 : 48 > pha
+ > cmp_flag minus
+0d78 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d7a : d0fe > bne * ;failed not equal (non zero)
+ >
+0d7c : 28 > plp ;restore status
+
+ next_test
+0d7d : ad0002 > lda test_case ;previous test
+0d80 : c90d > cmp #test_num
+ > trap_ne ;test is out of sequence
+0d82 : d0fe > bne * ;failed not equal (non zero)
+ >
+000e = >test_num = test_num + 1
+0d84 : a90e > lda #test_num ;*** next tests' number
+0d86 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;TSX sets NZ - TXS does not
+ ; This section also tests for proper stack wrap around.
+0d89 : a201 ldx #1 ;01
+ set_stat $ff
+ > load_flag $ff
+0d8b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0d8d : 48 > pha ;use stack to load status
+0d8e : 28 > plp
+
+0d8f : 9a txs
+0d90 : 08 php
+0d91 : ad0101 lda $101
+ cmp_flag $ff
+0d94 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0d96 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+0d98 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0d9a : 48 > pha ;use stack to load status
+0d9b : 28 > plp
+
+0d9c : 9a txs
+0d9d : 08 php
+0d9e : ad0101 lda $101
+ cmp_flag 0
+0da1 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0da3 : d0fe > bne * ;failed not equal (non zero)
+
+0da5 : ca dex ;00
+ set_stat $ff
+ > load_flag $ff
+0da6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0da8 : 48 > pha ;use stack to load status
+0da9 : 28 > plp
+
+0daa : 9a txs
+0dab : 08 php
+0dac : ad0001 lda $100
+ cmp_flag $ff
+0daf : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0db1 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+0db3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0db5 : 48 > pha ;use stack to load status
+0db6 : 28 > plp
+
+0db7 : 9a txs
+0db8 : 08 php
+0db9 : ad0001 lda $100
+ cmp_flag 0
+0dbc : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0dbe : d0fe > bne * ;failed not equal (non zero)
+
+0dc0 : ca dex ;ff
+ set_stat $ff
+ > load_flag $ff
+0dc1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0dc3 : 48 > pha ;use stack to load status
+0dc4 : 28 > plp
+
+0dc5 : 9a txs
+0dc6 : 08 php
+0dc7 : adff01 lda $1ff
+ cmp_flag $ff
+0dca : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0dcc : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+0dce : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0dd0 : 48 > pha ;use stack to load status
+0dd1 : 28 > plp
+
+0dd2 : 9a txs
+0dd3 : 08 php
+0dd4 : adff01 lda $1ff
+ cmp_flag 0
+0dd7 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+
+0dd9 : a201 ldx #1
+0ddb : 9a txs ;sp=01
+ set_stat $ff
+ > load_flag $ff
+0ddc : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0dde : 48 > pha ;use stack to load status
+0ddf : 28 > plp
+
+0de0 : ba tsx ;clears Z, N
+0de1 : 08 php ;sp=00
+0de2 : e001 cpx #1
+ trap_ne
+0de4 : d0fe > bne * ;failed not equal (non zero)
+
+0de6 : ad0101 lda $101
+ cmp_flag $ff-minus-zero
+0de9 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0deb : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+0ded : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0def : 48 > pha ;use stack to load status
+0df0 : 28 > plp
+
+0df1 : ba tsx ;clears N, sets Z
+0df2 : 08 php ;sp=ff
+0df3 : e000 cpx #0
+ trap_ne
+0df5 : d0fe > bne * ;failed not equal (non zero)
+
+0df7 : ad0001 lda $100
+ cmp_flag $ff-minus
+0dfa : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0dfc : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+0dfe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e00 : 48 > pha ;use stack to load status
+0e01 : 28 > plp
+
+0e02 : ba tsx ;clears N, sets Z
+0e03 : 08 php ;sp=fe
+0e04 : e0ff cpx #$ff
+ trap_ne
+0e06 : d0fe > bne * ;failed not equal (non zero)
+
+0e08 : adff01 lda $1ff
+ cmp_flag $ff-zero
+0e0b : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0e0d : d0fe > bne * ;failed not equal (non zero)
+
+
+0e0f : a201 ldx #1
+0e11 : 9a txs ;sp=01
+ set_stat 0
+ > load_flag 0
+0e12 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e14 : 48 > pha ;use stack to load status
+0e15 : 28 > plp
+
+0e16 : ba tsx ;clears Z, N
+0e17 : 08 php ;sp=00
+0e18 : e001 cpx #1
+ trap_ne
+0e1a : d0fe > bne * ;failed not equal (non zero)
+
+0e1c : ad0101 lda $101
+ cmp_flag 0
+0e1f : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0e21 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+0e23 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e25 : 48 > pha ;use stack to load status
+0e26 : 28 > plp
+
+0e27 : ba tsx ;clears N, sets Z
+0e28 : 08 php ;sp=ff
+0e29 : e000 cpx #0
+ trap_ne
+0e2b : d0fe > bne * ;failed not equal (non zero)
+
+0e2d : ad0001 lda $100
+ cmp_flag zero
+0e30 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0e32 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+0e34 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e36 : 48 > pha ;use stack to load status
+0e37 : 28 > plp
+
+0e38 : ba tsx ;clears N, sets Z
+0e39 : 08 php ;sp=fe
+0e3a : e0ff cpx #$ff
+ trap_ne
+0e3c : d0fe > bne * ;failed not equal (non zero)
+
+0e3e : adff01 lda $1ff
+ cmp_flag minus
+0e41 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0e43 : d0fe > bne * ;failed not equal (non zero)
+
+0e45 : 68 pla ;sp=ff
+ next_test
+0e46 : ad0002 > lda test_case ;previous test
+0e49 : c90e > cmp #test_num
+ > trap_ne ;test is out of sequence
+0e4b : d0fe > bne * ;failed not equal (non zero)
+ >
+000f = >test_num = test_num + 1
+0e4d : a90f > lda #test_num ;*** next tests' number
+0e4f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing index register load & store LDY LDX STY STX all addressing modes
+ ; LDX / STX - zp,y / abs,y
+0e52 : a003 ldy #3
+0e54 : tldx
+ set_stat 0
+ > load_flag 0
+0e54 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e56 : 48 > pha ;use stack to load status
+0e57 : 28 > plp
+
+0e58 : b613 ldx zp1,y
+0e5a : 08 php ;test stores do not alter flags
+0e5b : 8a txa
+0e5c : 49c3 eor #$c3
+0e5e : 28 plp
+0e5f : 990302 sta abst,y
+0e62 : 08 php ;flags after load/store sequence
+0e63 : 49c3 eor #$c3
+0e65 : d91702 cmp abs1,y ;test result
+ trap_ne
+0e68 : d0fe > bne * ;failed not equal (non zero)
+
+0e6a : 68 pla ;load status
+ eor_flag 0
+0e6b : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+0e6d : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+0e70 : d0fe > bne * ;failed not equal (non zero)
+
+0e72 : 88 dey
+0e73 : 10df bpl tldx
+
+0e75 : a003 ldy #3
+0e77 : tldx1
+ set_stat $ff
+ > load_flag $ff
+0e77 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e79 : 48 > pha ;use stack to load status
+0e7a : 28 > plp
+
+0e7b : b613 ldx zp1,y
+0e7d : 08 php ;test stores do not alter flags
+0e7e : 8a txa
+0e7f : 49c3 eor #$c3
+0e81 : 28 plp
+0e82 : 990302 sta abst,y
+0e85 : 08 php ;flags after load/store sequence
+0e86 : 49c3 eor #$c3
+0e88 : d91702 cmp abs1,y ;test result
+ trap_ne
+0e8b : d0fe > bne * ;failed not equal (non zero)
+
+0e8d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+0e8e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+0e90 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+0e93 : d0fe > bne * ;failed not equal (non zero)
+
+0e95 : 88 dey
+0e96 : 10df bpl tldx1
+
+0e98 : a003 ldy #3
+0e9a : tldx2
+ set_stat 0
+ > load_flag 0
+0e9a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e9c : 48 > pha ;use stack to load status
+0e9d : 28 > plp
+
+0e9e : be1702 ldx abs1,y
+0ea1 : 08 php ;test stores do not alter flags
+0ea2 : 8a txa
+0ea3 : 49c3 eor #$c3
+0ea5 : aa tax
+0ea6 : 28 plp
+0ea7 : 960c stx zpt,y
+0ea9 : 08 php ;flags after load/store sequence
+0eaa : 49c3 eor #$c3
+0eac : d91300 cmp zp1,y ;test result
+ trap_ne
+0eaf : d0fe > bne * ;failed not equal (non zero)
+
+0eb1 : 68 pla ;load status
+ eor_flag 0
+0eb2 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+0eb4 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+0eb7 : d0fe > bne * ;failed not equal (non zero)
+
+0eb9 : 88 dey
+0eba : 10de bpl tldx2
+
+0ebc : a003 ldy #3
+0ebe : tldx3
+ set_stat $ff
+ > load_flag $ff
+0ebe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0ec0 : 48 > pha ;use stack to load status
+0ec1 : 28 > plp
+
+0ec2 : be1702 ldx abs1,y
+0ec5 : 08 php ;test stores do not alter flags
+0ec6 : 8a txa
+0ec7 : 49c3 eor #$c3
+0ec9 : aa tax
+0eca : 28 plp
+0ecb : 960c stx zpt,y
+0ecd : 08 php ;flags after load/store sequence
+0ece : 49c3 eor #$c3
+0ed0 : d91300 cmp zp1,y ;test result
+ trap_ne
+0ed3 : d0fe > bne * ;failed not equal (non zero)
+
+0ed5 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+0ed6 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+0ed8 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+0edb : d0fe > bne * ;failed not equal (non zero)
+
+0edd : 88 dey
+0ede : 10de bpl tldx3
+
+0ee0 : a003 ldy #3 ;testing store result
+0ee2 : a200 ldx #0
+0ee4 : b90c00 tstx lda zpt,y
+0ee7 : 49c3 eor #$c3
+0ee9 : d91300 cmp zp1,y
+ trap_ne ;store to zp data
+0eec : d0fe > bne * ;failed not equal (non zero)
+
+0eee : 960c stx zpt,y ;clear
+0ef0 : b90302 lda abst,y
+0ef3 : 49c3 eor #$c3
+0ef5 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+0ef8 : d0fe > bne * ;failed not equal (non zero)
+
+0efa : 8a txa
+0efb : 990302 sta abst,y ;clear
+0efe : 88 dey
+0eff : 10e3 bpl tstx
+ next_test
+0f01 : ad0002 > lda test_case ;previous test
+0f04 : c90f > cmp #test_num
+ > trap_ne ;test is out of sequence
+0f06 : d0fe > bne * ;failed not equal (non zero)
+ >
+0010 = >test_num = test_num + 1
+0f08 : a910 > lda #test_num ;*** next tests' number
+0f0a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+0f0d : a0fd ldy #3+$fa
+0f0f : b619 tldx4 ldx zp1-$fa&$ff,y ;wrap on indexed zp
+0f11 : 8a txa
+0f12 : 990901 sta abst-$fa,y ;no STX abs,y!
+0f15 : 88 dey
+0f16 : c0fa cpy #$fa
+0f18 : b0f5 bcs tldx4
+0f1a : a0fd ldy #3+$fa
+0f1c : be1d01 tldx5 ldx abs1-$fa,y ;no wrap on indexed abs
+0f1f : 9612 stx zpt-$fa&$ff,y
+0f21 : 88 dey
+0f22 : c0fa cpy #$fa
+0f24 : b0f6 bcs tldx5
+0f26 : a003 ldy #3 ;testing wraparound result
+0f28 : a200 ldx #0
+0f2a : b90c00 tstx1 lda zpt,y
+0f2d : d91300 cmp zp1,y
+ trap_ne ;store to zp data
+0f30 : d0fe > bne * ;failed not equal (non zero)
+
+0f32 : 960c stx zpt,y ;clear
+0f34 : b90302 lda abst,y
+0f37 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+0f3a : d0fe > bne * ;failed not equal (non zero)
+
+0f3c : 8a txa
+0f3d : 990302 sta abst,y ;clear
+0f40 : 88 dey
+0f41 : 10e7 bpl tstx1
+ next_test
+0f43 : ad0002 > lda test_case ;previous test
+0f46 : c910 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0f48 : d0fe > bne * ;failed not equal (non zero)
+ >
+0011 = >test_num = test_num + 1
+0f4a : a911 > lda #test_num ;*** next tests' number
+0f4c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDY / STY - zp,x / abs,x
+0f4f : a203 ldx #3
+0f51 : tldy
+ set_stat 0
+ > load_flag 0
+0f51 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0f53 : 48 > pha ;use stack to load status
+0f54 : 28 > plp
+
+0f55 : b413 ldy zp1,x
+0f57 : 08 php ;test stores do not alter flags
+0f58 : 98 tya
+0f59 : 49c3 eor #$c3
+0f5b : 28 plp
+0f5c : 9d0302 sta abst,x
+0f5f : 08 php ;flags after load/store sequence
+0f60 : 49c3 eor #$c3
+0f62 : dd1702 cmp abs1,x ;test result
+ trap_ne
+0f65 : d0fe > bne * ;failed not equal (non zero)
+
+0f67 : 68 pla ;load status
+ eor_flag 0
+0f68 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+0f6a : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+0f6d : d0fe > bne * ;failed not equal (non zero)
+
+0f6f : ca dex
+0f70 : 10df bpl tldy
+
+0f72 : a203 ldx #3
+0f74 : tldy1
+ set_stat $ff
+ > load_flag $ff
+0f74 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0f76 : 48 > pha ;use stack to load status
+0f77 : 28 > plp
+
+0f78 : b413 ldy zp1,x
+0f7a : 08 php ;test stores do not alter flags
+0f7b : 98 tya
+0f7c : 49c3 eor #$c3
+0f7e : 28 plp
+0f7f : 9d0302 sta abst,x
+0f82 : 08 php ;flags after load/store sequence
+0f83 : 49c3 eor #$c3
+0f85 : dd1702 cmp abs1,x ;test result
+ trap_ne
+0f88 : d0fe > bne * ;failed not equal (non zero)
+
+0f8a : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+0f8b : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+0f8d : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+0f90 : d0fe > bne * ;failed not equal (non zero)
+
+0f92 : ca dex
+0f93 : 10df bpl tldy1
+
+0f95 : a203 ldx #3
+0f97 : tldy2
+ set_stat 0
+ > load_flag 0
+0f97 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0f99 : 48 > pha ;use stack to load status
+0f9a : 28 > plp
+
+0f9b : bc1702 ldy abs1,x
+0f9e : 08 php ;test stores do not alter flags
+0f9f : 98 tya
+0fa0 : 49c3 eor #$c3
+0fa2 : a8 tay
+0fa3 : 28 plp
+0fa4 : 940c sty zpt,x
+0fa6 : 08 php ;flags after load/store sequence
+0fa7 : 49c3 eor #$c3
+0fa9 : d513 cmp zp1,x ;test result
+ trap_ne
+0fab : d0fe > bne * ;failed not equal (non zero)
+
+0fad : 68 pla ;load status
+ eor_flag 0
+0fae : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+0fb0 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+0fb3 : d0fe > bne * ;failed not equal (non zero)
+
+0fb5 : ca dex
+0fb6 : 10df bpl tldy2
+
+0fb8 : a203 ldx #3
+0fba : tldy3
+ set_stat $ff
+ > load_flag $ff
+0fba : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0fbc : 48 > pha ;use stack to load status
+0fbd : 28 > plp
+
+0fbe : bc1702 ldy abs1,x
+0fc1 : 08 php ;test stores do not alter flags
+0fc2 : 98 tya
+0fc3 : 49c3 eor #$c3
+0fc5 : a8 tay
+0fc6 : 28 plp
+0fc7 : 940c sty zpt,x
+0fc9 : 08 php ;flags after load/store sequence
+0fca : 49c3 eor #$c3
+0fcc : d513 cmp zp1,x ;test result
+ trap_ne
+0fce : d0fe > bne * ;failed not equal (non zero)
+
+0fd0 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+0fd1 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+0fd3 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+0fd6 : d0fe > bne * ;failed not equal (non zero)
+
+0fd8 : ca dex
+0fd9 : 10df bpl tldy3
+
+0fdb : a203 ldx #3 ;testing store result
+0fdd : a000 ldy #0
+0fdf : b50c tsty lda zpt,x
+0fe1 : 49c3 eor #$c3
+0fe3 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+0fe5 : d0fe > bne * ;failed not equal (non zero)
+
+0fe7 : 940c sty zpt,x ;clear
+0fe9 : bd0302 lda abst,x
+0fec : 49c3 eor #$c3
+0fee : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+0ff1 : d0fe > bne * ;failed not equal (non zero)
+
+0ff3 : 8a txa
+0ff4 : 9d0302 sta abst,x ;clear
+0ff7 : ca dex
+0ff8 : 10e5 bpl tsty
+ next_test
+0ffa : ad0002 > lda test_case ;previous test
+0ffd : c911 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0fff : d0fe > bne * ;failed not equal (non zero)
+ >
+0012 = >test_num = test_num + 1
+1001 : a912 > lda #test_num ;*** next tests' number
+1003 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+1006 : a2fd ldx #3+$fa
+1008 : b419 tldy4 ldy zp1-$fa&$ff,x ;wrap on indexed zp
+100a : 98 tya
+100b : 9d0901 sta abst-$fa,x ;no STX abs,x!
+100e : ca dex
+100f : e0fa cpx #$fa
+1011 : b0f5 bcs tldy4
+1013 : a2fd ldx #3+$fa
+1015 : bc1d01 tldy5 ldy abs1-$fa,x ;no wrap on indexed abs
+1018 : 9412 sty zpt-$fa&$ff,x
+101a : ca dex
+101b : e0fa cpx #$fa
+101d : b0f6 bcs tldy5
+101f : a203 ldx #3 ;testing wraparound result
+1021 : a000 ldy #0
+1023 : b50c tsty1 lda zpt,x
+1025 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1027 : d0fe > bne * ;failed not equal (non zero)
+
+1029 : 940c sty zpt,x ;clear
+102b : bd0302 lda abst,x
+102e : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+1031 : d0fe > bne * ;failed not equal (non zero)
+
+1033 : 8a txa
+1034 : 9d0302 sta abst,x ;clear
+1037 : ca dex
+1038 : 10e9 bpl tsty1
+ next_test
+103a : ad0002 > lda test_case ;previous test
+103d : c912 > cmp #test_num
+ > trap_ne ;test is out of sequence
+103f : d0fe > bne * ;failed not equal (non zero)
+ >
+0013 = >test_num = test_num + 1
+1041 : a913 > lda #test_num ;*** next tests' number
+1043 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDX / STX - zp / abs / #
+ set_stat 0
+ > load_flag 0
+1046 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1048 : 48 > pha ;use stack to load status
+1049 : 28 > plp
+
+104a : a613 ldx zp1
+104c : 08 php ;test stores do not alter flags
+104d : 8a txa
+104e : 49c3 eor #$c3
+1050 : aa tax
+1051 : 28 plp
+1052 : 8e0302 stx abst
+1055 : 08 php ;flags after load/store sequence
+1056 : 49c3 eor #$c3
+1058 : aa tax
+1059 : e0c3 cpx #$c3 ;test result
+ trap_ne
+105b : d0fe > bne * ;failed not equal (non zero)
+
+105d : 68 pla ;load status
+ eor_flag 0
+105e : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1060 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1063 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1065 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1067 : 48 > pha ;use stack to load status
+1068 : 28 > plp
+
+1069 : a614 ldx zp1+1
+106b : 08 php ;test stores do not alter flags
+106c : 8a txa
+106d : 49c3 eor #$c3
+106f : aa tax
+1070 : 28 plp
+1071 : 8e0402 stx abst+1
+1074 : 08 php ;flags after load/store sequence
+1075 : 49c3 eor #$c3
+1077 : aa tax
+1078 : e082 cpx #$82 ;test result
+ trap_ne
+107a : d0fe > bne * ;failed not equal (non zero)
+
+107c : 68 pla ;load status
+ eor_flag 0
+107d : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+107f : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1082 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1084 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1086 : 48 > pha ;use stack to load status
+1087 : 28 > plp
+
+1088 : a615 ldx zp1+2
+108a : 08 php ;test stores do not alter flags
+108b : 8a txa
+108c : 49c3 eor #$c3
+108e : aa tax
+108f : 28 plp
+1090 : 8e0502 stx abst+2
+1093 : 08 php ;flags after load/store sequence
+1094 : 49c3 eor #$c3
+1096 : aa tax
+1097 : e041 cpx #$41 ;test result
+ trap_ne
+1099 : d0fe > bne * ;failed not equal (non zero)
+
+109b : 68 pla ;load status
+ eor_flag 0
+109c : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+109e : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+10a1 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+10a3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+10a5 : 48 > pha ;use stack to load status
+10a6 : 28 > plp
+
+10a7 : a616 ldx zp1+3
+10a9 : 08 php ;test stores do not alter flags
+10aa : 8a txa
+10ab : 49c3 eor #$c3
+10ad : aa tax
+10ae : 28 plp
+10af : 8e0602 stx abst+3
+10b2 : 08 php ;flags after load/store sequence
+10b3 : 49c3 eor #$c3
+10b5 : aa tax
+10b6 : e000 cpx #0 ;test result
+ trap_ne
+10b8 : d0fe > bne * ;failed not equal (non zero)
+
+10ba : 68 pla ;load status
+ eor_flag 0
+10bb : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+10bd : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+10c0 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+10c2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+10c4 : 48 > pha ;use stack to load status
+10c5 : 28 > plp
+
+10c6 : a613 ldx zp1
+10c8 : 08 php ;test stores do not alter flags
+10c9 : 8a txa
+10ca : 49c3 eor #$c3
+10cc : aa tax
+10cd : 28 plp
+10ce : 8e0302 stx abst
+10d1 : 08 php ;flags after load/store sequence
+10d2 : 49c3 eor #$c3
+10d4 : aa tax
+10d5 : e0c3 cpx #$c3 ;test result
+ trap_ne ;
+10d7 : d0fe > bne * ;failed not equal (non zero)
+
+10d9 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+10da : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+10dc : cd1c02 cmp fLDx ;test flags
+ trap_ne
+10df : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+10e1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+10e3 : 48 > pha ;use stack to load status
+10e4 : 28 > plp
+
+10e5 : a614 ldx zp1+1
+10e7 : 08 php ;test stores do not alter flags
+10e8 : 8a txa
+10e9 : 49c3 eor #$c3
+10eb : aa tax
+10ec : 28 plp
+10ed : 8e0402 stx abst+1
+10f0 : 08 php ;flags after load/store sequence
+10f1 : 49c3 eor #$c3
+10f3 : aa tax
+10f4 : e082 cpx #$82 ;test result
+ trap_ne
+10f6 : d0fe > bne * ;failed not equal (non zero)
+
+10f8 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+10f9 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+10fb : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+10fe : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1100 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1102 : 48 > pha ;use stack to load status
+1103 : 28 > plp
+
+1104 : a615 ldx zp1+2
+1106 : 08 php ;test stores do not alter flags
+1107 : 8a txa
+1108 : 49c3 eor #$c3
+110a : aa tax
+110b : 28 plp
+110c : 8e0502 stx abst+2
+110f : 08 php ;flags after load/store sequence
+1110 : 49c3 eor #$c3
+1112 : aa tax
+1113 : e041 cpx #$41 ;test result
+ trap_ne ;
+1115 : d0fe > bne * ;failed not equal (non zero)
+
+1117 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1118 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+111a : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+111d : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+111f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1121 : 48 > pha ;use stack to load status
+1122 : 28 > plp
+
+1123 : a616 ldx zp1+3
+1125 : 08 php ;test stores do not alter flags
+1126 : 8a txa
+1127 : 49c3 eor #$c3
+1129 : aa tax
+112a : 28 plp
+112b : 8e0602 stx abst+3
+112e : 08 php ;flags after load/store sequence
+112f : 49c3 eor #$c3
+1131 : aa tax
+1132 : e000 cpx #0 ;test result
+ trap_ne
+1134 : d0fe > bne * ;failed not equal (non zero)
+
+1136 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1137 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1139 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+113c : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat 0
+ > load_flag 0
+113e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1140 : 48 > pha ;use stack to load status
+1141 : 28 > plp
+
+1142 : ae1702 ldx abs1
+1145 : 08 php ;test stores do not alter flags
+1146 : 8a txa
+1147 : 49c3 eor #$c3
+1149 : aa tax
+114a : 28 plp
+114b : 860c stx zpt
+114d : 08 php ;flags after load/store sequence
+114e : 49c3 eor #$c3
+1150 : c513 cmp zp1 ;test result
+ trap_ne
+1152 : d0fe > bne * ;failed not equal (non zero)
+
+1154 : 68 pla ;load status
+ eor_flag 0
+1155 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1157 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+115a : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+115c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+115e : 48 > pha ;use stack to load status
+115f : 28 > plp
+
+1160 : ae1802 ldx abs1+1
+1163 : 08 php ;test stores do not alter flags
+1164 : 8a txa
+1165 : 49c3 eor #$c3
+1167 : aa tax
+1168 : 28 plp
+1169 : 860d stx zpt+1
+116b : 08 php ;flags after load/store sequence
+116c : 49c3 eor #$c3
+116e : c514 cmp zp1+1 ;test result
+ trap_ne
+1170 : d0fe > bne * ;failed not equal (non zero)
+
+1172 : 68 pla ;load status
+ eor_flag 0
+1173 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1175 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1178 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+117a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+117c : 48 > pha ;use stack to load status
+117d : 28 > plp
+
+117e : ae1902 ldx abs1+2
+1181 : 08 php ;test stores do not alter flags
+1182 : 8a txa
+1183 : 49c3 eor #$c3
+1185 : aa tax
+1186 : 28 plp
+1187 : 860e stx zpt+2
+1189 : 08 php ;flags after load/store sequence
+118a : 49c3 eor #$c3
+118c : c515 cmp zp1+2 ;test result
+ trap_ne
+118e : d0fe > bne * ;failed not equal (non zero)
+
+1190 : 68 pla ;load status
+ eor_flag 0
+1191 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1193 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1196 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1198 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+119a : 48 > pha ;use stack to load status
+119b : 28 > plp
+
+119c : ae1a02 ldx abs1+3
+119f : 08 php ;test stores do not alter flags
+11a0 : 8a txa
+11a1 : 49c3 eor #$c3
+11a3 : aa tax
+11a4 : 28 plp
+11a5 : 860f stx zpt+3
+11a7 : 08 php ;flags after load/store sequence
+11a8 : 49c3 eor #$c3
+11aa : c516 cmp zp1+3 ;test result
+ trap_ne
+11ac : d0fe > bne * ;failed not equal (non zero)
+
+11ae : 68 pla ;load status
+ eor_flag 0
+11af : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+11b1 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+11b4 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+11b6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+11b8 : 48 > pha ;use stack to load status
+11b9 : 28 > plp
+
+11ba : ae1702 ldx abs1
+11bd : 08 php ;test stores do not alter flags
+11be : 8a txa
+11bf : 49c3 eor #$c3
+11c1 : aa tax
+11c2 : 28 plp
+11c3 : 860c stx zpt
+11c5 : 08 php ;flags after load/store sequence
+11c6 : 49c3 eor #$c3
+11c8 : aa tax
+11c9 : e413 cpx zp1 ;test result
+ trap_ne
+11cb : d0fe > bne * ;failed not equal (non zero)
+
+11cd : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+11ce : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+11d0 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+11d3 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+11d5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+11d7 : 48 > pha ;use stack to load status
+11d8 : 28 > plp
+
+11d9 : ae1802 ldx abs1+1
+11dc : 08 php ;test stores do not alter flags
+11dd : 8a txa
+11de : 49c3 eor #$c3
+11e0 : aa tax
+11e1 : 28 plp
+11e2 : 860d stx zpt+1
+11e4 : 08 php ;flags after load/store sequence
+11e5 : 49c3 eor #$c3
+11e7 : aa tax
+11e8 : e414 cpx zp1+1 ;test result
+ trap_ne
+11ea : d0fe > bne * ;failed not equal (non zero)
+
+11ec : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+11ed : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+11ef : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+11f2 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+11f4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+11f6 : 48 > pha ;use stack to load status
+11f7 : 28 > plp
+
+11f8 : ae1902 ldx abs1+2
+11fb : 08 php ;test stores do not alter flags
+11fc : 8a txa
+11fd : 49c3 eor #$c3
+11ff : aa tax
+1200 : 28 plp
+1201 : 860e stx zpt+2
+1203 : 08 php ;flags after load/store sequence
+1204 : 49c3 eor #$c3
+1206 : aa tax
+1207 : e415 cpx zp1+2 ;test result
+ trap_ne
+1209 : d0fe > bne * ;failed not equal (non zero)
+
+120b : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+120c : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+120e : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1211 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1213 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1215 : 48 > pha ;use stack to load status
+1216 : 28 > plp
+
+1217 : ae1a02 ldx abs1+3
+121a : 08 php ;test stores do not alter flags
+121b : 8a txa
+121c : 49c3 eor #$c3
+121e : aa tax
+121f : 28 plp
+1220 : 860f stx zpt+3
+1222 : 08 php ;flags after load/store sequence
+1223 : 49c3 eor #$c3
+1225 : aa tax
+1226 : e416 cpx zp1+3 ;test result
+ trap_ne
+1228 : d0fe > bne * ;failed not equal (non zero)
+
+122a : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+122b : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+122d : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1230 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat 0
+ > load_flag 0
+1232 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1234 : 48 > pha ;use stack to load status
+1235 : 28 > plp
+
+1236 : a2c3 ldx #$c3
+1238 : 08 php
+1239 : ec1702 cpx abs1 ;test result
+ trap_ne
+123c : d0fe > bne * ;failed not equal (non zero)
+
+123e : 68 pla ;load status
+ eor_flag 0
+123f : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1241 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1244 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1246 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1248 : 48 > pha ;use stack to load status
+1249 : 28 > plp
+
+124a : a282 ldx #$82
+124c : 08 php
+124d : ec1802 cpx abs1+1 ;test result
+ trap_ne
+1250 : d0fe > bne * ;failed not equal (non zero)
+
+1252 : 68 pla ;load status
+ eor_flag 0
+1253 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1255 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1258 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+125a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+125c : 48 > pha ;use stack to load status
+125d : 28 > plp
+
+125e : a241 ldx #$41
+1260 : 08 php
+1261 : ec1902 cpx abs1+2 ;test result
+ trap_ne
+1264 : d0fe > bne * ;failed not equal (non zero)
+
+1266 : 68 pla ;load status
+ eor_flag 0
+1267 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1269 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+126c : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+126e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1270 : 48 > pha ;use stack to load status
+1271 : 28 > plp
+
+1272 : a200 ldx #0
+1274 : 08 php
+1275 : ec1a02 cpx abs1+3 ;test result
+ trap_ne
+1278 : d0fe > bne * ;failed not equal (non zero)
+
+127a : 68 pla ;load status
+ eor_flag 0
+127b : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+127d : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1280 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+1282 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1284 : 48 > pha ;use stack to load status
+1285 : 28 > plp
+
+1286 : a2c3 ldx #$c3
+1288 : 08 php
+1289 : ec1702 cpx abs1 ;test result
+ trap_ne
+128c : d0fe > bne * ;failed not equal (non zero)
+
+128e : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+128f : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1291 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1294 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1296 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1298 : 48 > pha ;use stack to load status
+1299 : 28 > plp
+
+129a : a282 ldx #$82
+129c : 08 php
+129d : ec1802 cpx abs1+1 ;test result
+ trap_ne
+12a0 : d0fe > bne * ;failed not equal (non zero)
+
+12a2 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+12a3 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+12a5 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+12a8 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+12aa : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+12ac : 48 > pha ;use stack to load status
+12ad : 28 > plp
+
+12ae : a241 ldx #$41
+12b0 : 08 php
+12b1 : ec1902 cpx abs1+2 ;test result
+ trap_ne
+12b4 : d0fe > bne * ;failed not equal (non zero)
+
+12b6 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+12b7 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+12b9 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+12bc : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+12be : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+12c0 : 48 > pha ;use stack to load status
+12c1 : 28 > plp
+
+12c2 : a200 ldx #0
+12c4 : 08 php
+12c5 : ec1a02 cpx abs1+3 ;test result
+ trap_ne
+12c8 : d0fe > bne * ;failed not equal (non zero)
+
+12ca : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+12cb : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+12cd : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+12d0 : d0fe > bne * ;failed not equal (non zero)
+
+
+12d2 : a200 ldx #0
+12d4 : a50c lda zpt
+12d6 : 49c3 eor #$c3
+12d8 : c513 cmp zp1
+ trap_ne ;store to zp data
+12da : d0fe > bne * ;failed not equal (non zero)
+
+12dc : 860c stx zpt ;clear
+12de : ad0302 lda abst
+12e1 : 49c3 eor #$c3
+12e3 : cd1702 cmp abs1
+ trap_ne ;store to abs data
+12e6 : d0fe > bne * ;failed not equal (non zero)
+
+12e8 : 8e0302 stx abst ;clear
+12eb : a50d lda zpt+1
+12ed : 49c3 eor #$c3
+12ef : c514 cmp zp1+1
+ trap_ne ;store to zp data
+12f1 : d0fe > bne * ;failed not equal (non zero)
+
+12f3 : 860d stx zpt+1 ;clear
+12f5 : ad0402 lda abst+1
+12f8 : 49c3 eor #$c3
+12fa : cd1802 cmp abs1+1
+ trap_ne ;store to abs data
+12fd : d0fe > bne * ;failed not equal (non zero)
+
+12ff : 8e0402 stx abst+1 ;clear
+1302 : a50e lda zpt+2
+1304 : 49c3 eor #$c3
+1306 : c515 cmp zp1+2
+ trap_ne ;store to zp data
+1308 : d0fe > bne * ;failed not equal (non zero)
+
+130a : 860e stx zpt+2 ;clear
+130c : ad0502 lda abst+2
+130f : 49c3 eor #$c3
+1311 : cd1902 cmp abs1+2
+ trap_ne ;store to abs data
+1314 : d0fe > bne * ;failed not equal (non zero)
+
+1316 : 8e0502 stx abst+2 ;clear
+1319 : a50f lda zpt+3
+131b : 49c3 eor #$c3
+131d : c516 cmp zp1+3
+ trap_ne ;store to zp data
+131f : d0fe > bne * ;failed not equal (non zero)
+
+1321 : 860f stx zpt+3 ;clear
+1323 : ad0602 lda abst+3
+1326 : 49c3 eor #$c3
+1328 : cd1a02 cmp abs1+3
+ trap_ne ;store to abs data
+132b : d0fe > bne * ;failed not equal (non zero)
+
+132d : 8e0602 stx abst+3 ;clear
+ next_test
+1330 : ad0002 > lda test_case ;previous test
+1333 : c913 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1335 : d0fe > bne * ;failed not equal (non zero)
+ >
+0014 = >test_num = test_num + 1
+1337 : a914 > lda #test_num ;*** next tests' number
+1339 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDY / STY - zp / abs / #
+ set_stat 0
+ > load_flag 0
+133c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+133e : 48 > pha ;use stack to load status
+133f : 28 > plp
+
+1340 : a413 ldy zp1
+1342 : 08 php ;test stores do not alter flags
+1343 : 98 tya
+1344 : 49c3 eor #$c3
+1346 : a8 tay
+1347 : 28 plp
+1348 : 8c0302 sty abst
+134b : 08 php ;flags after load/store sequence
+134c : 49c3 eor #$c3
+134e : a8 tay
+134f : c0c3 cpy #$c3 ;test result
+ trap_ne
+1351 : d0fe > bne * ;failed not equal (non zero)
+
+1353 : 68 pla ;load status
+ eor_flag 0
+1354 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1356 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1359 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+135b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+135d : 48 > pha ;use stack to load status
+135e : 28 > plp
+
+135f : a414 ldy zp1+1
+1361 : 08 php ;test stores do not alter flags
+1362 : 98 tya
+1363 : 49c3 eor #$c3
+1365 : a8 tay
+1366 : 28 plp
+1367 : 8c0402 sty abst+1
+136a : 08 php ;flags after load/store sequence
+136b : 49c3 eor #$c3
+136d : a8 tay
+136e : c082 cpy #$82 ;test result
+ trap_ne
+1370 : d0fe > bne * ;failed not equal (non zero)
+
+1372 : 68 pla ;load status
+ eor_flag 0
+1373 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1375 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1378 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+137a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+137c : 48 > pha ;use stack to load status
+137d : 28 > plp
+
+137e : a415 ldy zp1+2
+1380 : 08 php ;test stores do not alter flags
+1381 : 98 tya
+1382 : 49c3 eor #$c3
+1384 : a8 tay
+1385 : 28 plp
+1386 : 8c0502 sty abst+2
+1389 : 08 php ;flags after load/store sequence
+138a : 49c3 eor #$c3
+138c : a8 tay
+138d : c041 cpy #$41 ;test result
+ trap_ne
+138f : d0fe > bne * ;failed not equal (non zero)
+
+1391 : 68 pla ;load status
+ eor_flag 0
+1392 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1394 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1397 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1399 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+139b : 48 > pha ;use stack to load status
+139c : 28 > plp
+
+139d : a416 ldy zp1+3
+139f : 08 php ;test stores do not alter flags
+13a0 : 98 tya
+13a1 : 49c3 eor #$c3
+13a3 : a8 tay
+13a4 : 28 plp
+13a5 : 8c0602 sty abst+3
+13a8 : 08 php ;flags after load/store sequence
+13a9 : 49c3 eor #$c3
+13ab : a8 tay
+13ac : c000 cpy #0 ;test result
+ trap_ne
+13ae : d0fe > bne * ;failed not equal (non zero)
+
+13b0 : 68 pla ;load status
+ eor_flag 0
+13b1 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+13b3 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+13b6 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+13b8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+13ba : 48 > pha ;use stack to load status
+13bb : 28 > plp
+
+13bc : a413 ldy zp1
+13be : 08 php ;test stores do not alter flags
+13bf : 98 tya
+13c0 : 49c3 eor #$c3
+13c2 : a8 tay
+13c3 : 28 plp
+13c4 : 8c0302 sty abst
+13c7 : 08 php ;flags after load/store sequence
+13c8 : 49c3 eor #$c3
+13ca : a8 tay
+13cb : c0c3 cpy #$c3 ;test result
+ trap_ne
+13cd : d0fe > bne * ;failed not equal (non zero)
+
+13cf : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+13d0 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+13d2 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+13d5 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+13d7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+13d9 : 48 > pha ;use stack to load status
+13da : 28 > plp
+
+13db : a414 ldy zp1+1
+13dd : 08 php ;test stores do not alter flags
+13de : 98 tya
+13df : 49c3 eor #$c3
+13e1 : a8 tay
+13e2 : 28 plp
+13e3 : 8c0402 sty abst+1
+13e6 : 08 php ;flags after load/store sequence
+13e7 : 49c3 eor #$c3
+13e9 : a8 tay
+13ea : c082 cpy #$82 ;test result
+ trap_ne
+13ec : d0fe > bne * ;failed not equal (non zero)
+
+13ee : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+13ef : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+13f1 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+13f4 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+13f6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+13f8 : 48 > pha ;use stack to load status
+13f9 : 28 > plp
+
+13fa : a415 ldy zp1+2
+13fc : 08 php ;test stores do not alter flags
+13fd : 98 tya
+13fe : 49c3 eor #$c3
+1400 : a8 tay
+1401 : 28 plp
+1402 : 8c0502 sty abst+2
+1405 : 08 php ;flags after load/store sequence
+1406 : 49c3 eor #$c3
+1408 : a8 tay
+1409 : c041 cpy #$41 ;test result
+ trap_ne
+140b : d0fe > bne * ;failed not equal (non zero)
+
+140d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+140e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1410 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1413 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1415 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1417 : 48 > pha ;use stack to load status
+1418 : 28 > plp
+
+1419 : a416 ldy zp1+3
+141b : 08 php ;test stores do not alter flags
+141c : 98 tya
+141d : 49c3 eor #$c3
+141f : a8 tay
+1420 : 28 plp
+1421 : 8c0602 sty abst+3
+1424 : 08 php ;flags after load/store sequence
+1425 : 49c3 eor #$c3
+1427 : a8 tay
+1428 : c000 cpy #0 ;test result
+ trap_ne
+142a : d0fe > bne * ;failed not equal (non zero)
+
+142c : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+142d : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+142f : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1432 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat 0
+ > load_flag 0
+1434 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1436 : 48 > pha ;use stack to load status
+1437 : 28 > plp
+
+1438 : ac1702 ldy abs1
+143b : 08 php ;test stores do not alter flags
+143c : 98 tya
+143d : 49c3 eor #$c3
+143f : a8 tay
+1440 : 28 plp
+1441 : 840c sty zpt
+1443 : 08 php ;flags after load/store sequence
+1444 : 49c3 eor #$c3
+1446 : a8 tay
+1447 : c413 cpy zp1 ;test result
+ trap_ne
+1449 : d0fe > bne * ;failed not equal (non zero)
+
+144b : 68 pla ;load status
+ eor_flag 0
+144c : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+144e : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1451 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1453 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1455 : 48 > pha ;use stack to load status
+1456 : 28 > plp
+
+1457 : ac1802 ldy abs1+1
+145a : 08 php ;test stores do not alter flags
+145b : 98 tya
+145c : 49c3 eor #$c3
+145e : a8 tay
+145f : 28 plp
+1460 : 840d sty zpt+1
+1462 : 08 php ;flags after load/store sequence
+1463 : 49c3 eor #$c3
+1465 : a8 tay
+1466 : c414 cpy zp1+1 ;test result
+ trap_ne
+1468 : d0fe > bne * ;failed not equal (non zero)
+
+146a : 68 pla ;load status
+ eor_flag 0
+146b : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+146d : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1470 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1472 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1474 : 48 > pha ;use stack to load status
+1475 : 28 > plp
+
+1476 : ac1902 ldy abs1+2
+1479 : 08 php ;test stores do not alter flags
+147a : 98 tya
+147b : 49c3 eor #$c3
+147d : a8 tay
+147e : 28 plp
+147f : 840e sty zpt+2
+1481 : 08 php ;flags after load/store sequence
+1482 : 49c3 eor #$c3
+1484 : a8 tay
+1485 : c415 cpy zp1+2 ;test result
+ trap_ne
+1487 : d0fe > bne * ;failed not equal (non zero)
+
+1489 : 68 pla ;load status
+ eor_flag 0
+148a : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+148c : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+148f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1491 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1493 : 48 > pha ;use stack to load status
+1494 : 28 > plp
+
+1495 : ac1a02 ldy abs1+3
+1498 : 08 php ;test stores do not alter flags
+1499 : 98 tya
+149a : 49c3 eor #$c3
+149c : a8 tay
+149d : 28 plp
+149e : 840f sty zpt+3
+14a0 : 08 php ;flags after load/store sequence
+14a1 : 49c3 eor #$c3
+14a3 : a8 tay
+14a4 : c416 cpy zp1+3 ;test result
+ trap_ne
+14a6 : d0fe > bne * ;failed not equal (non zero)
+
+14a8 : 68 pla ;load status
+ eor_flag 0
+14a9 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+14ab : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+14ae : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+14b0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+14b2 : 48 > pha ;use stack to load status
+14b3 : 28 > plp
+
+14b4 : ac1702 ldy abs1
+14b7 : 08 php ;test stores do not alter flags
+14b8 : 98 tya
+14b9 : 49c3 eor #$c3
+14bb : a8 tay
+14bc : 28 plp
+14bd : 840c sty zpt
+14bf : 08 php ;flags after load/store sequence
+14c0 : 49c3 eor #$c3
+14c2 : a8 tay
+14c3 : c513 cmp zp1 ;test result
+ trap_ne
+14c5 : d0fe > bne * ;failed not equal (non zero)
+
+14c7 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+14c8 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+14ca : cd1c02 cmp fLDx ;test flags
+ trap_ne
+14cd : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+14cf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+14d1 : 48 > pha ;use stack to load status
+14d2 : 28 > plp
+
+14d3 : ac1802 ldy abs1+1
+14d6 : 08 php ;test stores do not alter flags
+14d7 : 98 tya
+14d8 : 49c3 eor #$c3
+14da : a8 tay
+14db : 28 plp
+14dc : 840d sty zpt+1
+14de : 08 php ;flags after load/store sequence
+14df : 49c3 eor #$c3
+14e1 : a8 tay
+14e2 : c514 cmp zp1+1 ;test result
+ trap_ne
+14e4 : d0fe > bne * ;failed not equal (non zero)
+
+14e6 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+14e7 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+14e9 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+14ec : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+14ee : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+14f0 : 48 > pha ;use stack to load status
+14f1 : 28 > plp
+
+14f2 : ac1902 ldy abs1+2
+14f5 : 08 php ;test stores do not alter flags
+14f6 : 98 tya
+14f7 : 49c3 eor #$c3
+14f9 : a8 tay
+14fa : 28 plp
+14fb : 840e sty zpt+2
+14fd : 08 php ;flags after load/store sequence
+14fe : 49c3 eor #$c3
+1500 : a8 tay
+1501 : c515 cmp zp1+2 ;test result
+ trap_ne
+1503 : d0fe > bne * ;failed not equal (non zero)
+
+1505 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1506 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1508 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+150b : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+150d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+150f : 48 > pha ;use stack to load status
+1510 : 28 > plp
+
+1511 : ac1a02 ldy abs1+3
+1514 : 08 php ;test stores do not alter flags
+1515 : 98 tya
+1516 : 49c3 eor #$c3
+1518 : a8 tay
+1519 : 28 plp
+151a : 840f sty zpt+3
+151c : 08 php ;flags after load/store sequence
+151d : 49c3 eor #$c3
+151f : a8 tay
+1520 : c516 cmp zp1+3 ;test result
+ trap_ne
+1522 : d0fe > bne * ;failed not equal (non zero)
+
+1524 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1525 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1527 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+152a : d0fe > bne * ;failed not equal (non zero)
+
+
+
+ set_stat 0
+ > load_flag 0
+152c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+152e : 48 > pha ;use stack to load status
+152f : 28 > plp
+
+1530 : a0c3 ldy #$c3
+1532 : 08 php
+1533 : cc1702 cpy abs1 ;test result
+ trap_ne
+1536 : d0fe > bne * ;failed not equal (non zero)
+
+1538 : 68 pla ;load status
+ eor_flag 0
+1539 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+153b : cd1c02 cmp fLDx ;test flags
+ trap_ne
+153e : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1540 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1542 : 48 > pha ;use stack to load status
+1543 : 28 > plp
+
+1544 : a082 ldy #$82
+1546 : 08 php
+1547 : cc1802 cpy abs1+1 ;test result
+ trap_ne
+154a : d0fe > bne * ;failed not equal (non zero)
+
+154c : 68 pla ;load status
+ eor_flag 0
+154d : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+154f : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1552 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1554 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1556 : 48 > pha ;use stack to load status
+1557 : 28 > plp
+
+1558 : a041 ldy #$41
+155a : 08 php
+155b : cc1902 cpy abs1+2 ;test result
+ trap_ne
+155e : d0fe > bne * ;failed not equal (non zero)
+
+1560 : 68 pla ;load status
+ eor_flag 0
+1561 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1563 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1566 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1568 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+156a : 48 > pha ;use stack to load status
+156b : 28 > plp
+
+156c : a000 ldy #0
+156e : 08 php
+156f : cc1a02 cpy abs1+3 ;test result
+ trap_ne
+1572 : d0fe > bne * ;failed not equal (non zero)
+
+1574 : 68 pla ;load status
+ eor_flag 0
+1575 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1577 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+157a : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+157c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+157e : 48 > pha ;use stack to load status
+157f : 28 > plp
+
+1580 : a0c3 ldy #$c3
+1582 : 08 php
+1583 : cc1702 cpy abs1 ;test result
+ trap_ne
+1586 : d0fe > bne * ;failed not equal (non zero)
+
+1588 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1589 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+158b : cd1c02 cmp fLDx ;test flags
+ trap_ne
+158e : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1590 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1592 : 48 > pha ;use stack to load status
+1593 : 28 > plp
+
+1594 : a082 ldy #$82
+1596 : 08 php
+1597 : cc1802 cpy abs1+1 ;test result
+ trap_ne
+159a : d0fe > bne * ;failed not equal (non zero)
+
+159c : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+159d : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+159f : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+15a2 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+15a4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+15a6 : 48 > pha ;use stack to load status
+15a7 : 28 > plp
+
+15a8 : a041 ldy #$41
+15aa : 08 php
+15ab : cc1902 cpy abs1+2 ;test result
+ trap_ne
+15ae : d0fe > bne * ;failed not equal (non zero)
+
+15b0 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+15b1 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+15b3 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+15b6 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+15b8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+15ba : 48 > pha ;use stack to load status
+15bb : 28 > plp
+
+15bc : a000 ldy #0
+15be : 08 php
+15bf : cc1a02 cpy abs1+3 ;test result
+ trap_ne
+15c2 : d0fe > bne * ;failed not equal (non zero)
+
+15c4 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+15c5 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+15c7 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+15ca : d0fe > bne * ;failed not equal (non zero)
+
+
+15cc : a000 ldy #0
+15ce : a50c lda zpt
+15d0 : 49c3 eor #$c3
+15d2 : c513 cmp zp1
+ trap_ne ;store to zp data
+15d4 : d0fe > bne * ;failed not equal (non zero)
+
+15d6 : 840c sty zpt ;clear
+15d8 : ad0302 lda abst
+15db : 49c3 eor #$c3
+15dd : cd1702 cmp abs1
+ trap_ne ;store to abs data
+15e0 : d0fe > bne * ;failed not equal (non zero)
+
+15e2 : 8c0302 sty abst ;clear
+15e5 : a50d lda zpt+1
+15e7 : 49c3 eor #$c3
+15e9 : c514 cmp zp1+1
+ trap_ne ;store to zp+1 data
+15eb : d0fe > bne * ;failed not equal (non zero)
+
+15ed : 840d sty zpt+1 ;clear
+15ef : ad0402 lda abst+1
+15f2 : 49c3 eor #$c3
+15f4 : cd1802 cmp abs1+1
+ trap_ne ;store to abs+1 data
+15f7 : d0fe > bne * ;failed not equal (non zero)
+
+15f9 : 8c0402 sty abst+1 ;clear
+15fc : a50e lda zpt+2
+15fe : 49c3 eor #$c3
+1600 : c515 cmp zp1+2
+ trap_ne ;store to zp+2 data
+1602 : d0fe > bne * ;failed not equal (non zero)
+
+1604 : 840e sty zpt+2 ;clear
+1606 : ad0502 lda abst+2
+1609 : 49c3 eor #$c3
+160b : cd1902 cmp abs1+2
+ trap_ne ;store to abs+2 data
+160e : d0fe > bne * ;failed not equal (non zero)
+
+1610 : 8c0502 sty abst+2 ;clear
+1613 : a50f lda zpt+3
+1615 : 49c3 eor #$c3
+1617 : c516 cmp zp1+3
+ trap_ne ;store to zp+3 data
+1619 : d0fe > bne * ;failed not equal (non zero)
+
+161b : 840f sty zpt+3 ;clear
+161d : ad0602 lda abst+3
+1620 : 49c3 eor #$c3
+1622 : cd1a02 cmp abs1+3
+ trap_ne ;store to abs+3 data
+1625 : d0fe > bne * ;failed not equal (non zero)
+
+1627 : 8c0602 sty abst+3 ;clear
+ next_test
+162a : ad0002 > lda test_case ;previous test
+162d : c914 > cmp #test_num
+ > trap_ne ;test is out of sequence
+162f : d0fe > bne * ;failed not equal (non zero)
+ >
+0015 = >test_num = test_num + 1
+1631 : a915 > lda #test_num ;*** next tests' number
+1633 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing load / store accumulator LDA / STA all addressing modes
+ ; LDA / STA - zp,x / abs,x
+1636 : a203 ldx #3
+1638 : tldax
+ set_stat 0
+ > load_flag 0
+1638 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+163a : 48 > pha ;use stack to load status
+163b : 28 > plp
+
+163c : b513 lda zp1,x
+163e : 08 php ;test stores do not alter flags
+163f : 49c3 eor #$c3
+1641 : 28 plp
+1642 : 9d0302 sta abst,x
+1645 : 08 php ;flags after load/store sequence
+1646 : 49c3 eor #$c3
+1648 : dd1702 cmp abs1,x ;test result
+ trap_ne
+164b : d0fe > bne * ;failed not equal (non zero)
+
+164d : 68 pla ;load status
+ eor_flag 0
+164e : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1650 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1653 : d0fe > bne * ;failed not equal (non zero)
+
+1655 : ca dex
+1656 : 10e0 bpl tldax
+
+1658 : a203 ldx #3
+165a : tldax1
+ set_stat $ff
+ > load_flag $ff
+165a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+165c : 48 > pha ;use stack to load status
+165d : 28 > plp
+
+165e : b513 lda zp1,x
+1660 : 08 php ;test stores do not alter flags
+1661 : 49c3 eor #$c3
+1663 : 28 plp
+1664 : 9d0302 sta abst,x
+1667 : 08 php ;flags after load/store sequence
+1668 : 49c3 eor #$c3
+166a : dd1702 cmp abs1,x ;test result
+ trap_ne
+166d : d0fe > bne * ;failed not equal (non zero)
+
+166f : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1670 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1672 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1675 : d0fe > bne * ;failed not equal (non zero)
+
+1677 : ca dex
+1678 : 10e0 bpl tldax1
+
+167a : a203 ldx #3
+167c : tldax2
+ set_stat 0
+ > load_flag 0
+167c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+167e : 48 > pha ;use stack to load status
+167f : 28 > plp
+
+1680 : bd1702 lda abs1,x
+1683 : 08 php ;test stores do not alter flags
+1684 : 49c3 eor #$c3
+1686 : 28 plp
+1687 : 950c sta zpt,x
+1689 : 08 php ;flags after load/store sequence
+168a : 49c3 eor #$c3
+168c : d513 cmp zp1,x ;test result
+ trap_ne
+168e : d0fe > bne * ;failed not equal (non zero)
+
+1690 : 68 pla ;load status
+ eor_flag 0
+1691 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1693 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1696 : d0fe > bne * ;failed not equal (non zero)
+
+1698 : ca dex
+1699 : 10e1 bpl tldax2
+
+169b : a203 ldx #3
+169d : tldax3
+ set_stat $ff
+ > load_flag $ff
+169d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+169f : 48 > pha ;use stack to load status
+16a0 : 28 > plp
+
+16a1 : bd1702 lda abs1,x
+16a4 : 08 php ;test stores do not alter flags
+16a5 : 49c3 eor #$c3
+16a7 : 28 plp
+16a8 : 950c sta zpt,x
+16aa : 08 php ;flags after load/store sequence
+16ab : 49c3 eor #$c3
+16ad : d513 cmp zp1,x ;test result
+ trap_ne
+16af : d0fe > bne * ;failed not equal (non zero)
+
+16b1 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+16b2 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+16b4 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+16b7 : d0fe > bne * ;failed not equal (non zero)
+
+16b9 : ca dex
+16ba : 10e1 bpl tldax3
+
+16bc : a203 ldx #3 ;testing store result
+16be : a000 ldy #0
+16c0 : b50c tstax lda zpt,x
+16c2 : 49c3 eor #$c3
+16c4 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+16c6 : d0fe > bne * ;failed not equal (non zero)
+
+16c8 : 940c sty zpt,x ;clear
+16ca : bd0302 lda abst,x
+16cd : 49c3 eor #$c3
+16cf : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+16d2 : d0fe > bne * ;failed not equal (non zero)
+
+16d4 : 8a txa
+16d5 : 9d0302 sta abst,x ;clear
+16d8 : ca dex
+16d9 : 10e5 bpl tstax
+ next_test
+16db : ad0002 > lda test_case ;previous test
+16de : c915 > cmp #test_num
+ > trap_ne ;test is out of sequence
+16e0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0016 = >test_num = test_num + 1
+16e2 : a916 > lda #test_num ;*** next tests' number
+16e4 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDA / STA - (zp),y / abs,y / (zp,x)
+16e7 : a003 ldy #3
+16e9 : tlday
+ set_stat 0
+ > load_flag 0
+16e9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+16eb : 48 > pha ;use stack to load status
+16ec : 28 > plp
+
+16ed : b124 lda (ind1),y
+16ef : 08 php ;test stores do not alter flags
+16f0 : 49c3 eor #$c3
+16f2 : 28 plp
+16f3 : 990302 sta abst,y
+16f6 : 08 php ;flags after load/store sequence
+16f7 : 49c3 eor #$c3
+16f9 : d91702 cmp abs1,y ;test result
+ trap_ne
+16fc : d0fe > bne * ;failed not equal (non zero)
+
+16fe : 68 pla ;load status
+ eor_flag 0
+16ff : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1701 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1704 : d0fe > bne * ;failed not equal (non zero)
+
+1706 : 88 dey
+1707 : 10e0 bpl tlday
+
+1709 : a003 ldy #3
+170b : tlday1
+ set_stat $ff
+ > load_flag $ff
+170b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+170d : 48 > pha ;use stack to load status
+170e : 28 > plp
+
+170f : b124 lda (ind1),y
+1711 : 08 php ;test stores do not alter flags
+1712 : 49c3 eor #$c3
+1714 : 28 plp
+1715 : 990302 sta abst,y
+1718 : 08 php ;flags after load/store sequence
+1719 : 49c3 eor #$c3
+171b : d91702 cmp abs1,y ;test result
+ trap_ne
+171e : d0fe > bne * ;failed not equal (non zero)
+
+1720 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1721 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1723 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1726 : d0fe > bne * ;failed not equal (non zero)
+
+1728 : 88 dey
+1729 : 10e0 bpl tlday1
+
+172b : a003 ldy #3 ;testing store result
+172d : a200 ldx #0
+172f : b90302 tstay lda abst,y
+1732 : 49c3 eor #$c3
+1734 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1737 : d0fe > bne * ;failed not equal (non zero)
+
+1739 : 8a txa
+173a : 990302 sta abst,y ;clear
+173d : 88 dey
+173e : 10ef bpl tstay
+
+1740 : a003 ldy #3
+1742 : tlday2
+ set_stat 0
+ > load_flag 0
+1742 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1744 : 48 > pha ;use stack to load status
+1745 : 28 > plp
+
+1746 : b91702 lda abs1,y
+1749 : 08 php ;test stores do not alter flags
+174a : 49c3 eor #$c3
+174c : 28 plp
+174d : 9130 sta (indt),y
+174f : 08 php ;flags after load/store sequence
+1750 : 49c3 eor #$c3
+1752 : d124 cmp (ind1),y ;test result
+ trap_ne
+1754 : d0fe > bne * ;failed not equal (non zero)
+
+1756 : 68 pla ;load status
+ eor_flag 0
+1757 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1759 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+175c : d0fe > bne * ;failed not equal (non zero)
+
+175e : 88 dey
+175f : 10e1 bpl tlday2
+
+1761 : a003 ldy #3
+1763 : tlday3
+ set_stat $ff
+ > load_flag $ff
+1763 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1765 : 48 > pha ;use stack to load status
+1766 : 28 > plp
+
+1767 : b91702 lda abs1,y
+176a : 08 php ;test stores do not alter flags
+176b : 49c3 eor #$c3
+176d : 28 plp
+176e : 9130 sta (indt),y
+1770 : 08 php ;flags after load/store sequence
+1771 : 49c3 eor #$c3
+1773 : d124 cmp (ind1),y ;test result
+ trap_ne
+1775 : d0fe > bne * ;failed not equal (non zero)
+
+1777 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1778 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+177a : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+177d : d0fe > bne * ;failed not equal (non zero)
+
+177f : 88 dey
+1780 : 10e1 bpl tlday3
+
+1782 : a003 ldy #3 ;testing store result
+1784 : a200 ldx #0
+1786 : b90302 tstay1 lda abst,y
+1789 : 49c3 eor #$c3
+178b : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+178e : d0fe > bne * ;failed not equal (non zero)
+
+1790 : 8a txa
+1791 : 990302 sta abst,y ;clear
+1794 : 88 dey
+1795 : 10ef bpl tstay1
+
+1797 : a206 ldx #6
+1799 : a003 ldy #3
+179b : tldax4
+ set_stat 0
+ > load_flag 0
+179b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+179d : 48 > pha ;use stack to load status
+179e : 28 > plp
+
+179f : a124 lda (ind1,x)
+17a1 : 08 php ;test stores do not alter flags
+17a2 : 49c3 eor #$c3
+17a4 : 28 plp
+17a5 : 8130 sta (indt,x)
+17a7 : 08 php ;flags after load/store sequence
+17a8 : 49c3 eor #$c3
+17aa : d91702 cmp abs1,y ;test result
+ trap_ne
+17ad : d0fe > bne * ;failed not equal (non zero)
+
+17af : 68 pla ;load status
+ eor_flag 0
+17b0 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+17b2 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+17b5 : d0fe > bne * ;failed not equal (non zero)
+
+17b7 : ca dex
+17b8 : ca dex
+17b9 : 88 dey
+17ba : 10df bpl tldax4
+
+17bc : a206 ldx #6
+17be : a003 ldy #3
+17c0 : tldax5
+ set_stat $ff
+ > load_flag $ff
+17c0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+17c2 : 48 > pha ;use stack to load status
+17c3 : 28 > plp
+
+17c4 : a124 lda (ind1,x)
+17c6 : 08 php ;test stores do not alter flags
+17c7 : 49c3 eor #$c3
+17c9 : 28 plp
+17ca : 8130 sta (indt,x)
+17cc : 08 php ;flags after load/store sequence
+17cd : 49c3 eor #$c3
+17cf : d91702 cmp abs1,y ;test result
+ trap_ne
+17d2 : d0fe > bne * ;failed not equal (non zero)
+
+17d4 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+17d5 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+17d7 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+17da : d0fe > bne * ;failed not equal (non zero)
+
+17dc : ca dex
+17dd : ca dex
+17de : 88 dey
+17df : 10df bpl tldax5
+
+17e1 : a003 ldy #3 ;testing store result
+17e3 : a200 ldx #0
+17e5 : b90302 tstay2 lda abst,y
+17e8 : 49c3 eor #$c3
+17ea : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+17ed : d0fe > bne * ;failed not equal (non zero)
+
+17ef : 8a txa
+17f0 : 990302 sta abst,y ;clear
+17f3 : 88 dey
+17f4 : 10ef bpl tstay2
+ next_test
+17f6 : ad0002 > lda test_case ;previous test
+17f9 : c916 > cmp #test_num
+ > trap_ne ;test is out of sequence
+17fb : d0fe > bne * ;failed not equal (non zero)
+ >
+0017 = >test_num = test_num + 1
+17fd : a917 > lda #test_num ;*** next tests' number
+17ff : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+1802 : a2fd ldx #3+$fa
+1804 : b519 tldax6 lda zp1-$fa&$ff,x ;wrap on indexed zp
+1806 : 9d0901 sta abst-$fa,x ;no STX abs,x!
+1809 : ca dex
+180a : e0fa cpx #$fa
+180c : b0f6 bcs tldax6
+180e : a2fd ldx #3+$fa
+1810 : bd1d01 tldax7 lda abs1-$fa,x ;no wrap on indexed abs
+1813 : 9512 sta zpt-$fa&$ff,x
+1815 : ca dex
+1816 : e0fa cpx #$fa
+1818 : b0f6 bcs tldax7
+
+181a : a203 ldx #3 ;testing wraparound result
+181c : a000 ldy #0
+181e : b50c tstax1 lda zpt,x
+1820 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1822 : d0fe > bne * ;failed not equal (non zero)
+
+1824 : 940c sty zpt,x ;clear
+1826 : bd0302 lda abst,x
+1829 : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+182c : d0fe > bne * ;failed not equal (non zero)
+
+182e : 8a txa
+182f : 9d0302 sta abst,x ;clear
+1832 : ca dex
+1833 : 10e9 bpl tstax1
+
+1835 : a0fb ldy #3+$f8
+1837 : a2fe ldx #6+$f8
+1839 : a12c tlday4 lda (ind1-$f8&$ff,x) ;wrap on indexed zp indirect
+183b : 990b01 sta abst-$f8,y
+183e : ca dex
+183f : ca dex
+1840 : 88 dey
+1841 : c0f8 cpy #$f8
+1843 : b0f4 bcs tlday4
+1845 : a003 ldy #3 ;testing wraparound result
+1847 : a200 ldx #0
+1849 : b90302 tstay4 lda abst,y
+184c : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+184f : d0fe > bne * ;failed not equal (non zero)
+
+1851 : 8a txa
+1852 : 990302 sta abst,y ;clear
+1855 : 88 dey
+1856 : 10f1 bpl tstay4
+
+1858 : a0fb ldy #3+$f8
+185a : b91f01 tlday5 lda abs1-$f8,y ;no wrap on indexed abs
+185d : 9138 sta (inwt),y
+185f : 88 dey
+1860 : c0f8 cpy #$f8
+1862 : b0f6 bcs tlday5
+1864 : a003 ldy #3 ;testing wraparound result
+1866 : a200 ldx #0
+1868 : b90302 tstay5 lda abst,y
+186b : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+186e : d0fe > bne * ;failed not equal (non zero)
+
+1870 : 8a txa
+1871 : 990302 sta abst,y ;clear
+1874 : 88 dey
+1875 : 10f1 bpl tstay5
+
+1877 : a0fb ldy #3+$f8
+1879 : a2fe ldx #6+$f8
+187b : b12e tlday6 lda (inw1),y ;no wrap on zp indirect indexed
+187d : 8138 sta (indt-$f8&$ff,x)
+187f : ca dex
+1880 : ca dex
+1881 : 88 dey
+1882 : c0f8 cpy #$f8
+1884 : b0f5 bcs tlday6
+1886 : a003 ldy #3 ;testing wraparound result
+1888 : a200 ldx #0
+188a : b90302 tstay6 lda abst,y
+188d : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1890 : d0fe > bne * ;failed not equal (non zero)
+
+1892 : 8a txa
+1893 : 990302 sta abst,y ;clear
+1896 : 88 dey
+1897 : 10f1 bpl tstay6
+ next_test
+1899 : ad0002 > lda test_case ;previous test
+189c : c917 > cmp #test_num
+ > trap_ne ;test is out of sequence
+189e : d0fe > bne * ;failed not equal (non zero)
+ >
+0018 = >test_num = test_num + 1
+18a0 : a918 > lda #test_num ;*** next tests' number
+18a2 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDA / STA - zp / abs / #
+ set_stat 0
+ > load_flag 0
+18a5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+18a7 : 48 > pha ;use stack to load status
+18a8 : 28 > plp
+
+18a9 : a513 lda zp1
+18ab : 08 php ;test stores do not alter flags
+18ac : 49c3 eor #$c3
+18ae : 28 plp
+18af : 8d0302 sta abst
+18b2 : 08 php ;flags after load/store sequence
+18b3 : 49c3 eor #$c3
+18b5 : c9c3 cmp #$c3 ;test result
+ trap_ne
+18b7 : d0fe > bne * ;failed not equal (non zero)
+
+18b9 : 68 pla ;load status
+ eor_flag 0
+18ba : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+18bc : cd1c02 cmp fLDx ;test flags
+ trap_ne
+18bf : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+18c1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+18c3 : 48 > pha ;use stack to load status
+18c4 : 28 > plp
+
+18c5 : a514 lda zp1+1
+18c7 : 08 php ;test stores do not alter flags
+18c8 : 49c3 eor #$c3
+18ca : 28 plp
+18cb : 8d0402 sta abst+1
+18ce : 08 php ;flags after load/store sequence
+18cf : 49c3 eor #$c3
+18d1 : c982 cmp #$82 ;test result
+ trap_ne
+18d3 : d0fe > bne * ;failed not equal (non zero)
+
+18d5 : 68 pla ;load status
+ eor_flag 0
+18d6 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+18d8 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+18db : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+18dd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+18df : 48 > pha ;use stack to load status
+18e0 : 28 > plp
+
+18e1 : a515 lda zp1+2
+18e3 : 08 php ;test stores do not alter flags
+18e4 : 49c3 eor #$c3
+18e6 : 28 plp
+18e7 : 8d0502 sta abst+2
+18ea : 08 php ;flags after load/store sequence
+18eb : 49c3 eor #$c3
+18ed : c941 cmp #$41 ;test result
+ trap_ne
+18ef : d0fe > bne * ;failed not equal (non zero)
+
+18f1 : 68 pla ;load status
+ eor_flag 0
+18f2 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+18f4 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+18f7 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+18f9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+18fb : 48 > pha ;use stack to load status
+18fc : 28 > plp
+
+18fd : a516 lda zp1+3
+18ff : 08 php ;test stores do not alter flags
+1900 : 49c3 eor #$c3
+1902 : 28 plp
+1903 : 8d0602 sta abst+3
+1906 : 08 php ;flags after load/store sequence
+1907 : 49c3 eor #$c3
+1909 : c900 cmp #0 ;test result
+ trap_ne
+190b : d0fe > bne * ;failed not equal (non zero)
+
+190d : 68 pla ;load status
+ eor_flag 0
+190e : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1910 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1913 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1915 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1917 : 48 > pha ;use stack to load status
+1918 : 28 > plp
+
+1919 : a513 lda zp1
+191b : 08 php ;test stores do not alter flags
+191c : 49c3 eor #$c3
+191e : 28 plp
+191f : 8d0302 sta abst
+1922 : 08 php ;flags after load/store sequence
+1923 : 49c3 eor #$c3
+1925 : c9c3 cmp #$c3 ;test result
+ trap_ne
+1927 : d0fe > bne * ;failed not equal (non zero)
+
+1929 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+192a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+192c : cd1c02 cmp fLDx ;test flags
+ trap_ne
+192f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1931 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1933 : 48 > pha ;use stack to load status
+1934 : 28 > plp
+
+1935 : a514 lda zp1+1
+1937 : 08 php ;test stores do not alter flags
+1938 : 49c3 eor #$c3
+193a : 28 plp
+193b : 8d0402 sta abst+1
+193e : 08 php ;flags after load/store sequence
+193f : 49c3 eor #$c3
+1941 : c982 cmp #$82 ;test result
+ trap_ne
+1943 : d0fe > bne * ;failed not equal (non zero)
+
+1945 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1946 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1948 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+194b : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+194d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+194f : 48 > pha ;use stack to load status
+1950 : 28 > plp
+
+1951 : a515 lda zp1+2
+1953 : 08 php ;test stores do not alter flags
+1954 : 49c3 eor #$c3
+1956 : 28 plp
+1957 : 8d0502 sta abst+2
+195a : 08 php ;flags after load/store sequence
+195b : 49c3 eor #$c3
+195d : c941 cmp #$41 ;test result
+ trap_ne
+195f : d0fe > bne * ;failed not equal (non zero)
+
+1961 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1962 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1964 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1967 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1969 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+196b : 48 > pha ;use stack to load status
+196c : 28 > plp
+
+196d : a516 lda zp1+3
+196f : 08 php ;test stores do not alter flags
+1970 : 49c3 eor #$c3
+1972 : 28 plp
+1973 : 8d0602 sta abst+3
+1976 : 08 php ;flags after load/store sequence
+1977 : 49c3 eor #$c3
+1979 : c900 cmp #0 ;test result
+ trap_ne
+197b : d0fe > bne * ;failed not equal (non zero)
+
+197d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+197e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1980 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1983 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1985 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1987 : 48 > pha ;use stack to load status
+1988 : 28 > plp
+
+1989 : ad1702 lda abs1
+198c : 08 php ;test stores do not alter flags
+198d : 49c3 eor #$c3
+198f : 28 plp
+1990 : 850c sta zpt
+1992 : 08 php ;flags after load/store sequence
+1993 : 49c3 eor #$c3
+1995 : c513 cmp zp1 ;test result
+ trap_ne
+1997 : d0fe > bne * ;failed not equal (non zero)
+
+1999 : 68 pla ;load status
+ eor_flag 0
+199a : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+199c : cd1c02 cmp fLDx ;test flags
+ trap_ne
+199f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+19a1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19a3 : 48 > pha ;use stack to load status
+19a4 : 28 > plp
+
+19a5 : ad1802 lda abs1+1
+19a8 : 08 php ;test stores do not alter flags
+19a9 : 49c3 eor #$c3
+19ab : 28 plp
+19ac : 850d sta zpt+1
+19ae : 08 php ;flags after load/store sequence
+19af : 49c3 eor #$c3
+19b1 : c514 cmp zp1+1 ;test result
+ trap_ne
+19b3 : d0fe > bne * ;failed not equal (non zero)
+
+19b5 : 68 pla ;load status
+ eor_flag 0
+19b6 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+19b8 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+19bb : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+19bd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19bf : 48 > pha ;use stack to load status
+19c0 : 28 > plp
+
+19c1 : ad1902 lda abs1+2
+19c4 : 08 php ;test stores do not alter flags
+19c5 : 49c3 eor #$c3
+19c7 : 28 plp
+19c8 : 850e sta zpt+2
+19ca : 08 php ;flags after load/store sequence
+19cb : 49c3 eor #$c3
+19cd : c515 cmp zp1+2 ;test result
+ trap_ne
+19cf : d0fe > bne * ;failed not equal (non zero)
+
+19d1 : 68 pla ;load status
+ eor_flag 0
+19d2 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+19d4 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+19d7 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+19d9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19db : 48 > pha ;use stack to load status
+19dc : 28 > plp
+
+19dd : ad1a02 lda abs1+3
+19e0 : 08 php ;test stores do not alter flags
+19e1 : 49c3 eor #$c3
+19e3 : 28 plp
+19e4 : 850f sta zpt+3
+19e6 : 08 php ;flags after load/store sequence
+19e7 : 49c3 eor #$c3
+19e9 : c516 cmp zp1+3 ;test result
+ trap_ne
+19eb : d0fe > bne * ;failed not equal (non zero)
+
+19ed : 68 pla ;load status
+ eor_flag 0
+19ee : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+19f0 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+19f3 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+19f5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+19f7 : 48 > pha ;use stack to load status
+19f8 : 28 > plp
+
+19f9 : ad1702 lda abs1
+19fc : 08 php ;test stores do not alter flags
+19fd : 49c3 eor #$c3
+19ff : 28 plp
+1a00 : 850c sta zpt
+1a02 : 08 php ;flags after load/store sequence
+1a03 : 49c3 eor #$c3
+1a05 : c513 cmp zp1 ;test result
+ trap_ne
+1a07 : d0fe > bne * ;failed not equal (non zero)
+
+1a09 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a0a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a0c : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1a0f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1a11 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a13 : 48 > pha ;use stack to load status
+1a14 : 28 > plp
+
+1a15 : ad1802 lda abs1+1
+1a18 : 08 php ;test stores do not alter flags
+1a19 : 49c3 eor #$c3
+1a1b : 28 plp
+1a1c : 850d sta zpt+1
+1a1e : 08 php ;flags after load/store sequence
+1a1f : 49c3 eor #$c3
+1a21 : c514 cmp zp1+1 ;test result
+ trap_ne
+1a23 : d0fe > bne * ;failed not equal (non zero)
+
+1a25 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a26 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a28 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1a2b : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1a2d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a2f : 48 > pha ;use stack to load status
+1a30 : 28 > plp
+
+1a31 : ad1902 lda abs1+2
+1a34 : 08 php ;test stores do not alter flags
+1a35 : 49c3 eor #$c3
+1a37 : 28 plp
+1a38 : 850e sta zpt+2
+1a3a : 08 php ;flags after load/store sequence
+1a3b : 49c3 eor #$c3
+1a3d : c515 cmp zp1+2 ;test result
+ trap_ne
+1a3f : d0fe > bne * ;failed not equal (non zero)
+
+1a41 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a42 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a44 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1a47 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1a49 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a4b : 48 > pha ;use stack to load status
+1a4c : 28 > plp
+
+1a4d : ad1a02 lda abs1+3
+1a50 : 08 php ;test stores do not alter flags
+1a51 : 49c3 eor #$c3
+1a53 : 28 plp
+1a54 : 850f sta zpt+3
+1a56 : 08 php ;flags after load/store sequence
+1a57 : 49c3 eor #$c3
+1a59 : c516 cmp zp1+3 ;test result
+ trap_ne
+1a5b : d0fe > bne * ;failed not equal (non zero)
+
+1a5d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a5e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a60 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1a63 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1a65 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1a67 : 48 > pha ;use stack to load status
+1a68 : 28 > plp
+
+1a69 : a9c3 lda #$c3
+1a6b : 08 php
+1a6c : cd1702 cmp abs1 ;test result
+ trap_ne
+1a6f : d0fe > bne * ;failed not equal (non zero)
+
+1a71 : 68 pla ;load status
+ eor_flag 0
+1a72 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1a74 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1a77 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1a79 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1a7b : 48 > pha ;use stack to load status
+1a7c : 28 > plp
+
+1a7d : a982 lda #$82
+1a7f : 08 php
+1a80 : cd1802 cmp abs1+1 ;test result
+ trap_ne
+1a83 : d0fe > bne * ;failed not equal (non zero)
+
+1a85 : 68 pla ;load status
+ eor_flag 0
+1a86 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1a88 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1a8b : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1a8d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1a8f : 48 > pha ;use stack to load status
+1a90 : 28 > plp
+
+1a91 : a941 lda #$41
+1a93 : 08 php
+1a94 : cd1902 cmp abs1+2 ;test result
+ trap_ne
+1a97 : d0fe > bne * ;failed not equal (non zero)
+
+1a99 : 68 pla ;load status
+ eor_flag 0
+1a9a : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1a9c : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1a9f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1aa1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1aa3 : 48 > pha ;use stack to load status
+1aa4 : 28 > plp
+
+1aa5 : a900 lda #0
+1aa7 : 08 php
+1aa8 : cd1a02 cmp abs1+3 ;test result
+ trap_ne
+1aab : d0fe > bne * ;failed not equal (non zero)
+
+1aad : 68 pla ;load status
+ eor_flag 0
+1aae : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1ab0 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1ab3 : d0fe > bne * ;failed not equal (non zero)
+
+
+ set_stat $ff
+ > load_flag $ff
+1ab5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1ab7 : 48 > pha ;use stack to load status
+1ab8 : 28 > plp
+
+1ab9 : a9c3 lda #$c3
+1abb : 08 php
+1abc : cd1702 cmp abs1 ;test result
+ trap_ne
+1abf : d0fe > bne * ;failed not equal (non zero)
+
+1ac1 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1ac2 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1ac4 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1ac7 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1ac9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1acb : 48 > pha ;use stack to load status
+1acc : 28 > plp
+
+1acd : a982 lda #$82
+1acf : 08 php
+1ad0 : cd1802 cmp abs1+1 ;test result
+ trap_ne
+1ad3 : d0fe > bne * ;failed not equal (non zero)
+
+1ad5 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1ad6 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1ad8 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1adb : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1add : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1adf : 48 > pha ;use stack to load status
+1ae0 : 28 > plp
+
+1ae1 : a941 lda #$41
+1ae3 : 08 php
+1ae4 : cd1902 cmp abs1+2 ;test result
+ trap_ne
+1ae7 : d0fe > bne * ;failed not equal (non zero)
+
+1ae9 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1aea : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1aec : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1aef : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+1af1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1af3 : 48 > pha ;use stack to load status
+1af4 : 28 > plp
+
+1af5 : a900 lda #0
+1af7 : 08 php
+1af8 : cd1a02 cmp abs1+3 ;test result
+ trap_ne
+1afb : d0fe > bne * ;failed not equal (non zero)
+
+1afd : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1afe : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1b00 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1b03 : d0fe > bne * ;failed not equal (non zero)
+
+
+1b05 : a200 ldx #0
+1b07 : a50c lda zpt
+1b09 : 49c3 eor #$c3
+1b0b : c513 cmp zp1
+ trap_ne ;store to zp data
+1b0d : d0fe > bne * ;failed not equal (non zero)
+
+1b0f : 860c stx zpt ;clear
+1b11 : ad0302 lda abst
+1b14 : 49c3 eor #$c3
+1b16 : cd1702 cmp abs1
+ trap_ne ;store to abs data
+1b19 : d0fe > bne * ;failed not equal (non zero)
+
+1b1b : 8e0302 stx abst ;clear
+1b1e : a50d lda zpt+1
+1b20 : 49c3 eor #$c3
+1b22 : c514 cmp zp1+1
+ trap_ne ;store to zp data
+1b24 : d0fe > bne * ;failed not equal (non zero)
+
+1b26 : 860d stx zpt+1 ;clear
+1b28 : ad0402 lda abst+1
+1b2b : 49c3 eor #$c3
+1b2d : cd1802 cmp abs1+1
+ trap_ne ;store to abs data
+1b30 : d0fe > bne * ;failed not equal (non zero)
+
+1b32 : 8e0402 stx abst+1 ;clear
+1b35 : a50e lda zpt+2
+1b37 : 49c3 eor #$c3
+1b39 : c515 cmp zp1+2
+ trap_ne ;store to zp data
+1b3b : d0fe > bne * ;failed not equal (non zero)
+
+1b3d : 860e stx zpt+2 ;clear
+1b3f : ad0502 lda abst+2
+1b42 : 49c3 eor #$c3
+1b44 : cd1902 cmp abs1+2
+ trap_ne ;store to abs data
+1b47 : d0fe > bne * ;failed not equal (non zero)
+
+1b49 : 8e0502 stx abst+2 ;clear
+1b4c : a50f lda zpt+3
+1b4e : 49c3 eor #$c3
+1b50 : c516 cmp zp1+3
+ trap_ne ;store to zp data
+1b52 : d0fe > bne * ;failed not equal (non zero)
+
+1b54 : 860f stx zpt+3 ;clear
+1b56 : ad0602 lda abst+3
+1b59 : 49c3 eor #$c3
+1b5b : cd1a02 cmp abs1+3
+ trap_ne ;store to abs data
+1b5e : d0fe > bne * ;failed not equal (non zero)
+
+1b60 : 8e0602 stx abst+3 ;clear
+ next_test
+1b63 : ad0002 > lda test_case ;previous test
+1b66 : c918 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1b68 : d0fe > bne * ;failed not equal (non zero)
+ >
+0019 = >test_num = test_num + 1
+1b6a : a919 > lda #test_num ;*** next tests' number
+1b6c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing bit test & compares BIT CPX CPY CMP all addressing modes
+ ; BIT - zp / abs
+ set_a $ff,0
+ > load_flag 0
+1b6f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b71 : 48 > pha ;use stack to load status
+1b72 : a9ff > lda #$ff ;precharge accu
+1b74 : 28 > plp
+
+1b75 : 2416 bit zp1+3 ;00 - should set Z / clear NV
+ tst_a $ff,fz
+1b77 : 08 > php ;save flags
+1b78 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1b7a : d0fe > bne * ;failed not equal (non zero)
+ >
+1b7c : 68 > pla ;load status
+1b7d : 48 > pha
+ > cmp_flag fz
+1b7e : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b80 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b82 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1b83 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b85 : 48 > pha ;use stack to load status
+1b86 : a901 > lda #1 ;precharge accu
+1b88 : 28 > plp
+
+1b89 : 2415 bit zp1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+1b8b : 08 > php ;save flags
+1b8c : c901 > cmp #1 ;test result
+ > trap_ne
+1b8e : d0fe > bne * ;failed not equal (non zero)
+ >
+1b90 : 68 > pla ;load status
+1b91 : 48 > pha
+ > cmp_flag fv
+1b92 : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b94 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b96 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1b97 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b99 : 48 > pha ;use stack to load status
+1b9a : a901 > lda #1 ;precharge accu
+1b9c : 28 > plp
+
+1b9d : 2414 bit zp1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+1b9f : 08 > php ;save flags
+1ba0 : c901 > cmp #1 ;test result
+ > trap_ne
+1ba2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ba4 : 68 > pla ;load status
+1ba5 : 48 > pha
+ > cmp_flag fnz
+1ba6 : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ba8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1baa : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1bab : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1bad : 48 > pha ;use stack to load status
+1bae : a901 > lda #1 ;precharge accu
+1bb0 : 28 > plp
+
+1bb1 : 2413 bit zp1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+1bb3 : 08 > php ;save flags
+1bb4 : c901 > cmp #1 ;test result
+ > trap_ne
+1bb6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bb8 : 68 > pla ;load status
+1bb9 : 48 > pha
+ > cmp_flag fnv
+1bba : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bbc : d0fe > bne * ;failed not equal (non zero)
+ >
+1bbe : 28 > plp ;restore status
+
+
+ set_a $ff,$ff
+ > load_flag $ff
+1bbf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1bc1 : 48 > pha ;use stack to load status
+1bc2 : a9ff > lda #$ff ;precharge accu
+1bc4 : 28 > plp
+
+1bc5 : 2416 bit zp1+3 ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+1bc7 : 08 > php ;save flags
+1bc8 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1bca : d0fe > bne * ;failed not equal (non zero)
+ >
+1bcc : 68 > pla ;load status
+1bcd : 48 > pha
+ > cmp_flag ~fnv
+1bce : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bd0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bd2 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1bd3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1bd5 : 48 > pha ;use stack to load status
+1bd6 : a901 > lda #1 ;precharge accu
+1bd8 : 28 > plp
+
+1bd9 : 2415 bit zp1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+1bdb : 08 > php ;save flags
+1bdc : c901 > cmp #1 ;test result
+ > trap_ne
+1bde : d0fe > bne * ;failed not equal (non zero)
+ >
+1be0 : 68 > pla ;load status
+1be1 : 48 > pha
+ > cmp_flag ~fnz
+1be2 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1be4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1be6 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1be7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1be9 : 48 > pha ;use stack to load status
+1bea : a901 > lda #1 ;precharge accu
+1bec : 28 > plp
+
+1bed : 2414 bit zp1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+1bef : 08 > php ;save flags
+1bf0 : c901 > cmp #1 ;test result
+ > trap_ne
+1bf2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bf4 : 68 > pla ;load status
+1bf5 : 48 > pha
+ > cmp_flag ~fv
+1bf6 : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bf8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bfa : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1bfb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1bfd : 48 > pha ;use stack to load status
+1bfe : a901 > lda #1 ;precharge accu
+1c00 : 28 > plp
+
+1c01 : 2413 bit zp1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+1c03 : 08 > php ;save flags
+1c04 : c901 > cmp #1 ;test result
+ > trap_ne
+1c06 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c08 : 68 > pla ;load status
+1c09 : 48 > pha
+ > cmp_flag ~fz
+1c0a : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c0c : d0fe > bne * ;failed not equal (non zero)
+ >
+1c0e : 28 > plp ;restore status
+
+
+ set_a $ff,0
+ > load_flag 0
+1c0f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c11 : 48 > pha ;use stack to load status
+1c12 : a9ff > lda #$ff ;precharge accu
+1c14 : 28 > plp
+
+1c15 : 2c1a02 bit abs1+3 ;00 - should set Z / clear NV
+ tst_a $ff,fz
+1c18 : 08 > php ;save flags
+1c19 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1c1b : d0fe > bne * ;failed not equal (non zero)
+ >
+1c1d : 68 > pla ;load status
+1c1e : 48 > pha
+ > cmp_flag fz
+1c1f : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c21 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c23 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1c24 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c26 : 48 > pha ;use stack to load status
+1c27 : a901 > lda #1 ;precharge accu
+1c29 : 28 > plp
+
+1c2a : 2c1902 bit abs1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+1c2d : 08 > php ;save flags
+1c2e : c901 > cmp #1 ;test result
+ > trap_ne
+1c30 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c32 : 68 > pla ;load status
+1c33 : 48 > pha
+ > cmp_flag fv
+1c34 : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c36 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c38 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1c39 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c3b : 48 > pha ;use stack to load status
+1c3c : a901 > lda #1 ;precharge accu
+1c3e : 28 > plp
+
+1c3f : 2c1802 bit abs1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+1c42 : 08 > php ;save flags
+1c43 : c901 > cmp #1 ;test result
+ > trap_ne
+1c45 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c47 : 68 > pla ;load status
+1c48 : 48 > pha
+ > cmp_flag fnz
+1c49 : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c4b : d0fe > bne * ;failed not equal (non zero)
+ >
+1c4d : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+1c4e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c50 : 48 > pha ;use stack to load status
+1c51 : a901 > lda #1 ;precharge accu
+1c53 : 28 > plp
+
+1c54 : 2c1702 bit abs1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+1c57 : 08 > php ;save flags
+1c58 : c901 > cmp #1 ;test result
+ > trap_ne
+1c5a : d0fe > bne * ;failed not equal (non zero)
+ >
+1c5c : 68 > pla ;load status
+1c5d : 48 > pha
+ > cmp_flag fnv
+1c5e : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c60 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c62 : 28 > plp ;restore status
+
+
+ set_a $ff,$ff
+ > load_flag $ff
+1c63 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c65 : 48 > pha ;use stack to load status
+1c66 : a9ff > lda #$ff ;precharge accu
+1c68 : 28 > plp
+
+1c69 : 2c1a02 bit abs1+3 ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+1c6c : 08 > php ;save flags
+1c6d : c9ff > cmp #$ff ;test result
+ > trap_ne
+1c6f : d0fe > bne * ;failed not equal (non zero)
+ >
+1c71 : 68 > pla ;load status
+1c72 : 48 > pha
+ > cmp_flag ~fnv
+1c73 : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c75 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c77 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1c78 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c7a : 48 > pha ;use stack to load status
+1c7b : a901 > lda #1 ;precharge accu
+1c7d : 28 > plp
+
+1c7e : 2c1902 bit abs1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+1c81 : 08 > php ;save flags
+1c82 : c901 > cmp #1 ;test result
+ > trap_ne
+1c84 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c86 : 68 > pla ;load status
+1c87 : 48 > pha
+ > cmp_flag ~fnz
+1c88 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c8a : d0fe > bne * ;failed not equal (non zero)
+ >
+1c8c : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1c8d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c8f : 48 > pha ;use stack to load status
+1c90 : a901 > lda #1 ;precharge accu
+1c92 : 28 > plp
+
+1c93 : 2c1802 bit abs1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+1c96 : 08 > php ;save flags
+1c97 : c901 > cmp #1 ;test result
+ > trap_ne
+1c99 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c9b : 68 > pla ;load status
+1c9c : 48 > pha
+ > cmp_flag ~fv
+1c9d : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c9f : d0fe > bne * ;failed not equal (non zero)
+ >
+1ca1 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+1ca2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1ca4 : 48 > pha ;use stack to load status
+1ca5 : a901 > lda #1 ;precharge accu
+1ca7 : 28 > plp
+
+1ca8 : 2c1702 bit abs1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+1cab : 08 > php ;save flags
+1cac : c901 > cmp #1 ;test result
+ > trap_ne
+1cae : d0fe > bne * ;failed not equal (non zero)
+ >
+1cb0 : 68 > pla ;load status
+1cb1 : 48 > pha
+ > cmp_flag ~fz
+1cb2 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cb4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1cb6 : 28 > plp ;restore status
+
+ next_test
+1cb7 : ad0002 > lda test_case ;previous test
+1cba : c919 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1cbc : d0fe > bne * ;failed not equal (non zero)
+ >
+001a = >test_num = test_num + 1
+1cbe : a91a > lda #test_num ;*** next tests' number
+1cc0 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CPX - zp / abs / #
+ set_x $80,0
+ > load_flag 0
+1cc3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1cc5 : 48 > pha ;use stack to load status
+1cc6 : a280 > ldx #$80 ;precharge index x
+1cc8 : 28 > plp
+
+1cc9 : e417 cpx zp7f
+ tst_stat fc
+1ccb : 08 > php ;save status
+1ccc : 68 > pla ;use stack to retrieve status
+1ccd : 48 > pha
+ > cmp_flag fc
+1cce : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cd0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1cd2 : 28 > plp ;restore status
+
+1cd3 : ca dex
+1cd4 : e417 cpx zp7f
+ tst_stat fzc
+1cd6 : 08 > php ;save status
+1cd7 : 68 > pla ;use stack to retrieve status
+1cd8 : 48 > pha
+ > cmp_flag fzc
+1cd9 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cdb : d0fe > bne * ;failed not equal (non zero)
+ >
+1cdd : 28 > plp ;restore status
+
+1cde : ca dex
+1cdf : e417 cpx zp7f
+ tst_x $7e,fn
+1ce1 : 08 > php ;save flags
+1ce2 : e07e > cpx #$7e ;test result
+ > trap_ne
+1ce4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ce6 : 68 > pla ;load status
+1ce7 : 48 > pha
+ > cmp_flag fn
+1ce8 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cea : d0fe > bne * ;failed not equal (non zero)
+ >
+1cec : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+1ced : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1cef : 48 > pha ;use stack to load status
+1cf0 : a280 > ldx #$80 ;precharge index x
+1cf2 : 28 > plp
+
+1cf3 : e417 cpx zp7f
+ tst_stat ~fnz
+1cf5 : 08 > php ;save status
+1cf6 : 68 > pla ;use stack to retrieve status
+1cf7 : 48 > pha
+ > cmp_flag ~fnz
+1cf8 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cfa : d0fe > bne * ;failed not equal (non zero)
+ >
+1cfc : 28 > plp ;restore status
+
+1cfd : ca dex
+1cfe : e417 cpx zp7f
+ tst_stat ~fn
+1d00 : 08 > php ;save status
+1d01 : 68 > pla ;use stack to retrieve status
+1d02 : 48 > pha
+ > cmp_flag ~fn
+1d03 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d05 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d07 : 28 > plp ;restore status
+
+1d08 : ca dex
+1d09 : e417 cpx zp7f
+ tst_x $7e,~fzc
+1d0b : 08 > php ;save flags
+1d0c : e07e > cpx #$7e ;test result
+ > trap_ne
+1d0e : d0fe > bne * ;failed not equal (non zero)
+ >
+1d10 : 68 > pla ;load status
+1d11 : 48 > pha
+ > cmp_flag ~fzc
+1d12 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d14 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d16 : 28 > plp ;restore status
+
+
+ set_x $80,0
+ > load_flag 0
+1d17 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1d19 : 48 > pha ;use stack to load status
+1d1a : a280 > ldx #$80 ;precharge index x
+1d1c : 28 > plp
+
+1d1d : ec1b02 cpx abs7f
+ tst_stat fc
+1d20 : 08 > php ;save status
+1d21 : 68 > pla ;use stack to retrieve status
+1d22 : 48 > pha
+ > cmp_flag fc
+1d23 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d25 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d27 : 28 > plp ;restore status
+
+1d28 : ca dex
+1d29 : ec1b02 cpx abs7f
+ tst_stat fzc
+1d2c : 08 > php ;save status
+1d2d : 68 > pla ;use stack to retrieve status
+1d2e : 48 > pha
+ > cmp_flag fzc
+1d2f : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d31 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d33 : 28 > plp ;restore status
+
+1d34 : ca dex
+1d35 : ec1b02 cpx abs7f
+ tst_x $7e,fn
+1d38 : 08 > php ;save flags
+1d39 : e07e > cpx #$7e ;test result
+ > trap_ne
+1d3b : d0fe > bne * ;failed not equal (non zero)
+ >
+1d3d : 68 > pla ;load status
+1d3e : 48 > pha
+ > cmp_flag fn
+1d3f : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d41 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d43 : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+1d44 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1d46 : 48 > pha ;use stack to load status
+1d47 : a280 > ldx #$80 ;precharge index x
+1d49 : 28 > plp
+
+1d4a : ec1b02 cpx abs7f
+ tst_stat ~fnz
+1d4d : 08 > php ;save status
+1d4e : 68 > pla ;use stack to retrieve status
+1d4f : 48 > pha
+ > cmp_flag ~fnz
+1d50 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d52 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d54 : 28 > plp ;restore status
+
+1d55 : ca dex
+1d56 : ec1b02 cpx abs7f
+ tst_stat ~fn
+1d59 : 08 > php ;save status
+1d5a : 68 > pla ;use stack to retrieve status
+1d5b : 48 > pha
+ > cmp_flag ~fn
+1d5c : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d5e : d0fe > bne * ;failed not equal (non zero)
+ >
+1d60 : 28 > plp ;restore status
+
+1d61 : ca dex
+1d62 : ec1b02 cpx abs7f
+ tst_x $7e,~fzc
+1d65 : 08 > php ;save flags
+1d66 : e07e > cpx #$7e ;test result
+ > trap_ne
+1d68 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d6a : 68 > pla ;load status
+1d6b : 48 > pha
+ > cmp_flag ~fzc
+1d6c : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d6e : d0fe > bne * ;failed not equal (non zero)
+ >
+1d70 : 28 > plp ;restore status
+
+
+ set_x $80,0
+ > load_flag 0
+1d71 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1d73 : 48 > pha ;use stack to load status
+1d74 : a280 > ldx #$80 ;precharge index x
+1d76 : 28 > plp
+
+1d77 : e07f cpx #$7f
+ tst_stat fc
+1d79 : 08 > php ;save status
+1d7a : 68 > pla ;use stack to retrieve status
+1d7b : 48 > pha
+ > cmp_flag fc
+1d7c : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d7e : d0fe > bne * ;failed not equal (non zero)
+ >
+1d80 : 28 > plp ;restore status
+
+1d81 : ca dex
+1d82 : e07f cpx #$7f
+ tst_stat fzc
+1d84 : 08 > php ;save status
+1d85 : 68 > pla ;use stack to retrieve status
+1d86 : 48 > pha
+ > cmp_flag fzc
+1d87 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d89 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d8b : 28 > plp ;restore status
+
+1d8c : ca dex
+1d8d : e07f cpx #$7f
+ tst_x $7e,fn
+1d8f : 08 > php ;save flags
+1d90 : e07e > cpx #$7e ;test result
+ > trap_ne
+1d92 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d94 : 68 > pla ;load status
+1d95 : 48 > pha
+ > cmp_flag fn
+1d96 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1d98 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d9a : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+1d9b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1d9d : 48 > pha ;use stack to load status
+1d9e : a280 > ldx #$80 ;precharge index x
+1da0 : 28 > plp
+
+1da1 : e07f cpx #$7f
+ tst_stat ~fnz
+1da3 : 08 > php ;save status
+1da4 : 68 > pla ;use stack to retrieve status
+1da5 : 48 > pha
+ > cmp_flag ~fnz
+1da6 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1da8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1daa : 28 > plp ;restore status
+
+1dab : ca dex
+1dac : e07f cpx #$7f
+ tst_stat ~fn
+1dae : 08 > php ;save status
+1daf : 68 > pla ;use stack to retrieve status
+1db0 : 48 > pha
+ > cmp_flag ~fn
+1db1 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1db3 : d0fe > bne * ;failed not equal (non zero)
+ >
+1db5 : 28 > plp ;restore status
+
+1db6 : ca dex
+1db7 : e07f cpx #$7f
+ tst_x $7e,~fzc
+1db9 : 08 > php ;save flags
+1dba : e07e > cpx #$7e ;test result
+ > trap_ne
+1dbc : d0fe > bne * ;failed not equal (non zero)
+ >
+1dbe : 68 > pla ;load status
+1dbf : 48 > pha
+ > cmp_flag ~fzc
+1dc0 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1dc2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1dc4 : 28 > plp ;restore status
+
+ next_test
+1dc5 : ad0002 > lda test_case ;previous test
+1dc8 : c91a > cmp #test_num
+ > trap_ne ;test is out of sequence
+1dca : d0fe > bne * ;failed not equal (non zero)
+ >
+001b = >test_num = test_num + 1
+1dcc : a91b > lda #test_num ;*** next tests' number
+1dce : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CPY - zp / abs / #
+ set_y $80,0
+ > load_flag 0
+1dd1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1dd3 : 48 > pha ;use stack to load status
+1dd4 : a080 > ldy #$80 ;precharge index y
+1dd6 : 28 > plp
+
+1dd7 : c417 cpy zp7f
+ tst_stat fc
+1dd9 : 08 > php ;save status
+1dda : 68 > pla ;use stack to retrieve status
+1ddb : 48 > pha
+ > cmp_flag fc
+1ddc : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1dde : d0fe > bne * ;failed not equal (non zero)
+ >
+1de0 : 28 > plp ;restore status
+
+1de1 : 88 dey
+1de2 : c417 cpy zp7f
+ tst_stat fzc
+1de4 : 08 > php ;save status
+1de5 : 68 > pla ;use stack to retrieve status
+1de6 : 48 > pha
+ > cmp_flag fzc
+1de7 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1de9 : d0fe > bne * ;failed not equal (non zero)
+ >
+1deb : 28 > plp ;restore status
+
+1dec : 88 dey
+1ded : c417 cpy zp7f
+ tst_y $7e,fn
+1def : 08 > php ;save flags
+1df0 : c07e > cpy #$7e ;test result
+ > trap_ne
+1df2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1df4 : 68 > pla ;load status
+1df5 : 48 > pha
+ > cmp_flag fn
+1df6 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1df8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1dfa : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+1dfb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1dfd : 48 > pha ;use stack to load status
+1dfe : a080 > ldy #$80 ;precharge index y
+1e00 : 28 > plp
+
+1e01 : c417 cpy zp7f
+ tst_stat ~fnz
+1e03 : 08 > php ;save status
+1e04 : 68 > pla ;use stack to retrieve status
+1e05 : 48 > pha
+ > cmp_flag ~fnz
+1e06 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e08 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e0a : 28 > plp ;restore status
+
+1e0b : 88 dey
+1e0c : c417 cpy zp7f
+ tst_stat ~fn
+1e0e : 08 > php ;save status
+1e0f : 68 > pla ;use stack to retrieve status
+1e10 : 48 > pha
+ > cmp_flag ~fn
+1e11 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e13 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e15 : 28 > plp ;restore status
+
+1e16 : 88 dey
+1e17 : c417 cpy zp7f
+ tst_y $7e,~fzc
+1e19 : 08 > php ;save flags
+1e1a : c07e > cpy #$7e ;test result
+ > trap_ne
+1e1c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e1e : 68 > pla ;load status
+1e1f : 48 > pha
+ > cmp_flag ~fzc
+1e20 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e22 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e24 : 28 > plp ;restore status
+
+
+ set_y $80,0
+ > load_flag 0
+1e25 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1e27 : 48 > pha ;use stack to load status
+1e28 : a080 > ldy #$80 ;precharge index y
+1e2a : 28 > plp
+
+1e2b : cc1b02 cpy abs7f
+ tst_stat fc
+1e2e : 08 > php ;save status
+1e2f : 68 > pla ;use stack to retrieve status
+1e30 : 48 > pha
+ > cmp_flag fc
+1e31 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e33 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e35 : 28 > plp ;restore status
+
+1e36 : 88 dey
+1e37 : cc1b02 cpy abs7f
+ tst_stat fzc
+1e3a : 08 > php ;save status
+1e3b : 68 > pla ;use stack to retrieve status
+1e3c : 48 > pha
+ > cmp_flag fzc
+1e3d : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e3f : d0fe > bne * ;failed not equal (non zero)
+ >
+1e41 : 28 > plp ;restore status
+
+1e42 : 88 dey
+1e43 : cc1b02 cpy abs7f
+ tst_y $7e,fn
+1e46 : 08 > php ;save flags
+1e47 : c07e > cpy #$7e ;test result
+ > trap_ne
+1e49 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e4b : 68 > pla ;load status
+1e4c : 48 > pha
+ > cmp_flag fn
+1e4d : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e4f : d0fe > bne * ;failed not equal (non zero)
+ >
+1e51 : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+1e52 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e54 : 48 > pha ;use stack to load status
+1e55 : a080 > ldy #$80 ;precharge index y
+1e57 : 28 > plp
+
+1e58 : cc1b02 cpy abs7f
+ tst_stat ~fnz
+1e5b : 08 > php ;save status
+1e5c : 68 > pla ;use stack to retrieve status
+1e5d : 48 > pha
+ > cmp_flag ~fnz
+1e5e : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e60 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e62 : 28 > plp ;restore status
+
+1e63 : 88 dey
+1e64 : cc1b02 cpy abs7f
+ tst_stat ~fn
+1e67 : 08 > php ;save status
+1e68 : 68 > pla ;use stack to retrieve status
+1e69 : 48 > pha
+ > cmp_flag ~fn
+1e6a : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e6c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e6e : 28 > plp ;restore status
+
+1e6f : 88 dey
+1e70 : cc1b02 cpy abs7f
+ tst_y $7e,~fzc
+1e73 : 08 > php ;save flags
+1e74 : c07e > cpy #$7e ;test result
+ > trap_ne
+1e76 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e78 : 68 > pla ;load status
+1e79 : 48 > pha
+ > cmp_flag ~fzc
+1e7a : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e7c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e7e : 28 > plp ;restore status
+
+
+ set_y $80,0
+ > load_flag 0
+1e7f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1e81 : 48 > pha ;use stack to load status
+1e82 : a080 > ldy #$80 ;precharge index y
+1e84 : 28 > plp
+
+1e85 : c07f cpy #$7f
+ tst_stat fc
+1e87 : 08 > php ;save status
+1e88 : 68 > pla ;use stack to retrieve status
+1e89 : 48 > pha
+ > cmp_flag fc
+1e8a : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e8c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e8e : 28 > plp ;restore status
+
+1e8f : 88 dey
+1e90 : c07f cpy #$7f
+ tst_stat fzc
+1e92 : 08 > php ;save status
+1e93 : 68 > pla ;use stack to retrieve status
+1e94 : 48 > pha
+ > cmp_flag fzc
+1e95 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e97 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e99 : 28 > plp ;restore status
+
+1e9a : 88 dey
+1e9b : c07f cpy #$7f
+ tst_y $7e,fn
+1e9d : 08 > php ;save flags
+1e9e : c07e > cpy #$7e ;test result
+ > trap_ne
+1ea0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ea2 : 68 > pla ;load status
+1ea3 : 48 > pha
+ > cmp_flag fn
+1ea4 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ea6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ea8 : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+1ea9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1eab : 48 > pha ;use stack to load status
+1eac : a080 > ldy #$80 ;precharge index y
+1eae : 28 > plp
+
+1eaf : c07f cpy #$7f
+ tst_stat ~fnz
+1eb1 : 08 > php ;save status
+1eb2 : 68 > pla ;use stack to retrieve status
+1eb3 : 48 > pha
+ > cmp_flag ~fnz
+1eb4 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1eb6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1eb8 : 28 > plp ;restore status
+
+1eb9 : 88 dey
+1eba : c07f cpy #$7f
+ tst_stat ~fn
+1ebc : 08 > php ;save status
+1ebd : 68 > pla ;use stack to retrieve status
+1ebe : 48 > pha
+ > cmp_flag ~fn
+1ebf : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ec1 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ec3 : 28 > plp ;restore status
+
+1ec4 : 88 dey
+1ec5 : c07f cpy #$7f
+ tst_y $7e,~fzc
+1ec7 : 08 > php ;save flags
+1ec8 : c07e > cpy #$7e ;test result
+ > trap_ne
+1eca : d0fe > bne * ;failed not equal (non zero)
+ >
+1ecc : 68 > pla ;load status
+1ecd : 48 > pha
+ > cmp_flag ~fzc
+1ece : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ed0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ed2 : 28 > plp ;restore status
+
+ next_test
+1ed3 : ad0002 > lda test_case ;previous test
+1ed6 : c91b > cmp #test_num
+ > trap_ne ;test is out of sequence
+1ed8 : d0fe > bne * ;failed not equal (non zero)
+ >
+001c = >test_num = test_num + 1
+1eda : a91c > lda #test_num ;*** next tests' number
+1edc : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CMP - zp / abs / #
+ set_a $80,0
+ > load_flag 0
+1edf : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ee1 : 48 > pha ;use stack to load status
+1ee2 : a980 > lda #$80 ;precharge accu
+1ee4 : 28 > plp
+
+1ee5 : c517 cmp zp7f
+ tst_a $80,fc
+1ee7 : 08 > php ;save flags
+1ee8 : c980 > cmp #$80 ;test result
+ > trap_ne
+1eea : d0fe > bne * ;failed not equal (non zero)
+ >
+1eec : 68 > pla ;load status
+1eed : 48 > pha
+ > cmp_flag fc
+1eee : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ef0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ef2 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+1ef3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ef5 : 48 > pha ;use stack to load status
+1ef6 : a97f > lda #$7f ;precharge accu
+1ef8 : 28 > plp
+
+1ef9 : c517 cmp zp7f
+ tst_a $7f,fzc
+1efb : 08 > php ;save flags
+1efc : c97f > cmp #$7f ;test result
+ > trap_ne
+1efe : d0fe > bne * ;failed not equal (non zero)
+ >
+1f00 : 68 > pla ;load status
+1f01 : 48 > pha
+ > cmp_flag fzc
+1f02 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f04 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f06 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+1f07 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f09 : 48 > pha ;use stack to load status
+1f0a : a97e > lda #$7e ;precharge accu
+1f0c : 28 > plp
+
+1f0d : c517 cmp zp7f
+ tst_a $7e,fn
+1f0f : 08 > php ;save flags
+1f10 : c97e > cmp #$7e ;test result
+ > trap_ne
+1f12 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f14 : 68 > pla ;load status
+1f15 : 48 > pha
+ > cmp_flag fn
+1f16 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f18 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f1a : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+1f1b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f1d : 48 > pha ;use stack to load status
+1f1e : a980 > lda #$80 ;precharge accu
+1f20 : 28 > plp
+
+1f21 : c517 cmp zp7f
+ tst_a $80,~fnz
+1f23 : 08 > php ;save flags
+1f24 : c980 > cmp #$80 ;test result
+ > trap_ne
+1f26 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f28 : 68 > pla ;load status
+1f29 : 48 > pha
+ > cmp_flag ~fnz
+1f2a : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f2c : d0fe > bne * ;failed not equal (non zero)
+ >
+1f2e : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+1f2f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f31 : 48 > pha ;use stack to load status
+1f32 : a97f > lda #$7f ;precharge accu
+1f34 : 28 > plp
+
+1f35 : c517 cmp zp7f
+ tst_a $7f,~fn
+1f37 : 08 > php ;save flags
+1f38 : c97f > cmp #$7f ;test result
+ > trap_ne
+1f3a : d0fe > bne * ;failed not equal (non zero)
+ >
+1f3c : 68 > pla ;load status
+1f3d : 48 > pha
+ > cmp_flag ~fn
+1f3e : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f40 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f42 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+1f43 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f45 : 48 > pha ;use stack to load status
+1f46 : a97e > lda #$7e ;precharge accu
+1f48 : 28 > plp
+
+1f49 : c517 cmp zp7f
+ tst_a $7e,~fzc
+1f4b : 08 > php ;save flags
+1f4c : c97e > cmp #$7e ;test result
+ > trap_ne
+1f4e : d0fe > bne * ;failed not equal (non zero)
+ >
+1f50 : 68 > pla ;load status
+1f51 : 48 > pha
+ > cmp_flag ~fzc
+1f52 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f54 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f56 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+1f57 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f59 : 48 > pha ;use stack to load status
+1f5a : a980 > lda #$80 ;precharge accu
+1f5c : 28 > plp
+
+1f5d : cd1b02 cmp abs7f
+ tst_a $80,fc
+1f60 : 08 > php ;save flags
+1f61 : c980 > cmp #$80 ;test result
+ > trap_ne
+1f63 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f65 : 68 > pla ;load status
+1f66 : 48 > pha
+ > cmp_flag fc
+1f67 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f69 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f6b : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+1f6c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f6e : 48 > pha ;use stack to load status
+1f6f : a97f > lda #$7f ;precharge accu
+1f71 : 28 > plp
+
+1f72 : cd1b02 cmp abs7f
+ tst_a $7f,fzc
+1f75 : 08 > php ;save flags
+1f76 : c97f > cmp #$7f ;test result
+ > trap_ne
+1f78 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f7a : 68 > pla ;load status
+1f7b : 48 > pha
+ > cmp_flag fzc
+1f7c : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f7e : d0fe > bne * ;failed not equal (non zero)
+ >
+1f80 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+1f81 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f83 : 48 > pha ;use stack to load status
+1f84 : a97e > lda #$7e ;precharge accu
+1f86 : 28 > plp
+
+1f87 : cd1b02 cmp abs7f
+ tst_a $7e,fn
+1f8a : 08 > php ;save flags
+1f8b : c97e > cmp #$7e ;test result
+ > trap_ne
+1f8d : d0fe > bne * ;failed not equal (non zero)
+ >
+1f8f : 68 > pla ;load status
+1f90 : 48 > pha
+ > cmp_flag fn
+1f91 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f93 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f95 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+1f96 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f98 : 48 > pha ;use stack to load status
+1f99 : a980 > lda #$80 ;precharge accu
+1f9b : 28 > plp
+
+1f9c : cd1b02 cmp abs7f
+ tst_a $80,~fnz
+1f9f : 08 > php ;save flags
+1fa0 : c980 > cmp #$80 ;test result
+ > trap_ne
+1fa2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fa4 : 68 > pla ;load status
+1fa5 : 48 > pha
+ > cmp_flag ~fnz
+1fa6 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fa8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1faa : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+1fab : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1fad : 48 > pha ;use stack to load status
+1fae : a97f > lda #$7f ;precharge accu
+1fb0 : 28 > plp
+
+1fb1 : cd1b02 cmp abs7f
+ tst_a $7f,~fn
+1fb4 : 08 > php ;save flags
+1fb5 : c97f > cmp #$7f ;test result
+ > trap_ne
+1fb7 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fb9 : 68 > pla ;load status
+1fba : 48 > pha
+ > cmp_flag ~fn
+1fbb : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fbd : d0fe > bne * ;failed not equal (non zero)
+ >
+1fbf : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+1fc0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1fc2 : 48 > pha ;use stack to load status
+1fc3 : a97e > lda #$7e ;precharge accu
+1fc5 : 28 > plp
+
+1fc6 : cd1b02 cmp abs7f
+ tst_a $7e,~fzc
+1fc9 : 08 > php ;save flags
+1fca : c97e > cmp #$7e ;test result
+ > trap_ne
+1fcc : d0fe > bne * ;failed not equal (non zero)
+ >
+1fce : 68 > pla ;load status
+1fcf : 48 > pha
+ > cmp_flag ~fzc
+1fd0 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fd2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fd4 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+1fd5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fd7 : 48 > pha ;use stack to load status
+1fd8 : a980 > lda #$80 ;precharge accu
+1fda : 28 > plp
+
+1fdb : c97f cmp #$7f
+ tst_a $80,fc
+1fdd : 08 > php ;save flags
+1fde : c980 > cmp #$80 ;test result
+ > trap_ne
+1fe0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fe2 : 68 > pla ;load status
+1fe3 : 48 > pha
+ > cmp_flag fc
+1fe4 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fe6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fe8 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+1fe9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1feb : 48 > pha ;use stack to load status
+1fec : a97f > lda #$7f ;precharge accu
+1fee : 28 > plp
+
+1fef : c97f cmp #$7f
+ tst_a $7f,fzc
+1ff1 : 08 > php ;save flags
+1ff2 : c97f > cmp #$7f ;test result
+ > trap_ne
+1ff4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ff6 : 68 > pla ;load status
+1ff7 : 48 > pha
+ > cmp_flag fzc
+1ff8 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ffa : d0fe > bne * ;failed not equal (non zero)
+ >
+1ffc : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+1ffd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fff : 48 > pha ;use stack to load status
+2000 : a97e > lda #$7e ;precharge accu
+2002 : 28 > plp
+
+2003 : c97f cmp #$7f
+ tst_a $7e,fn
+2005 : 08 > php ;save flags
+2006 : c97e > cmp #$7e ;test result
+ > trap_ne
+2008 : d0fe > bne * ;failed not equal (non zero)
+ >
+200a : 68 > pla ;load status
+200b : 48 > pha
+ > cmp_flag fn
+200c : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+200e : d0fe > bne * ;failed not equal (non zero)
+ >
+2010 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2011 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2013 : 48 > pha ;use stack to load status
+2014 : a980 > lda #$80 ;precharge accu
+2016 : 28 > plp
+
+2017 : c97f cmp #$7f
+ tst_a $80,~fnz
+2019 : 08 > php ;save flags
+201a : c980 > cmp #$80 ;test result
+ > trap_ne
+201c : d0fe > bne * ;failed not equal (non zero)
+ >
+201e : 68 > pla ;load status
+201f : 48 > pha
+ > cmp_flag ~fnz
+2020 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2022 : d0fe > bne * ;failed not equal (non zero)
+ >
+2024 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+2025 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2027 : 48 > pha ;use stack to load status
+2028 : a97f > lda #$7f ;precharge accu
+202a : 28 > plp
+
+202b : c97f cmp #$7f
+ tst_a $7f,~fn
+202d : 08 > php ;save flags
+202e : c97f > cmp #$7f ;test result
+ > trap_ne
+2030 : d0fe > bne * ;failed not equal (non zero)
+ >
+2032 : 68 > pla ;load status
+2033 : 48 > pha
+ > cmp_flag ~fn
+2034 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2036 : d0fe > bne * ;failed not equal (non zero)
+ >
+2038 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2039 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+203b : 48 > pha ;use stack to load status
+203c : a97e > lda #$7e ;precharge accu
+203e : 28 > plp
+
+203f : c97f cmp #$7f
+ tst_a $7e,~fzc
+2041 : 08 > php ;save flags
+2042 : c97e > cmp #$7e ;test result
+ > trap_ne
+2044 : d0fe > bne * ;failed not equal (non zero)
+ >
+2046 : 68 > pla ;load status
+2047 : 48 > pha
+ > cmp_flag ~fzc
+2048 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+204a : d0fe > bne * ;failed not equal (non zero)
+ >
+204c : 28 > plp ;restore status
+
+
+204d : a204 ldx #4 ;with indexing by X
+ set_a $80,0
+ > load_flag 0
+204f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2051 : 48 > pha ;use stack to load status
+2052 : a980 > lda #$80 ;precharge accu
+2054 : 28 > plp
+
+2055 : d513 cmp zp1,x
+ tst_a $80,fc
+2057 : 08 > php ;save flags
+2058 : c980 > cmp #$80 ;test result
+ > trap_ne
+205a : d0fe > bne * ;failed not equal (non zero)
+ >
+205c : 68 > pla ;load status
+205d : 48 > pha
+ > cmp_flag fc
+205e : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2060 : d0fe > bne * ;failed not equal (non zero)
+ >
+2062 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+2063 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2065 : 48 > pha ;use stack to load status
+2066 : a97f > lda #$7f ;precharge accu
+2068 : 28 > plp
+
+2069 : d513 cmp zp1,x
+ tst_a $7f,fzc
+206b : 08 > php ;save flags
+206c : c97f > cmp #$7f ;test result
+ > trap_ne
+206e : d0fe > bne * ;failed not equal (non zero)
+ >
+2070 : 68 > pla ;load status
+2071 : 48 > pha
+ > cmp_flag fzc
+2072 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2074 : d0fe > bne * ;failed not equal (non zero)
+ >
+2076 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2077 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2079 : 48 > pha ;use stack to load status
+207a : a97e > lda #$7e ;precharge accu
+207c : 28 > plp
+
+207d : d513 cmp zp1,x
+ tst_a $7e,fn
+207f : 08 > php ;save flags
+2080 : c97e > cmp #$7e ;test result
+ > trap_ne
+2082 : d0fe > bne * ;failed not equal (non zero)
+ >
+2084 : 68 > pla ;load status
+2085 : 48 > pha
+ > cmp_flag fn
+2086 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2088 : d0fe > bne * ;failed not equal (non zero)
+ >
+208a : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+208b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+208d : 48 > pha ;use stack to load status
+208e : a980 > lda #$80 ;precharge accu
+2090 : 28 > plp
+
+2091 : d513 cmp zp1,x
+ tst_a $80,~fnz
+2093 : 08 > php ;save flags
+2094 : c980 > cmp #$80 ;test result
+ > trap_ne
+2096 : d0fe > bne * ;failed not equal (non zero)
+ >
+2098 : 68 > pla ;load status
+2099 : 48 > pha
+ > cmp_flag ~fnz
+209a : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+209c : d0fe > bne * ;failed not equal (non zero)
+ >
+209e : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+209f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+20a1 : 48 > pha ;use stack to load status
+20a2 : a97f > lda #$7f ;precharge accu
+20a4 : 28 > plp
+
+20a5 : d513 cmp zp1,x
+ tst_a $7f,~fn
+20a7 : 08 > php ;save flags
+20a8 : c97f > cmp #$7f ;test result
+ > trap_ne
+20aa : d0fe > bne * ;failed not equal (non zero)
+ >
+20ac : 68 > pla ;load status
+20ad : 48 > pha
+ > cmp_flag ~fn
+20ae : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20b0 : d0fe > bne * ;failed not equal (non zero)
+ >
+20b2 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+20b3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+20b5 : 48 > pha ;use stack to load status
+20b6 : a97e > lda #$7e ;precharge accu
+20b8 : 28 > plp
+
+20b9 : d513 cmp zp1,x
+ tst_a $7e,~fzc
+20bb : 08 > php ;save flags
+20bc : c97e > cmp #$7e ;test result
+ > trap_ne
+20be : d0fe > bne * ;failed not equal (non zero)
+ >
+20c0 : 68 > pla ;load status
+20c1 : 48 > pha
+ > cmp_flag ~fzc
+20c2 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20c4 : d0fe > bne * ;failed not equal (non zero)
+ >
+20c6 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+20c7 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+20c9 : 48 > pha ;use stack to load status
+20ca : a980 > lda #$80 ;precharge accu
+20cc : 28 > plp
+
+20cd : dd1702 cmp abs1,x
+ tst_a $80,fc
+20d0 : 08 > php ;save flags
+20d1 : c980 > cmp #$80 ;test result
+ > trap_ne
+20d3 : d0fe > bne * ;failed not equal (non zero)
+ >
+20d5 : 68 > pla ;load status
+20d6 : 48 > pha
+ > cmp_flag fc
+20d7 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20d9 : d0fe > bne * ;failed not equal (non zero)
+ >
+20db : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+20dc : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+20de : 48 > pha ;use stack to load status
+20df : a97f > lda #$7f ;precharge accu
+20e1 : 28 > plp
+
+20e2 : dd1702 cmp abs1,x
+ tst_a $7f,fzc
+20e5 : 08 > php ;save flags
+20e6 : c97f > cmp #$7f ;test result
+ > trap_ne
+20e8 : d0fe > bne * ;failed not equal (non zero)
+ >
+20ea : 68 > pla ;load status
+20eb : 48 > pha
+ > cmp_flag fzc
+20ec : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20ee : d0fe > bne * ;failed not equal (non zero)
+ >
+20f0 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+20f1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+20f3 : 48 > pha ;use stack to load status
+20f4 : a97e > lda #$7e ;precharge accu
+20f6 : 28 > plp
+
+20f7 : dd1702 cmp abs1,x
+ tst_a $7e,fn
+20fa : 08 > php ;save flags
+20fb : c97e > cmp #$7e ;test result
+ > trap_ne
+20fd : d0fe > bne * ;failed not equal (non zero)
+ >
+20ff : 68 > pla ;load status
+2100 : 48 > pha
+ > cmp_flag fn
+2101 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2103 : d0fe > bne * ;failed not equal (non zero)
+ >
+2105 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2106 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2108 : 48 > pha ;use stack to load status
+2109 : a980 > lda #$80 ;precharge accu
+210b : 28 > plp
+
+210c : dd1702 cmp abs1,x
+ tst_a $80,~fnz
+210f : 08 > php ;save flags
+2110 : c980 > cmp #$80 ;test result
+ > trap_ne
+2112 : d0fe > bne * ;failed not equal (non zero)
+ >
+2114 : 68 > pla ;load status
+2115 : 48 > pha
+ > cmp_flag ~fnz
+2116 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2118 : d0fe > bne * ;failed not equal (non zero)
+ >
+211a : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+211b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+211d : 48 > pha ;use stack to load status
+211e : a97f > lda #$7f ;precharge accu
+2120 : 28 > plp
+
+2121 : dd1702 cmp abs1,x
+ tst_a $7f,~fn
+2124 : 08 > php ;save flags
+2125 : c97f > cmp #$7f ;test result
+ > trap_ne
+2127 : d0fe > bne * ;failed not equal (non zero)
+ >
+2129 : 68 > pla ;load status
+212a : 48 > pha
+ > cmp_flag ~fn
+212b : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+212d : d0fe > bne * ;failed not equal (non zero)
+ >
+212f : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2130 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2132 : 48 > pha ;use stack to load status
+2133 : a97e > lda #$7e ;precharge accu
+2135 : 28 > plp
+
+2136 : dd1702 cmp abs1,x
+ tst_a $7e,~fzc
+2139 : 08 > php ;save flags
+213a : c97e > cmp #$7e ;test result
+ > trap_ne
+213c : d0fe > bne * ;failed not equal (non zero)
+ >
+213e : 68 > pla ;load status
+213f : 48 > pha
+ > cmp_flag ~fzc
+2140 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2142 : d0fe > bne * ;failed not equal (non zero)
+ >
+2144 : 28 > plp ;restore status
+
+
+2145 : a004 ldy #4 ;with indexing by Y
+2147 : a208 ldx #8 ;with indexed indirect
+ set_a $80,0
+ > load_flag 0
+2149 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+214b : 48 > pha ;use stack to load status
+214c : a980 > lda #$80 ;precharge accu
+214e : 28 > plp
+
+214f : d91702 cmp abs1,y
+ tst_a $80,fc
+2152 : 08 > php ;save flags
+2153 : c980 > cmp #$80 ;test result
+ > trap_ne
+2155 : d0fe > bne * ;failed not equal (non zero)
+ >
+2157 : 68 > pla ;load status
+2158 : 48 > pha
+ > cmp_flag fc
+2159 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+215b : d0fe > bne * ;failed not equal (non zero)
+ >
+215d : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+215e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2160 : 48 > pha ;use stack to load status
+2161 : a97f > lda #$7f ;precharge accu
+2163 : 28 > plp
+
+2164 : d91702 cmp abs1,y
+ tst_a $7f,fzc
+2167 : 08 > php ;save flags
+2168 : c97f > cmp #$7f ;test result
+ > trap_ne
+216a : d0fe > bne * ;failed not equal (non zero)
+ >
+216c : 68 > pla ;load status
+216d : 48 > pha
+ > cmp_flag fzc
+216e : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2170 : d0fe > bne * ;failed not equal (non zero)
+ >
+2172 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2173 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2175 : 48 > pha ;use stack to load status
+2176 : a97e > lda #$7e ;precharge accu
+2178 : 28 > plp
+
+2179 : d91702 cmp abs1,y
+ tst_a $7e,fn
+217c : 08 > php ;save flags
+217d : c97e > cmp #$7e ;test result
+ > trap_ne
+217f : d0fe > bne * ;failed not equal (non zero)
+ >
+2181 : 68 > pla ;load status
+2182 : 48 > pha
+ > cmp_flag fn
+2183 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2185 : d0fe > bne * ;failed not equal (non zero)
+ >
+2187 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2188 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+218a : 48 > pha ;use stack to load status
+218b : a980 > lda #$80 ;precharge accu
+218d : 28 > plp
+
+218e : d91702 cmp abs1,y
+ tst_a $80,~fnz
+2191 : 08 > php ;save flags
+2192 : c980 > cmp #$80 ;test result
+ > trap_ne
+2194 : d0fe > bne * ;failed not equal (non zero)
+ >
+2196 : 68 > pla ;load status
+2197 : 48 > pha
+ > cmp_flag ~fnz
+2198 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+219a : d0fe > bne * ;failed not equal (non zero)
+ >
+219c : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+219d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+219f : 48 > pha ;use stack to load status
+21a0 : a97f > lda #$7f ;precharge accu
+21a2 : 28 > plp
+
+21a3 : d91702 cmp abs1,y
+ tst_a $7f,~fn
+21a6 : 08 > php ;save flags
+21a7 : c97f > cmp #$7f ;test result
+ > trap_ne
+21a9 : d0fe > bne * ;failed not equal (non zero)
+ >
+21ab : 68 > pla ;load status
+21ac : 48 > pha
+ > cmp_flag ~fn
+21ad : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21af : d0fe > bne * ;failed not equal (non zero)
+ >
+21b1 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+21b2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+21b4 : 48 > pha ;use stack to load status
+21b5 : a97e > lda #$7e ;precharge accu
+21b7 : 28 > plp
+
+21b8 : d91702 cmp abs1,y
+ tst_a $7e,~fzc
+21bb : 08 > php ;save flags
+21bc : c97e > cmp #$7e ;test result
+ > trap_ne
+21be : d0fe > bne * ;failed not equal (non zero)
+ >
+21c0 : 68 > pla ;load status
+21c1 : 48 > pha
+ > cmp_flag ~fzc
+21c2 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21c4 : d0fe > bne * ;failed not equal (non zero)
+ >
+21c6 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+21c7 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21c9 : 48 > pha ;use stack to load status
+21ca : a980 > lda #$80 ;precharge accu
+21cc : 28 > plp
+
+21cd : c124 cmp (ind1,x)
+ tst_a $80,fc
+21cf : 08 > php ;save flags
+21d0 : c980 > cmp #$80 ;test result
+ > trap_ne
+21d2 : d0fe > bne * ;failed not equal (non zero)
+ >
+21d4 : 68 > pla ;load status
+21d5 : 48 > pha
+ > cmp_flag fc
+21d6 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+21da : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+21db : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21dd : 48 > pha ;use stack to load status
+21de : a97f > lda #$7f ;precharge accu
+21e0 : 28 > plp
+
+21e1 : c124 cmp (ind1,x)
+ tst_a $7f,fzc
+21e3 : 08 > php ;save flags
+21e4 : c97f > cmp #$7f ;test result
+ > trap_ne
+21e6 : d0fe > bne * ;failed not equal (non zero)
+ >
+21e8 : 68 > pla ;load status
+21e9 : 48 > pha
+ > cmp_flag fzc
+21ea : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21ec : d0fe > bne * ;failed not equal (non zero)
+ >
+21ee : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+21ef : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21f1 : 48 > pha ;use stack to load status
+21f2 : a97e > lda #$7e ;precharge accu
+21f4 : 28 > plp
+
+21f5 : c124 cmp (ind1,x)
+ tst_a $7e,fn
+21f7 : 08 > php ;save flags
+21f8 : c97e > cmp #$7e ;test result
+ > trap_ne
+21fa : d0fe > bne * ;failed not equal (non zero)
+ >
+21fc : 68 > pla ;load status
+21fd : 48 > pha
+ > cmp_flag fn
+21fe : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2200 : d0fe > bne * ;failed not equal (non zero)
+ >
+2202 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2203 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2205 : 48 > pha ;use stack to load status
+2206 : a980 > lda #$80 ;precharge accu
+2208 : 28 > plp
+
+2209 : c124 cmp (ind1,x)
+ tst_a $80,~fnz
+220b : 08 > php ;save flags
+220c : c980 > cmp #$80 ;test result
+ > trap_ne
+220e : d0fe > bne * ;failed not equal (non zero)
+ >
+2210 : 68 > pla ;load status
+2211 : 48 > pha
+ > cmp_flag ~fnz
+2212 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2214 : d0fe > bne * ;failed not equal (non zero)
+ >
+2216 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+2217 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2219 : 48 > pha ;use stack to load status
+221a : a97f > lda #$7f ;precharge accu
+221c : 28 > plp
+
+221d : c124 cmp (ind1,x)
+ tst_a $7f,~fn
+221f : 08 > php ;save flags
+2220 : c97f > cmp #$7f ;test result
+ > trap_ne
+2222 : d0fe > bne * ;failed not equal (non zero)
+ >
+2224 : 68 > pla ;load status
+2225 : 48 > pha
+ > cmp_flag ~fn
+2226 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2228 : d0fe > bne * ;failed not equal (non zero)
+ >
+222a : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+222b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+222d : 48 > pha ;use stack to load status
+222e : a97e > lda #$7e ;precharge accu
+2230 : 28 > plp
+
+2231 : c124 cmp (ind1,x)
+ tst_a $7e,~fzc
+2233 : 08 > php ;save flags
+2234 : c97e > cmp #$7e ;test result
+ > trap_ne
+2236 : d0fe > bne * ;failed not equal (non zero)
+ >
+2238 : 68 > pla ;load status
+2239 : 48 > pha
+ > cmp_flag ~fzc
+223a : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+223c : d0fe > bne * ;failed not equal (non zero)
+ >
+223e : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+223f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2241 : 48 > pha ;use stack to load status
+2242 : a980 > lda #$80 ;precharge accu
+2244 : 28 > plp
+
+2245 : d124 cmp (ind1),y
+ tst_a $80,fc
+2247 : 08 > php ;save flags
+2248 : c980 > cmp #$80 ;test result
+ > trap_ne
+224a : d0fe > bne * ;failed not equal (non zero)
+ >
+224c : 68 > pla ;load status
+224d : 48 > pha
+ > cmp_flag fc
+224e : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2250 : d0fe > bne * ;failed not equal (non zero)
+ >
+2252 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+2253 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2255 : 48 > pha ;use stack to load status
+2256 : a97f > lda #$7f ;precharge accu
+2258 : 28 > plp
+
+2259 : d124 cmp (ind1),y
+ tst_a $7f,fzc
+225b : 08 > php ;save flags
+225c : c97f > cmp #$7f ;test result
+ > trap_ne
+225e : d0fe > bne * ;failed not equal (non zero)
+ >
+2260 : 68 > pla ;load status
+2261 : 48 > pha
+ > cmp_flag fzc
+2262 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2264 : d0fe > bne * ;failed not equal (non zero)
+ >
+2266 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2267 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2269 : 48 > pha ;use stack to load status
+226a : a97e > lda #$7e ;precharge accu
+226c : 28 > plp
+
+226d : d124 cmp (ind1),y
+ tst_a $7e,fn
+226f : 08 > php ;save flags
+2270 : c97e > cmp #$7e ;test result
+ > trap_ne
+2272 : d0fe > bne * ;failed not equal (non zero)
+ >
+2274 : 68 > pla ;load status
+2275 : 48 > pha
+ > cmp_flag fn
+2276 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2278 : d0fe > bne * ;failed not equal (non zero)
+ >
+227a : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+227b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+227d : 48 > pha ;use stack to load status
+227e : a980 > lda #$80 ;precharge accu
+2280 : 28 > plp
+
+2281 : d124 cmp (ind1),y
+ tst_a $80,~fnz
+2283 : 08 > php ;save flags
+2284 : c980 > cmp #$80 ;test result
+ > trap_ne
+2286 : d0fe > bne * ;failed not equal (non zero)
+ >
+2288 : 68 > pla ;load status
+2289 : 48 > pha
+ > cmp_flag ~fnz
+228a : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+228c : d0fe > bne * ;failed not equal (non zero)
+ >
+228e : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+228f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2291 : 48 > pha ;use stack to load status
+2292 : a97f > lda #$7f ;precharge accu
+2294 : 28 > plp
+
+2295 : d124 cmp (ind1),y
+ tst_a $7f,~fn
+2297 : 08 > php ;save flags
+2298 : c97f > cmp #$7f ;test result
+ > trap_ne
+229a : d0fe > bne * ;failed not equal (non zero)
+ >
+229c : 68 > pla ;load status
+229d : 48 > pha
+ > cmp_flag ~fn
+229e : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22a0 : d0fe > bne * ;failed not equal (non zero)
+ >
+22a2 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+22a3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+22a5 : 48 > pha ;use stack to load status
+22a6 : a97e > lda #$7e ;precharge accu
+22a8 : 28 > plp
+
+22a9 : d124 cmp (ind1),y
+ tst_a $7e,~fzc
+22ab : 08 > php ;save flags
+22ac : c97e > cmp #$7e ;test result
+ > trap_ne
+22ae : d0fe > bne * ;failed not equal (non zero)
+ >
+22b0 : 68 > pla ;load status
+22b1 : 48 > pha
+ > cmp_flag ~fzc
+22b2 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22b4 : d0fe > bne * ;failed not equal (non zero)
+ >
+22b6 : 28 > plp ;restore status
+
+ next_test
+22b7 : ad0002 > lda test_case ;previous test
+22ba : c91c > cmp #test_num
+ > trap_ne ;test is out of sequence
+22bc : d0fe > bne * ;failed not equal (non zero)
+ >
+001d = >test_num = test_num + 1
+22be : a91d > lda #test_num ;*** next tests' number
+22c0 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing shifts - ASL LSR ROL ROR all addressing modes
+ ; shifts - accumulator
+22c3 : a203 ldx #3
+22c5 : tasl
+ set_ax zp1,0
+ > load_flag 0
+22c5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+22c7 : 48 > pha ;use stack to load status
+22c8 : b513 > lda zp1,x ;precharge accu
+22ca : 28 > plp
+
+22cb : 0a asl a
+ tst_ax rASL,fASL,0
+22cc : 08 > php ;save flags
+22cd : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+22d0 : d0fe > bne * ;failed not equal (non zero)
+ >
+22d2 : 68 > pla ;load status
+ > eor_flag 0
+22d3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+22d5 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne ;
+22d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+22da : ca dex
+22db : 10e8 bpl tasl
+22dd : a203 ldx #3
+22df : tasl1
+ set_ax zp1,$ff
+ > load_flag $ff
+22df : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+22e1 : 48 > pha ;use stack to load status
+22e2 : b513 > lda zp1,x ;precharge accu
+22e4 : 28 > plp
+
+22e5 : 0a asl a
+ tst_ax rASL,fASL,$ff-fnzc
+22e6 : 08 > php ;save flags
+22e7 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+22ea : d0fe > bne * ;failed not equal (non zero)
+ >
+22ec : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+22ed : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+22ef : dd3002 > cmp fASL,x ;test flags
+ > trap_ne ;
+22f2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+22f4 : ca dex
+22f5 : 10e8 bpl tasl1
+
+22f7 : a203 ldx #3
+22f9 : tlsr
+ set_ax zp1,0
+ > load_flag 0
+22f9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+22fb : 48 > pha ;use stack to load status
+22fc : b513 > lda zp1,x ;precharge accu
+22fe : 28 > plp
+
+22ff : 4a lsr a
+ tst_ax rLSR,fLSR,0
+2300 : 08 > php ;save flags
+2301 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2304 : d0fe > bne * ;failed not equal (non zero)
+ >
+2306 : 68 > pla ;load status
+ > eor_flag 0
+2307 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2309 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne ;
+230c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+230e : ca dex
+230f : 10e8 bpl tlsr
+2311 : a203 ldx #3
+2313 : tlsr1
+ set_ax zp1,$ff
+ > load_flag $ff
+2313 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2315 : 48 > pha ;use stack to load status
+2316 : b513 > lda zp1,x ;precharge accu
+2318 : 28 > plp
+
+2319 : 4a lsr a
+ tst_ax rLSR,fLSR,$ff-fnzc
+231a : 08 > php ;save flags
+231b : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+231e : d0fe > bne * ;failed not equal (non zero)
+ >
+2320 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2321 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2323 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne ;
+2326 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2328 : ca dex
+2329 : 10e8 bpl tlsr1
+
+232b : a203 ldx #3
+232d : trol
+ set_ax zp1,0
+ > load_flag 0
+232d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+232f : 48 > pha ;use stack to load status
+2330 : b513 > lda zp1,x ;precharge accu
+2332 : 28 > plp
+
+2333 : 2a rol a
+ tst_ax rROL,fROL,0
+2334 : 08 > php ;save flags
+2335 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2338 : d0fe > bne * ;failed not equal (non zero)
+ >
+233a : 68 > pla ;load status
+ > eor_flag 0
+233b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+233d : dd3002 > cmp fROL,x ;test flags
+ > trap_ne ;
+2340 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2342 : ca dex
+2343 : 10e8 bpl trol
+2345 : a203 ldx #3
+2347 : trol1
+ set_ax zp1,$ff-fc
+ > load_flag $ff-fc
+2347 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2349 : 48 > pha ;use stack to load status
+234a : b513 > lda zp1,x ;precharge accu
+234c : 28 > plp
+
+234d : 2a rol a
+ tst_ax rROL,fROL,$ff-fnzc
+234e : 08 > php ;save flags
+234f : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2352 : d0fe > bne * ;failed not equal (non zero)
+ >
+2354 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2355 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2357 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne ;
+235a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+235c : ca dex
+235d : 10e8 bpl trol1
+
+235f : a203 ldx #3
+2361 : trolc
+ set_ax zp1,fc
+ > load_flag fc
+2361 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2363 : 48 > pha ;use stack to load status
+2364 : b513 > lda zp1,x ;precharge accu
+2366 : 28 > plp
+
+2367 : 2a rol a
+ tst_ax rROLc,fROLc,0
+2368 : 08 > php ;save flags
+2369 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+236c : d0fe > bne * ;failed not equal (non zero)
+ >
+236e : 68 > pla ;load status
+ > eor_flag 0
+236f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2371 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne ;
+2374 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2376 : ca dex
+2377 : 10e8 bpl trolc
+2379 : a203 ldx #3
+237b : trolc1
+ set_ax zp1,$ff
+ > load_flag $ff
+237b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+237d : 48 > pha ;use stack to load status
+237e : b513 > lda zp1,x ;precharge accu
+2380 : 28 > plp
+
+2381 : 2a rol a
+ tst_ax rROLc,fROLc,$ff-fnzc
+2382 : 08 > php ;save flags
+2383 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2386 : d0fe > bne * ;failed not equal (non zero)
+ >
+2388 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2389 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+238b : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne ;
+238e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2390 : ca dex
+2391 : 10e8 bpl trolc1
+
+2393 : a203 ldx #3
+2395 : tror
+ set_ax zp1,0
+ > load_flag 0
+2395 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2397 : 48 > pha ;use stack to load status
+2398 : b513 > lda zp1,x ;precharge accu
+239a : 28 > plp
+
+239b : 6a ror a
+ tst_ax rROR,fROR,0
+239c : 08 > php ;save flags
+239d : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+23a0 : d0fe > bne * ;failed not equal (non zero)
+ >
+23a2 : 68 > pla ;load status
+ > eor_flag 0
+23a3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+23a5 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne ;
+23a8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+23aa : ca dex
+23ab : 10e8 bpl tror
+23ad : a203 ldx #3
+23af : tror1
+ set_ax zp1,$ff-fc
+ > load_flag $ff-fc
+23af : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+23b1 : 48 > pha ;use stack to load status
+23b2 : b513 > lda zp1,x ;precharge accu
+23b4 : 28 > plp
+
+23b5 : 6a ror a
+ tst_ax rROR,fROR,$ff-fnzc
+23b6 : 08 > php ;save flags
+23b7 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+23ba : d0fe > bne * ;failed not equal (non zero)
+ >
+23bc : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+23bd : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+23bf : dd3802 > cmp fROR,x ;test flags
+ > trap_ne ;
+23c2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+23c4 : ca dex
+23c5 : 10e8 bpl tror1
+
+23c7 : a203 ldx #3
+23c9 : trorc
+ set_ax zp1,fc
+ > load_flag fc
+23c9 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+23cb : 48 > pha ;use stack to load status
+23cc : b513 > lda zp1,x ;precharge accu
+23ce : 28 > plp
+
+23cf : 6a ror a
+ tst_ax rRORc,fRORc,0
+23d0 : 08 > php ;save flags
+23d1 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+23d4 : d0fe > bne * ;failed not equal (non zero)
+ >
+23d6 : 68 > pla ;load status
+ > eor_flag 0
+23d7 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+23d9 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne ;
+23dc : d0fe > bne * ;failed not equal (non zero)
+ >
+
+23de : ca dex
+23df : 10e8 bpl trorc
+23e1 : a203 ldx #3
+23e3 : trorc1
+ set_ax zp1,$ff
+ > load_flag $ff
+23e3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+23e5 : 48 > pha ;use stack to load status
+23e6 : b513 > lda zp1,x ;precharge accu
+23e8 : 28 > plp
+
+23e9 : 6a ror a
+ tst_ax rRORc,fRORc,$ff-fnzc
+23ea : 08 > php ;save flags
+23eb : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+23ee : d0fe > bne * ;failed not equal (non zero)
+ >
+23f0 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+23f1 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+23f3 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne ;
+23f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+23f8 : ca dex
+23f9 : 10e8 bpl trorc1
+ next_test
+23fb : ad0002 > lda test_case ;previous test
+23fe : c91d > cmp #test_num
+ > trap_ne ;test is out of sequence
+2400 : d0fe > bne * ;failed not equal (non zero)
+ >
+001e = >test_num = test_num + 1
+2402 : a91e > lda #test_num ;*** next tests' number
+2404 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - zeropage
+2407 : a203 ldx #3
+2409 : tasl2
+ set_z zp1,0
+ > load_flag 0
+2409 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+240b : 48 > pha ;use stack to load status
+240c : b513 > lda zp1,x ;load to zeropage
+240e : 850c > sta zpt
+2410 : 28 > plp
+
+2411 : 060c asl zpt
+ tst_z rASL,fASL,0
+2413 : 08 > php ;save flags
+2414 : a50c > lda zpt
+2416 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2419 : d0fe > bne * ;failed not equal (non zero)
+ >
+241b : 68 > pla ;load status
+ > eor_flag 0
+241c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+241e : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2421 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2423 : ca dex
+2424 : 10e3 bpl tasl2
+2426 : a203 ldx #3
+2428 : tasl3
+ set_z zp1,$ff
+ > load_flag $ff
+2428 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+242a : 48 > pha ;use stack to load status
+242b : b513 > lda zp1,x ;load to zeropage
+242d : 850c > sta zpt
+242f : 28 > plp
+
+2430 : 060c asl zpt
+ tst_z rASL,fASL,$ff-fnzc
+2432 : 08 > php ;save flags
+2433 : a50c > lda zpt
+2435 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2438 : d0fe > bne * ;failed not equal (non zero)
+ >
+243a : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+243b : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+243d : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2440 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2442 : ca dex
+2443 : 10e3 bpl tasl3
+
+2445 : a203 ldx #3
+2447 : tlsr2
+ set_z zp1,0
+ > load_flag 0
+2447 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2449 : 48 > pha ;use stack to load status
+244a : b513 > lda zp1,x ;load to zeropage
+244c : 850c > sta zpt
+244e : 28 > plp
+
+244f : 460c lsr zpt
+ tst_z rLSR,fLSR,0
+2451 : 08 > php ;save flags
+2452 : a50c > lda zpt
+2454 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2457 : d0fe > bne * ;failed not equal (non zero)
+ >
+2459 : 68 > pla ;load status
+ > eor_flag 0
+245a : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+245c : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+245f : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2461 : ca dex
+2462 : 10e3 bpl tlsr2
+2464 : a203 ldx #3
+2466 : tlsr3
+ set_z zp1,$ff
+ > load_flag $ff
+2466 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2468 : 48 > pha ;use stack to load status
+2469 : b513 > lda zp1,x ;load to zeropage
+246b : 850c > sta zpt
+246d : 28 > plp
+
+246e : 460c lsr zpt
+ tst_z rLSR,fLSR,$ff-fnzc
+2470 : 08 > php ;save flags
+2471 : a50c > lda zpt
+2473 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2476 : d0fe > bne * ;failed not equal (non zero)
+ >
+2478 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2479 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+247b : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+247e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2480 : ca dex
+2481 : 10e3 bpl tlsr3
+
+2483 : a203 ldx #3
+2485 : trol2
+ set_z zp1,0
+ > load_flag 0
+2485 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2487 : 48 > pha ;use stack to load status
+2488 : b513 > lda zp1,x ;load to zeropage
+248a : 850c > sta zpt
+248c : 28 > plp
+
+248d : 260c rol zpt
+ tst_z rROL,fROL,0
+248f : 08 > php ;save flags
+2490 : a50c > lda zpt
+2492 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2495 : d0fe > bne * ;failed not equal (non zero)
+ >
+2497 : 68 > pla ;load status
+ > eor_flag 0
+2498 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+249a : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+249d : d0fe > bne * ;failed not equal (non zero)
+ >
+
+249f : ca dex
+24a0 : 10e3 bpl trol2
+24a2 : a203 ldx #3
+24a4 : trol3
+ set_z zp1,$ff-fc
+ > load_flag $ff-fc
+24a4 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+24a6 : 48 > pha ;use stack to load status
+24a7 : b513 > lda zp1,x ;load to zeropage
+24a9 : 850c > sta zpt
+24ab : 28 > plp
+
+24ac : 260c rol zpt
+ tst_z rROL,fROL,$ff-fnzc
+24ae : 08 > php ;save flags
+24af : a50c > lda zpt
+24b1 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+24b4 : d0fe > bne * ;failed not equal (non zero)
+ >
+24b6 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+24b7 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+24b9 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+24bc : d0fe > bne * ;failed not equal (non zero)
+ >
+
+24be : ca dex
+24bf : 10e3 bpl trol3
+
+24c1 : a203 ldx #3
+24c3 : trolc2
+ set_z zp1,fc
+ > load_flag fc
+24c3 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+24c5 : 48 > pha ;use stack to load status
+24c6 : b513 > lda zp1,x ;load to zeropage
+24c8 : 850c > sta zpt
+24ca : 28 > plp
+
+24cb : 260c rol zpt
+ tst_z rROLc,fROLc,0
+24cd : 08 > php ;save flags
+24ce : a50c > lda zpt
+24d0 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+24d3 : d0fe > bne * ;failed not equal (non zero)
+ >
+24d5 : 68 > pla ;load status
+ > eor_flag 0
+24d6 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+24d8 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+24db : d0fe > bne * ;failed not equal (non zero)
+ >
+
+24dd : ca dex
+24de : 10e3 bpl trolc2
+24e0 : a203 ldx #3
+24e2 : trolc3
+ set_z zp1,$ff
+ > load_flag $ff
+24e2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+24e4 : 48 > pha ;use stack to load status
+24e5 : b513 > lda zp1,x ;load to zeropage
+24e7 : 850c > sta zpt
+24e9 : 28 > plp
+
+24ea : 260c rol zpt
+ tst_z rROLc,fROLc,$ff-fnzc
+24ec : 08 > php ;save flags
+24ed : a50c > lda zpt
+24ef : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+24f2 : d0fe > bne * ;failed not equal (non zero)
+ >
+24f4 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+24f5 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+24f7 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+24fa : d0fe > bne * ;failed not equal (non zero)
+ >
+
+24fc : ca dex
+24fd : 10e3 bpl trolc3
+
+24ff : a203 ldx #3
+2501 : tror2
+ set_z zp1,0
+ > load_flag 0
+2501 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2503 : 48 > pha ;use stack to load status
+2504 : b513 > lda zp1,x ;load to zeropage
+2506 : 850c > sta zpt
+2508 : 28 > plp
+
+2509 : 660c ror zpt
+ tst_z rROR,fROR,0
+250b : 08 > php ;save flags
+250c : a50c > lda zpt
+250e : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2511 : d0fe > bne * ;failed not equal (non zero)
+ >
+2513 : 68 > pla ;load status
+ > eor_flag 0
+2514 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2516 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2519 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+251b : ca dex
+251c : 10e3 bpl tror2
+251e : a203 ldx #3
+2520 : tror3
+ set_z zp1,$ff-fc
+ > load_flag $ff-fc
+2520 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2522 : 48 > pha ;use stack to load status
+2523 : b513 > lda zp1,x ;load to zeropage
+2525 : 850c > sta zpt
+2527 : 28 > plp
+
+2528 : 660c ror zpt
+ tst_z rROR,fROR,$ff-fnzc
+252a : 08 > php ;save flags
+252b : a50c > lda zpt
+252d : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2530 : d0fe > bne * ;failed not equal (non zero)
+ >
+2532 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2533 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2535 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2538 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+253a : ca dex
+253b : 10e3 bpl tror3
+
+253d : a203 ldx #3
+253f : trorc2
+ set_z zp1,fc
+ > load_flag fc
+253f : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2541 : 48 > pha ;use stack to load status
+2542 : b513 > lda zp1,x ;load to zeropage
+2544 : 850c > sta zpt
+2546 : 28 > plp
+
+2547 : 660c ror zpt
+ tst_z rRORc,fRORc,0
+2549 : 08 > php ;save flags
+254a : a50c > lda zpt
+254c : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+254f : d0fe > bne * ;failed not equal (non zero)
+ >
+2551 : 68 > pla ;load status
+ > eor_flag 0
+2552 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2554 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2557 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2559 : ca dex
+255a : 10e3 bpl trorc2
+255c : a203 ldx #3
+255e : trorc3
+ set_z zp1,$ff
+ > load_flag $ff
+255e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2560 : 48 > pha ;use stack to load status
+2561 : b513 > lda zp1,x ;load to zeropage
+2563 : 850c > sta zpt
+2565 : 28 > plp
+
+2566 : 660c ror zpt
+ tst_z rRORc,fRORc,$ff-fnzc
+2568 : 08 > php ;save flags
+2569 : a50c > lda zpt
+256b : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+256e : d0fe > bne * ;failed not equal (non zero)
+ >
+2570 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2571 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2573 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2576 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2578 : ca dex
+2579 : 10e3 bpl trorc3
+ next_test
+257b : ad0002 > lda test_case ;previous test
+257e : c91e > cmp #test_num
+ > trap_ne ;test is out of sequence
+2580 : d0fe > bne * ;failed not equal (non zero)
+ >
+001f = >test_num = test_num + 1
+2582 : a91f > lda #test_num ;*** next tests' number
+2584 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - absolute
+2587 : a203 ldx #3
+2589 : tasl4
+ set_abs zp1,0
+ > load_flag 0
+2589 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+258b : 48 > pha ;use stack to load status
+258c : b513 > lda zp1,x ;load to memory
+258e : 8d0302 > sta abst
+2591 : 28 > plp
+
+2592 : 0e0302 asl abst
+ tst_abs rASL,fASL,0
+2595 : 08 > php ;save flags
+2596 : ad0302 > lda abst
+2599 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+259c : d0fe > bne * ;failed not equal (non zero)
+ >
+259e : 68 > pla ;load status
+ > eor_flag 0
+259f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+25a1 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+25a4 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+25a6 : ca dex
+25a7 : 10e0 bpl tasl4
+25a9 : a203 ldx #3
+25ab : tasl5
+ set_abs zp1,$ff
+ > load_flag $ff
+25ab : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+25ad : 48 > pha ;use stack to load status
+25ae : b513 > lda zp1,x ;load to memory
+25b0 : 8d0302 > sta abst
+25b3 : 28 > plp
+
+25b4 : 0e0302 asl abst
+ tst_abs rASL,fASL,$ff-fnzc
+25b7 : 08 > php ;save flags
+25b8 : ad0302 > lda abst
+25bb : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+25be : d0fe > bne * ;failed not equal (non zero)
+ >
+25c0 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+25c1 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+25c3 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+25c6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+25c8 : ca dex
+25c9 : 10e0 bpl tasl5
+
+25cb : a203 ldx #3
+25cd : tlsr4
+ set_abs zp1,0
+ > load_flag 0
+25cd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+25cf : 48 > pha ;use stack to load status
+25d0 : b513 > lda zp1,x ;load to memory
+25d2 : 8d0302 > sta abst
+25d5 : 28 > plp
+
+25d6 : 4e0302 lsr abst
+ tst_abs rLSR,fLSR,0
+25d9 : 08 > php ;save flags
+25da : ad0302 > lda abst
+25dd : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+25e0 : d0fe > bne * ;failed not equal (non zero)
+ >
+25e2 : 68 > pla ;load status
+ > eor_flag 0
+25e3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+25e5 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+25e8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+25ea : ca dex
+25eb : 10e0 bpl tlsr4
+25ed : a203 ldx #3
+25ef : tlsr5
+ set_abs zp1,$ff
+ > load_flag $ff
+25ef : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+25f1 : 48 > pha ;use stack to load status
+25f2 : b513 > lda zp1,x ;load to memory
+25f4 : 8d0302 > sta abst
+25f7 : 28 > plp
+
+25f8 : 4e0302 lsr abst
+ tst_abs rLSR,fLSR,$ff-fnzc
+25fb : 08 > php ;save flags
+25fc : ad0302 > lda abst
+25ff : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2602 : d0fe > bne * ;failed not equal (non zero)
+ >
+2604 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2605 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2607 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+260a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+260c : ca dex
+260d : 10e0 bpl tlsr5
+
+260f : a203 ldx #3
+2611 : trol4
+ set_abs zp1,0
+ > load_flag 0
+2611 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2613 : 48 > pha ;use stack to load status
+2614 : b513 > lda zp1,x ;load to memory
+2616 : 8d0302 > sta abst
+2619 : 28 > plp
+
+261a : 2e0302 rol abst
+ tst_abs rROL,fROL,0
+261d : 08 > php ;save flags
+261e : ad0302 > lda abst
+2621 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2624 : d0fe > bne * ;failed not equal (non zero)
+ >
+2626 : 68 > pla ;load status
+ > eor_flag 0
+2627 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2629 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+262c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+262e : ca dex
+262f : 10e0 bpl trol4
+2631 : a203 ldx #3
+2633 : trol5
+ set_abs zp1,$ff-fc
+ > load_flag $ff-fc
+2633 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2635 : 48 > pha ;use stack to load status
+2636 : b513 > lda zp1,x ;load to memory
+2638 : 8d0302 > sta abst
+263b : 28 > plp
+
+263c : 2e0302 rol abst
+ tst_abs rROL,fROL,$ff-fnzc
+263f : 08 > php ;save flags
+2640 : ad0302 > lda abst
+2643 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2646 : d0fe > bne * ;failed not equal (non zero)
+ >
+2648 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2649 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+264b : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+264e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2650 : ca dex
+2651 : 10e0 bpl trol5
+
+2653 : a203 ldx #3
+2655 : trolc4
+ set_abs zp1,fc
+ > load_flag fc
+2655 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2657 : 48 > pha ;use stack to load status
+2658 : b513 > lda zp1,x ;load to memory
+265a : 8d0302 > sta abst
+265d : 28 > plp
+
+265e : 2e0302 rol abst
+ tst_abs rROLc,fROLc,0
+2661 : 08 > php ;save flags
+2662 : ad0302 > lda abst
+2665 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2668 : d0fe > bne * ;failed not equal (non zero)
+ >
+266a : 68 > pla ;load status
+ > eor_flag 0
+266b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+266d : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2670 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2672 : ca dex
+2673 : 10e0 bpl trolc4
+2675 : a203 ldx #3
+2677 : trolc5
+ set_abs zp1,$ff
+ > load_flag $ff
+2677 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2679 : 48 > pha ;use stack to load status
+267a : b513 > lda zp1,x ;load to memory
+267c : 8d0302 > sta abst
+267f : 28 > plp
+
+2680 : 2e0302 rol abst
+ tst_abs rROLc,fROLc,$ff-fnzc
+2683 : 08 > php ;save flags
+2684 : ad0302 > lda abst
+2687 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+268a : d0fe > bne * ;failed not equal (non zero)
+ >
+268c : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+268d : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+268f : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2692 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2694 : ca dex
+2695 : 10e0 bpl trolc5
+
+2697 : a203 ldx #3
+2699 : tror4
+ set_abs zp1,0
+ > load_flag 0
+2699 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+269b : 48 > pha ;use stack to load status
+269c : b513 > lda zp1,x ;load to memory
+269e : 8d0302 > sta abst
+26a1 : 28 > plp
+
+26a2 : 6e0302 ror abst
+ tst_abs rROR,fROR,0
+26a5 : 08 > php ;save flags
+26a6 : ad0302 > lda abst
+26a9 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+26ac : d0fe > bne * ;failed not equal (non zero)
+ >
+26ae : 68 > pla ;load status
+ > eor_flag 0
+26af : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+26b1 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+26b4 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+26b6 : ca dex
+26b7 : 10e0 bpl tror4
+26b9 : a203 ldx #3
+26bb : tror5
+ set_abs zp1,$ff-fc
+ > load_flag $ff-fc
+26bb : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+26bd : 48 > pha ;use stack to load status
+26be : b513 > lda zp1,x ;load to memory
+26c0 : 8d0302 > sta abst
+26c3 : 28 > plp
+
+26c4 : 6e0302 ror abst
+ tst_abs rROR,fROR,$ff-fnzc
+26c7 : 08 > php ;save flags
+26c8 : ad0302 > lda abst
+26cb : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+26ce : d0fe > bne * ;failed not equal (non zero)
+ >
+26d0 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+26d1 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+26d3 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+26d6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+26d8 : ca dex
+26d9 : 10e0 bpl tror5
+
+26db : a203 ldx #3
+26dd : trorc4
+ set_abs zp1,fc
+ > load_flag fc
+26dd : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+26df : 48 > pha ;use stack to load status
+26e0 : b513 > lda zp1,x ;load to memory
+26e2 : 8d0302 > sta abst
+26e5 : 28 > plp
+
+26e6 : 6e0302 ror abst
+ tst_abs rRORc,fRORc,0
+26e9 : 08 > php ;save flags
+26ea : ad0302 > lda abst
+26ed : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+26f0 : d0fe > bne * ;failed not equal (non zero)
+ >
+26f2 : 68 > pla ;load status
+ > eor_flag 0
+26f3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+26f5 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+26f8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+26fa : ca dex
+26fb : 10e0 bpl trorc4
+26fd : a203 ldx #3
+26ff : trorc5
+ set_abs zp1,$ff
+ > load_flag $ff
+26ff : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2701 : 48 > pha ;use stack to load status
+2702 : b513 > lda zp1,x ;load to memory
+2704 : 8d0302 > sta abst
+2707 : 28 > plp
+
+2708 : 6e0302 ror abst
+ tst_abs rRORc,fRORc,$ff-fnzc
+270b : 08 > php ;save flags
+270c : ad0302 > lda abst
+270f : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2712 : d0fe > bne * ;failed not equal (non zero)
+ >
+2714 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2715 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2717 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+271a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+271c : ca dex
+271d : 10e0 bpl trorc5
+ next_test
+271f : ad0002 > lda test_case ;previous test
+2722 : c91f > cmp #test_num
+ > trap_ne ;test is out of sequence
+2724 : d0fe > bne * ;failed not equal (non zero)
+ >
+0020 = >test_num = test_num + 1
+2726 : a920 > lda #test_num ;*** next tests' number
+2728 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - zp indexed
+272b : a203 ldx #3
+272d : tasl6
+ set_zx zp1,0
+ > load_flag 0
+272d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+272f : 48 > pha ;use stack to load status
+2730 : b513 > lda zp1,x ;load to indexed zeropage
+2732 : 950c > sta zpt,x
+2734 : 28 > plp
+
+2735 : 160c asl zpt,x
+ tst_zx rASL,fASL,0
+2737 : 08 > php ;save flags
+2738 : b50c > lda zpt,x
+273a : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+273d : d0fe > bne * ;failed not equal (non zero)
+ >
+273f : 68 > pla ;load status
+ > eor_flag 0
+2740 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2742 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2745 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2747 : ca dex
+2748 : 10e3 bpl tasl6
+274a : a203 ldx #3
+274c : tasl7
+ set_zx zp1,$ff
+ > load_flag $ff
+274c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+274e : 48 > pha ;use stack to load status
+274f : b513 > lda zp1,x ;load to indexed zeropage
+2751 : 950c > sta zpt,x
+2753 : 28 > plp
+
+2754 : 160c asl zpt,x
+ tst_zx rASL,fASL,$ff-fnzc
+2756 : 08 > php ;save flags
+2757 : b50c > lda zpt,x
+2759 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+275c : d0fe > bne * ;failed not equal (non zero)
+ >
+275e : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+275f : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2761 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2764 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2766 : ca dex
+2767 : 10e3 bpl tasl7
+
+2769 : a203 ldx #3
+276b : tlsr6
+ set_zx zp1,0
+ > load_flag 0
+276b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+276d : 48 > pha ;use stack to load status
+276e : b513 > lda zp1,x ;load to indexed zeropage
+2770 : 950c > sta zpt,x
+2772 : 28 > plp
+
+2773 : 560c lsr zpt,x
+ tst_zx rLSR,fLSR,0
+2775 : 08 > php ;save flags
+2776 : b50c > lda zpt,x
+2778 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+277b : d0fe > bne * ;failed not equal (non zero)
+ >
+277d : 68 > pla ;load status
+ > eor_flag 0
+277e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2780 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+2783 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2785 : ca dex
+2786 : 10e3 bpl tlsr6
+2788 : a203 ldx #3
+278a : tlsr7
+ set_zx zp1,$ff
+ > load_flag $ff
+278a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+278c : 48 > pha ;use stack to load status
+278d : b513 > lda zp1,x ;load to indexed zeropage
+278f : 950c > sta zpt,x
+2791 : 28 > plp
+
+2792 : 560c lsr zpt,x
+ tst_zx rLSR,fLSR,$ff-fnzc
+2794 : 08 > php ;save flags
+2795 : b50c > lda zpt,x
+2797 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+279a : d0fe > bne * ;failed not equal (non zero)
+ >
+279c : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+279d : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+279f : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+27a2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+27a4 : ca dex
+27a5 : 10e3 bpl tlsr7
+
+27a7 : a203 ldx #3
+27a9 : trol6
+ set_zx zp1,0
+ > load_flag 0
+27a9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+27ab : 48 > pha ;use stack to load status
+27ac : b513 > lda zp1,x ;load to indexed zeropage
+27ae : 950c > sta zpt,x
+27b0 : 28 > plp
+
+27b1 : 360c rol zpt,x
+ tst_zx rROL,fROL,0
+27b3 : 08 > php ;save flags
+27b4 : b50c > lda zpt,x
+27b6 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+27b9 : d0fe > bne * ;failed not equal (non zero)
+ >
+27bb : 68 > pla ;load status
+ > eor_flag 0
+27bc : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+27be : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+27c1 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+27c3 : ca dex
+27c4 : 10e3 bpl trol6
+27c6 : a203 ldx #3
+27c8 : trol7
+ set_zx zp1,$ff-fc
+ > load_flag $ff-fc
+27c8 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+27ca : 48 > pha ;use stack to load status
+27cb : b513 > lda zp1,x ;load to indexed zeropage
+27cd : 950c > sta zpt,x
+27cf : 28 > plp
+
+27d0 : 360c rol zpt,x
+ tst_zx rROL,fROL,$ff-fnzc
+27d2 : 08 > php ;save flags
+27d3 : b50c > lda zpt,x
+27d5 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+27d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+27da : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+27db : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+27dd : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+27e0 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+27e2 : ca dex
+27e3 : 10e3 bpl trol7
+
+27e5 : a203 ldx #3
+27e7 : trolc6
+ set_zx zp1,fc
+ > load_flag fc
+27e7 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+27e9 : 48 > pha ;use stack to load status
+27ea : b513 > lda zp1,x ;load to indexed zeropage
+27ec : 950c > sta zpt,x
+27ee : 28 > plp
+
+27ef : 360c rol zpt,x
+ tst_zx rROLc,fROLc,0
+27f1 : 08 > php ;save flags
+27f2 : b50c > lda zpt,x
+27f4 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+27f7 : d0fe > bne * ;failed not equal (non zero)
+ >
+27f9 : 68 > pla ;load status
+ > eor_flag 0
+27fa : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+27fc : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+27ff : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2801 : ca dex
+2802 : 10e3 bpl trolc6
+2804 : a203 ldx #3
+2806 : trolc7
+ set_zx zp1,$ff
+ > load_flag $ff
+2806 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2808 : 48 > pha ;use stack to load status
+2809 : b513 > lda zp1,x ;load to indexed zeropage
+280b : 950c > sta zpt,x
+280d : 28 > plp
+
+280e : 360c rol zpt,x
+ tst_zx rROLc,fROLc,$ff-fnzc
+2810 : 08 > php ;save flags
+2811 : b50c > lda zpt,x
+2813 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2816 : d0fe > bne * ;failed not equal (non zero)
+ >
+2818 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2819 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+281b : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+281e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2820 : ca dex
+2821 : 10e3 bpl trolc7
+
+2823 : a203 ldx #3
+2825 : tror6
+ set_zx zp1,0
+ > load_flag 0
+2825 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2827 : 48 > pha ;use stack to load status
+2828 : b513 > lda zp1,x ;load to indexed zeropage
+282a : 950c > sta zpt,x
+282c : 28 > plp
+
+282d : 760c ror zpt,x
+ tst_zx rROR,fROR,0
+282f : 08 > php ;save flags
+2830 : b50c > lda zpt,x
+2832 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2835 : d0fe > bne * ;failed not equal (non zero)
+ >
+2837 : 68 > pla ;load status
+ > eor_flag 0
+2838 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+283a : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+283d : d0fe > bne * ;failed not equal (non zero)
+ >
+
+283f : ca dex
+2840 : 10e3 bpl tror6
+2842 : a203 ldx #3
+2844 : tror7
+ set_zx zp1,$ff-fc
+ > load_flag $ff-fc
+2844 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2846 : 48 > pha ;use stack to load status
+2847 : b513 > lda zp1,x ;load to indexed zeropage
+2849 : 950c > sta zpt,x
+284b : 28 > plp
+
+284c : 760c ror zpt,x
+ tst_zx rROR,fROR,$ff-fnzc
+284e : 08 > php ;save flags
+284f : b50c > lda zpt,x
+2851 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2854 : d0fe > bne * ;failed not equal (non zero)
+ >
+2856 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2857 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2859 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+285c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+285e : ca dex
+285f : 10e3 bpl tror7
+
+2861 : a203 ldx #3
+2863 : trorc6
+ set_zx zp1,fc
+ > load_flag fc
+2863 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2865 : 48 > pha ;use stack to load status
+2866 : b513 > lda zp1,x ;load to indexed zeropage
+2868 : 950c > sta zpt,x
+286a : 28 > plp
+
+286b : 760c ror zpt,x
+ tst_zx rRORc,fRORc,0
+286d : 08 > php ;save flags
+286e : b50c > lda zpt,x
+2870 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2873 : d0fe > bne * ;failed not equal (non zero)
+ >
+2875 : 68 > pla ;load status
+ > eor_flag 0
+2876 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2878 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+287b : d0fe > bne * ;failed not equal (non zero)
+ >
+
+287d : ca dex
+287e : 10e3 bpl trorc6
+2880 : a203 ldx #3
+2882 : trorc7
+ set_zx zp1,$ff
+ > load_flag $ff
+2882 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2884 : 48 > pha ;use stack to load status
+2885 : b513 > lda zp1,x ;load to indexed zeropage
+2887 : 950c > sta zpt,x
+2889 : 28 > plp
+
+288a : 760c ror zpt,x
+ tst_zx rRORc,fRORc,$ff-fnzc
+288c : 08 > php ;save flags
+288d : b50c > lda zpt,x
+288f : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2892 : d0fe > bne * ;failed not equal (non zero)
+ >
+2894 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2895 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2897 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+289a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+289c : ca dex
+289d : 10e3 bpl trorc7
+ next_test
+289f : ad0002 > lda test_case ;previous test
+28a2 : c920 > cmp #test_num
+ > trap_ne ;test is out of sequence
+28a4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0021 = >test_num = test_num + 1
+28a6 : a921 > lda #test_num ;*** next tests' number
+28a8 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - abs indexed
+28ab : a203 ldx #3
+28ad : tasl8
+ set_absx zp1,0
+ > load_flag 0
+28ad : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+28af : 48 > pha ;use stack to load status
+28b0 : b513 > lda zp1,x ;load to indexed memory
+28b2 : 9d0302 > sta abst,x
+28b5 : 28 > plp
+
+28b6 : 1e0302 asl abst,x
+ tst_absx rASL,fASL,0
+28b9 : 08 > php ;save flags
+28ba : bd0302 > lda abst,x
+28bd : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+28c0 : d0fe > bne * ;failed not equal (non zero)
+ >
+28c2 : 68 > pla ;load status
+ > eor_flag 0
+28c3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+28c5 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+28c8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+28ca : ca dex
+28cb : 10e0 bpl tasl8
+28cd : a203 ldx #3
+28cf : tasl9
+ set_absx zp1,$ff
+ > load_flag $ff
+28cf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+28d1 : 48 > pha ;use stack to load status
+28d2 : b513 > lda zp1,x ;load to indexed memory
+28d4 : 9d0302 > sta abst,x
+28d7 : 28 > plp
+
+28d8 : 1e0302 asl abst,x
+ tst_absx rASL,fASL,$ff-fnzc
+28db : 08 > php ;save flags
+28dc : bd0302 > lda abst,x
+28df : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+28e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+28e4 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+28e5 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+28e7 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+28ea : d0fe > bne * ;failed not equal (non zero)
+ >
+
+28ec : ca dex
+28ed : 10e0 bpl tasl9
+
+28ef : a203 ldx #3
+28f1 : tlsr8
+ set_absx zp1,0
+ > load_flag 0
+28f1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+28f3 : 48 > pha ;use stack to load status
+28f4 : b513 > lda zp1,x ;load to indexed memory
+28f6 : 9d0302 > sta abst,x
+28f9 : 28 > plp
+
+28fa : 5e0302 lsr abst,x
+ tst_absx rLSR,fLSR,0
+28fd : 08 > php ;save flags
+28fe : bd0302 > lda abst,x
+2901 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2904 : d0fe > bne * ;failed not equal (non zero)
+ >
+2906 : 68 > pla ;load status
+ > eor_flag 0
+2907 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2909 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+290c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+290e : ca dex
+290f : 10e0 bpl tlsr8
+2911 : a203 ldx #3
+2913 : tlsr9
+ set_absx zp1,$ff
+ > load_flag $ff
+2913 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2915 : 48 > pha ;use stack to load status
+2916 : b513 > lda zp1,x ;load to indexed memory
+2918 : 9d0302 > sta abst,x
+291b : 28 > plp
+
+291c : 5e0302 lsr abst,x
+ tst_absx rLSR,fLSR,$ff-fnzc
+291f : 08 > php ;save flags
+2920 : bd0302 > lda abst,x
+2923 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2926 : d0fe > bne * ;failed not equal (non zero)
+ >
+2928 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2929 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+292b : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+292e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2930 : ca dex
+2931 : 10e0 bpl tlsr9
+
+2933 : a203 ldx #3
+2935 : trol8
+ set_absx zp1,0
+ > load_flag 0
+2935 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2937 : 48 > pha ;use stack to load status
+2938 : b513 > lda zp1,x ;load to indexed memory
+293a : 9d0302 > sta abst,x
+293d : 28 > plp
+
+293e : 3e0302 rol abst,x
+ tst_absx rROL,fROL,0
+2941 : 08 > php ;save flags
+2942 : bd0302 > lda abst,x
+2945 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2948 : d0fe > bne * ;failed not equal (non zero)
+ >
+294a : 68 > pla ;load status
+ > eor_flag 0
+294b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+294d : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2950 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2952 : ca dex
+2953 : 10e0 bpl trol8
+2955 : a203 ldx #3
+2957 : trol9
+ set_absx zp1,$ff-fc
+ > load_flag $ff-fc
+2957 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2959 : 48 > pha ;use stack to load status
+295a : b513 > lda zp1,x ;load to indexed memory
+295c : 9d0302 > sta abst,x
+295f : 28 > plp
+
+2960 : 3e0302 rol abst,x
+ tst_absx rROL,fROL,$ff-fnzc
+2963 : 08 > php ;save flags
+2964 : bd0302 > lda abst,x
+2967 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+296a : d0fe > bne * ;failed not equal (non zero)
+ >
+296c : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+296d : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+296f : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2972 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2974 : ca dex
+2975 : 10e0 bpl trol9
+
+2977 : a203 ldx #3
+2979 : trolc8
+ set_absx zp1,fc
+ > load_flag fc
+2979 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+297b : 48 > pha ;use stack to load status
+297c : b513 > lda zp1,x ;load to indexed memory
+297e : 9d0302 > sta abst,x
+2981 : 28 > plp
+
+2982 : 3e0302 rol abst,x
+ tst_absx rROLc,fROLc,0
+2985 : 08 > php ;save flags
+2986 : bd0302 > lda abst,x
+2989 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+298c : d0fe > bne * ;failed not equal (non zero)
+ >
+298e : 68 > pla ;load status
+ > eor_flag 0
+298f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2991 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2994 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2996 : ca dex
+2997 : 10e0 bpl trolc8
+2999 : a203 ldx #3
+299b : trolc9
+ set_absx zp1,$ff
+ > load_flag $ff
+299b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+299d : 48 > pha ;use stack to load status
+299e : b513 > lda zp1,x ;load to indexed memory
+29a0 : 9d0302 > sta abst,x
+29a3 : 28 > plp
+
+29a4 : 3e0302 rol abst,x
+ tst_absx rROLc,fROLc,$ff-fnzc
+29a7 : 08 > php ;save flags
+29a8 : bd0302 > lda abst,x
+29ab : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+29ae : d0fe > bne * ;failed not equal (non zero)
+ >
+29b0 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+29b1 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+29b3 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+29b6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+29b8 : ca dex
+29b9 : 10e0 bpl trolc9
+
+29bb : a203 ldx #3
+29bd : tror8
+ set_absx zp1,0
+ > load_flag 0
+29bd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+29bf : 48 > pha ;use stack to load status
+29c0 : b513 > lda zp1,x ;load to indexed memory
+29c2 : 9d0302 > sta abst,x
+29c5 : 28 > plp
+
+29c6 : 7e0302 ror abst,x
+ tst_absx rROR,fROR,0
+29c9 : 08 > php ;save flags
+29ca : bd0302 > lda abst,x
+29cd : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+29d0 : d0fe > bne * ;failed not equal (non zero)
+ >
+29d2 : 68 > pla ;load status
+ > eor_flag 0
+29d3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+29d5 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+29d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+29da : ca dex
+29db : 10e0 bpl tror8
+29dd : a203 ldx #3
+29df : tror9
+ set_absx zp1,$ff-fc
+ > load_flag $ff-fc
+29df : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+29e1 : 48 > pha ;use stack to load status
+29e2 : b513 > lda zp1,x ;load to indexed memory
+29e4 : 9d0302 > sta abst,x
+29e7 : 28 > plp
+
+29e8 : 7e0302 ror abst,x
+ tst_absx rROR,fROR,$ff-fnzc
+29eb : 08 > php ;save flags
+29ec : bd0302 > lda abst,x
+29ef : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+29f2 : d0fe > bne * ;failed not equal (non zero)
+ >
+29f4 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+29f5 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+29f7 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+29fa : d0fe > bne * ;failed not equal (non zero)
+ >
+
+29fc : ca dex
+29fd : 10e0 bpl tror9
+
+29ff : a203 ldx #3
+2a01 : trorc8
+ set_absx zp1,fc
+ > load_flag fc
+2a01 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2a03 : 48 > pha ;use stack to load status
+2a04 : b513 > lda zp1,x ;load to indexed memory
+2a06 : 9d0302 > sta abst,x
+2a09 : 28 > plp
+
+2a0a : 7e0302 ror abst,x
+ tst_absx rRORc,fRORc,0
+2a0d : 08 > php ;save flags
+2a0e : bd0302 > lda abst,x
+2a11 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2a14 : d0fe > bne * ;failed not equal (non zero)
+ >
+2a16 : 68 > pla ;load status
+ > eor_flag 0
+2a17 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2a19 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2a1c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2a1e : ca dex
+2a1f : 10e0 bpl trorc8
+2a21 : a203 ldx #3
+2a23 : trorc9
+ set_absx zp1,$ff
+ > load_flag $ff
+2a23 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2a25 : 48 > pha ;use stack to load status
+2a26 : b513 > lda zp1,x ;load to indexed memory
+2a28 : 9d0302 > sta abst,x
+2a2b : 28 > plp
+
+2a2c : 7e0302 ror abst,x
+ tst_absx rRORc,fRORc,$ff-fnzc
+2a2f : 08 > php ;save flags
+2a30 : bd0302 > lda abst,x
+2a33 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2a36 : d0fe > bne * ;failed not equal (non zero)
+ >
+2a38 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2a39 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2a3b : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2a3e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2a40 : ca dex
+2a41 : 10e0 bpl trorc9
+ next_test
+2a43 : ad0002 > lda test_case ;previous test
+2a46 : c921 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2a48 : d0fe > bne * ;failed not equal (non zero)
+ >
+0022 = >test_num = test_num + 1
+2a4a : a922 > lda #test_num ;*** next tests' number
+2a4c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing memory increment/decrement - INC DEC all addressing modes
+ ; zeropage
+2a4f : a200 ldx #0
+2a51 : a97e lda #$7e
+2a53 : 850c sta zpt
+2a55 : tinc
+ set_stat 0
+ > load_flag 0
+2a55 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2a57 : 48 > pha ;use stack to load status
+2a58 : 28 > plp
+
+2a59 : e60c inc zpt
+ tst_z rINC,fINC,0
+2a5b : 08 > php ;save flags
+2a5c : a50c > lda zpt
+2a5e : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2a61 : d0fe > bne * ;failed not equal (non zero)
+ >
+2a63 : 68 > pla ;load status
+ > eor_flag 0
+2a64 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2a66 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2a69 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2a6b : e8 inx
+2a6c : e002 cpx #2
+2a6e : d004 bne tinc1
+2a70 : a9fe lda #$fe
+2a72 : 850c sta zpt
+2a74 : e005 tinc1 cpx #5
+2a76 : d0dd bne tinc
+2a78 : ca dex
+2a79 : e60c inc zpt
+2a7b : tdec
+ set_stat 0
+ > load_flag 0
+2a7b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2a7d : 48 > pha ;use stack to load status
+2a7e : 28 > plp
+
+2a7f : c60c dec zpt
+ tst_z rINC,fINC,0
+2a81 : 08 > php ;save flags
+2a82 : a50c > lda zpt
+2a84 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2a87 : d0fe > bne * ;failed not equal (non zero)
+ >
+2a89 : 68 > pla ;load status
+ > eor_flag 0
+2a8a : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2a8c : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2a8f : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2a91 : ca dex
+2a92 : 300a bmi tdec1
+2a94 : e001 cpx #1
+2a96 : d0e3 bne tdec
+2a98 : a981 lda #$81
+2a9a : 850c sta zpt
+2a9c : d0dd bne tdec
+2a9e : tdec1
+2a9e : a200 ldx #0
+2aa0 : a97e lda #$7e
+2aa2 : 850c sta zpt
+2aa4 : tinc10
+ set_stat $ff
+ > load_flag $ff
+2aa4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2aa6 : 48 > pha ;use stack to load status
+2aa7 : 28 > plp
+
+2aa8 : e60c inc zpt
+ tst_z rINC,fINC,$ff-fnz
+2aaa : 08 > php ;save flags
+2aab : a50c > lda zpt
+2aad : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2ab0 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ab2 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2ab3 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2ab5 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2ab8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2aba : e8 inx
+2abb : e002 cpx #2
+2abd : d004 bne tinc11
+2abf : a9fe lda #$fe
+2ac1 : 850c sta zpt
+2ac3 : e005 tinc11 cpx #5
+2ac5 : d0dd bne tinc10
+2ac7 : ca dex
+2ac8 : e60c inc zpt
+2aca : tdec10
+ set_stat $ff
+ > load_flag $ff
+2aca : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2acc : 48 > pha ;use stack to load status
+2acd : 28 > plp
+
+2ace : c60c dec zpt
+ tst_z rINC,fINC,$ff-fnz
+2ad0 : 08 > php ;save flags
+2ad1 : a50c > lda zpt
+2ad3 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2ad6 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ad8 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2ad9 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2adb : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2ade : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2ae0 : ca dex
+2ae1 : 300a bmi tdec11
+2ae3 : e001 cpx #1
+2ae5 : d0e3 bne tdec10
+2ae7 : a981 lda #$81
+2ae9 : 850c sta zpt
+2aeb : d0dd bne tdec10
+2aed : tdec11
+ next_test
+2aed : ad0002 > lda test_case ;previous test
+2af0 : c922 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2af2 : d0fe > bne * ;failed not equal (non zero)
+ >
+0023 = >test_num = test_num + 1
+2af4 : a923 > lda #test_num ;*** next tests' number
+2af6 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; absolute memory
+2af9 : a200 ldx #0
+2afb : a97e lda #$7e
+2afd : 8d0302 sta abst
+2b00 : tinc2
+ set_stat 0
+ > load_flag 0
+2b00 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2b02 : 48 > pha ;use stack to load status
+2b03 : 28 > plp
+
+2b04 : ee0302 inc abst
+ tst_abs rINC,fINC,0
+2b07 : 08 > php ;save flags
+2b08 : ad0302 > lda abst
+2b0b : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2b0e : d0fe > bne * ;failed not equal (non zero)
+ >
+2b10 : 68 > pla ;load status
+ > eor_flag 0
+2b11 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2b13 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2b16 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2b18 : e8 inx
+2b19 : e002 cpx #2
+2b1b : d005 bne tinc3
+2b1d : a9fe lda #$fe
+2b1f : 8d0302 sta abst
+2b22 : e005 tinc3 cpx #5
+2b24 : d0da bne tinc2
+2b26 : ca dex
+2b27 : ee0302 inc abst
+2b2a : tdec2
+ set_stat 0
+ > load_flag 0
+2b2a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2b2c : 48 > pha ;use stack to load status
+2b2d : 28 > plp
+
+2b2e : ce0302 dec abst
+ tst_abs rINC,fINC,0
+2b31 : 08 > php ;save flags
+2b32 : ad0302 > lda abst
+2b35 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2b38 : d0fe > bne * ;failed not equal (non zero)
+ >
+2b3a : 68 > pla ;load status
+ > eor_flag 0
+2b3b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2b3d : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2b40 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2b42 : ca dex
+2b43 : 300b bmi tdec3
+2b45 : e001 cpx #1
+2b47 : d0e1 bne tdec2
+2b49 : a981 lda #$81
+2b4b : 8d0302 sta abst
+2b4e : d0da bne tdec2
+2b50 : tdec3
+2b50 : a200 ldx #0
+2b52 : a97e lda #$7e
+2b54 : 8d0302 sta abst
+2b57 : tinc12
+ set_stat $ff
+ > load_flag $ff
+2b57 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2b59 : 48 > pha ;use stack to load status
+2b5a : 28 > plp
+
+2b5b : ee0302 inc abst
+ tst_abs rINC,fINC,$ff-fnz
+2b5e : 08 > php ;save flags
+2b5f : ad0302 > lda abst
+2b62 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2b65 : d0fe > bne * ;failed not equal (non zero)
+ >
+2b67 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2b68 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2b6a : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2b6d : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2b6f : e8 inx
+2b70 : e002 cpx #2
+2b72 : d005 bne tinc13
+2b74 : a9fe lda #$fe
+2b76 : 8d0302 sta abst
+2b79 : e005 tinc13 cpx #5
+2b7b : d0da bne tinc12
+2b7d : ca dex
+2b7e : ee0302 inc abst
+2b81 : tdec12
+ set_stat $ff
+ > load_flag $ff
+2b81 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2b83 : 48 > pha ;use stack to load status
+2b84 : 28 > plp
+
+2b85 : ce0302 dec abst
+ tst_abs rINC,fINC,$ff-fnz
+2b88 : 08 > php ;save flags
+2b89 : ad0302 > lda abst
+2b8c : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2b8f : d0fe > bne * ;failed not equal (non zero)
+ >
+2b91 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2b92 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2b94 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2b97 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2b99 : ca dex
+2b9a : 300b bmi tdec13
+2b9c : e001 cpx #1
+2b9e : d0e1 bne tdec12
+2ba0 : a981 lda #$81
+2ba2 : 8d0302 sta abst
+2ba5 : d0da bne tdec12
+2ba7 : tdec13
+ next_test
+2ba7 : ad0002 > lda test_case ;previous test
+2baa : c923 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2bac : d0fe > bne * ;failed not equal (non zero)
+ >
+0024 = >test_num = test_num + 1
+2bae : a924 > lda #test_num ;*** next tests' number
+2bb0 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; zeropage indexed
+2bb3 : a200 ldx #0
+2bb5 : a97e lda #$7e
+2bb7 : 950c tinc4 sta zpt,x
+ set_stat 0
+ > load_flag 0
+2bb9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2bbb : 48 > pha ;use stack to load status
+2bbc : 28 > plp
+
+2bbd : f60c inc zpt,x
+ tst_zx rINC,fINC,0
+2bbf : 08 > php ;save flags
+2bc0 : b50c > lda zpt,x
+2bc2 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2bc5 : d0fe > bne * ;failed not equal (non zero)
+ >
+2bc7 : 68 > pla ;load status
+ > eor_flag 0
+2bc8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2bca : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2bcd : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2bcf : b50c lda zpt,x
+2bd1 : e8 inx
+2bd2 : e002 cpx #2
+2bd4 : d002 bne tinc5
+2bd6 : a9fe lda #$fe
+2bd8 : e005 tinc5 cpx #5
+2bda : d0db bne tinc4
+2bdc : ca dex
+2bdd : a902 lda #2
+2bdf : 950c tdec4 sta zpt,x
+ set_stat 0
+ > load_flag 0
+2be1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2be3 : 48 > pha ;use stack to load status
+2be4 : 28 > plp
+
+2be5 : d60c dec zpt,x
+ tst_zx rINC,fINC,0
+2be7 : 08 > php ;save flags
+2be8 : b50c > lda zpt,x
+2bea : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2bed : d0fe > bne * ;failed not equal (non zero)
+ >
+2bef : 68 > pla ;load status
+ > eor_flag 0
+2bf0 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2bf2 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2bf5 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2bf7 : b50c lda zpt,x
+2bf9 : ca dex
+2bfa : 3008 bmi tdec5
+2bfc : e001 cpx #1
+2bfe : d0df bne tdec4
+2c00 : a981 lda #$81
+2c02 : d0db bne tdec4
+2c04 : tdec5
+2c04 : a200 ldx #0
+2c06 : a97e lda #$7e
+2c08 : 950c tinc14 sta zpt,x
+ set_stat $ff
+ > load_flag $ff
+2c0a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2c0c : 48 > pha ;use stack to load status
+2c0d : 28 > plp
+
+2c0e : f60c inc zpt,x
+ tst_zx rINC,fINC,$ff-fnz
+2c10 : 08 > php ;save flags
+2c11 : b50c > lda zpt,x
+2c13 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2c16 : d0fe > bne * ;failed not equal (non zero)
+ >
+2c18 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2c19 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2c1b : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2c1e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2c20 : b50c lda zpt,x
+2c22 : e8 inx
+2c23 : e002 cpx #2
+2c25 : d002 bne tinc15
+2c27 : a9fe lda #$fe
+2c29 : e005 tinc15 cpx #5
+2c2b : d0db bne tinc14
+2c2d : ca dex
+2c2e : a902 lda #2
+2c30 : 950c tdec14 sta zpt,x
+ set_stat $ff
+ > load_flag $ff
+2c32 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2c34 : 48 > pha ;use stack to load status
+2c35 : 28 > plp
+
+2c36 : d60c dec zpt,x
+ tst_zx rINC,fINC,$ff-fnz
+2c38 : 08 > php ;save flags
+2c39 : b50c > lda zpt,x
+2c3b : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2c3e : d0fe > bne * ;failed not equal (non zero)
+ >
+2c40 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2c41 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2c43 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2c46 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2c48 : b50c lda zpt,x
+2c4a : ca dex
+2c4b : 3008 bmi tdec15
+2c4d : e001 cpx #1
+2c4f : d0df bne tdec14
+2c51 : a981 lda #$81
+2c53 : d0db bne tdec14
+2c55 : tdec15
+ next_test
+2c55 : ad0002 > lda test_case ;previous test
+2c58 : c924 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2c5a : d0fe > bne * ;failed not equal (non zero)
+ >
+0025 = >test_num = test_num + 1
+2c5c : a925 > lda #test_num ;*** next tests' number
+2c5e : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; memory indexed
+2c61 : a200 ldx #0
+2c63 : a97e lda #$7e
+2c65 : 9d0302 tinc6 sta abst,x
+ set_stat 0
+ > load_flag 0
+2c68 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2c6a : 48 > pha ;use stack to load status
+2c6b : 28 > plp
+
+2c6c : fe0302 inc abst,x
+ tst_absx rINC,fINC,0
+2c6f : 08 > php ;save flags
+2c70 : bd0302 > lda abst,x
+2c73 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2c76 : d0fe > bne * ;failed not equal (non zero)
+ >
+2c78 : 68 > pla ;load status
+ > eor_flag 0
+2c79 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2c7b : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2c7e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2c80 : bd0302 lda abst,x
+2c83 : e8 inx
+2c84 : e002 cpx #2
+2c86 : d002 bne tinc7
+2c88 : a9fe lda #$fe
+2c8a : e005 tinc7 cpx #5
+2c8c : d0d7 bne tinc6
+2c8e : ca dex
+2c8f : a902 lda #2
+2c91 : 9d0302 tdec6 sta abst,x
+ set_stat 0
+ > load_flag 0
+2c94 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2c96 : 48 > pha ;use stack to load status
+2c97 : 28 > plp
+
+2c98 : de0302 dec abst,x
+ tst_absx rINC,fINC,0
+2c9b : 08 > php ;save flags
+2c9c : bd0302 > lda abst,x
+2c9f : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2ca2 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ca4 : 68 > pla ;load status
+ > eor_flag 0
+2ca5 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ca7 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2caa : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2cac : bd0302 lda abst,x
+2caf : ca dex
+2cb0 : 3008 bmi tdec7
+2cb2 : e001 cpx #1
+2cb4 : d0db bne tdec6
+2cb6 : a981 lda #$81
+2cb8 : d0d7 bne tdec6
+2cba : tdec7
+2cba : a200 ldx #0
+2cbc : a97e lda #$7e
+2cbe : 9d0302 tinc16 sta abst,x
+ set_stat $ff
+ > load_flag $ff
+2cc1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2cc3 : 48 > pha ;use stack to load status
+2cc4 : 28 > plp
+
+2cc5 : fe0302 inc abst,x
+ tst_absx rINC,fINC,$ff-fnz
+2cc8 : 08 > php ;save flags
+2cc9 : bd0302 > lda abst,x
+2ccc : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2ccf : d0fe > bne * ;failed not equal (non zero)
+ >
+2cd1 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2cd2 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2cd4 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2cd7 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2cd9 : bd0302 lda abst,x
+2cdc : e8 inx
+2cdd : e002 cpx #2
+2cdf : d002 bne tinc17
+2ce1 : a9fe lda #$fe
+2ce3 : e005 tinc17 cpx #5
+2ce5 : d0d7 bne tinc16
+2ce7 : ca dex
+2ce8 : a902 lda #2
+2cea : 9d0302 tdec16 sta abst,x
+ set_stat $ff
+ > load_flag $ff
+2ced : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2cef : 48 > pha ;use stack to load status
+2cf0 : 28 > plp
+
+2cf1 : de0302 dec abst,x
+ tst_absx rINC,fINC,$ff-fnz
+2cf4 : 08 > php ;save flags
+2cf5 : bd0302 > lda abst,x
+2cf8 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+2cfb : d0fe > bne * ;failed not equal (non zero)
+ >
+2cfd : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2cfe : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2d00 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+2d03 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2d05 : bd0302 lda abst,x
+2d08 : ca dex
+2d09 : 3008 bmi tdec17
+2d0b : e001 cpx #1
+2d0d : d0db bne tdec16
+2d0f : a981 lda #$81
+2d11 : d0d7 bne tdec16
+2d13 : tdec17
+ next_test
+2d13 : ad0002 > lda test_case ;previous test
+2d16 : c925 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2d18 : d0fe > bne * ;failed not equal (non zero)
+ >
+0026 = >test_num = test_num + 1
+2d1a : a926 > lda #test_num ;*** next tests' number
+2d1c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing logical instructions - AND EOR ORA all addressing modes
+ ; AND
+2d1f : a203 ldx #3 ;immediate
+2d21 : b51c tand lda zpAN,x
+2d23 : 8d0902 sta ex_andi+1 ;set AND # operand
+ set_ax absANa,0
+ > load_flag 0
+2d26 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2d28 : 48 > pha ;use stack to load status
+2d29 : bd5a02 > lda absANa,x ;precharge accu
+2d2c : 28 > plp
+
+2d2d : 200802 jsr ex_andi ;execute AND # in RAM
+ tst_ax absrlo,absflo,0
+2d30 : 08 > php ;save flags
+2d31 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2d34 : d0fe > bne * ;failed not equal (non zero)
+ >
+2d36 : 68 > pla ;load status
+ > eor_flag 0
+2d37 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2d39 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2d3c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2d3e : ca dex
+2d3f : 10e0 bpl tand
+2d41 : a203 ldx #3
+2d43 : b51c tand1 lda zpAN,x
+2d45 : 8d0902 sta ex_andi+1 ;set AND # operand
+ set_ax absANa,$ff
+ > load_flag $ff
+2d48 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2d4a : 48 > pha ;use stack to load status
+2d4b : bd5a02 > lda absANa,x ;precharge accu
+2d4e : 28 > plp
+
+2d4f : 200802 jsr ex_andi ;execute AND # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+2d52 : 08 > php ;save flags
+2d53 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2d56 : d0fe > bne * ;failed not equal (non zero)
+ >
+2d58 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2d59 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2d5b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2d5e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2d60 : ca dex
+2d61 : 10e0 bpl tand1
+
+2d63 : a203 ldx #3 ;zp
+2d65 : b51c tand2 lda zpAN,x
+2d67 : 850c sta zpt
+ set_ax absANa,0
+ > load_flag 0
+2d69 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2d6b : 48 > pha ;use stack to load status
+2d6c : bd5a02 > lda absANa,x ;precharge accu
+2d6f : 28 > plp
+
+2d70 : 250c and zpt
+ tst_ax absrlo,absflo,0
+2d72 : 08 > php ;save flags
+2d73 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2d76 : d0fe > bne * ;failed not equal (non zero)
+ >
+2d78 : 68 > pla ;load status
+ > eor_flag 0
+2d79 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2d7b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2d7e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2d80 : ca dex
+2d81 : 10e2 bpl tand2
+2d83 : a203 ldx #3
+2d85 : b51c tand3 lda zpAN,x
+2d87 : 850c sta zpt
+ set_ax absANa,$ff
+ > load_flag $ff
+2d89 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2d8b : 48 > pha ;use stack to load status
+2d8c : bd5a02 > lda absANa,x ;precharge accu
+2d8f : 28 > plp
+
+2d90 : 250c and zpt
+ tst_ax absrlo,absflo,$ff-fnz
+2d92 : 08 > php ;save flags
+2d93 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2d96 : d0fe > bne * ;failed not equal (non zero)
+ >
+2d98 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2d99 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2d9b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2d9e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2da0 : ca dex
+2da1 : 10e2 bpl tand3
+
+2da3 : a203 ldx #3 ;abs
+2da5 : b51c tand4 lda zpAN,x
+2da7 : 8d0302 sta abst
+ set_ax absANa,0
+ > load_flag 0
+2daa : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2dac : 48 > pha ;use stack to load status
+2dad : bd5a02 > lda absANa,x ;precharge accu
+2db0 : 28 > plp
+
+2db1 : 2d0302 and abst
+ tst_ax absrlo,absflo,0
+2db4 : 08 > php ;save flags
+2db5 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2db8 : d0fe > bne * ;failed not equal (non zero)
+ >
+2dba : 68 > pla ;load status
+ > eor_flag 0
+2dbb : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2dbd : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2dc0 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2dc2 : ca dex
+2dc3 : 10e0 bpl tand4
+2dc5 : a203 ldx #3
+2dc7 : b51c tand5 lda zpAN,x
+2dc9 : 8d0302 sta abst
+ set_ax absANa,$ff
+ > load_flag $ff
+2dcc : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2dce : 48 > pha ;use stack to load status
+2dcf : bd5a02 > lda absANa,x ;precharge accu
+2dd2 : 28 > plp
+
+2dd3 : 2d0302 and abst
+ tst_ax absrlo,absflo,$ff-fnz
+2dd6 : 08 > php ;save flags
+2dd7 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2dda : d0fe > bne * ;failed not equal (non zero)
+ >
+2ddc : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2ddd : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2ddf : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2de2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2de4 : ca dex
+2de5 : 1002 bpl tand6
+
+2de7 : a203 ldx #3 ;zp,x
+2de9 : tand6
+ set_ax absANa,0
+ > load_flag 0
+2de9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2deb : 48 > pha ;use stack to load status
+2dec : bd5a02 > lda absANa,x ;precharge accu
+2def : 28 > plp
+
+2df0 : 351c and zpAN,x
+ tst_ax absrlo,absflo,0
+2df2 : 08 > php ;save flags
+2df3 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2df6 : d0fe > bne * ;failed not equal (non zero)
+ >
+2df8 : 68 > pla ;load status
+ > eor_flag 0
+2df9 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2dfb : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2dfe : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e00 : ca dex
+2e01 : 10e6 bpl tand6
+2e03 : a203 ldx #3
+2e05 : tand7
+ set_ax absANa,$ff
+ > load_flag $ff
+2e05 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2e07 : 48 > pha ;use stack to load status
+2e08 : bd5a02 > lda absANa,x ;precharge accu
+2e0b : 28 > plp
+
+2e0c : 351c and zpAN,x
+ tst_ax absrlo,absflo,$ff-fnz
+2e0e : 08 > php ;save flags
+2e0f : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2e12 : d0fe > bne * ;failed not equal (non zero)
+ >
+2e14 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2e15 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2e17 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2e1a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e1c : ca dex
+2e1d : 10e6 bpl tand7
+
+2e1f : a203 ldx #3 ;abs,x
+2e21 : tand8
+ set_ax absANa,0
+ > load_flag 0
+2e21 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2e23 : 48 > pha ;use stack to load status
+2e24 : bd5a02 > lda absANa,x ;precharge accu
+2e27 : 28 > plp
+
+2e28 : 3d4e02 and absAN,x
+ tst_ax absrlo,absflo,0
+2e2b : 08 > php ;save flags
+2e2c : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2e2f : d0fe > bne * ;failed not equal (non zero)
+ >
+2e31 : 68 > pla ;load status
+ > eor_flag 0
+2e32 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2e34 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2e37 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e39 : ca dex
+2e3a : 10e5 bpl tand8
+2e3c : a203 ldx #3
+2e3e : tand9
+ set_ax absANa,$ff
+ > load_flag $ff
+2e3e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2e40 : 48 > pha ;use stack to load status
+2e41 : bd5a02 > lda absANa,x ;precharge accu
+2e44 : 28 > plp
+
+2e45 : 3d4e02 and absAN,x
+ tst_ax absrlo,absflo,$ff-fnz
+2e48 : 08 > php ;save flags
+2e49 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2e4c : d0fe > bne * ;failed not equal (non zero)
+ >
+2e4e : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2e4f : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2e51 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2e54 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e56 : ca dex
+2e57 : 10e5 bpl tand9
+
+2e59 : a003 ldy #3 ;abs,y
+2e5b : tand10
+ set_ay absANa,0
+ > load_flag 0
+2e5b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2e5d : 48 > pha ;use stack to load status
+2e5e : b95a02 > lda absANa,y ;precharge accu
+2e61 : 28 > plp
+
+2e62 : 394e02 and absAN,y
+ tst_ay absrlo,absflo,0
+2e65 : 08 > php ;save flags
+2e66 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2e69 : d0fe > bne * ;failed not equal (non zero)
+ >
+2e6b : 68 > pla ;load status
+ > eor_flag 0
+2e6c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2e6e : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2e71 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e73 : 88 dey
+2e74 : 10e5 bpl tand10
+2e76 : a003 ldy #3
+2e78 : tand11
+ set_ay absANa,$ff
+ > load_flag $ff
+2e78 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2e7a : 48 > pha ;use stack to load status
+2e7b : b95a02 > lda absANa,y ;precharge accu
+2e7e : 28 > plp
+
+2e7f : 394e02 and absAN,y
+ tst_ay absrlo,absflo,$ff-fnz
+2e82 : 08 > php ;save flags
+2e83 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2e86 : d0fe > bne * ;failed not equal (non zero)
+ >
+2e88 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2e89 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2e8b : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2e8e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2e90 : 88 dey
+2e91 : 10e5 bpl tand11
+
+2e93 : a206 ldx #6 ;(zp,x)
+2e95 : a003 ldy #3
+2e97 : tand12
+ set_ay absANa,0
+ > load_flag 0
+2e97 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2e99 : 48 > pha ;use stack to load status
+2e9a : b95a02 > lda absANa,y ;precharge accu
+2e9d : 28 > plp
+
+2e9e : 213a and (indAN,x)
+ tst_ay absrlo,absflo,0
+2ea0 : 08 > php ;save flags
+2ea1 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2ea4 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ea6 : 68 > pla ;load status
+ > eor_flag 0
+2ea7 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ea9 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2eac : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2eae : ca dex
+2eaf : ca dex
+2eb0 : 88 dey
+2eb1 : 10e4 bpl tand12
+2eb3 : a206 ldx #6
+2eb5 : a003 ldy #3
+2eb7 : tand13
+ set_ay absANa,$ff
+ > load_flag $ff
+2eb7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2eb9 : 48 > pha ;use stack to load status
+2eba : b95a02 > lda absANa,y ;precharge accu
+2ebd : 28 > plp
+
+2ebe : 213a and (indAN,x)
+ tst_ay absrlo,absflo,$ff-fnz
+2ec0 : 08 > php ;save flags
+2ec1 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2ec4 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ec6 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2ec7 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2ec9 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2ecc : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2ece : ca dex
+2ecf : ca dex
+2ed0 : 88 dey
+2ed1 : 10e4 bpl tand13
+
+2ed3 : a003 ldy #3 ;(zp),y
+2ed5 : tand14
+ set_ay absANa,0
+ > load_flag 0
+2ed5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2ed7 : 48 > pha ;use stack to load status
+2ed8 : b95a02 > lda absANa,y ;precharge accu
+2edb : 28 > plp
+
+2edc : 313a and (indAN),y
+ tst_ay absrlo,absflo,0
+2ede : 08 > php ;save flags
+2edf : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2ee2 : d0fe > bne * ;failed not equal (non zero)
+ >
+2ee4 : 68 > pla ;load status
+ > eor_flag 0
+2ee5 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ee7 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2eea : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2eec : 88 dey
+2eed : 10e6 bpl tand14
+2eef : a003 ldy #3
+2ef1 : tand15
+ set_ay absANa,$ff
+ > load_flag $ff
+2ef1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2ef3 : 48 > pha ;use stack to load status
+2ef4 : b95a02 > lda absANa,y ;precharge accu
+2ef7 : 28 > plp
+
+2ef8 : 313a and (indAN),y
+ tst_ay absrlo,absflo,$ff-fnz
+2efa : 08 > php ;save flags
+2efb : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+2efe : d0fe > bne * ;failed not equal (non zero)
+ >
+2f00 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2f01 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2f03 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+2f06 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2f08 : 88 dey
+2f09 : 10e6 bpl tand15
+ next_test
+2f0b : ad0002 > lda test_case ;previous test
+2f0e : c926 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2f10 : d0fe > bne * ;failed not equal (non zero)
+ >
+0027 = >test_num = test_num + 1
+2f12 : a927 > lda #test_num ;*** next tests' number
+2f14 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; EOR
+2f17 : a203 ldx #3 ;immediate - self modifying code
+2f19 : b520 teor lda zpEO,x
+2f1b : 8d0c02 sta ex_eori+1 ;set EOR # operand
+ set_ax absEOa,0
+ > load_flag 0
+2f1e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2f20 : 48 > pha ;use stack to load status
+2f21 : bd5e02 > lda absEOa,x ;precharge accu
+2f24 : 28 > plp
+
+2f25 : 200b02 jsr ex_eori ;execute EOR # in RAM
+ tst_ax absrlo,absflo,0
+2f28 : 08 > php ;save flags
+2f29 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2f2c : d0fe > bne * ;failed not equal (non zero)
+ >
+2f2e : 68 > pla ;load status
+ > eor_flag 0
+2f2f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2f31 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2f34 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2f36 : ca dex
+2f37 : 10e0 bpl teor
+2f39 : a203 ldx #3
+2f3b : b520 teor1 lda zpEO,x
+2f3d : 8d0c02 sta ex_eori+1 ;set EOR # operand
+ set_ax absEOa,$ff
+ > load_flag $ff
+2f40 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2f42 : 48 > pha ;use stack to load status
+2f43 : bd5e02 > lda absEOa,x ;precharge accu
+2f46 : 28 > plp
+
+2f47 : 200b02 jsr ex_eori ;execute EOR # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+2f4a : 08 > php ;save flags
+2f4b : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2f4e : d0fe > bne * ;failed not equal (non zero)
+ >
+2f50 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2f51 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2f53 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2f56 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2f58 : ca dex
+2f59 : 10e0 bpl teor1
+
+2f5b : a203 ldx #3 ;zp
+2f5d : b520 teor2 lda zpEO,x
+2f5f : 850c sta zpt
+ set_ax absEOa,0
+ > load_flag 0
+2f61 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2f63 : 48 > pha ;use stack to load status
+2f64 : bd5e02 > lda absEOa,x ;precharge accu
+2f67 : 28 > plp
+
+2f68 : 450c eor zpt
+ tst_ax absrlo,absflo,0
+2f6a : 08 > php ;save flags
+2f6b : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2f6e : d0fe > bne * ;failed not equal (non zero)
+ >
+2f70 : 68 > pla ;load status
+ > eor_flag 0
+2f71 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2f73 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2f76 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2f78 : ca dex
+2f79 : 10e2 bpl teor2
+2f7b : a203 ldx #3
+2f7d : b520 teor3 lda zpEO,x
+2f7f : 850c sta zpt
+ set_ax absEOa,$ff
+ > load_flag $ff
+2f81 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2f83 : 48 > pha ;use stack to load status
+2f84 : bd5e02 > lda absEOa,x ;precharge accu
+2f87 : 28 > plp
+
+2f88 : 450c eor zpt
+ tst_ax absrlo,absflo,$ff-fnz
+2f8a : 08 > php ;save flags
+2f8b : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2f8e : d0fe > bne * ;failed not equal (non zero)
+ >
+2f90 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2f91 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2f93 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2f96 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2f98 : ca dex
+2f99 : 10e2 bpl teor3
+
+2f9b : a203 ldx #3 ;abs
+2f9d : b520 teor4 lda zpEO,x
+2f9f : 8d0302 sta abst
+ set_ax absEOa,0
+ > load_flag 0
+2fa2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2fa4 : 48 > pha ;use stack to load status
+2fa5 : bd5e02 > lda absEOa,x ;precharge accu
+2fa8 : 28 > plp
+
+2fa9 : 4d0302 eor abst
+ tst_ax absrlo,absflo,0
+2fac : 08 > php ;save flags
+2fad : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2fb0 : d0fe > bne * ;failed not equal (non zero)
+ >
+2fb2 : 68 > pla ;load status
+ > eor_flag 0
+2fb3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2fb5 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2fb8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2fba : ca dex
+2fbb : 10e0 bpl teor4
+2fbd : a203 ldx #3
+2fbf : b520 teor5 lda zpEO,x
+2fc1 : 8d0302 sta abst
+ set_ax absEOa,$ff
+ > load_flag $ff
+2fc4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2fc6 : 48 > pha ;use stack to load status
+2fc7 : bd5e02 > lda absEOa,x ;precharge accu
+2fca : 28 > plp
+
+2fcb : 4d0302 eor abst
+ tst_ax absrlo,absflo,$ff-fnz
+2fce : 08 > php ;save flags
+2fcf : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2fd2 : d0fe > bne * ;failed not equal (non zero)
+ >
+2fd4 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2fd5 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2fd7 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2fda : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2fdc : ca dex
+2fdd : 1002 bpl teor6
+
+2fdf : a203 ldx #3 ;zp,x
+2fe1 : teor6
+ set_ax absEOa,0
+ > load_flag 0
+2fe1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2fe3 : 48 > pha ;use stack to load status
+2fe4 : bd5e02 > lda absEOa,x ;precharge accu
+2fe7 : 28 > plp
+
+2fe8 : 5520 eor zpEO,x
+ tst_ax absrlo,absflo,0
+2fea : 08 > php ;save flags
+2feb : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+2fee : d0fe > bne * ;failed not equal (non zero)
+ >
+2ff0 : 68 > pla ;load status
+ > eor_flag 0
+2ff1 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ff3 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+2ff6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2ff8 : ca dex
+2ff9 : 10e6 bpl teor6
+2ffb : a203 ldx #3
+2ffd : teor7
+ set_ax absEOa,$ff
+ > load_flag $ff
+2ffd : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2fff : 48 > pha ;use stack to load status
+3000 : bd5e02 > lda absEOa,x ;precharge accu
+3003 : 28 > plp
+
+3004 : 5520 eor zpEO,x
+ tst_ax absrlo,absflo,$ff-fnz
+3006 : 08 > php ;save flags
+3007 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+300a : d0fe > bne * ;failed not equal (non zero)
+ >
+300c : 68 > pla ;load status
+ > eor_flag $ff-fnz
+300d : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+300f : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3012 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3014 : ca dex
+3015 : 10e6 bpl teor7
+
+3017 : a203 ldx #3 ;abs,x
+3019 : teor8
+ set_ax absEOa,0
+ > load_flag 0
+3019 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+301b : 48 > pha ;use stack to load status
+301c : bd5e02 > lda absEOa,x ;precharge accu
+301f : 28 > plp
+
+3020 : 5d5202 eor absEO,x
+ tst_ax absrlo,absflo,0
+3023 : 08 > php ;save flags
+3024 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3027 : d0fe > bne * ;failed not equal (non zero)
+ >
+3029 : 68 > pla ;load status
+ > eor_flag 0
+302a : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+302c : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+302f : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3031 : ca dex
+3032 : 10e5 bpl teor8
+3034 : a203 ldx #3
+3036 : teor9
+ set_ax absEOa,$ff
+ > load_flag $ff
+3036 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3038 : 48 > pha ;use stack to load status
+3039 : bd5e02 > lda absEOa,x ;precharge accu
+303c : 28 > plp
+
+303d : 5d5202 eor absEO,x
+ tst_ax absrlo,absflo,$ff-fnz
+3040 : 08 > php ;save flags
+3041 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3044 : d0fe > bne * ;failed not equal (non zero)
+ >
+3046 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3047 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3049 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+304c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+304e : ca dex
+304f : 10e5 bpl teor9
+
+3051 : a003 ldy #3 ;abs,y
+3053 : teor10
+ set_ay absEOa,0
+ > load_flag 0
+3053 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3055 : 48 > pha ;use stack to load status
+3056 : b95e02 > lda absEOa,y ;precharge accu
+3059 : 28 > plp
+
+305a : 595202 eor absEO,y
+ tst_ay absrlo,absflo,0
+305d : 08 > php ;save flags
+305e : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3061 : d0fe > bne * ;failed not equal (non zero)
+ >
+3063 : 68 > pla ;load status
+ > eor_flag 0
+3064 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3066 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3069 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+306b : 88 dey
+306c : 10e5 bpl teor10
+306e : a003 ldy #3
+3070 : teor11
+ set_ay absEOa,$ff
+ > load_flag $ff
+3070 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3072 : 48 > pha ;use stack to load status
+3073 : b95e02 > lda absEOa,y ;precharge accu
+3076 : 28 > plp
+
+3077 : 595202 eor absEO,y
+ tst_ay absrlo,absflo,$ff-fnz
+307a : 08 > php ;save flags
+307b : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+307e : d0fe > bne * ;failed not equal (non zero)
+ >
+3080 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3081 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3083 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3086 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3088 : 88 dey
+3089 : 10e5 bpl teor11
+
+308b : a206 ldx #6 ;(zp,x)
+308d : a003 ldy #3
+308f : teor12
+ set_ay absEOa,0
+ > load_flag 0
+308f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3091 : 48 > pha ;use stack to load status
+3092 : b95e02 > lda absEOa,y ;precharge accu
+3095 : 28 > plp
+
+3096 : 4142 eor (indEO,x)
+ tst_ay absrlo,absflo,0
+3098 : 08 > php ;save flags
+3099 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+309c : d0fe > bne * ;failed not equal (non zero)
+ >
+309e : 68 > pla ;load status
+ > eor_flag 0
+309f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+30a1 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+30a4 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+30a6 : ca dex
+30a7 : ca dex
+30a8 : 88 dey
+30a9 : 10e4 bpl teor12
+30ab : a206 ldx #6
+30ad : a003 ldy #3
+30af : teor13
+ set_ay absEOa,$ff
+ > load_flag $ff
+30af : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+30b1 : 48 > pha ;use stack to load status
+30b2 : b95e02 > lda absEOa,y ;precharge accu
+30b5 : 28 > plp
+
+30b6 : 4142 eor (indEO,x)
+ tst_ay absrlo,absflo,$ff-fnz
+30b8 : 08 > php ;save flags
+30b9 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+30bc : d0fe > bne * ;failed not equal (non zero)
+ >
+30be : 68 > pla ;load status
+ > eor_flag $ff-fnz
+30bf : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+30c1 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+30c4 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+30c6 : ca dex
+30c7 : ca dex
+30c8 : 88 dey
+30c9 : 10e4 bpl teor13
+
+30cb : a003 ldy #3 ;(zp),y
+30cd : teor14
+ set_ay absEOa,0
+ > load_flag 0
+30cd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+30cf : 48 > pha ;use stack to load status
+30d0 : b95e02 > lda absEOa,y ;precharge accu
+30d3 : 28 > plp
+
+30d4 : 5142 eor (indEO),y
+ tst_ay absrlo,absflo,0
+30d6 : 08 > php ;save flags
+30d7 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+30da : d0fe > bne * ;failed not equal (non zero)
+ >
+30dc : 68 > pla ;load status
+ > eor_flag 0
+30dd : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+30df : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+30e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+30e4 : 88 dey
+30e5 : 10e6 bpl teor14
+30e7 : a003 ldy #3
+30e9 : teor15
+ set_ay absEOa,$ff
+ > load_flag $ff
+30e9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+30eb : 48 > pha ;use stack to load status
+30ec : b95e02 > lda absEOa,y ;precharge accu
+30ef : 28 > plp
+
+30f0 : 5142 eor (indEO),y
+ tst_ay absrlo,absflo,$ff-fnz
+30f2 : 08 > php ;save flags
+30f3 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+30f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+30f8 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+30f9 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+30fb : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+30fe : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3100 : 88 dey
+3101 : 10e6 bpl teor15
+ next_test
+3103 : ad0002 > lda test_case ;previous test
+3106 : c927 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3108 : d0fe > bne * ;failed not equal (non zero)
+ >
+0028 = >test_num = test_num + 1
+310a : a928 > lda #test_num ;*** next tests' number
+310c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; OR
+310f : a203 ldx #3 ;immediate - self modifying code
+3111 : b518 tora lda zpOR,x
+3113 : 8d0f02 sta ex_orai+1 ;set ORA # operand
+ set_ax absORa,0
+ > load_flag 0
+3116 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3118 : 48 > pha ;use stack to load status
+3119 : bd5602 > lda absORa,x ;precharge accu
+311c : 28 > plp
+
+311d : 200e02 jsr ex_orai ;execute ORA # in RAM
+ tst_ax absrlo,absflo,0
+3120 : 08 > php ;save flags
+3121 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3124 : d0fe > bne * ;failed not equal (non zero)
+ >
+3126 : 68 > pla ;load status
+ > eor_flag 0
+3127 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3129 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+312c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+312e : ca dex
+312f : 10e0 bpl tora
+3131 : a203 ldx #3
+3133 : b518 tora1 lda zpOR,x
+3135 : 8d0f02 sta ex_orai+1 ;set ORA # operand
+ set_ax absORa,$ff
+ > load_flag $ff
+3138 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+313a : 48 > pha ;use stack to load status
+313b : bd5602 > lda absORa,x ;precharge accu
+313e : 28 > plp
+
+313f : 200e02 jsr ex_orai ;execute ORA # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+3142 : 08 > php ;save flags
+3143 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3146 : d0fe > bne * ;failed not equal (non zero)
+ >
+3148 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3149 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+314b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+314e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3150 : ca dex
+3151 : 10e0 bpl tora1
+
+3153 : a203 ldx #3 ;zp
+3155 : b518 tora2 lda zpOR,x
+3157 : 850c sta zpt
+ set_ax absORa,0
+ > load_flag 0
+3159 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+315b : 48 > pha ;use stack to load status
+315c : bd5602 > lda absORa,x ;precharge accu
+315f : 28 > plp
+
+3160 : 050c ora zpt
+ tst_ax absrlo,absflo,0
+3162 : 08 > php ;save flags
+3163 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3166 : d0fe > bne * ;failed not equal (non zero)
+ >
+3168 : 68 > pla ;load status
+ > eor_flag 0
+3169 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+316b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+316e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3170 : ca dex
+3171 : 10e2 bpl tora2
+3173 : a203 ldx #3
+3175 : b518 tora3 lda zpOR,x
+3177 : 850c sta zpt
+ set_ax absORa,$ff
+ > load_flag $ff
+3179 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+317b : 48 > pha ;use stack to load status
+317c : bd5602 > lda absORa,x ;precharge accu
+317f : 28 > plp
+
+3180 : 050c ora zpt
+ tst_ax absrlo,absflo,$ff-fnz
+3182 : 08 > php ;save flags
+3183 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3186 : d0fe > bne * ;failed not equal (non zero)
+ >
+3188 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3189 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+318b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+318e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3190 : ca dex
+3191 : 10e2 bpl tora3
+
+3193 : a203 ldx #3 ;abs
+3195 : b518 tora4 lda zpOR,x
+3197 : 8d0302 sta abst
+ set_ax absORa,0
+ > load_flag 0
+319a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+319c : 48 > pha ;use stack to load status
+319d : bd5602 > lda absORa,x ;precharge accu
+31a0 : 28 > plp
+
+31a1 : 0d0302 ora abst
+ tst_ax absrlo,absflo,0
+31a4 : 08 > php ;save flags
+31a5 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+31a8 : d0fe > bne * ;failed not equal (non zero)
+ >
+31aa : 68 > pla ;load status
+ > eor_flag 0
+31ab : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+31ad : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+31b0 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+31b2 : ca dex
+31b3 : 10e0 bpl tora4
+31b5 : a203 ldx #3
+31b7 : b518 tora5 lda zpOR,x
+31b9 : 8d0302 sta abst
+ set_ax absORa,$ff
+ > load_flag $ff
+31bc : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+31be : 48 > pha ;use stack to load status
+31bf : bd5602 > lda absORa,x ;precharge accu
+31c2 : 28 > plp
+
+31c3 : 0d0302 ora abst
+ tst_ax absrlo,absflo,$ff-fnz
+31c6 : 08 > php ;save flags
+31c7 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+31ca : d0fe > bne * ;failed not equal (non zero)
+ >
+31cc : 68 > pla ;load status
+ > eor_flag $ff-fnz
+31cd : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+31cf : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+31d2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+31d4 : ca dex
+31d5 : 1002 bpl tora6
+
+31d7 : a203 ldx #3 ;zp,x
+31d9 : tora6
+ set_ax absORa,0
+ > load_flag 0
+31d9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+31db : 48 > pha ;use stack to load status
+31dc : bd5602 > lda absORa,x ;precharge accu
+31df : 28 > plp
+
+31e0 : 1518 ora zpOR,x
+ tst_ax absrlo,absflo,0
+31e2 : 08 > php ;save flags
+31e3 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+31e6 : d0fe > bne * ;failed not equal (non zero)
+ >
+31e8 : 68 > pla ;load status
+ > eor_flag 0
+31e9 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+31eb : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+31ee : d0fe > bne * ;failed not equal (non zero)
+ >
+
+31f0 : ca dex
+31f1 : 10e6 bpl tora6
+31f3 : a203 ldx #3
+31f5 : tora7
+ set_ax absORa,$ff
+ > load_flag $ff
+31f5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+31f7 : 48 > pha ;use stack to load status
+31f8 : bd5602 > lda absORa,x ;precharge accu
+31fb : 28 > plp
+
+31fc : 1518 ora zpOR,x
+ tst_ax absrlo,absflo,$ff-fnz
+31fe : 08 > php ;save flags
+31ff : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3202 : d0fe > bne * ;failed not equal (non zero)
+ >
+3204 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3205 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3207 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+320a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+320c : ca dex
+320d : 10e6 bpl tora7
+
+320f : a203 ldx #3 ;abs,x
+3211 : tora8
+ set_ax absORa,0
+ > load_flag 0
+3211 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3213 : 48 > pha ;use stack to load status
+3214 : bd5602 > lda absORa,x ;precharge accu
+3217 : 28 > plp
+
+3218 : 1d4a02 ora absOR,x
+ tst_ax absrlo,absflo,0
+321b : 08 > php ;save flags
+321c : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+321f : d0fe > bne * ;failed not equal (non zero)
+ >
+3221 : 68 > pla ;load status
+ > eor_flag 0
+3222 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3224 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3227 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3229 : ca dex
+322a : 10e5 bpl tora8
+322c : a203 ldx #3
+322e : tora9
+ set_ax absORa,$ff
+ > load_flag $ff
+322e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3230 : 48 > pha ;use stack to load status
+3231 : bd5602 > lda absORa,x ;precharge accu
+3234 : 28 > plp
+
+3235 : 1d4a02 ora absOR,x
+ tst_ax absrlo,absflo,$ff-fnz
+3238 : 08 > php ;save flags
+3239 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+323c : d0fe > bne * ;failed not equal (non zero)
+ >
+323e : 68 > pla ;load status
+ > eor_flag $ff-fnz
+323f : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3241 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3244 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3246 : ca dex
+3247 : 10e5 bpl tora9
+
+3249 : a003 ldy #3 ;abs,y
+324b : tora10
+ set_ay absORa,0
+ > load_flag 0
+324b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+324d : 48 > pha ;use stack to load status
+324e : b95602 > lda absORa,y ;precharge accu
+3251 : 28 > plp
+
+3252 : 194a02 ora absOR,y
+ tst_ay absrlo,absflo,0
+3255 : 08 > php ;save flags
+3256 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3259 : d0fe > bne * ;failed not equal (non zero)
+ >
+325b : 68 > pla ;load status
+ > eor_flag 0
+325c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+325e : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3261 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3263 : 88 dey
+3264 : 10e5 bpl tora10
+3266 : a003 ldy #3
+3268 : tora11
+ set_ay absORa,$ff
+ > load_flag $ff
+3268 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+326a : 48 > pha ;use stack to load status
+326b : b95602 > lda absORa,y ;precharge accu
+326e : 28 > plp
+
+326f : 194a02 ora absOR,y
+ tst_ay absrlo,absflo,$ff-fnz
+3272 : 08 > php ;save flags
+3273 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3276 : d0fe > bne * ;failed not equal (non zero)
+ >
+3278 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3279 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+327b : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+327e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+3280 : 88 dey
+3281 : 10e5 bpl tora11
+
+3283 : a206 ldx #6 ;(zp,x)
+3285 : a003 ldy #3
+3287 : tora12
+ set_ay absORa,0
+ > load_flag 0
+3287 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3289 : 48 > pha ;use stack to load status
+328a : b95602 > lda absORa,y ;precharge accu
+328d : 28 > plp
+
+328e : 014a ora (indOR,x)
+ tst_ay absrlo,absflo,0
+3290 : 08 > php ;save flags
+3291 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3294 : d0fe > bne * ;failed not equal (non zero)
+ >
+3296 : 68 > pla ;load status
+ > eor_flag 0
+3297 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3299 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+329c : d0fe > bne * ;failed not equal (non zero)
+ >
+
+329e : ca dex
+329f : ca dex
+32a0 : 88 dey
+32a1 : 10e4 bpl tora12
+32a3 : a206 ldx #6
+32a5 : a003 ldy #3
+32a7 : tora13
+ set_ay absORa,$ff
+ > load_flag $ff
+32a7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+32a9 : 48 > pha ;use stack to load status
+32aa : b95602 > lda absORa,y ;precharge accu
+32ad : 28 > plp
+
+32ae : 014a ora (indOR,x)
+ tst_ay absrlo,absflo,$ff-fnz
+32b0 : 08 > php ;save flags
+32b1 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+32b4 : d0fe > bne * ;failed not equal (non zero)
+ >
+32b6 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+32b7 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+32b9 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+32bc : d0fe > bne * ;failed not equal (non zero)
+ >
+
+32be : ca dex
+32bf : ca dex
+32c0 : 88 dey
+32c1 : 10e4 bpl tora13
+
+32c3 : a003 ldy #3 ;(zp),y
+32c5 : tora14
+ set_ay absORa,0
+ > load_flag 0
+32c5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+32c7 : 48 > pha ;use stack to load status
+32c8 : b95602 > lda absORa,y ;precharge accu
+32cb : 28 > plp
+
+32cc : 114a ora (indOR),y
+ tst_ay absrlo,absflo,0
+32ce : 08 > php ;save flags
+32cf : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+32d2 : d0fe > bne * ;failed not equal (non zero)
+ >
+32d4 : 68 > pla ;load status
+ > eor_flag 0
+32d5 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+32d7 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+32da : d0fe > bne * ;failed not equal (non zero)
+ >
+
+32dc : 88 dey
+32dd : 10e6 bpl tora14
+32df : a003 ldy #3
+32e1 : tora15
+ set_ay absORa,$ff
+ > load_flag $ff
+32e1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+32e3 : 48 > pha ;use stack to load status
+32e4 : b95602 > lda absORa,y ;precharge accu
+32e7 : 28 > plp
+
+32e8 : 114a ora (indOR),y
+ tst_ay absrlo,absflo,$ff-fnz
+32ea : 08 > php ;save flags
+32eb : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+32ee : d0fe > bne * ;failed not equal (non zero)
+ >
+32f0 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+32f1 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+32f3 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+32f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+32f8 : 88 dey
+32f9 : 10e6 bpl tora15
+ if I_flag = 3
+32fb : 58 cli
+ endif
+ next_test
+32fc : ad0002 > lda test_case ;previous test
+32ff : c928 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3301 : d0fe > bne * ;failed not equal (non zero)
+ >
+0029 = >test_num = test_num + 1
+3303 : a929 > lda #test_num ;*** next tests' number
+3305 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; full binary add/subtract test
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+3308 : d8 cld
+3309 : a20e ldx #ad2 ;for indexed test
+330b : a0ff ldy #$ff ;max range
+330d : a900 lda #0 ;start with adding zeroes & no carry
+330f : 850c sta adfc ;carry in - for diag
+3311 : 850d sta ad1 ;operand 1 - accumulator
+3313 : 850e sta ad2 ;operand 2 - memory or immediate
+3315 : 8d0302 sta ada2 ;non zp
+3318 : 850f sta adrl ;expected result bits 0-7
+331a : 8510 sta adrh ;expected result bit 8 (carry out)
+331c : a9ff lda #$ff ;complemented operand 2 for subtract
+331e : 8512 sta sb2
+3320 : 8d0402 sta sba2 ;non zp
+3323 : a902 lda #2 ;expected Z-flag
+3325 : 8511 sta adrf
+3327 : 18 tadd clc ;test with carry clear
+3328 : 20a235 jsr chkadd
+332b : e60c inc adfc ;now with carry
+332d : e60f inc adrl ;result +1
+332f : 08 php ;save N & Z from low result
+3330 : 08 php
+3331 : 68 pla ;accu holds expected flags
+3332 : 2982 and #$82 ;mask N & Z
+3334 : 28 plp
+3335 : d002 bne tadd1
+3337 : e610 inc adrh ;result bit 8 - carry
+3339 : 0510 tadd1 ora adrh ;merge C to expected flags
+333b : 8511 sta adrf ;save expected flags except overflow
+333d : 38 sec ;test with carry set
+333e : 20a235 jsr chkadd
+3341 : c60c dec adfc ;same for operand +1 but no carry
+3343 : e60d inc ad1
+3345 : d0e0 bne tadd ;iterate op1
+3347 : a900 lda #0 ;preset result to op2 when op1 = 0
+3349 : 8510 sta adrh
+334b : ee0302 inc ada2
+334e : e60e inc ad2
+3350 : 08 php ;save NZ as operand 2 becomes the new result
+3351 : 68 pla
+3352 : 2982 and #$82 ;mask N00000Z0
+3354 : 8511 sta adrf ;no need to check carry as we are adding to 0
+3356 : c612 dec sb2 ;complement subtract operand 2
+3358 : ce0402 dec sba2
+335b : a50e lda ad2
+335d : 850f sta adrl
+335f : d0c6 bne tadd ;iterate op2
+ if disable_decimal < 1
+ next_test
+3361 : ad0002 > lda test_case ;previous test
+3364 : c929 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3366 : d0fe > bne * ;failed not equal (non zero)
+ >
+002a = >test_num = test_num + 1
+3368 : a92a > lda #test_num ;*** next tests' number
+336a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, N V Z flags are ignored
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+336d : f8 sed
+336e : a20e ldx #ad2 ;for indexed test
+3370 : a0ff ldy #$ff ;max range
+3372 : a999 lda #$99 ;start with adding 99 to 99 with carry
+3374 : 850d sta ad1 ;operand 1 - accumulator
+3376 : 850e sta ad2 ;operand 2 - memory or immediate
+3378 : 8d0302 sta ada2 ;non zp
+337b : 850f sta adrl ;expected result bits 0-7
+337d : a901 lda #1 ;set carry in & out
+337f : 850c sta adfc ;carry in - for diag
+3381 : 8510 sta adrh ;expected result bit 8 (carry out)
+3383 : a900 lda #0 ;complemented operand 2 for subtract
+3385 : 8512 sta sb2
+3387 : 8d0402 sta sba2 ;non zp
+338a : 38 tdad sec ;test with carry set
+338b : 206f34 jsr chkdad
+338e : c60c dec adfc ;now with carry clear
+3390 : a50f lda adrl ;decimal adjust result
+3392 : d008 bne tdad1 ;skip clear carry & preset result 99 (9A-1)
+3394 : c610 dec adrh
+3396 : a999 lda #$99
+3398 : 850f sta adrl
+339a : d012 bne tdad3
+339c : 290f tdad1 and #$f ;lower nibble mask
+339e : d00c bne tdad2 ;no decimal adjust needed
+33a0 : c60f dec adrl ;decimal adjust (?0-6)
+33a2 : c60f dec adrl
+33a4 : c60f dec adrl
+33a6 : c60f dec adrl
+33a8 : c60f dec adrl
+33aa : c60f dec adrl
+33ac : c60f tdad2 dec adrl ;result -1
+33ae : 18 tdad3 clc ;test with carry clear
+33af : 206f34 jsr chkdad
+33b2 : e60c inc adfc ;same for operand -1 but with carry
+33b4 : a50d lda ad1 ;decimal adjust operand 1
+33b6 : f015 beq tdad5 ;iterate operand 2
+33b8 : 290f and #$f ;lower nibble mask
+33ba : d00c bne tdad4 ;skip decimal adjust
+33bc : c60d dec ad1 ;decimal adjust (?0-6)
+33be : c60d dec ad1
+33c0 : c60d dec ad1
+33c2 : c60d dec ad1
+33c4 : c60d dec ad1
+33c6 : c60d dec ad1
+33c8 : c60d tdad4 dec ad1 ;operand 1 -1
+33ca : 4c8a33 jmp tdad ;iterate op1
+
+33cd : a999 tdad5 lda #$99 ;precharge op1 max
+33cf : 850d sta ad1
+33d1 : a50e lda ad2 ;decimal adjust operand 2
+33d3 : f030 beq tdad7 ;end of iteration
+33d5 : 290f and #$f ;lower nibble mask
+33d7 : d018 bne tdad6 ;skip decimal adjust
+33d9 : c60e dec ad2 ;decimal adjust (?0-6)
+33db : c60e dec ad2
+33dd : c60e dec ad2
+33df : c60e dec ad2
+33e1 : c60e dec ad2
+33e3 : c60e dec ad2
+33e5 : e612 inc sb2 ;complemented decimal adjust for subtract (?9+6)
+33e7 : e612 inc sb2
+33e9 : e612 inc sb2
+33eb : e612 inc sb2
+33ed : e612 inc sb2
+33ef : e612 inc sb2
+33f1 : c60e tdad6 dec ad2 ;operand 2 -1
+33f3 : e612 inc sb2 ;complemented operand for subtract
+33f5 : a512 lda sb2
+33f7 : 8d0402 sta sba2 ;copy as non zp operand
+33fa : a50e lda ad2
+33fc : 8d0302 sta ada2 ;copy as non zp operand
+33ff : 850f sta adrl ;new result since op1+carry=00+carry +op2=op2
+3401 : e610 inc adrh ;result carry
+3403 : d085 bne tdad ;iterate op2
+3405 : tdad7
+ next_test
+3405 : ad0002 > lda test_case ;previous test
+3408 : c92a > cmp #test_num
+ > trap_ne ;test is out of sequence
+340a : d0fe > bne * ;failed not equal (non zero)
+ >
+002b = >test_num = test_num + 1
+340c : a92b > lda #test_num ;*** next tests' number
+340e : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; decimal/binary switch test
+ ; tests CLD, SED, PLP, RTI to properly switch between decimal & binary opcode
+ ; tables
+3411 : 18 clc
+3412 : d8 cld
+3413 : 08 php
+3414 : a955 lda #$55
+3416 : 6955 adc #$55
+3418 : c9aa cmp #$aa
+ trap_ne ;expected binary result after cld
+341a : d0fe > bne * ;failed not equal (non zero)
+
+341c : 18 clc
+341d : f8 sed
+341e : 08 php
+341f : a955 lda #$55
+3421 : 6955 adc #$55
+3423 : c910 cmp #$10
+ trap_ne ;expected decimal result after sed
+3425 : d0fe > bne * ;failed not equal (non zero)
+
+3427 : d8 cld
+3428 : 28 plp
+3429 : a955 lda #$55
+342b : 6955 adc #$55
+342d : c910 cmp #$10
+ trap_ne ;expected decimal result after plp D=1
+342f : d0fe > bne * ;failed not equal (non zero)
+
+3431 : 28 plp
+3432 : a955 lda #$55
+3434 : 6955 adc #$55
+3436 : c9aa cmp #$aa
+ trap_ne ;expected binary result after plp D=0
+3438 : d0fe > bne * ;failed not equal (non zero)
+
+343a : 18 clc
+343b : a934 lda #hi bin_rti_ret ;emulated interrupt for rti
+343d : 48 pha
+343e : a955 lda #lo bin_rti_ret
+3440 : 48 pha
+3441 : 08 php
+3442 : f8 sed
+3443 : a934 lda #hi dec_rti_ret ;emulated interrupt for rti
+3445 : 48 pha
+3446 : a94c lda #lo dec_rti_ret
+3448 : 48 pha
+3449 : 08 php
+344a : d8 cld
+344b : 40 rti
+344c : dec_rti_ret
+344c : a955 lda #$55
+344e : 6955 adc #$55
+3450 : c910 cmp #$10
+ trap_ne ;expected decimal result after rti D=1
+3452 : d0fe > bne * ;failed not equal (non zero)
+
+3454 : 40 rti
+3455 : bin_rti_ret
+3455 : a955 lda #$55
+3457 : 6955 adc #$55
+3459 : c9aa cmp #$aa
+ trap_ne ;expected binary result after rti D=0
+345b : d0fe > bne * ;failed not equal (non zero)
+
+ endif
+
+345d : ad0002 lda test_case
+3460 : c92b cmp #test_num
+ trap_ne ;previous test is out of sequence
+3462 : d0fe > bne * ;failed not equal (non zero)
+
+3464 : a9f0 lda #$f0 ;mark opcode testing complete
+3466 : 8d0002 sta test_case
+
+ ; final RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ check_ram
+ > ;RAM check disabled - RAM size not set
+
+ ; *** DEBUG INFO ***
+ ; to debug checksum errors uncomment check_ram in the next_test macro to
+ ; narrow down the responsible opcode.
+ ; may give false errors when monitor, OS or other background activity is
+ ; allowed during previous tests.
+
+
+ ; S U C C E S S ************************************************
+ ; -------------
+ success ;if you get here everything went well
+3469 : 4c6934 > jmp * ;test passed, no errors
+
+ ; -------------
+ ; S U C C E S S ************************************************
+346c : 4c0004 jmp start ;run again
+
+ if disable_decimal < 1
+ ; core subroutine of the decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, N V Z flags are ignored
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+346f : chkdad
+ ; decimal ADC / SBC zp
+346f : 08 php ;save carry for subtract
+3470 : a50d lda ad1
+3472 : 650e adc ad2 ;perform add
+3474 : 08 php
+3475 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3477 : d0fe > bne * ;failed not equal (non zero)
+
+3479 : 68 pla ;check flags
+347a : 2901 and #1 ;mask carry
+347c : c510 cmp adrh
+ trap_ne ;bad carry
+347e : d0fe > bne * ;failed not equal (non zero)
+
+3480 : 28 plp
+3481 : 08 php ;save carry for next add
+3482 : a50d lda ad1
+3484 : e512 sbc sb2 ;perform subtract
+3486 : 08 php
+3487 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3489 : d0fe > bne * ;failed not equal (non zero)
+
+348b : 68 pla ;check flags
+348c : 2901 and #1 ;mask carry
+348e : c510 cmp adrh
+ trap_ne ;bad flags
+3490 : d0fe > bne * ;failed not equal (non zero)
+
+3492 : 28 plp
+ ; decimal ADC / SBC abs
+3493 : 08 php ;save carry for subtract
+3494 : a50d lda ad1
+3496 : 6d0302 adc ada2 ;perform add
+3499 : 08 php
+349a : c50f cmp adrl ;check result
+ trap_ne ;bad result
+349c : d0fe > bne * ;failed not equal (non zero)
+
+349e : 68 pla ;check flags
+349f : 2901 and #1 ;mask carry
+34a1 : c510 cmp adrh
+ trap_ne ;bad carry
+34a3 : d0fe > bne * ;failed not equal (non zero)
+
+34a5 : 28 plp
+34a6 : 08 php ;save carry for next add
+34a7 : a50d lda ad1
+34a9 : ed0402 sbc sba2 ;perform subtract
+34ac : 08 php
+34ad : c50f cmp adrl ;check result
+ trap_ne ;bad result
+34af : d0fe > bne * ;failed not equal (non zero)
+
+34b1 : 68 pla ;check flags
+34b2 : 2901 and #1 ;mask carry
+34b4 : c510 cmp adrh
+ trap_ne ;bad carry
+34b6 : d0fe > bne * ;failed not equal (non zero)
+
+34b8 : 28 plp
+ ; decimal ADC / SBC #
+34b9 : 08 php ;save carry for subtract
+34ba : a50e lda ad2
+34bc : 8d1202 sta ex_adci+1 ;set ADC # operand
+34bf : a50d lda ad1
+34c1 : 201102 jsr ex_adci ;execute ADC # in RAM
+34c4 : 08 php
+34c5 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+34c7 : d0fe > bne * ;failed not equal (non zero)
+
+34c9 : 68 pla ;check flags
+34ca : 2901 and #1 ;mask carry
+34cc : c510 cmp adrh
+ trap_ne ;bad carry
+34ce : d0fe > bne * ;failed not equal (non zero)
+
+34d0 : 28 plp
+34d1 : 08 php ;save carry for next add
+34d2 : a512 lda sb2
+34d4 : 8d1502 sta ex_sbci+1 ;set SBC # operand
+34d7 : a50d lda ad1
+34d9 : 201402 jsr ex_sbci ;execute SBC # in RAM
+34dc : 08 php
+34dd : c50f cmp adrl ;check result
+ trap_ne ;bad result
+34df : d0fe > bne * ;failed not equal (non zero)
+
+34e1 : 68 pla ;check flags
+34e2 : 2901 and #1 ;mask carry
+34e4 : c510 cmp adrh
+ trap_ne ;bad carry
+34e6 : d0fe > bne * ;failed not equal (non zero)
+
+34e8 : 28 plp
+ ; decimal ADC / SBC zp,x
+34e9 : 08 php ;save carry for subtract
+34ea : a50d lda ad1
+34ec : 7500 adc 0,x ;perform add
+34ee : 08 php
+34ef : c50f cmp adrl ;check result
+ trap_ne ;bad result
+34f1 : d0fe > bne * ;failed not equal (non zero)
+
+34f3 : 68 pla ;check flags
+34f4 : 2901 and #1 ;mask carry
+34f6 : c510 cmp adrh
+ trap_ne ;bad carry
+34f8 : d0fe > bne * ;failed not equal (non zero)
+
+34fa : 28 plp
+34fb : 08 php ;save carry for next add
+34fc : a50d lda ad1
+34fe : f504 sbc sb2-ad2,x ;perform subtract
+3500 : 08 php
+3501 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3503 : d0fe > bne * ;failed not equal (non zero)
+
+3505 : 68 pla ;check flags
+3506 : 2901 and #1 ;mask carry
+3508 : c510 cmp adrh
+ trap_ne ;bad carry
+350a : d0fe > bne * ;failed not equal (non zero)
+
+350c : 28 plp
+ ; decimal ADC / SBC abs,x
+350d : 08 php ;save carry for subtract
+350e : a50d lda ad1
+3510 : 7df501 adc ada2-ad2,x ;perform add
+3513 : 08 php
+3514 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3516 : d0fe > bne * ;failed not equal (non zero)
+
+3518 : 68 pla ;check flags
+3519 : 2901 and #1 ;mask carry
+351b : c510 cmp adrh
+ trap_ne ;bad carry
+351d : d0fe > bne * ;failed not equal (non zero)
+
+351f : 28 plp
+3520 : 08 php ;save carry for next add
+3521 : a50d lda ad1
+3523 : fdf601 sbc sba2-ad2,x ;perform subtract
+3526 : 08 php
+3527 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3529 : d0fe > bne * ;failed not equal (non zero)
+
+352b : 68 pla ;check flags
+352c : 2901 and #1 ;mask carry
+352e : c510 cmp adrh
+ trap_ne ;bad carry
+3530 : d0fe > bne * ;failed not equal (non zero)
+
+3532 : 28 plp
+ ; decimal ADC / SBC abs,y
+3533 : 08 php ;save carry for subtract
+3534 : a50d lda ad1
+3536 : 790401 adc ada2-$ff,y ;perform add
+3539 : 08 php
+353a : c50f cmp adrl ;check result
+ trap_ne ;bad result
+353c : d0fe > bne * ;failed not equal (non zero)
+
+353e : 68 pla ;check flags
+353f : 2901 and #1 ;mask carry
+3541 : c510 cmp adrh
+ trap_ne ;bad carry
+3543 : d0fe > bne * ;failed not equal (non zero)
+
+3545 : 28 plp
+3546 : 08 php ;save carry for next add
+3547 : a50d lda ad1
+3549 : f90501 sbc sba2-$ff,y ;perform subtract
+354c : 08 php
+354d : c50f cmp adrl ;check result
+ trap_ne ;bad result
+354f : d0fe > bne * ;failed not equal (non zero)
+
+3551 : 68 pla ;check flags
+3552 : 2901 and #1 ;mask carry
+3554 : c510 cmp adrh
+ trap_ne ;bad carry
+3556 : d0fe > bne * ;failed not equal (non zero)
+
+3558 : 28 plp
+ ; decimal ADC / SBC (zp,x)
+3559 : 08 php ;save carry for subtract
+355a : a50d lda ad1
+355c : 6144 adc (lo adi2-ad2,x) ;perform add
+355e : 08 php
+355f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3561 : d0fe > bne * ;failed not equal (non zero)
+
+3563 : 68 pla ;check flags
+3564 : 2901 and #1 ;mask carry
+3566 : c510 cmp adrh
+ trap_ne ;bad carry
+3568 : d0fe > bne * ;failed not equal (non zero)
+
+356a : 28 plp
+356b : 08 php ;save carry for next add
+356c : a50d lda ad1
+356e : e146 sbc (lo sbi2-ad2,x) ;perform subtract
+3570 : 08 php
+3571 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3573 : d0fe > bne * ;failed not equal (non zero)
+
+3575 : 68 pla ;check flags
+3576 : 2901 and #1 ;mask carry
+3578 : c510 cmp adrh
+ trap_ne ;bad carry
+357a : d0fe > bne * ;failed not equal (non zero)
+
+357c : 28 plp
+ ; decimal ADC / SBC (abs),y
+357d : 08 php ;save carry for subtract
+357e : a50d lda ad1
+3580 : 7156 adc (adiy2),y ;perform add
+3582 : 08 php
+3583 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3585 : d0fe > bne * ;failed not equal (non zero)
+
+3587 : 68 pla ;check flags
+3588 : 2901 and #1 ;mask carry
+358a : c510 cmp adrh
+ trap_ne ;bad carry
+358c : d0fe > bne * ;failed not equal (non zero)
+
+358e : 28 plp
+358f : 08 php ;save carry for next add
+3590 : a50d lda ad1
+3592 : f158 sbc (sbiy2),y ;perform subtract
+3594 : 08 php
+3595 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3597 : d0fe > bne * ;failed not equal (non zero)
+
+3599 : 68 pla ;check flags
+359a : 2901 and #1 ;mask carry
+359c : c510 cmp adrh
+ trap_ne ;bad carry
+359e : d0fe > bne * ;failed not equal (non zero)
+
+35a0 : 28 plp
+35a1 : 60 rts
+ endif
+
+ ; core subroutine of the full binary add/subtract test
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+35a2 : a511 chkadd lda adrf ;add V-flag if overflow
+35a4 : 2983 and #$83 ;keep N-----ZC / clear V
+35a6 : 48 pha
+35a7 : a50d lda ad1 ;test sign unequal between operands
+35a9 : 450e eor ad2
+35ab : 300a bmi ckad1 ;no overflow possible - operands have different sign
+35ad : a50d lda ad1 ;test sign equal between operands and result
+35af : 450f eor adrl
+35b1 : 1004 bpl ckad1 ;no overflow occured - operand and result have same sign
+35b3 : 68 pla
+35b4 : 0940 ora #$40 ;set V
+35b6 : 48 pha
+35b7 : 68 ckad1 pla
+35b8 : 8511 sta adrf ;save expected flags
+ ; binary ADC / SBC zp
+35ba : 08 php ;save carry for subtract
+35bb : a50d lda ad1
+35bd : 650e adc ad2 ;perform add
+35bf : 08 php
+35c0 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+35c2 : d0fe > bne * ;failed not equal (non zero)
+
+35c4 : 68 pla ;check flags
+35c5 : 29c3 and #$c3 ;mask NV----ZC
+35c7 : c511 cmp adrf
+ trap_ne ;bad flags
+35c9 : d0fe > bne * ;failed not equal (non zero)
+
+35cb : 28 plp
+35cc : 08 php ;save carry for next add
+35cd : a50d lda ad1
+35cf : e512 sbc sb2 ;perform subtract
+35d1 : 08 php
+35d2 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+35d4 : d0fe > bne * ;failed not equal (non zero)
+
+35d6 : 68 pla ;check flags
+35d7 : 29c3 and #$c3 ;mask NV----ZC
+35d9 : c511 cmp adrf
+ trap_ne ;bad flags
+35db : d0fe > bne * ;failed not equal (non zero)
+
+35dd : 28 plp
+ ; binary ADC / SBC abs
+35de : 08 php ;save carry for subtract
+35df : a50d lda ad1
+35e1 : 6d0302 adc ada2 ;perform add
+35e4 : 08 php
+35e5 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+35e7 : d0fe > bne * ;failed not equal (non zero)
+
+35e9 : 68 pla ;check flags
+35ea : 29c3 and #$c3 ;mask NV----ZC
+35ec : c511 cmp adrf
+ trap_ne ;bad flags
+35ee : d0fe > bne * ;failed not equal (non zero)
+
+35f0 : 28 plp
+35f1 : 08 php ;save carry for next add
+35f2 : a50d lda ad1
+35f4 : ed0402 sbc sba2 ;perform subtract
+35f7 : 08 php
+35f8 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+35fa : d0fe > bne * ;failed not equal (non zero)
+
+35fc : 68 pla ;check flags
+35fd : 29c3 and #$c3 ;mask NV----ZC
+35ff : c511 cmp adrf
+ trap_ne ;bad flags
+3601 : d0fe > bne * ;failed not equal (non zero)
+
+3603 : 28 plp
+ ; binary ADC / SBC #
+3604 : 08 php ;save carry for subtract
+3605 : a50e lda ad2
+3607 : 8d1202 sta ex_adci+1 ;set ADC # operand
+360a : a50d lda ad1
+360c : 201102 jsr ex_adci ;execute ADC # in RAM
+360f : 08 php
+3610 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3612 : d0fe > bne * ;failed not equal (non zero)
+
+3614 : 68 pla ;check flags
+3615 : 29c3 and #$c3 ;mask NV----ZC
+3617 : c511 cmp adrf
+ trap_ne ;bad flags
+3619 : d0fe > bne * ;failed not equal (non zero)
+
+361b : 28 plp
+361c : 08 php ;save carry for next add
+361d : a512 lda sb2
+361f : 8d1502 sta ex_sbci+1 ;set SBC # operand
+3622 : a50d lda ad1
+3624 : 201402 jsr ex_sbci ;execute SBC # in RAM
+3627 : 08 php
+3628 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+362a : d0fe > bne * ;failed not equal (non zero)
+
+362c : 68 pla ;check flags
+362d : 29c3 and #$c3 ;mask NV----ZC
+362f : c511 cmp adrf
+ trap_ne ;bad flags
+3631 : d0fe > bne * ;failed not equal (non zero)
+
+3633 : 28 plp
+ ; binary ADC / SBC zp,x
+3634 : 08 php ;save carry for subtract
+3635 : a50d lda ad1
+3637 : 7500 adc 0,x ;perform add
+3639 : 08 php
+363a : c50f cmp adrl ;check result
+ trap_ne ;bad result
+363c : d0fe > bne * ;failed not equal (non zero)
+
+363e : 68 pla ;check flags
+363f : 29c3 and #$c3 ;mask NV----ZC
+3641 : c511 cmp adrf
+ trap_ne ;bad flags
+3643 : d0fe > bne * ;failed not equal (non zero)
+
+3645 : 28 plp
+3646 : 08 php ;save carry for next add
+3647 : a50d lda ad1
+3649 : f504 sbc sb2-ad2,x ;perform subtract
+364b : 08 php
+364c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+364e : d0fe > bne * ;failed not equal (non zero)
+
+3650 : 68 pla ;check flags
+3651 : 29c3 and #$c3 ;mask NV----ZC
+3653 : c511 cmp adrf
+ trap_ne ;bad flags
+3655 : d0fe > bne * ;failed not equal (non zero)
+
+3657 : 28 plp
+ ; binary ADC / SBC abs,x
+3658 : 08 php ;save carry for subtract
+3659 : a50d lda ad1
+365b : 7df501 adc ada2-ad2,x ;perform add
+365e : 08 php
+365f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3661 : d0fe > bne * ;failed not equal (non zero)
+
+3663 : 68 pla ;check flags
+3664 : 29c3 and #$c3 ;mask NV----ZC
+3666 : c511 cmp adrf
+ trap_ne ;bad flags
+3668 : d0fe > bne * ;failed not equal (non zero)
+
+366a : 28 plp
+366b : 08 php ;save carry for next add
+366c : a50d lda ad1
+366e : fdf601 sbc sba2-ad2,x ;perform subtract
+3671 : 08 php
+3672 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3674 : d0fe > bne * ;failed not equal (non zero)
+
+3676 : 68 pla ;check flags
+3677 : 29c3 and #$c3 ;mask NV----ZC
+3679 : c511 cmp adrf
+ trap_ne ;bad flags
+367b : d0fe > bne * ;failed not equal (non zero)
+
+367d : 28 plp
+ ; binary ADC / SBC abs,y
+367e : 08 php ;save carry for subtract
+367f : a50d lda ad1
+3681 : 790401 adc ada2-$ff,y ;perform add
+3684 : 08 php
+3685 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3687 : d0fe > bne * ;failed not equal (non zero)
+
+3689 : 68 pla ;check flags
+368a : 29c3 and #$c3 ;mask NV----ZC
+368c : c511 cmp adrf
+ trap_ne ;bad flags
+368e : d0fe > bne * ;failed not equal (non zero)
+
+3690 : 28 plp
+3691 : 08 php ;save carry for next add
+3692 : a50d lda ad1
+3694 : f90501 sbc sba2-$ff,y ;perform subtract
+3697 : 08 php
+3698 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+369a : d0fe > bne * ;failed not equal (non zero)
+
+369c : 68 pla ;check flags
+369d : 29c3 and #$c3 ;mask NV----ZC
+369f : c511 cmp adrf
+ trap_ne ;bad flags
+36a1 : d0fe > bne * ;failed not equal (non zero)
+
+36a3 : 28 plp
+ ; binary ADC / SBC (zp,x)
+36a4 : 08 php ;save carry for subtract
+36a5 : a50d lda ad1
+36a7 : 6144 adc (lo adi2-ad2,x) ;perform add
+36a9 : 08 php
+36aa : c50f cmp adrl ;check result
+ trap_ne ;bad result
+36ac : d0fe > bne * ;failed not equal (non zero)
+
+36ae : 68 pla ;check flags
+36af : 29c3 and #$c3 ;mask NV----ZC
+36b1 : c511 cmp adrf
+ trap_ne ;bad flags
+36b3 : d0fe > bne * ;failed not equal (non zero)
+
+36b5 : 28 plp
+36b6 : 08 php ;save carry for next add
+36b7 : a50d lda ad1
+36b9 : e146 sbc (lo sbi2-ad2,x) ;perform subtract
+36bb : 08 php
+36bc : c50f cmp adrl ;check result
+ trap_ne ;bad result
+36be : d0fe > bne * ;failed not equal (non zero)
+
+36c0 : 68 pla ;check flags
+36c1 : 29c3 and #$c3 ;mask NV----ZC
+36c3 : c511 cmp adrf
+ trap_ne ;bad flags
+36c5 : d0fe > bne * ;failed not equal (non zero)
+
+36c7 : 28 plp
+ ; binary ADC / SBC (abs),y
+36c8 : 08 php ;save carry for subtract
+36c9 : a50d lda ad1
+36cb : 7156 adc (adiy2),y ;perform add
+36cd : 08 php
+36ce : c50f cmp adrl ;check result
+ trap_ne ;bad result
+36d0 : d0fe > bne * ;failed not equal (non zero)
+
+36d2 : 68 pla ;check flags
+36d3 : 29c3 and #$c3 ;mask NV----ZC
+36d5 : c511 cmp adrf
+ trap_ne ;bad flags
+36d7 : d0fe > bne * ;failed not equal (non zero)
+
+36d9 : 28 plp
+36da : 08 php ;save carry for next add
+36db : a50d lda ad1
+36dd : f158 sbc (sbiy2),y ;perform subtract
+36df : 08 php
+36e0 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+36e2 : d0fe > bne * ;failed not equal (non zero)
+
+36e4 : 68 pla ;check flags
+36e5 : 29c3 and #$c3 ;mask NV----ZC
+36e7 : c511 cmp adrf
+ trap_ne ;bad flags
+36e9 : d0fe > bne * ;failed not equal (non zero)
+
+36eb : 28 plp
+36ec : 60 rts
+
+ ; target for the jump absolute test
+36ed : 88 dey
+36ee : 88 dey
+36ef : test_far
+36ef : 08 php ;either SP or Y count will fail, if we do not hit
+36f0 : 88 dey
+36f1 : 88 dey
+36f2 : 88 dey
+36f3 : 28 plp
+ trap_cs ;flags loaded?
+36f4 : b0fe > bcs * ;failed carry set
+
+ trap_vs
+36f6 : 70fe > bvs * ;failed overflow set
+
+ trap_mi
+36f8 : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_eq
+36fa : f0fe > beq * ;failed equal (zero)
+
+36fc : c946 cmp #'F' ;registers loaded?
+ trap_ne
+36fe : d0fe > bne * ;failed not equal (non zero)
+
+3700 : e041 cpx #'A'
+ trap_ne
+3702 : d0fe > bne * ;failed not equal (non zero)
+
+3704 : c04f cpy #('R'-3)
+ trap_ne
+3706 : d0fe > bne * ;failed not equal (non zero)
+
+3708 : 48 pha ;save a,x
+3709 : 8a txa
+370a : 48 pha
+370b : ba tsx
+370c : e0fd cpx #$fd ;check SP
+ trap_ne
+370e : d0fe > bne * ;failed not equal (non zero)
+
+3710 : 68 pla ;restore x
+3711 : aa tax
+ set_stat $ff
+ > load_flag $ff
+3712 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3714 : 48 > pha ;use stack to load status
+3715 : 28 > plp
+
+3716 : 68 pla ;restore a
+3717 : e8 inx ;return registers with modifications
+3718 : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+371a : 4c0f09 jmp far_ret
+
+ ; target for the jump indirect test
+371d : 00 align
+371e : 2737 ptr_tst_ind dw test_ind
+3720 : 6409 ptr_ind_ret dw ind_ret
+ trap ;runover protection
+3722 : 4c2237 > jmp * ;failed anyway
+
+3725 : 88 dey
+3726 : 88 dey
+3727 : test_ind
+3727 : 08 php ;either SP or Y count will fail, if we do not hit
+3728 : 88 dey
+3729 : 88 dey
+372a : 88 dey
+372b : 28 plp
+ trap_cs ;flags loaded?
+372c : b0fe > bcs * ;failed carry set
+
+ trap_vs
+372e : 70fe > bvs * ;failed overflow set
+
+ trap_mi
+3730 : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_eq
+3732 : f0fe > beq * ;failed equal (zero)
+
+3734 : c949 cmp #'I' ;registers loaded?
+ trap_ne
+3736 : d0fe > bne * ;failed not equal (non zero)
+
+3738 : e04e cpx #'N'
+ trap_ne
+373a : d0fe > bne * ;failed not equal (non zero)
+
+373c : c041 cpy #('D'-3)
+ trap_ne
+373e : d0fe > bne * ;failed not equal (non zero)
+
+3740 : 48 pha ;save a,x
+3741 : 8a txa
+3742 : 48 pha
+3743 : ba tsx
+3744 : e0fd cpx #$fd ;check SP
+ trap_ne
+3746 : d0fe > bne * ;failed not equal (non zero)
+
+3748 : 68 pla ;restore x
+3749 : aa tax
+ set_stat $ff
+ > load_flag $ff
+374a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+374c : 48 > pha ;use stack to load status
+374d : 28 > plp
+
+374e : 68 pla ;restore a
+374f : e8 inx ;return registers with modifications
+3750 : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+3752 : 6c2037 jmp (ptr_ind_ret)
+ trap ;runover protection
+3755 : 4c5537 > jmp * ;failed anyway
+
+3758 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ; target for the jump subroutine test
+375b : 88 dey
+375c : 88 dey
+375d : test_jsr
+375d : 08 php ;either SP or Y count will fail, if we do not hit
+375e : 88 dey
+375f : 88 dey
+3760 : 88 dey
+3761 : 28 plp
+ trap_cs ;flags loaded?
+3762 : b0fe > bcs * ;failed carry set
+
+ trap_vs
+3764 : 70fe > bvs * ;failed overflow set
+
+ trap_mi
+3766 : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_eq
+3768 : f0fe > beq * ;failed equal (zero)
+
+376a : c94a cmp #'J' ;registers loaded?
+ trap_ne
+376c : d0fe > bne * ;failed not equal (non zero)
+
+376e : e053 cpx #'S'
+ trap_ne
+3770 : d0fe > bne * ;failed not equal (non zero)
+
+3772 : c04f cpy #('R'-3)
+ trap_ne
+3774 : d0fe > bne * ;failed not equal (non zero)
+
+3776 : 48 pha ;save a,x
+3777 : 8a txa
+3778 : 48 pha
+3779 : ba tsx ;sp -4? (return addr,a,x)
+377a : e0fb cpx #$fb
+ trap_ne
+377c : d0fe > bne * ;failed not equal (non zero)
+
+377e : adff01 lda $1ff ;propper return on stack
+3781 : c909 cmp #hi(jsr_ret)
+ trap_ne
+3783 : d0fe > bne * ;failed not equal (non zero)
+
+3785 : adfe01 lda $1fe
+3788 : c99a cmp #lo(jsr_ret)
+ trap_ne
+378a : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+378c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+378e : 48 > pha ;use stack to load status
+378f : 28 > plp
+
+3790 : 68 pla ;pull x,a
+3791 : aa tax
+3792 : 68 pla
+3793 : e8 inx ;return registers with modifications
+3794 : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+3796 : 60 rts
+ trap ;runover protection
+3797 : 4c9737 > jmp * ;failed anyway
+
+379a : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ;trap in case of unexpected IRQ, NMI, BRK, RESET - BRK test target
+379d : nmi_trap
+ trap ;check stack for conditions at NMI
+379d : 4c9d37 > jmp * ;failed anyway
+
+37a0 : 4c0004 jmp start ;catastrophic error - cannot continue
+37a3 : res_trap
+ trap ;unexpected RESET
+37a3 : 4ca337 > jmp * ;failed anyway
+
+37a6 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+37a9 : 88 dey
+37aa : 88 dey
+37ab : irq_trap ;BRK test or unextpected BRK or IRQ
+37ab : 08 php ;either SP or Y count will fail, if we do not hit
+37ac : 88 dey
+37ad : 88 dey
+37ae : 88 dey
+ ;next traps could be caused by unexpected BRK or IRQ
+ ;check stack for BREAK and originating location
+ ;possible jump/branch into weeds (uninitialized space)
+37af : c9bd cmp #$ff-'B' ;BRK pass 2 registers loaded?
+37b1 : f042 beq break2
+37b3 : c942 cmp #'B' ;BRK pass 1 registers loaded?
+ trap_ne
+37b5 : d0fe > bne * ;failed not equal (non zero)
+
+37b7 : e052 cpx #'R'
+ trap_ne
+37b9 : d0fe > bne * ;failed not equal (non zero)
+
+37bb : c048 cpy #'K'-3
+ trap_ne
+37bd : d0fe > bne * ;failed not equal (non zero)
+
+37bf : 850a sta irq_a ;save registers during break test
+37c1 : 860b stx irq_x
+37c3 : ba tsx ;test break on stack
+37c4 : bd0201 lda $102,x
+ cmp_flag 0 ;break test should have B=1 & unused=1 on stack
+37c7 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ; - no break flag on stack
+37c9 : d0fe > bne * ;failed not equal (non zero)
+
+37cb : 68 pla
+ cmp_flag intdis ;should have added interrupt disable
+37cc : c934 > cmp #(intdis |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+37ce : d0fe > bne * ;failed not equal (non zero)
+
+37d0 : ba tsx
+37d1 : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+37d3 : d0fe > bne * ;failed not equal (non zero)
+
+37d5 : adff01 lda $1ff ;propper return on stack
+37d8 : c909 cmp #hi(brk_ret0)
+ trap_ne
+37da : d0fe > bne * ;failed not equal (non zero)
+
+37dc : adfe01 lda $1fe
+37df : c9d1 cmp #lo(brk_ret0)
+ trap_ne
+37e1 : d0fe > bne * ;failed not equal (non zero)
+
+ load_flag $ff
+37e3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+37e5 : 48 pha
+37e6 : a60b ldx irq_x
+37e8 : e8 inx ;return registers with modifications
+37e9 : a50a lda irq_a
+37eb : 49aa eor #$aa
+37ed : 28 plp ;N=1, V=1, Z=1, C=1 but original flags should be restored
+37ee : 40 rti
+ trap ;runover protection
+37ef : 4cef37 > jmp * ;failed anyway
+
+37f2 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+37f5 : break2 ;BRK pass 2
+37f5 : e0ad cpx #$ff-'R'
+ trap_ne
+37f7 : d0fe > bne * ;failed not equal (non zero)
+
+37f9 : c0b1 cpy #$ff-'K'-3
+ trap_ne
+37fb : d0fe > bne * ;failed not equal (non zero)
+
+37fd : 850a sta irq_a ;save registers during break test
+37ff : 860b stx irq_x
+3801 : ba tsx ;test break on stack
+3802 : bd0201 lda $102,x
+ cmp_flag $ff ;break test should have B=1
+3805 : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ; - no break flag on stack
+3807 : d0fe > bne * ;failed not equal (non zero)
+
+3809 : 68 pla
+380a : 0908 ora #decmode ;ignore decmode cleared if 65c02
+ cmp_flag $ff ;actual passed flags
+380c : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+380e : d0fe > bne * ;failed not equal (non zero)
+
+3810 : ba tsx
+3811 : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+3813 : d0fe > bne * ;failed not equal (non zero)
+
+3815 : adff01 lda $1ff ;propper return on stack
+3818 : c909 cmp #hi(brk_ret1)
+ trap_ne
+381a : d0fe > bne * ;failed not equal (non zero)
+
+381c : adfe01 lda $1fe
+381f : c9f7 cmp #lo(brk_ret1)
+ trap_ne
+3821 : d0fe > bne * ;failed not equal (non zero)
+
+ load_flag intdis
+3823 : a904 > lda #intdis ;allow test to change I-flag (no mask)
+
+3825 : 48 pha
+3826 : a60b ldx irq_x
+3828 : e8 inx ;return registers with modifications
+3829 : a50a lda irq_a
+382b : 49aa eor #$aa
+382d : 28 plp ;N=0, V=0, Z=0, C=0 but original flags should be restored
+382e : 40 rti
+ trap ;runover protection
+382f : 4c2f38 > jmp * ;failed anyway
+
+3832 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ if report = 1
+ include "report.i65"
+ endif
+
+ ;copy of data to initialize BSS segment
+ if load_data_direct != 1
+ zp_init
+ zp1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ zp7f_ db $7f ;test pattern for compare
+ ;logical zeropage operands
+ zpOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ zpAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ zpEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+ ind1_ dw abs1 ;indirect pointer to pattern in absolute memory
+ dw abs1+1
+ dw abs1+2
+ dw abs1+3
+ dw abs7f
+ inw1_ dw abs1-$f8 ;indirect pointer for wrap-test pattern
+ indt_ dw abst ;indirect pointer to store area in absolute memory
+ dw abst+1
+ dw abst+2
+ dw abst+3
+ inwt_ dw abst-$f8 ;indirect pointer for wrap-test store
+ indAN_ dw absAN ;indirect pointer to AND pattern in absolute memory
+ dw absAN+1
+ dw absAN+2
+ dw absAN+3
+ indEO_ dw absEO ;indirect pointer to EOR pattern in absolute memory
+ dw absEO+1
+ dw absEO+2
+ dw absEO+3
+ indOR_ dw absOR ;indirect pointer to OR pattern in absolute memory
+ dw absOR+1
+ dw absOR+2
+ dw absOR+3
+ ;add/subtract indirect pointers
+ adi2_ dw ada2 ;indirect pointer to operand 2 in absolute memory
+ sbi2_ dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+ adiy2_ dw ada2-$ff ;with offset for indirect indexed
+ sbiy2_ dw sba2-$ff
+ zp_end
+ if (zp_end - zp_init) != (zp_bss_end - zp_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and zeropage data
+ endif
+ data_init
+ ex_and_ and #0 ;execute immediate opcodes
+ rts
+ ex_eor_ eor #0 ;execute immediate opcodes
+ rts
+ ex_ora_ ora #0 ;execute immediate opcodes
+ rts
+ ex_adc_ adc #0 ;execute immediate opcodes
+ rts
+ ex_sbc_ sbc #0 ;execute immediate opcodes
+ rts
+ abs1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ abs7f_ db $7f ;test pattern for compare
+ ;loads
+ fLDx_ db fn,fn,0,fz ;expected flags for load
+ ;shifts
+ rASL_ ;expected result ASL & ROL -carry
+ rROL_ db $86,$04,$82,0 ; "
+ rROLc_ db $87,$05,$83,1 ;expected result ROL +carry
+ rLSR_ ;expected result LSR & ROR -carry
+ rROR_ db $61,$41,$20,0 ; "
+ rRORc_ db $e1,$c1,$a0,$80 ;expected result ROR +carry
+ fASL_ ;expected flags for shifts
+ fROL_ db fnc,fc,fn,fz ;no carry in
+ fROLc_ db fnc,fc,fn,0 ;carry in
+ fLSR_
+ fROR_ db fc,0,fc,fz ;no carry in
+ fRORc_ db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+ rINC_ db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+ fINC_ db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+ absOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ absAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ absEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+ absORa_ db 0,$f1,$1f,0 ;test pattern for OR
+ absANa_ db $f0,$ff,$ff,$ff ;test pattern for AND
+ absEOa_ db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+ absrlo_ db 0,$ff,$7f,$80
+ absflo_ db fz,fn,0,fn
+ data_end
+ if (data_end - data_init) != (data_bss_end - data_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and data
+ endif
+
+ vec_init
+ dw nmi_trap
+ dw res_trap
+ dw irq_trap
+ vec_bss equ $fffa
+ endif ;end of RAM init data
+
+ if (load_data_direct = 1) & (ROM_vectors = 1)
+fffa = org $fffa ;vectors
+fffa : 9d37 dw nmi_trap
+fffc : a337 dw res_trap
+fffe : ab37 dw irq_trap
+ endif
+
+fffa = end start
+
+No errors in pass 2.
diff --git a/tests/6502_functional_test_verbose.bin b/tests/6502_functional_test_verbose.bin
new file mode 100644
index 0000000..09f4041
Binary files /dev/null and b/tests/6502_functional_test_verbose.bin differ
diff --git a/tests/6502_functional_test_verbose.hex b/tests/6502_functional_test_verbose.hex
new file mode 100644
index 0000000..421a4c2
--- /dev/null
+++ b/tests/6502_functional_test_verbose.hex
@@ -0,0 +1,537 @@
+:16000A00000000000000000000C38241007F001F71800FFF7F80BE
+:20002000FF0F8F8F1702180219021A021B021F0103020402050206020B014E024F025002D4
+:1A004000510252025302540255024A024B024C024D020302040204010501B1
+:200200000000000000000000290060490060090060690060E90060C38241007F808000022A
+:20022000860482008705830161412000E1C1A0808101800281018000010001028180818012
+:200240007F80FF00010080800200001F71800FFF7F80FF0F8F8F00F11F00F0FFFFFFFFF068
+:0A026000F00F00FF7F800280008095
+:20040000D8A2FF9AA9008D0002204C44A2054C3604A005D008205B44888888888888888838
+:200420008888F017205B44CACACACACACACACACACAF0DE205B44D0F4205B44AD0002C9007A
+:20044000F003205B44A9018D0002A0FE8898AA1008186902EAEAEAEAEAEAEAEAEAEA497FC2
+:200460008DEC04A9004CEB04CACACACACACACACACACACACACACACACACACACACACACACACA2B
+:20048000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA1C
+:2004A000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACAFC
+:2004C000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACADC
+:2004E000CACACACACACACACACACACAF03ECACACACACACACACACACACACACACACACACACACA22
+:20050000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA9B
+:20052000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA7B
+:20054000CACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACACA5B
+:20056000CACACACACACACACACACACACAEAEAEAEAEAF008205B44EAEAEAEAEAEAEAEAEAEA96
+:20058000C000F0034C4C04AD0002C901F003205B44A9028D0002C001D003205B44A900C9E2
+:2005A00000F003205B44B003205B441003205B44C901D003205B449003205B443003205BE9
+:2005C00044AAE000F003205B44B003205B441003205B44E001D003205B449003205B443062
+:2005E00003205B44A8C000F003205B44B003205B441003205B44C001D003205B44900320D5
+:200600005B443003205B44AD0002C902F003205B44A9038D0002A2FF9AA95548A9AA48CDF9
+:20062000FE01F003205B44BA8AC9FDF003205B4468C9AAF003205B4468C955F003205B4488
+:20064000CDFF01F003205B44BAE0FFF003205B44AD0002C903F003205B44A9048D0002A9BE
+:20066000FF4828101A501B901CD01D3003205B447003205B44B003205B44F00F205B442069
+:200680005B44205B44205B44205B4408BAE0FEF003205B4468C9FFF003205B44BAE0FFF0C1
+:2006A00003205B44A9004828301A701BB01CF01D1003205B445003205B449003205B44D0AB
+:2006C0000F205B44205B44205B44205B44205B440868C930F003205B44A9024828D002F058
+:2006E00003205B44B0029003205B4430021003205B4470025003205B44A9014828F002D0D0
+:2007000003205B449002B003205B4430021003205B4470025003205B44A9804828F002D030
+:2007200003205B44B0029003205B4410023003205B4470025003205B44A9404828F002D050
+:2007400003205B44B0029003205B4430021003205B4450027003205B44A9FD4828F002D073
+:2007600003205B449002B003205B4410023003205B4450027003205B44A9FE4828D002F052
+:2007800003205B44B0029003205B4410023003205B4450027003205B44A97F4828D002F0B1
+:2007A00003205B449002B003205B4430021003205B4450027003205B44A9BF4828D002F051
+:2007C00003205B449002B003205B4410023003205B4470025003205B44AD0002C904F0035C
+:2007E000205B44A9058D0002A255A0AAA9FF48A901284808C901F003205B446848C9FFF0C6
+:2008000003205B4428A90048A900284808C900F003205B446848C930F003205B4428A9FF36
+:2008200048A9FF284808C9FFF003205B446848C9FFF003205B4428A90048A901284808C9A8
+:2008400001F003205B446848C930F003205B4428A9FF48A900284808C900F003205B44686E
+:2008600048C9FFF003205B4428A90048A9FF284808C9FFF003205B446848C930F003205BEC
+:200880004428A9FF48A900286808C9FFF003205B446848C9FDF003205B4428A90048A9FF58
+:2008A000286808C900F003205B446848C932F003205B4428A9FF48A9FE286808C901F003B4
+:2008C000205B446848C97DF003205B4428A90048A900286808C9FFF003205B446848C9B0B4
+:2008E000F003205B4428A9FF48A9FF286808C900F003205B446848C97FF003205B4428A9F8
+:200900000048A9FE286808C901F003205B446848C930F003205B4428E055F003205B44C0AA
+:20092000AAF003205B44AD0002C905F003205B44A9068D0002A90048A93C2849C308C9FF14
+:20094000F003205B446848C9B0F003205B4428A90048A9C32849C308C900F003205B446866
+:2009600048C932F003205B4428AD0002C906F003205B44A9078D0002A224A042A90048A9A9
+:200980001828EA08C918F003205B446848C930F003205B4428E024F003205B44C042F00364
+:2009A000205B44A2DBA0BDA9FF48A9E728EA08C9E7F003205B446848C9FFF003205B442850
+:2009C000E0DBF003205B44C0BDF003205B44AD0002C907F003205B44A9088D0002A9004819
+:2009E00028A946A241A0524C8C42EAEAF003205B44E8E8D003205B443003205B44B0032044
+:200A00005B447003205B44C9ECF003205B44E042F003205B44C04FF003205B44CAC8C8C8E7
+:200A200049AA4C2E0AEAEAF003205B44E8E8D003205B441003205B44B003205B4470032080
+:200A40005B44C946F003205B44E041F003205B44C052F003205B44AD0002C908F003205BB1
+:200A600044A9098D0002A9004828A949A24EA0446CD242EAF003205B44888808888888281E
+:200A8000D003205B443003205B44B003205B447003205B44C9E3F003205B44E04FF003208E
+:200AA0005B44C03EF003205B44BAE0FFF003205B44AD0002C909F003205B44A90A8D000227
+:200AC000A9004828A94AA253A0522029430888888828D003205B443003205B44B003205B1D
+:200AE000447003205B44C9E0F003205B44E054F003205B44C04CF003205B44BAE0FFF003F5
+:200B0000205B44AD0002C90AF003205B44A90B8D0002A90048A942A252A04B2800880888A4
+:200B20008888C9E8F003205B44E053F003205B44C045F003205B4468C930F003205B44BAD9
+:200B4000E0FFF003205B44A9FF48A9BDA2ADA0B428008808888888C917F003205B44E0AE9B
+:200B6000F003205B44C0AEF003205B4468C9FFF003205B44BAE0FFF003205B44AD0002C9FE
+:200B80000BF003205B44A90C8D0002A9FF482818086848C9FEF003205B442838086848C912
+:200BA000FFF003205B442858086848C9FBF003205B442878086848C9FFF003205B4428D804
+:200BC000086848C9F7F003205B4428F8086848C9FFF003205B4428B8086848C9BFF0032066
+:200BE0005B4428A9004828086848C930F003205B442838086848C931F003205B44281808A6
+:200C00006848C930F003205B442878086848C934F003205B442858086848C930F003205BD3
+:200C20004428F8086848C938F003205B4428D8086848C930F003205B4428A9404828086891
+:200C400048C970F003205B4428B8086848C930F003205B4428AD0002C90CF003205B44A917
+:200C60000D8D0002A2FEA9FF4828E808E0FFF003205B446848C9FDF003205B4428E808E07F
+:200C800000F003205B446848C97FF003205B4428E808E001F003205B446848C97DF0032044
+:200CA0005B4428CA08E000F003205B446848C97FF003205B4428CA08E0FFF003205B44686C
+:200CC00048C9FDF003205B4428CAA9004828E808E0FFF003205B446848C9B0F003205B44ED
+:200CE00028E808E000F003205B446848C932F003205B4428E808E001F003205B446848C9C9
+:200D000030F003205B4428CA08E000F003205B446848C932F003205B4428CA08E0FFF0033C
+:200D2000205B446848C9B0F003205B4428A0FEA9FF4828C808C0FFF003205B446848C9FD84
+:200D4000F003205B4428C808C000F003205B446848C97FF003205B4428C808C001F0032001
+:200D60005B446848C97DF003205B44288808C000F003205B446848C97FF003205B442888A8
+:200D800008C0FFF003205B446848C9FDF003205B442888A9004828C808C0FFF003205B44A8
+:200DA0006848C9B0F003205B4428C808C000F003205B446848C932F003205B4428C808C0D9
+:200DC00001F003205B446848C930F003205B44288808C000F003205B446848C932F003201D
+:200DE0005B44288808C0FFF003205B446848C9B0F003205B4428A2FFA9FF48288A08C9FF15
+:200E0000F003205B446848C9FDF003205B442808E8288A08C900F003205B446848C97FF0C3
+:200E200003205B442808E8288A08C901F003205B446848C97DF003205B4428A90048288A2F
+:200E400008C901F003205B446848C930F003205B442808CA288A08C900F003205B446848D4
+:200E6000C932F003205B442808CA288A08C9FFF003205B446848C9B0F003205B4428A0FFF5
+:200E8000A9FF48289808C9FFF003205B446848C9FDF003205B442808C8289808C900F0037C
+:200EA000205B446848C97FF003205B442808C8289808C901F003205B446848C97DF0032084
+:200EC0005B4428A90048289808C901F003205B446848C930F003205B44280888289808C972
+:200EE00000F003205B446848C932F003205B44280888289808C9FFF003205B446848C9B0C0
+:200F0000F003205B4428A9FF48A2FF8A28A808C0FFF003205B446848C9FDF003205B442843
+:200F200008E88A28A808C000F003205B446848C97FF003205B442808E88A28A808C001F018
+:200F400003205B446848C97DF003205B4428A90048A9008A28A808C001F003205B446848E0
+:200F6000C930F003205B442808CA8A28A808C000F003205B446848C932F003205B4428086B
+:200F8000CA8A28A808C0FFF003205B446848C9B0F003205B4428A9FF48A0FF9828AA08E0D0
+:200FA000FFF003205B446848C9FDF003205B442808C89828AA08E000F003205B446848C9E3
+:200FC0007FF003205B442808C89828AA08E001F003205B446848C97DF003205B4428A9006A
+:200FE00048A9009828AA08E001F003205B446848C930F003205B442808889828AA08E00096
+:20100000F003205B446848C932F003205B442808889828AA08E0FFF003205B446848C9B0DD
+:20102000F003205B4428AD0002C90DF003205B44A90E8D0002A201A9FF48289A08AD01014D
+:20104000C9FFF003205B44A90048289A08AD0101C930F003205B44CAA9FF48289A08AD00D0
+:2010600001C9FFF003205B44A90048289A08AD0001C930F003205B44CAA9FF48289A08ADB0
+:20108000FF01C9FFF003205B44A90048289A08ADFF01C930A2019AA9FF4828BA08E001F08D
+:2010A00003205B44AD0101C97DF003205B44A9FF4828BA08E000F003205B44AD0001C97F65
+:2010C000F003205B44A9FF4828BA08E0FFF003205B44ADFF01C9FDF003205B44A2019AA9E8
+:2010E000004828BA08E001F003205B44AD0101C930F003205B44A9004828BA08E000F00323
+:20110000205B44AD0001C932F003205B44A9004828BA08E0FFF003205B44ADFF01C9B0F033
+:2011200003205B4468AD0002C90EF003205B44A90F8D0002A003A9004828B613088A49C3E3
+:20114000289903020849C3D91702F003205B44684930D91C02F003205B448810D9A003A9CA
+:20116000FF4828B613088A49C3289903020849C3D91702F003205B4468497DD91C02F00303
+:20118000205B448810D9A003A9004828BE1702088A49C3AA28960C0849C3D91300F0032067
+:2011A0005B44684930D91C02F003205B448810D8A003A9FF4828BE1702088A49C3AA2896FE
+:2011C0000C0849C3D91300F003205B4468497DD91C02F003205B448810D8A003A200B90C00
+:2011E0000049C3D91300F003205B44960CB9030249C3D91702F003205B448A990302881075
+:20120000DDAD0002C90FF003205B44A9108D0002A0FDB6198A99090188C0FAB0F5A0FDBE95
+:201220001D01961288C0FAB0F6A003A200B90C00D91300F003205B44960CB90302D9170206
+:20124000F003205B448A9903028810E1AD0002C910F003205B44A9118D0002A203A9004822
+:2012600028B413089849C3289D03020849C3DD1702F003205B44684930DD1C02F003205B03
+:2012800044CA10D9A203A9FF4828B413089849C3289D03020849C3DD1702F003205B446839
+:2012A000497DDD1C02F003205B44CA10D9A203A9004828BC1702089849C3A828940C084908
+:2012C000C3D513F003205B44684930DD1C02F003205B44CA10D9A203A9FF4828BC170208D6
+:2012E0009849C3A828940C0849C3D513F003205B4468497DDD1C02F003205B44CA10D9A2FC
+:2013000003A000B50C49C3D513F003205B44940CBD030249C3DD1702F003205B448A9D0383
+:2013200002CA10DFAD0002C911F003205B44A9128D0002A2FDB419989D0901CAE0FAB0F579
+:20134000A2FDBC1D019412CAE0FAB0F6A203A000B50CD513F003205B44940CBD0302DD172E
+:2013600002F003205B448A9D0302CA10E3AD0002C912F003205B44A9138D0002A900482830
+:20138000A613088A49C3AA288E03020849C3AAE0C3F003205B44684930CD1C02F003205B44
+:2013A00044A9004828A614088A49C3AA288E04020849C3AAE082F003205B44684930CD1D75
+:2013C00002F003205B44A9004828A615088A49C3AA288E05020849C3AAE041F003205B44EF
+:2013E000684930CD1E02F003205B44A9004828A616088A49C3AA288E06020849C3AAE000F4
+:20140000F003205B44684930CD1F02F003205B44A9FF4828A613088A49C3AA288E030208BD
+:2014200049C3AAE0C3F003205B4468497DCD1C02F003205B44A9FF4828A614088A49C3AABC
+:20144000288E04020849C3AAE082F003205B4468497DCD1D02F003205B44A9FF4828A6155F
+:20146000088A49C3AA288E05020849C3AAE041F003205B4468497DCD1E02F003205B44A960
+:20148000FF4828A616088A49C3AA288E06020849C3AAE000F003205B4468497DCD1F02F0BF
+:2014A00003205B44A9004828AE1702088A49C3AA28860C0849C3C513F003205B4468493009
+:2014C000CD1C02F003205B44A9004828AE1802088A49C3AA28860D0849C3C514F003205B30
+:2014E00044684930CD1D02F003205B44A9004828AE1902088A49C3AA28860E0849C3C51555
+:20150000F003205B44684930CD1E02F003205B44A9004828AE1A02088A49C3AA28860F08A9
+:2015200049C3C516F003205B44684930CD1F02F003205B44A9FF4828AE1702088A49C3AA6A
+:2015400028860C0849C3AAE413F003205B4468497DCD1C02F003205B44A9FF4828AE1802BF
+:20156000088A49C3AA28860D0849C3AAE414F003205B4468497DCD1D02F003205B44A9FF8C
+:201580004828AE1902088A49C3AA28860E0849C3AAE415F003205B4468497DCD1E02F00397
+:2015A000205B44A9FF4828AE1A02088A49C3AA28860F0849C3AAE416F003205B4468497DED
+:2015C000CD1F02F003205B44A9004828A2C308EC1702F003205B44684930CD1C02F003204F
+:2015E0005B44A9004828A28208EC1802F003205B44684930CD1D02F003205B44A9004828B7
+:20160000A24108EC1902F003205B44684930CD1E02F003205B44A9004828A20008EC1A02DB
+:20162000F003205B44684930CD1F02F003205B44A9FF4828A2C308EC1702F003205B4468D3
+:20164000497DCD1C02F003205B44A9FF4828A28208EC1802F003205B4468497DCD1D02F021
+:2016600003205B44A9FF4828A24108EC1902F003205B4468497DCD1E02F003205B44A9FF77
+:201680004828A20008EC1A02F003205B4468497DCD1F02F003205B44A200A50C49C3C51371
+:2016A000F003205B44860CAD030249C3CD1702F003205B448E0302A50D49C3C514F0032053
+:2016C0005B44860DAD040249C3CD1802F003205B448E0402A50E49C3C515F003205B44861B
+:2016E0000EAD050249C3CD1902F003205B448E0502A50F49C3C516F003205B44860FAD0658
+:201700000249C3CD1A02F003205B448E0602AD0002C913F003205B44A9148D0002A9004810
+:2017200028A413089849C3A8288C03020849C3A8C0C3F003205B44684930CD1C02F00320ED
+:201740005B44A9004828A414089849C3A8288C04020849C3A8C082F003205B44684930CDAD
+:201760001D02F003205B44A9004828A415089849C3A8288C05020849C3A8C041F003205B8C
+:2017800044684930CD1E02F003205B44A9004828A416089849C3A8288C06020849C3A8C026
+:2017A00000F003205B44684930CD1F02F003205B44A9FF4828A413089849C3A8288C03021A
+:2017C0000849C3A8C0C3F003205B4468497DCD1C02F003205B44A9FF4828A414089849C3D1
+:2017E000A8288C04020849C3A8C082F003205B4468497DCD1D02F003205B44A9FF4828A44F
+:2018000015089849C3A8288C05020849C3A8C041F003205B4468497DCD1E02F003205B4468
+:20182000A9FF4828A416089849C3A8288C06020849C3A8C000F003205B4468497DCD1F027C
+:20184000F003205B44A9004828AC1702089849C3A828840C0849C3A8C413F003205B44683F
+:201860004930CD1C02F003205B44A9004828AC1802089849C3A828840D0849C3A8C414F0E2
+:2018800003205B44684930CD1D02F003205B44A9004828AC1902089849C3A828840E0849C8
+:2018A000C3A8C415F003205B44684930CD1E02F003205B44A9004828AC1A02089849C3A87D
+:2018C00028840F0849C3A8C416F003205B44684930CD1F02F003205B44A9FF4828AC1702A7
+:2018E000089849C3A828840C0849C3A8C513F003205B4468497DCD1C02F003205B44A9FF23
+:201900004828AC1802089849C3A828840D0849C3A8C514F003205B4468497DCD1D02F00330
+:20192000205B44A9FF4828AC1902089849C3A828840E0849C3A8C515F003205B4468497D85
+:20194000CD1E02F003205B44A9FF4828AC1A02089849C3A828840F0849C3A8C516F003204F
+:201960005B4468497DCD1F02F003205B44A9004828A0C308CC1702F003205B44684930CD31
+:201980001C02F003205B44A9004828A08208CC1802F003205B44684930CD1D02F003205B61
+:2019A00044A9004828A04108CC1902F003205B44684930CD1E02F003205B44A9004828A00F
+:2019C0000008CC1A02F003205B44684930CD1F02F003205B44A9FF4828A0C308CC1702F08C
+:2019E00003205B4468497DCD1C02F003205B44A9FF4828A08208CC1802F003205B446849CF
+:201A00007DCD1D02F003205B44A9FF4828A04108CC1902F003205B4468497DCD1E02F00303
+:201A2000205B44A9FF4828A00008CC1A02F003205B4468497DCD1F02F003205B44A000A57A
+:201A40000C49C3C513F003205B44840CAD030249C3CD1702F003205B448C0302A50D49C3AF
+:201A6000C514F003205B44840DAD040249C3CD1802F003205B448C0402A50E49C3C515F0D7
+:201A800003205B44840EAD050249C3CD1902F003205B448C0502A50F49C3C516F003205BFC
+:201AA00044840FAD060249C3CD1A02F003205B448C0602AD0002C914F003205B44A9158DD6
+:201AC0000002A203A9004828B5130849C3289D03020849C3DD1702F003205B44684930DD26
+:201AE0001C02F003205B44CA10DAA203A9FF4828B5130849C3289D03020849C3DD1702F005
+:201B000003205B4468497DDD1C02F003205B44CA10DAA203A9004828BD17020849C328950F
+:201B20000C0849C3D513F003205B44684930DD1C02F003205B44CA10DBA203A9FF4828BD2E
+:201B400017020849C328950C0849C3D513F003205B4468497DDD1C02F003205B44CA10DB51
+:201B6000A203A000B50C49C3D513F003205B44940CBD030249C3DD1702F003205B448A9D7C
+:201B80000302CA10DFAD0002C915F003205B44A9168D0002A003A9004828B1240849C3282D
+:201BA0009903020849C3D91702F003205B44684930D91C02F003205B448810DAA003A9FF88
+:201BC0004828B1240849C3289903020849C3D91702F003205B4468497DD91C02F003205B9B
+:201BE000448810DAA003A200B9030249C3D91702F003205B448A9903028810ECA003A90084
+:201C00004828B917020849C32891300849C3D124F003205B44684930D91C02F003205B4440
+:201C20008810DBA003A9FF4828B917020849C32891300849C3D124F003205B4468497DD9E5
+:201C40001C02F003205B448810DBA003A200B9030249C3D91702F003205B448A99030288DE
+:201C600010ECA206A003A9004828A1240849C32881300849C3D91702F003205B44684930B9
+:201C8000D91C02F003205B44CACA8810D9A206A003A9FF4828A1240849C32881300849C36D
+:201CA000D91702F003205B4468497DD91C02F003205B44CACA8810D9A003A200B903024958
+:201CC000C3D91702F003205B448A9903028810ECAD0002C916F003205B44A9178D0002A2C0
+:201CE000FDB5199D0901CAE0FAB0F6A2FDBD1D019512CAE0FAB0F6A203A000B50CD513F0DF
+:201D000003205B44940CBD0302DD1702F003205B448A9D0302CA10E3A0FBA2FEA12C990B62
+:201D200001CACA88C0F8B0F4A003A200B90302D91702F003205B448A9903028810EEA0FB3A
+:201D4000B91F01913888C0F8B0F6A003A200B90302D91702F003205B448A9903028810EEA6
+:201D6000A0FBA2FEB12E8138CACA88C0F8B0F5A003A200B90302D91702F003205B448A994D
+:201D800003028810EEAD0002C917F003205B44A9188D0002A9004828A5130849C3288D038A
+:201DA000020849C3C9C3F003205B44684930CD1C02F003205B44A9004828A5140849C32843
+:201DC0008D04020849C3C982F003205B44684930CD1D02F003205B44A9004828A5150849BC
+:201DE000C3288D05020849C3C941F003205B44684930CD1E02F003205B44A9004828A51640
+:201E00000849C3288D06020849C3C900F003205B44684930CD1F02F003205B44A9FF4828C9
+:201E2000A5130849C3288D03020849C3C9C3F003205B4468497DCD1C02F003205B44A9FF57
+:201E40004828A5140849C3288D04020849C3C982F003205B4468497DCD1D02F003205B44AD
+:201E6000A9FF4828A5150849C3288D05020849C3C941F003205B4468497DCD1E02F00320C2
+:201E80005B44A9FF4828A5160849C3288D06020849C3C900F003205B4468497DCD1F02F064
+:201EA00003205B44A9004828AD17020849C328850C0849C3C513F003205B44684930CD1C4C
+:201EC00002F003205B44A9004828AD18020849C328850D0849C3C514F003205B4468493020
+:201EE000CD1D02F003205B44A9004828AD19020849C328850E0849C3C515F003205B44688C
+:201F00004930CD1E02F003205B44A9004828AD1A020849C328850F0849C3C516F003205B9A
+:201F200044684930CD1F02F003205B44A9FF4828AD17020849C328850C0849C3C513F00352
+:201F4000205B4468497DCD1C02F003205B44A9FF4828AD18020849C328850D0849C3C5145D
+:201F6000F003205B4468497DCD1D02F003205B44A9FF4828AD19020849C328850E0849C320
+:201F8000C515F003205B4468497DCD1E02F003205B44A9FF4828AD1A020849C328850F082F
+:201FA00049C3C516F003205B4468497DCD1F02F003205B44A9004828A9C308CD1702F00354
+:201FC000205B44684930CD1C02F003205B44A9004828A98208CD1802F003205B44684930FE
+:201FE000CD1D02F003205B44A9004828A94108CD1902F003205B44684930CD1E02F00320BD
+:202000005B44A9004828A90008CD1A02F003205B44684930CD1F02F003205B44A9FF482823
+:20202000A9C308CD1702F003205B4468497DCD1C02F003205B44A9FF4828A98208CD180297
+:20204000F003205B4468497DCD1D02F003205B44A9FF4828A94108CD1902F003205B4468F6
+:20206000497DCD1E02F003205B44A9FF4828A90008CD1A02F003205B4468497DCD1F02F08B
+:2020800003205B44A200A50C49C3C513F003205B44860CAD030249C3CD1702F003205B44AD
+:2020A0008E0302A50D49C3C514F003205B44860DAD040249C3CD1802F003205B448E0402C5
+:2020C000A50E49C3C515F003205B44860EAD050249C3CD1902F003205B448E0502A50F4935
+:2020E000C3C516F003205B44860FAD060249C3CD1A02F003205B448E0602AD0002C918F089
+:2021000003205B44A9198D0002A90048A9FF28241608C9FFF003205B446848C932F0032071
+:202120005B4428A90048A90128241508C901F003205B446848C970F003205B4428A90048A4
+:20214000A90128241408C901F003205B446848C9B2F003205B4428A90048A90128241308EA
+:20216000C901F003205B446848C9F0F003205B4428A9FF48A9FF28241608C9FFF003205B68
+:20218000446848C93FF003205B4428A9FF48A90128241508C901F003205B446848C97DF004
+:2021A00003205B4428A9FF48A90128241408C901F003205B446848C9BFF003205B4428A9FC
+:2021C000FF48A90128241308C901F003205B446848C9FDF003205B4428A90048A9FF282CEE
+:2021E0001A0208C9FFF003205B446848C932F003205B4428A90048A901282C190208C901E0
+:20220000F003205B446848C970F003205B4428A90048A901282C180208C901F003205B44BC
+:202220006848C9B2F003205B4428A90048A901282C170208C901F003205B446848C9F0F0B4
+:2022400003205B4428A9FF48A9FF282C1A0208C9FFF003205B446848C93FF003205B442878
+:20226000A9FF48A901282C190208C901F003205B446848C97DF003205B4428A9FF48A90167
+:20228000282C180208C901F003205B446848C9BFF003205B4428A9FF48A901282C1702082B
+:2022A000C901F003205B446848C9FDF003205B4428AD0002C919F003205B44A91A8D0002BD
+:2022C000A90048A28028E417086848C931F003205B4428CAE417086848C933F003205B4411
+:2022E00028CAE41708E07EF003205B446848C9B0F003205B4428A9FF48A28028E417086831
+:2023000048C97DF003205B4428CAE417086848C97FF003205B4428CAE41708E07EF0032078
+:202320005B446848C9FCF003205B4428A90048A28028EC1B02086848C931F003205B4428DF
+:20234000CAEC1B02086848C933F003205B4428CAEC1B0208E07EF003205B446848C9B0F018
+:2023600003205B4428A9FF48A28028EC1B02086848C97DF003205B4428CAEC1B02086848CD
+:20238000C97FF003205B4428CAEC1B0208E07EF003205B446848C9FCF003205B4428A90038
+:2023A00048A28028E07F086848C931F003205B4428CAE07F086848C933F003205B4428CA1F
+:2023C000E07F08E07EF003205B446848C9B0F003205B4428A9FF48A28028E07F086848C969
+:2023E0007DF003205B4428CAE07F086848C97FF003205B4428CAE07F08E07EF003205B4442
+:202400006848C9FCF003205B4428AD0002C91AF003205B44A91B8D0002A90048A08028C4D9
+:2024200017086848C931F003205B442888C417086848C933F003205B442888C41708C07E5F
+:20244000F003205B446848C9B0F003205B4428A9FF48A08028C417086848C97DF003205B48
+:20246000442888C417086848C97FF003205B442888C41708C07EF003205B446848C9FCF0F3
+:2024800003205B4428A90048A08028CC1B02086848C931F003205B442888CC1B020868487B
+:2024A000C933F003205B442888CC1B0208C07EF003205B446848C9B0F003205B4428A9FF32
+:2024C00048A08028CC1B02086848C97DF003205B442888CC1B02086848C97FF003205B4488
+:2024E0002888CC1B0208C07EF003205B446848C9FCF003205B4428A90048A08028C07F087C
+:202500006848C931F003205B442888C07F086848C933F003205B442888C07F08C07EF003E2
+:20252000205B446848C9B0F003205B4428A9FF48A08028C07F086848C97DF003205B44288A
+:2025400088C07F086848C97FF003205B442888C07F08C07EF003205B446848C9FCF0032093
+:202560005B4428AD0002C91BF003205B44A91C8D0002A90048A98028C51708C980F0032079
+:202580005B446848C931F003205B4428A90048A97F28C51708C97FF003205B446848C9334D
+:2025A000F003205B4428A90048A97E28C51708C97EF003205B446848C9B0F003205B442821
+:2025C000A9FF48A98028C51708C980F003205B446848C97DF003205B4428A9FF48A97F28CB
+:2025E000C51708C97FF003205B446848C97FF003205B4428A9FF48A97E28C51708C97EF0D1
+:2026000003205B446848C9FCF003205B4428A90048A98028CD1B0208C980F003205B446812
+:2026200048C931F003205B4428A90048A97F28CD1B0208C97FF003205B446848C933F003B2
+:20264000205B4428A90048A97E28CD1B0208C97EF003205B446848C9B0F003205B4428A9BC
+:20266000FF48A98028CD1B0208C980F003205B446848C97DF003205B4428A9FF48A97F28C5
+:20268000CD1B0208C97FF003205B446848C97FF003205B4428A9FF48A97E28CD1B0208C982
+:2026A0007EF003205B446848C9FCF003205B4428A90048A98028C97F08C980F003205B440E
+:2026C0006848C931F003205B4428A90048A97F28C97F08C97FF003205B446848C933F0034C
+:2026E000205B4428A90048A97E28C97F08C97EF003205B446848C9B0F003205B4428A9FFBF
+:2027000048A98028C97F08C980F003205B446848C97DF003205B4428A9FF48A97F28C97F7D
+:2027200008C97FF003205B446848C97FF003205B4428A9FF48A97E28C97F08C97EF00320DC
+:202740005B446848C9FCF003205B4428A204A90048A98028D51308C980F003205B44684808
+:20276000C931F003205B4428A90048A97F28D51308C97FF003205B446848C933F003205B40
+:202780004428A90048A97E28D51308C97EF003205B446848C9B0F003205B4428A9FF48A908
+:2027A0008028D51308C980F003205B446848C97DF003205B4428A9FF48A97F28D51308C9BD
+:2027C0007FF003205B446848C97FF003205B4428A9FF48A97E28D51308C97EF003205B44CE
+:2027E0006848C9FCF003205B4428A90048A98028DD170208C980F003205B446848C931F0B5
+:2028000003205B4428A90048A97F28DD170208C97FF003205B446848C933F003205B44280F
+:20282000A90048A97E28DD170208C97EF003205B446848C9B0F003205B4428A9FF48A98045
+:2028400028DD170208C980F003205B446848C97DF003205B4428A9FF48A97F28DD17020849
+:20286000C97FF003205B446848C97FF003205B4428A9FF48A97E28DD170208C97EF00320F5
+:202880005B446848C9FCF003205B4428A004A208A90048A98028D9170208C980F003205B09
+:2028A000446848C931F003205B4428A90048A97F28D9170208C97FF003205B446848C9336F
+:2028C000F003205B4428A90048A97E28D9170208C97EF003205B446848C9B0F003205B4410
+:2028E00028A9FF48A98028D9170208C980F003205B446848C97DF003205B4428A9FF48A911
+:202900007F28D9170208C97FF003205B446848C97FF003205B4428A9FF48A97E28D9170219
+:2029200008C97EF003205B446848C9FCF003205B4428A90048A98028C12408C980F00320BC
+:202940005B446848C931F003205B4428A90048A97F28C12408C97FF003205B446848C93380
+:20296000F003205B4428A90048A97E28C12408C97EF003205B446848C9B0F003205B442854
+:20298000A9FF48A98028C12408C980F003205B446848C97DF003205B4428A9FF48A97F28FE
+:2029A000C12408C97FF003205B446848C97FF003205B4428A9FF48A97E28C12408C97EF0FB
+:2029C00003205B446848C9FCF003205B4428A90048A98028D12408C980F003205B446848FC
+:2029E000C931F003205B4428A90048A97F28D12408C97FF003205B446848C933F003205BB1
+:202A00004428A90048A97E28D12408C97EF003205B446848C9B0F003205B4428A9FF48A978
+:202A20008028D12408C980F003205B446848C97DF003205B4428A9FF48A97F28D12408C920
+:202A40007FF003205B446848C97FF003205B4428A9FF48A97E28D12408C97EF003205B443E
+:202A60006848C9FCF003205B4428AD0002C91CF003205B44A91D8D0002A203A90048B5130E
+:202A8000280A08DD2002F003205B44684930DD3002F003205B44CA10E2A203A9FF48B51390
+:202AA000280A08DD2002F003205B4468497CDD3002F003205B44CA10E2A203A90048B51323
+:202AC000284A08DD2802F003205B44684930DD3802F003205B44CA10E2A203A9FF48B51300
+:202AE000284A08DD2802F003205B4468497CDD3802F003205B44CA10E2A203A90048B51393
+:202B0000282A08DD2002F003205B44684930DD3002F003205B44CA10E2A203A9FE48B513F0
+:202B2000282A08DD2002F003205B4468497CDD3002F003205B44CA10E2A203A90148B51381
+:202B4000282A08DD2402F003205B44684930DD3402F003205B44CA10E2A203A9FF48B513A7
+:202B6000282A08DD2402F003205B4468497CDD3402F003205B44CA10E2A203A90048B5133A
+:202B8000286A08DD2802F003205B44684930DD3802F003205B44CA10E2A203A9FE48B51320
+:202BA000286A08DD2802F003205B4468497CDD3802F003205B44CA10E2A203A90148B513B1
+:202BC000286A08DD2C02F003205B44684930DD3C02F003205B44CA10E2A203A9FF48B513D7
+:202BE000286A08DD2C02F003205B4468497CDD3C02F003205B44CA10E2AD0002C91DF00340
+:202C0000205B44A91E8D0002A203A90048B513850C28060C08A50CDD2002F003205B4468A4
+:202C20004930DD3002F003205B44CA10DDA203A9FF48B513850C28060C08A50CDD2002F0D3
+:202C400003205B4468497CDD3002F003205B44CA10DDA203A90048B513850C28460C08A5F7
+:202C60000CDD2802F003205B44684930DD3802F003205B44CA10DDA203A9FF48B513850C40
+:202C800028460C08A50CDD2802F003205B4468497CDD3802F003205B44CA10DDA203A9004D
+:202CA00048B513850C28260C08A50CDD2002F003205B44684930DD3002F003205B44CA1033
+:202CC000DDA203A9FE48B513850C28260C08A50CDD2002F003205B4468497CDD3002F00337
+:202CE000205B44CA10DDA203A90148B513850C28260C08A50CDD2402F003205B44684930C5
+:202D0000DD3402F003205B44CA10DDA203A9FF48B513850C28260C08A50CDD2402F0032020
+:202D20005B4468497CDD3402F003205B44CA10DDA203A90048B513850C28660C08A50CDD2C
+:202D40002802F003205B44684930DD3802F003205B44CA10DDA203A9FE48B513850C2866BB
+:202D60000C08A50CDD2802F003205B4468497CDD3802F003205B44CA10DDA203A90148B5DC
+:202D800013850C28660C08A50CDD2C02F003205B44684930DD3C02F003205B44CA10DDA278
+:202DA00003A9FF48B513850C28660C08A50CDD2C02F003205B4468497CDD3C02F003205B01
+:202DC00044CA10DDAD0002C91EF003205B44A91F8D0002A203A90048B5138D0302280E0330
+:202DE0000208AD0302DD2002F003205B44684930DD3002F003205B44CA10DAA203A9FF487B
+:202E0000B5138D0302280E030208AD0302DD2002F003205B4468497CDD3002F003205B44C4
+:202E2000CA10DAA203A90048B5138D0302284E030208AD0302DD2802F003205B446849301F
+:202E4000DD3802F003205B44CA10DAA203A9FF48B5138D0302284E030208AD0302DD2802CA
+:202E6000F003205B4468497CDD3802F003205B44CA10DAA203A90048B5138D0302282E03AD
+:202E80000208AD0302DD2002F003205B44684930DD3002F003205B44CA10DAA203A9FE48DB
+:202EA000B5138D0302282E030208AD0302DD2002F003205B4468497CDD3002F003205B4404
+:202EC000CA10DAA203A90148B5138D0302282E030208AD0302DD2402F003205B44684930A2
+:202EE000DD3402F003205B44CA10DAA203A9FF48B5138D0302282E030208AD0302DD240252
+:202F0000F003205B4468497CDD3402F003205B44CA10DAA203A90048B5138D0302286E03D0
+:202F20000208AD0302DD2802F003205B44684930DD3802F003205B44CA10DAA203A9FE482A
+:202F4000B5138D0302286E030208AD0302DD2802F003205B4468497CDD3802F003205B4413
+:202F6000CA10DAA203A90148B5138D0302286E030208AD0302DD2C02F003205B44684930B9
+:202F8000DD3C02F003205B44CA10DAA203A9FF48B5138D0302286E030208AD0302DD2C0261
+:202FA000F003205B4468497CDD3C02F003205B44CA10DAAD0002C91FF003205B44A9208D12
+:202FC0000002A203A90048B513950C28160C08B50CDD2002F003205B44684930DD3002F04C
+:202FE00003205B44CA10DDA203A9FF48B513950C28160C08B50CDD2002F003205B446849E5
+:203000007CDD3002F003205B44CA10DDA203A90048B513950C28560C08B50CDD2802F00370
+:20302000205B44684930DD3802F003205B44CA10DDA203A9FF48B513950C28560C08B50C1F
+:20304000DD2802F003205B4468497CDD3802F003205B44CA10DDA203A90048B513950C28E3
+:20306000360C08B50CDD2002F003205B44684930DD3002F003205B44CA10DDA203A9FE48A7
+:20308000B513950C28360C08B50CDD2002F003205B4468497CDD3002F003205B44CA10DD3E
+:2030A000A203A90148B513950C28360C08B50CDD2402F003205B44684930DD3402F0032021
+:2030C0005B44CA10DDA203A9FF48B513950C28360C08B50CDD2402F003205B4468497CDDAA
+:2030E0003402F003205B44CA10DDA203A90048B513950C28760C08B50CDD2802F003205B4A
+:2031000044684930DD3802F003205B44CA10DDA203A9FE48B513950C28760C08B50CDD2895
+:2031200002F003205B4468497CDD3802F003205B44CA10DDA203A90148B513950C28760C84
+:2031400008B50CDD2C02F003205B44684930DD3C02F003205B44CA10DDA203A9FF48B51327
+:20316000950C28760C08B50CDD2C02F003205B4468497CDD3C02F003205B44CA10DDAD0020
+:2031800002C920F003205B44A9218D0002A203A90048B5139D0302281E030208BD0302DD47
+:2031A0002002F003205B44684930DD3002F003205B44CA10DAA203A9FF48B5139D030228BE
+:2031C0001E030208BD0302DD2002F003205B4468497CDD3002F003205B44CA10DAA203A961
+:2031E0000048B5139D0302285E030208BD0302DD2802F003205B44684930DD3802F0032004
+:203200005B44CA10DAA203A9FF48B5139D0302285E030208BD0302DD2802F003205B4468E6
+:20322000497CDD3802F003205B44CA10DAA203A90048B5139D0302283E030208BD0302DD3A
+:203240002002F003205B44684930DD3002F003205B44CA10DAA203A9FE48B5139D0302281E
+:203260003E030208BD0302DD2002F003205B4468497CDD3002F003205B44CA10DAA203A9A0
+:203280000148B5139D0302283E030208BD0302DD2402F003205B44684930DD3402F003208A
+:2032A0005B44CA10DAA203A9FF48B5139D0302283E030208BD0302DD2402F003205B44686A
+:2032C000497CDD3402F003205B44CA10DAA203A90048B5139D0302287E030208BD0302DD5E
+:2032E0002802F003205B44684930DD3802F003205B44CA10DAA203A9FE48B5139D0302286E
+:203300007E030208BD0302DD2802F003205B4468497CDD3802F003205B44CA10DAA203A9AF
+:203320000148B5139D0302287E030208BD0302DD2C02F003205B44684930DD3C02F0032099
+:203340005B44CA10DAA203A9FF48B5139D0302287E030208BD0302DD2C02F003205B446881
+:20336000497CDD3C02F003205B44CA10DAAD0002C921F003205B44A9228D0002A200A97E99
+:20338000850CA9004828E60C08A50CDD4002F003205B44684930DD4502F003205B44E8E088
+:2033A00002D004A9FE850CE005D0D7CAE60CA9004828C60C08A50CDD4002F003205B4468DA
+:2033C0004930DD4502F003205B44CA300AE001D0DDA981850CD0D7A200A97E850CA9FF4860
+:2033E00028E60C08A50CDD4002F003205B4468497DDD4502F003205B44E8E002D004A9FEE0
+:20340000850CE005D0D7CAE60CA9FF4828C60C08A50CDD4002F003205B4468497DDD45020D
+:20342000F003205B44CA300AE001D0DDA981850CD0D7AD0002C922F003205B44A9238D0041
+:2034400002A200A97E8D0302A9004828EE030208AD0302DD4002F003205B44684930DD4575
+:2034600002F003205B44E8E002D005A9FE8D0302E005D0D4CAEE0302A9004828CE03020886
+:20348000AD0302DD4002F003205B44684930DD4502F003205B44CA300BE001D0DBA9818DAA
+:2034A0000302D0D4A200A97E8D0302A9FF4828EE030208AD0302DD4002F003205B446849C1
+:2034C0007DDD4502F003205B44E8E002D005A9FE8D0302E005D0D4CAEE0302A9FF4828CE95
+:2034E000030208AD0302DD4002F003205B4468497DDD4502F003205B44CA300BE001D0DBA7
+:20350000A9818D0302D0D4AD0002C923F003205B44A9248D0002A200A97E950CA90048281F
+:20352000F60C08B50CDD4002F003205B44684930DD4502F003205B44B50CE8E002D002A932
+:20354000FEE005D0D5CAA902950CA9004828D60C08B50CDD4002F003205B44684930DD4535
+:2035600002F003205B44B50CCA3008E001D0D9A981D0D5A200A97E950CA9FF4828F60C08EF
+:20358000B50CDD4002F003205B4468497DDD4502F003205B44B50CE8E002D002A9FEE005AC
+:2035A000D0D5CAA902950CA9FF4828D60C08B50CDD4002F003205B4468497DDD4502F00377
+:2035C000205B44B50CCA3008E001D0D9A981D0D5AD0002C924F003205B44A9258D0002A2C3
+:2035E00000A97E9D0302A9004828FE030208BD0302DD4002F003205B44684930DD4502F056
+:2036000003205B44BD0302E8E002D002A9FEE005D0D1CAA9029D0302A9004828DE03020842
+:20362000BD0302DD4002F003205B44684930DD4502F003205B44BD0302CA3008E001D0D5F6
+:20364000A981D0D1A200A97E9D0302A9FF4828FE030208BD0302DD4002F003205B446849CD
+:203660007DDD4502F003205B44BD0302E8E002D002A9FEE005D0D1CAA9029D0302A9FF4865
+:2036800028DE030208BD0302DD4002F003205B4468497DDD4502F003205B44BD0302CA30C4
+:2036A00008E001D0D5A981D0D1AD0002C925F003205B44A9268D0002A203B51C8D0902A94D
+:2036C0000048BD5A022820080208DD6202F003205B44684930DD6602F003205B44CA10DAB0
+:2036E000A203B51C8D0902A9FF48BD5A022820080208DD6202F003205B4468497DDD6602F3
+:20370000F003205B44CA10DAA203B51C850CA90048BD5A0228250C08DD6202F003205B44DE
+:20372000684930DD6602F003205B44CA10DCA203B51C850CA9FF48BD5A0228250C08DD624B
+:2037400002F003205B4468497DDD6602F003205B44CA10DCA203B51C8D0302A90048BD5ACA
+:2037600002282D030208DD6202F003205B44684930DD6602F003205B44CA10DAA203B51CF0
+:203780008D0302A9FF48BD5A02282D030208DD6202F003205B4468497DDD6602F003205B58
+:2037A00044CA1002A203A90048BD5A0228351C08DD6202F003205B44684930DD6602F003AD
+:2037C000205B44CA10E0A203A9FF48BD5A0228351C08DD6202F003205B4468497DDD6602DB
+:2037E000F003205B44CA10E0A203A90048BD5A02283D4E0208DD6202F003205B446849301D
+:20380000DD6602F003205B44CA10DFA203A9FF48BD5A02283D4E0208DD6202F003205B449A
+:2038200068497DDD6602F003205B44CA10DFA003A90048B95A0228394E0208D96202F00318
+:20384000205B44684930D96602F003205B448810DFA003A9FF48B95A0228394E0208D962C2
+:2038600002F003205B4468497DD96602F003205B448810DFA206A003A90048B95A02282162
+:203880003A08D96202F003205B44684930D96602F003205B44CACA8810DEA206A003A9FF26
+:2038A00048B95A0228213A08D96202F003205B4468497DD96602F003205B44CACA8810DE06
+:2038C000A003A90048B95A0228313A08D96202F003205B44684930D96602F003205B448859
+:2038E00010E0A003A9FF48B95A0228313A08D96202F003205B4468497DD96602F003205BC9
+:20390000448810E0AD0002C926F003205B44A9278D0002A203B5208D0C02A90048BD5E0219
+:2039200028200B0208DD6202F003205B44684930DD6602F003205B44CA10DAA203B5208DA4
+:203940000C02A9FF48BD5E0228200B0208DD6202F003205B4468497DDD6602F003205B44D7
+:20396000CA10DAA203B520850CA90048BD5E0228450C08DD6202F003205B44684930DD66E2
+:2039800002F003205B44CA10DCA203B520850CA9FF48BD5E0228450C08DD6202F003205B75
+:2039A0004468497DDD6602F003205B44CA10DCA203B5208D0302A90048BD5E02284D030254
+:2039C00008DD6202F003205B44684930DD6602F003205B44CA10DAA203B5208D0302A9FFAC
+:2039E00048BD5E02284D030208DD6202F003205B4468497DDD6602F003205B44CA1002A24A
+:203A000003A90048BD5E0228552008DD6202F003205B44684930DD6602F003205B44CA104B
+:203A2000E0A203A9FF48BD5E0228552008DD6202F003205B4468497DDD6602F003205B4437
+:203A4000CA10E0A203A90048BD5E02285D520208DD6202F003205B44684930DD6602F0030C
+:203A6000205B44CA10DFA203A9FF48BD5E02285D520208DD6202F003205B4468497DDD66D7
+:203A800002F003205B44CA10DFA003A90048B95E022859520208D96202F003205B4468498F
+:203AA00030D96602F003205B448810DFA003A9FF48B95E022859520208D96202F003205B38
+:203AC0004468497DD96602F003205B448810DFA206A003A90048B95E0228414208D96202C5
+:203AE000F003205B44684930D96602F003205B44CACA8810DEA206A003A9FF48B95E0228BA
+:203B0000414208D96202F003205B4468497DD96602F003205B44CACA8810DEA003A900486C
+:203B2000B95E0228514208D96202F003205B44684930D96602F003205B448810E0A003A922
+:203B4000FF48B95E0228514208D96202F003205B4468497DD96602F003205B448810E0AD0D
+:203B60000002C927F003205B44A9288D0002A203B5188D0F02A90048BD560228200E0208CB
+:203B8000DD6202F003205B44684930DD6602F003205B44CA10DAA203B5188D0F02A9FF48A6
+:203BA000BD560228200E0208DD6202F003205B4468497DDD6602F003205B44CA10DAA2031F
+:203BC000B518850CA90048BD560228050C08DD6202F003205B44684930DD6602F003205BB9
+:203BE00044CA10DCA203B518850CA9FF48BD560228050C08DD6202F003205B4468497DDD84
+:203C00006602F003205B44CA10DCA203B5188D0302A90048BD5602280D030208DD6202F057
+:203C200003205B44684930DD6602F003205B44CA10DAA203B5188D0302A9FF48BD56022805
+:203C40000D030208DD6202F003205B4468497DDD6602F003205B44CA1002A203A90048BD03
+:203C6000560228151808DD6202F003205B44684930DD6602F003205B44CA10E0A203A9FFBD
+:203C800048BD560228151808DD6202F003205B4468497DDD6602F003205B44CA10E0A203F3
+:203CA000A90048BD5602281D4A0208DD6202F003205B44684930DD6602F003205B44CA10C0
+:203CC000DFA203A9FF48BD5602281D4A0208DD6202F003205B4468497DDD6602F003205BEE
+:203CE00044CA10DFA003A90048B9560228194A0208D96202F003205B44684930D96602F08C
+:203D000003205B448810DFA003A9FF48B9560228194A0208D96202F003205B4468497DD93B
+:203D20006602F003205B448810DFA206A003A90048B9560228014A08D96202F003205B443B
+:203D4000684930D96602F003205B44CACA8810DEA206A003A9FF48B9560228014A08D96283
+:203D600002F003205B4468497DD96602F003205B44CACA8810DEA003A90048B95602281186
+:203D80004A08D96202F003205B44684930D96602F003205B448810E0A003A9FF48B95602F2
+:203DA00028114A08D96202F003205B4468497DD96602F003205B448810E058AD0002C928F8
+:203DC000F003205B44A9298D0002D8A20EA0FFA900850C850D850E8D0302850F8510A9FFE7
+:203DE00085128D0402A90285111820DF40E60CE60F080868298228D002E610051085113824
+:203E000020DF40C60CE60DD0E0A9008510EE0302E60E086829828511C612CE0402A50E8534
+:203E20000FD0C6AD0002C929F003205B44A92A8D0002F8A20EA0FFA999850D850E8D0302E8
+:203E4000850FA901850C8510A90085128D040238204C3FC60CA50FD008C610A999850FD06E
+:203E600012290FD00CC60FC60FC60FC60FC60FC60FC60F18204C3FE60CA50DF015290FD0D5
+:203E80000CC60DC60DC60DC60DC60DC60DC60D4C4F3EA999850DA50EF030290FD018C60EDD
+:203EA000C60EC60EC60EC60EC60EE612E612E612E612E612E612C60EE612A5128D0402A553
+:203EC0000E8D0302850FE610D085AD0002C92AF003205B44A92B8D000218D808A9556955F8
+:203EE000C9AAF003205B4418F808A9556955C910F003205B44D828A9556955C910F0032096
+:203F00005B4428A9556955C9AAF003205B4418A93F48A92C4808F8A93F48A9204808D84033
+:203F2000A9556955C910F003205B4440A9556955C9AAF003205B44AD0002C92BF003205B08
+:203F400044A9F08D00022024454C000408A50D650E08C50FF003205B44682901C510F00307
+:203F6000205B442808A50DE51208C50FF003205B44682901C510F003205B442808A50D6DB3
+:203F8000030208C50FF003205B44682901C510F003205B442808A50DED040208C50FF003D1
+:203FA000205B44682901C510F003205B442808A50E8D1202A50D20110208C50FF003205B76
+:203FC00044682901C510F003205B442808A5128D1502A50D20140208C50FF003205B44681B
+:203FE0002901C510F003205B442808A50D750008C50FF003205B44682901C510F003205B56
+:20400000442808A50DF50408C50FF003205B44682901C510F003205B442808A50D7DF50185
+:2040200008C50FF003205B44682901C510F003205B442808A50DFDF60108C50FF003205BB9
+:2040400044682901C510F003205B442808A50D79040108C50FF003205B44682901C510F0BE
+:2040600003205B442808A50DF9050108C50FF003205B44682901C510F003205B442808A521
+:204080000D614408C50FF003205B44682901C510F003205B442808A50DE14608C50FF003EF
+:2040A000205B44682901C510F003205B442808A50D715608C50FF003205B44682901C5108A
+:2040C000F003205B442808A50DF15808C50FF003205B44682901C510F003205B442860A52F
+:2040E00011298348A50D450E300AA50D450F10046809404868851108A50D650E08C50FF072
+:2041000003205B446829C3C511F003205B442808A50DE51208C50FF003205B446829C3C581
+:2041200011F003205B442808A50D6D030208C50FF003205B446829C3C511F003205B4428D6
+:2041400008A50DED040208C50FF003205B446829C3C511F003205B442808A50E8D1202A51F
+:204160000D20110208C50FF003205B446829C3C511F003205B442808A5128D1502A50D2038
+:20418000140208C50FF003205B446829C3C511F003205B442808A50D750008C50FF0032059
+:2041A0005B446829C3C511F003205B442808A50DF50408C50FF003205B446829C3C511F001
+:2041C00003205B442808A50D7DF50108C50FF003205B446829C3C511F003205B442808A589
+:2041E0000DFDF60108C50FF003205B446829C3C511F003205B442808A50D79040108C50F18
+:20420000F003205B446829C3C511F003205B442808A50DF9050108C50FF003205B44682910
+:20422000C3C511F003205B442808A50D614408C50FF003205B446829C3C511F003205B4442
+:204240002808A50DE14608C50FF003205B446829C3C511F003205B442808A50D715608C575
+:204260000FF003205B446829C3C511F003205B442808A50DF15808C50FF003205B44682957
+:20428000C3C511F003205B442860888808888888289003205B445003205B441003205B443D
+:2042A000D003205B44C946F003205B44E041F003205B44C04FF003205B44488A48BAE0FD66
+:2042C000F003205B4468AAA9FF482868E849AA4CF309DB427B0A205B44888808888888283E
+:2042E0009003205B445003205B441003205B44D003205B44C949F003205B44E04EF00320F1
+:204300005B44C041F003205B44488A48BAE0FDF003205B4468AAA9FF482868E849AA6CD43B
+:2043200042205B444C0004888808888888289003205B445003205B441003205B44D003202B
+:204340005B44C94AF003205B44E053F003205B44C04FF003205B44488A48BAE0FBF0032091
+:204360005B44ADFF01C90AF003205B44ADFE01C9CCF003205B44A9FF482868AA68E849AA0C
+:2043800060205B444C0004205B444C0004205B444C0004888808888888C9BDF05AC942F015
+:2043A00003205B44E052F003205B44C048F003205B44850A860BBABD0201C930F003205B9C
+:2043C0004468C934F003205B44BAE0FCF003205B44ADFF01C90BF003205B44ADFE01C91E74
+:2043E000F003205B44A9FF48A60BE8A50A49AA2840205B444C0004E0ADF003205B44C0B1B9
+:20440000F003205B44850A860BBABD0201C9FFF003205B44680908C9FFF003205B44BAE049
+:20442000FCF003205B44ADFF01C90BF003205B44ADFE01C953F003205B44A90448A60BE893
+:20444000A50A49AA2840205B444C0004A200AD6945206545E8BD6945D0F76008488A489848
+:2044600048D8A200AD7D45206545E8BD7D45D0F7BAE8A9012051458A205145204D45BD0062
+:2044800001205145E8D0F4204445A900205145A90CAA205145204D45B500205145E8E013A4
+:2044A000D0F3204445A902205145A900205145A200204D45BD0002205145E8E008D0F2A2D3
+:2044C00000AD9945206545E8BD9945D0F7203A45C953F00BC943D0F568A868AA682860A9FB
+:2044E000F0CD0002F0E7A2FF9AEE0002A900850CA904850DA004B10CD91F45D00A88300F43
+:20450000C001D0F288F0EFE60CD0E9E60DD0E5A001B10CC9F0F005CD0002D0EB6C0C00A9A7
+:20452000008D0002A200ADCB45206545E8BDCB45D0F7203A45C952D0F960AD04F0C9619009
+:2045400002295F60A90A206545A90DD018A920D014484A4A4A4A205C4568290F186930C95E
+:204560003A900269068D01F0600A0D537461727465642074657374696E670A0D000A0D7276
+:204580006567732059202058202041202050532050434C5043480A0D000A0D707265737332
+:2045A000204320746F20636F6E74696E7565206F72205320746F20736B69702063757272E6
+:2045C000656E7420746573740A0D000A0D416C6C20746573747320636F6D706C657465643D
+:1645E0002C207072657373205220746F207265706561740A0D001F
+:06FFFA0087438D4395438F
+:00040001FB
diff --git a/tests/6502_functional_test_verbose.lst b/tests/6502_functional_test_verbose.lst
new file mode 100644
index 0000000..5bd1a49
--- /dev/null
+++ b/tests/6502_functional_test_verbose.lst
@@ -0,0 +1,18730 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+---------------------------------------------------- 6502_functional_test.a65 ----------------------------------------------------
+
+6321 lines read, no errors in pass 1.
+ ;
+ ; 6 5 0 2 F U N C T I O N A L T E S T
+ ;
+ ; Copyright (C) 2012-2015 Klaus Dormann
+ ;
+ ; This program is free software: you can redistribute it and/or modify
+ ; it under the terms of the GNU General Public License as published by
+ ; the Free Software Foundation, either version 3 of the License, or
+ ; (at your option) any later version.
+ ;
+ ; This program is distributed in the hope that it will be useful,
+ ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ ; GNU General Public License for more details.
+ ;
+ ; You should have received a copy of the GNU General Public License
+ ; along with this program. If not, see .
+
+
+ ; This program is designed to test all opcodes of a 6502 emulator using all
+ ; addressing modes with focus on propper setting of the processor status
+ ; register bits.
+ ;
+ ; version 04-dec-2017
+ ; contact info at http://2m5.de or email K@2m5.de
+ ;
+ ; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
+ ; command line switches: -l -m -s2 -w -h0
+ ; | | | | no page headers in listing
+ ; | | | wide listing (133 char/col)
+ ; | | write intel hex file instead of binary
+ ; | expand macros in listing
+ ; generate pass2 listing
+ ;
+ ; No IO - should be run from a monitor with access to registers.
+ ; To run load intel hex image with a load command, than alter PC to 400 hex
+ ; (code_segment) and enter a go command.
+ ; Loop on program counter determines error or successful completion of test.
+ ; Check listing for relevant traps (jump/branch *).
+ ; Please note that in early tests some instructions will have to be used before
+ ; they are actually tested!
+ ;
+ ; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
+ ; Tests documented behavior of the original NMOS 6502 only! No unofficial
+ ; opcodes. Additional opcodes of newer versions of the CPU (65C02, 65816) will
+ ; not be tested. Decimal ops will only be tested with valid BCD operands and
+ ; N V Z flags will be ignored.
+ ;
+ ; Debugging hints:
+ ; Most of the code is written sequentially. if you hit a trap, check the
+ ; immediately preceeding code for the instruction to be tested. Results are
+ ; tested first, flags are checked second by pushing them onto the stack and
+ ; pulling them to the accumulator after the result was checked. The "real"
+ ; flags are no longer valid for the tested instruction at this time!
+ ; If the tested instruction was indexed, the relevant index (X or Y) must
+ ; also be checked. Opposed to the flags, X and Y registers are still valid.
+ ;
+ ; versions:
+ ; 28-jul-2012 1st version distributed for testing
+ ; 29-jul-2012 fixed references to location 0, now #0
+ ; added license - GPLv3
+ ; 30-jul-2012 added configuration options
+ ; 01-aug-2012 added trap macro to allow user to change error handling
+ ; 01-dec-2012 fixed trap in branch field must be a branch
+ ; 02-mar-2013 fixed PLA flags not tested
+ ; 19-jul-2013 allowed ROM vectors to be loaded when load_data_direct = 0
+ ; added test sequence check to detect if tests jump their fence
+ ; 23-jul-2013 added RAM integrity check option
+ ; 16-aug-2013 added error report to standard output option
+ ; 13-dec-2014 added binary/decimal opcode table switch test
+ ; 14-dec-2014 improved relative address test
+ ; 23-aug-2015 added option to disable self modifying tests
+ ; 24-aug-2015 all self modifying immediate opcodes now execute in data RAM
+ ; added small branch offset pretest
+ ; 21-oct-2015 added option to disable decimal mode ADC & SBC tests
+ ; 04-dec-2017 fixed BRK only tested with interrupts enabled
+ ; added option to skip the remainder of a failing test
+ ; in report.i65
+
+
+ ; C O N F I G U R A T I O N
+
+ ;ROM_vectors writable (0=no, 1=yes)
+ ;if ROM vectors can not be used interrupts will not be trapped
+ ;as a consequence BRK can not be tested but will be emulated to test RTI
+0001 = ROM_vectors = 1
+
+ ;load_data_direct (0=move from code segment, 1=load directly)
+ ;loading directly is preferred but may not be supported by your platform
+ ;0 produces only consecutive object code, 1 is not suitable for a binary image
+0001 = load_data_direct = 1
+
+ ;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
+ ;change) 2 requires extra code and is not recommended. SEI & CLI can only be
+ ;tested if you allow changing the interrupt status (I_flag = 3)
+0003 = I_flag = 3
+
+ ;configure memory - try to stay away from memory used by the system
+ ;zero_page memory start address, $50 (80) consecutive Bytes required
+ ; add 2 if I_flag = 2
+000a = zero_page = $a
+
+ ;data_segment memory start address, $6A (106) consecutive Bytes required
+0200 = data_segment = $200
+ if (data_segment & $ff) != 0
+ ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
+ endif
+
+ ;code_segment memory start address, 13kB of consecutive space required
+ ; add 2.5 kB if I_flag = 2
+0400 = code_segment = $400
+
+ ;self modifying code may be disabled to allow running in ROM
+ ;0=part of the code is self modifying and must reside in RAM
+ ;1=tests disabled: branch range
+0000 = disable_selfmod = 0
+
+ ;report errors through I/O channel (0=use standard self trap loops, 1=include
+ ;report.i65 as I/O channel, add 3.5 kB)
+0001 = report = 1
+
+ ;RAM integrity test option. Checks for undesired RAM writes.
+ ;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
+ ;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
+ffff = ram_top = -1
+
+ ;disable test decimal mode ADC & SBC, 0=enable, 1=disable,
+ ;2=disable including decimal flag in processor status
+0000 = disable_decimal = 0
+
+ noopt ;do not take shortcuts
+
+ ;macros for error & success traps to allow user modification
+ ;example:
+ ;trap macro
+ ; jsr my_error_handler
+ ; endm
+ ;trap_eq macro
+ ; bne skip\?
+ ; trap ;failed equal (zero)
+ ;skip\?
+ ; endm
+ ;
+ ; my_error_handler should pop the calling address from the stack and report it.
+ ; putting larger portions of code (more than 3 bytes) inside the trap macro
+ ; may lead to branch range problems for some tests.
+ if report = 0
+ trap macro
+ jmp * ;failed anyway
+ endm
+ trap_eq macro
+ beq * ;failed equal (zero)
+ endm
+ trap_ne macro
+ bne * ;failed not equal (non zero)
+ endm
+ trap_cs macro
+ bcs * ;failed carry set
+ endm
+ trap_cc macro
+ bcc * ;failed carry clear
+ endm
+ trap_mi macro
+ bmi * ;failed minus (bit 7 set)
+ endm
+ trap_pl macro
+ bpl * ;failed plus (bit 7 clear)
+ endm
+ trap_vs macro
+ bvs * ;failed overflow set
+ endm
+ trap_vc macro
+ bvc * ;failed overflow clear
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jmp * ;test passed, no errors
+ endm
+ endif
+ if report = 1
+ trap macro
+ jsr report_error
+ endm
+ trap_eq macro
+ bne skip\?
+ trap ;failed equal (zero)
+ skip\?
+ endm
+ trap_ne macro
+ beq skip\?
+ trap ;failed not equal (non zero)
+ skip\?
+ endm
+ trap_cs macro
+ bcc skip\?
+ trap ;failed carry set
+ skip\?
+ endm
+ trap_cc macro
+ bcs skip\?
+ trap ;failed carry clear
+ skip\?
+ endm
+ trap_mi macro
+ bpl skip\?
+ trap ;failed minus (bit 7 set)
+ skip\?
+ endm
+ trap_pl macro
+ bmi skip\?
+ trap ;failed plus (bit 7 clear)
+ skip\?
+ endm
+ trap_vs macro
+ bvc skip\?
+ trap ;failed overflow set
+ skip\?
+ endm
+ trap_vc macro
+ bvs skip\?
+ trap ;failed overflow clear
+ skip\?
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jsr report_success
+ endm
+ endif
+
+
+0001 = carry equ %00000001 ;flag bits in status
+0002 = zero equ %00000010
+0004 = intdis equ %00000100
+0008 = decmode equ %00001000
+0010 = break equ %00010000
+0020 = reserv equ %00100000
+0040 = overfl equ %01000000
+0080 = minus equ %10000000
+
+0001 = fc equ carry
+0002 = fz equ zero
+0003 = fzc equ carry+zero
+0040 = fv equ overfl
+0042 = fvz equ overfl+zero
+0080 = fn equ minus
+0081 = fnc equ minus+carry
+0082 = fnz equ minus+zero
+0083 = fnzc equ minus+zero+carry
+00c0 = fnv equ minus+overfl
+
+0030 = fao equ break+reserv ;bits always on after PHP, BRK
+0034 = fai equ fao+intdis ;+ forced interrupt disable
+0038 = faod equ fao+decmode ;+ ignore decimal
+003c = faid equ fai+decmode ;+ ignore decimal
+00ff = m8 equ $ff ;8 bit mask
+00fb = m8i equ $ff&~intdis ;8 bit mask - interrupt disable
+
+ ;macros to allow masking of status bits.
+ ;masking test of decimal bit
+ ;masking of interrupt enable/disable on load and compare
+ ;masking of always on bits after PHP or BRK (unused & break) on compare
+ if disable_decimal < 2
+ if I_flag = 0
+ load_flag macro
+ lda #\1&m8i ;force enable interrupts (mask I)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8i ;I_flag is always enabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 1
+ load_flag macro
+ lda #\1|intdis ;force disable interrupts
+ endm
+ cmp_flag macro
+ cmp #(\1|fai)&m8 ;I_flag is always disabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1|fai) ;invert expected flags + always on bits + I
+ endm
+ endif
+ if I_flag = 2
+ load_flag macro
+ lda #\1
+ ora flag_I_on ;restore I-flag
+ and flag_I_off
+ endm
+ cmp_flag macro
+ eor flag_I_on ;I_flag is never changed
+ cmp #(\1|fao)&m8i ;expected flags + always on bits, mask I
+ endm
+ eor_flag macro
+ eor flag_I_on ;I_flag is never changed
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 3
+ load_flag macro
+ lda #\1 ;allow test to change I-flag (no mask)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8 ;expected flags + always on bits
+ endm
+ eor_flag macro
+ eor #\1|fao ;invert expected flags + always on bits
+ endm
+ endif
+ else
+ if I_flag = 0
+ load_flag macro
+ lda #\1&m8i ;force enable interrupts (mask I)
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8i ;I_flag is always enabled + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 1
+ load_flag macro
+ lda #\1|intdis ;force disable interrupts
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faid)&m8 ;I_flag is always disabled + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1|faid) ;invert expected flags + always on bits + I
+ endm
+ endif
+ if I_flag = 2
+ load_flag macro
+ lda #\1
+ ora flag_I_on ;restore I-flag
+ and flag_I_off
+ endm
+ cmp_flag macro
+ eor flag_I_on ;I_flag is never changed
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8i ;expected flags + always on bits, mask I
+ endm
+ eor_flag macro
+ eor flag_I_on ;I_flag is never changed
+ ora #decmode ;ignore decimal mode bit
+ eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 3
+ load_flag macro
+ lda #\1 ;allow test to change I-flag (no mask)
+ endm
+ cmp_flag macro
+ ora #decmode ;ignore decimal mode bit
+ cmp #(\1|faod)&m8 ;expected flags + always on bits
+ endm
+ eor_flag macro
+ ora #decmode ;ignore decimal mode bit
+ eor #\1|faod ;invert expected flags + always on bits
+ endm
+ endif
+ endif
+
+ ;macros to set (register|memory|zeropage) & status
+ set_stat macro ;setting flags in the processor status register
+ load_flag \1
+ pha ;use stack to load status
+ plp
+ endm
+
+ set_a macro ;precharging accu & status
+ load_flag \2
+ pha ;use stack to load status
+ lda #\1 ;precharge accu
+ plp
+ endm
+
+ set_x macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldx #\1 ;precharge index x
+ plp
+ endm
+
+ set_y macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldy #\1 ;precharge index y
+ plp
+ endm
+
+ set_ax macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;precharge accu
+ plp
+ endm
+
+ set_ay macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,y ;precharge accu
+ plp
+ endm
+
+ set_z macro ;precharging indexed zp & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to zeropage
+ sta zpt
+ plp
+ endm
+
+ set_zx macro ;precharging zp,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed zeropage
+ sta zpt,x
+ plp
+ endm
+
+ set_abs macro ;precharging indexed memory & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to memory
+ sta abst
+ plp
+ endm
+
+ set_absx macro ;precharging abs,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed memory
+ sta abst,x
+ plp
+ endm
+
+ ;macros to test (register|memory|zeropage) & status & (mask)
+ tst_stat macro ;testing flags in the processor status register
+ php ;save status
+ pla ;use stack to retrieve status
+ pha
+ cmp_flag \1
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_a macro ;testing result in accu & flags
+ php ;save flags
+ cmp #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_x macro ;testing result in x index & flags
+ php ;save flags
+ cpx #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_y macro ;testing result in y index & flags
+ php ;save flags
+ cpy #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_ax macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne ;
+ endm
+
+ tst_ay macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,y ;test result
+ trap_ne ;
+ pla ;load status
+ eor_flag \3
+ cmp \2,y ;test flags
+ trap_ne
+ endm
+
+ tst_z macro ;indexed testing result in zp & flags
+ php ;save flags
+ lda zpt
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_zx macro ;testing result in zp,x & flags
+ php ;save flags
+ lda zpt,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_abs macro ;indexed testing result in memory & flags
+ php ;save flags
+ lda abst
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_absx macro ;testing result in abs,x & flags
+ php ;save flags
+ lda abst,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ ; RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ ; uses zpt word as indirect pointer, zpt+2 word as checksum
+ if ram_top > -1
+ check_ram macro
+ cld
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta zpt+3 ;checksum high byte
+ if disable_selfmod = 0
+ sta range_adr ;reset self modifying code
+ endif
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ ccs3\? adc zero_page,x
+ bcc ccs2\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs2\? inx
+ bne ccs3\?
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ ccs5\? adc (zpt),y
+ bcc ccs4\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs4\? iny
+ bne ccs5\?
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne ccs5\?
+ sta zpt+2 ;checksum low is
+ cmp ram_chksm ;checksum low expected
+ trap_ne ;checksum mismatch
+ lda zpt+3 ;checksum high is
+ cmp ram_chksm+1 ;checksum high expected
+ trap_ne ;checksum mismatch
+ endm
+ else
+ check_ram macro
+ ;RAM check disabled - RAM size not set
+ endm
+ endif
+
+ next_test macro ;make sure, tests don't jump the fence
+ lda test_case ;previous test
+ cmp #test_num
+ trap_ne ;test is out of sequence
+ test_num = test_num + 1
+ lda #test_num ;*** next tests' number
+ sta test_case
+ ;check_ram ;uncomment to find altered RAM after each test
+ endm
+
+ if load_data_direct = 1
+ data
+ else
+ bss ;uninitialized segment, copy of data at end of code!
+ endif
+000a = org zero_page
+ ;break test interrupt save
+000a : 00 irq_a ds 1 ;a register
+000b : 00 irq_x ds 1 ;x register
+ if I_flag = 2
+ ;masking for I bit in status
+ flag_I_on ds 1 ;or mask to load flags
+ flag_I_off ds 1 ;and mask to load flags
+ endif
+000c : zpt ;5 bytes store/modify test area
+ ;add/subtract operand generation and result/flag prediction
+000c : 00 adfc ds 1 ;carry flag before op
+000d : 00 ad1 ds 1 ;operand 1 - accumulator
+000e : 00 ad2 ds 1 ;operand 2 - memory / immediate
+000f : 00 adrl ds 1 ;expected result bits 0-7
+0010 : 00 adrh ds 1 ;expected result bit 8 (carry)
+0011 : 00 adrf ds 1 ;expected flags NV0000ZC (only binary mode)
+0012 : 00 sb2 ds 1 ;operand 2 complemented for subtract
+0013 : zp_bss
+0013 : c3824100 zp1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+0017 : 7f zp7f db $7f ;test pattern for compare
+ ;logical zeropage operands
+0018 : 001f7180 zpOR db 0,$1f,$71,$80 ;test pattern for OR
+001c : 0fff7f80 zpAN db $0f,$ff,$7f,$80 ;test pattern for AND
+0020 : ff0f8f8f zpEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+0024 : 1702 ind1 dw abs1 ;indirect pointer to pattern in absolute memory
+0026 : 1802 dw abs1+1
+0028 : 1902 dw abs1+2
+002a : 1a02 dw abs1+3
+002c : 1b02 dw abs7f
+002e : 1f01 inw1 dw abs1-$f8 ;indirect pointer for wrap-test pattern
+0030 : 0302 indt dw abst ;indirect pointer to store area in absolute memory
+0032 : 0402 dw abst+1
+0034 : 0502 dw abst+2
+0036 : 0602 dw abst+3
+0038 : 0b01 inwt dw abst-$f8 ;indirect pointer for wrap-test store
+003a : 4e02 indAN dw absAN ;indirect pointer to AND pattern in absolute memory
+003c : 4f02 dw absAN+1
+003e : 5002 dw absAN+2
+0040 : 5102 dw absAN+3
+0042 : 5202 indEO dw absEO ;indirect pointer to EOR pattern in absolute memory
+0044 : 5302 dw absEO+1
+0046 : 5402 dw absEO+2
+0048 : 5502 dw absEO+3
+004a : 4a02 indOR dw absOR ;indirect pointer to OR pattern in absolute memory
+004c : 4b02 dw absOR+1
+004e : 4c02 dw absOR+2
+0050 : 4d02 dw absOR+3
+ ;add/subtract indirect pointers
+0052 : 0302 adi2 dw ada2 ;indirect pointer to operand 2 in absolute memory
+0054 : 0402 sbi2 dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+0056 : 0401 adiy2 dw ada2-$ff ;with offset for indirect indexed
+0058 : 0501 sbiy2 dw sba2-$ff
+005a : zp_bss_end
+
+0200 = org data_segment
+0200 : 00 test_case ds 1 ;current test number
+0201 : 0000 ram_chksm ds 2 ;checksum for RAM integrity test
+ ;add/subtract operand copy - abs tests write area
+0203 : abst ;5 bytes store/modify test area
+0203 : 00 ada2 ds 1 ;operand 2
+0204 : 00 sba2 ds 1 ;operand 2 complemented for subtract
+0205 : 000000 ds 3 ;fill remaining bytes
+0208 : data_bss
+ if load_data_direct = 1
+0208 : 2900 ex_andi and #0 ;execute immediate opcodes
+020a : 60 rts
+020b : 4900 ex_eori eor #0 ;execute immediate opcodes
+020d : 60 rts
+020e : 0900 ex_orai ora #0 ;execute immediate opcodes
+0210 : 60 rts
+0211 : 6900 ex_adci adc #0 ;execute immediate opcodes
+0213 : 60 rts
+0214 : e900 ex_sbci sbc #0 ;execute immediate opcodes
+0216 : 60 rts
+ else
+ ex_andi ds 3
+ ex_eori ds 3
+ ex_orai ds 3
+ ex_adci ds 3
+ ex_sbci ds 3
+ endif
+0217 : c3824100 abs1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+021b : 7f abs7f db $7f ;test pattern for compare
+ ;loads
+021c : 80800002 fLDx db fn,fn,0,fz ;expected flags for load
+ ;shifts
+0220 : rASL ;expected result ASL & ROL -carry
+0220 : 86048200 rROL db $86,$04,$82,0 ; "
+0224 : 87058301 rROLc db $87,$05,$83,1 ;expected result ROL +carry
+0228 : rLSR ;expected result LSR & ROR -carry
+0228 : 61412000 rROR db $61,$41,$20,0 ; "
+022c : e1c1a080 rRORc db $e1,$c1,$a0,$80 ;expected result ROR +carry
+0230 : fASL ;expected flags for shifts
+0230 : 81018002 fROL db fnc,fc,fn,fz ;no carry in
+0234 : 81018000 fROLc db fnc,fc,fn,0 ;carry in
+0238 : fLSR
+0238 : 01000102 fROR db fc,0,fc,fz ;no carry in
+023c : 81808180 fRORc db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+0240 : 7f80ff0001 rINC db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+0245 : 0080800200 fINC db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+024a : 001f7180 absOR db 0,$1f,$71,$80 ;test pattern for OR
+024e : 0fff7f80 absAN db $0f,$ff,$7f,$80 ;test pattern for AND
+0252 : ff0f8f8f absEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+0256 : 00f11f00 absORa db 0,$f1,$1f,0 ;test pattern for OR
+025a : f0ffffff absANa db $f0,$ff,$ff,$ff ;test pattern for AND
+025e : fff0f00f absEOa db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+0262 : 00ff7f80 absrlo db 0,$ff,$7f,$80
+0266 : 02800080 absflo db fz,fn,0,fn
+026a : data_bss_end
+
+
+ code
+0400 = org code_segment
+0400 : d8 start cld
+0401 : a2ff ldx #$ff
+0403 : 9a txs
+0404 : a900 lda #0 ;*** test 0 = initialize
+0406 : 8d0002 sta test_case
+0000 = test_num = 0
+
+ ;stop interrupts before initializing BSS
+ if I_flag = 1
+ sei
+ endif
+
+ ;initialize I/O for report channel
+ if report = 1
+0409 : 204c44 jsr report_init
+ endif
+
+ ;pretest small branch offset
+040c : a205 ldx #5
+040e : 4c3604 jmp psb_test
+0411 : psb_bwok
+0411 : a005 ldy #5
+0413 : d008 bne psb_forw
+ trap ;branch should be taken
+0415 : 205b44 > jsr report_error
+
+0418 : 88 dey ;forward landing zone
+0419 : 88 dey
+041a : 88 dey
+041b : 88 dey
+041c : 88 dey
+041d : psb_forw
+041d : 88 dey
+041e : 88 dey
+041f : 88 dey
+0420 : 88 dey
+0421 : 88 dey
+0422 : f017 beq psb_fwok
+ trap ;forward offset
+0424 : 205b44 > jsr report_error
+
+
+0427 : ca dex ;backward landing zone
+0428 : ca dex
+0429 : ca dex
+042a : ca dex
+042b : ca dex
+042c : psb_back
+042c : ca dex
+042d : ca dex
+042e : ca dex
+042f : ca dex
+0430 : ca dex
+0431 : f0de beq psb_bwok
+ trap ;backward offset
+0433 : 205b44 > jsr report_error
+
+0436 : psb_test
+0436 : d0f4 bne psb_back
+ trap ;branch should be taken
+0438 : 205b44 > jsr report_error
+
+043b : psb_fwok
+
+ ;initialize BSS segment
+ if load_data_direct != 1
+ ldx #zp_end-zp_init-1
+ ld_zp lda zp_init,x
+ sta zp_bss,x
+ dex
+ bpl ld_zp
+ ldx #data_end-data_init-1
+ ld_data lda data_init,x
+ sta data_bss,x
+ dex
+ bpl ld_data
+ if ROM_vectors = 1
+ ldx #5
+ ld_vect lda vec_init,x
+ sta vec_bss,x
+ dex
+ bpl ld_vect
+ endif
+ endif
+
+ ;retain status of interrupt flag
+ if I_flag = 2
+ php
+ pla
+ and #4 ;isolate flag
+ sta flag_I_on ;or mask
+ eor #lo(~4) ;reverse
+ sta flag_I_off ;and mask
+ endif
+
+ ;generate checksum for RAM integrity test
+ if ram_top > -1
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta ram_chksm+1 ;checksum high byte
+ if disable_selfmod = 0
+ sta range_adr ;reset self modifying code
+ endif
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ gcs3 adc zero_page,x
+ bcc gcs2
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs2 inx
+ bne gcs3
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ gcs5 adc (zpt),y
+ bcc gcs4
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs4 iny
+ bne gcs5
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne gcs5
+ sta ram_chksm ;checksum complete
+ endif
+ next_test
+043b : ad0002 > lda test_case ;previous test
+043e : c900 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0440 : f003 > beq skip0006
+ > trap ;failed not equal (non zero)
+0442 : 205b44 > jsr report_error
+ >
+0445 : >skip0006
+ >
+0001 = >test_num = test_num + 1
+0445 : a901 > lda #test_num ;*** next tests' number
+0447 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if disable_selfmod = 0
+ ;testing relative addressing with BEQ
+044a : a0fe ldy #$fe ;testing maximum range, not -1/-2 (invalid/self adr)
+044c : range_loop
+044c : 88 dey ;next relative address
+044d : 98 tya
+044e : aa tax ;precharge count to end of loop
+044f : 1008 bpl range_fw ;calculate relative address
+0451 : 18 clc ;avoid branch self or to relative address of branch
+0452 : 6902 adc #2
+0454 : ea nop ;offset landing zone - tolerate +/-5 offset to branch
+0455 : ea nop
+0456 : ea nop
+0457 : ea nop
+0458 : ea nop
+0459 : range_fw
+0459 : ea nop
+045a : ea nop
+045b : ea nop
+045c : ea nop
+045d : ea nop
+045e : 497f eor #$7f ;complement except sign
+0460 : 8dec04 sta range_adr ;load into test target
+0463 : a900 lda #0 ;should set zero flag in status register
+0465 : 4ceb04 jmp range_op
+
+0468 : ca dex ; offset landing zone - backward branch too far
+0469 : ca dex
+046a : ca dex
+046b : ca dex
+046c : ca dex
+ ;relative address target field with branch under test in the middle
+046d : ca dex ;-128 - max backward
+046e : ca dex
+046f : ca dex
+0470 : ca dex
+0471 : ca dex
+0472 : ca dex
+0473 : ca dex
+0474 : ca dex
+0475 : ca dex ;-120
+0476 : ca dex
+0477 : ca dex
+0478 : ca dex
+0479 : ca dex
+047a : ca dex
+047b : ca dex
+047c : ca dex
+047d : ca dex
+047e : ca dex
+047f : ca dex ;-110
+0480 : ca dex
+0481 : ca dex
+0482 : ca dex
+0483 : ca dex
+0484 : ca dex
+0485 : ca dex
+0486 : ca dex
+0487 : ca dex
+0488 : ca dex
+0489 : ca dex ;-100
+048a : ca dex
+048b : ca dex
+048c : ca dex
+048d : ca dex
+048e : ca dex
+048f : ca dex
+0490 : ca dex
+0491 : ca dex
+0492 : ca dex
+0493 : ca dex ;-90
+0494 : ca dex
+0495 : ca dex
+0496 : ca dex
+0497 : ca dex
+0498 : ca dex
+0499 : ca dex
+049a : ca dex
+049b : ca dex
+049c : ca dex
+049d : ca dex ;-80
+049e : ca dex
+049f : ca dex
+04a0 : ca dex
+04a1 : ca dex
+04a2 : ca dex
+04a3 : ca dex
+04a4 : ca dex
+04a5 : ca dex
+04a6 : ca dex
+04a7 : ca dex ;-70
+04a8 : ca dex
+04a9 : ca dex
+04aa : ca dex
+04ab : ca dex
+04ac : ca dex
+04ad : ca dex
+04ae : ca dex
+04af : ca dex
+04b0 : ca dex
+04b1 : ca dex ;-60
+04b2 : ca dex
+04b3 : ca dex
+04b4 : ca dex
+04b5 : ca dex
+04b6 : ca dex
+04b7 : ca dex
+04b8 : ca dex
+04b9 : ca dex
+04ba : ca dex
+04bb : ca dex ;-50
+04bc : ca dex
+04bd : ca dex
+04be : ca dex
+04bf : ca dex
+04c0 : ca dex
+04c1 : ca dex
+04c2 : ca dex
+04c3 : ca dex
+04c4 : ca dex
+04c5 : ca dex ;-40
+04c6 : ca dex
+04c7 : ca dex
+04c8 : ca dex
+04c9 : ca dex
+04ca : ca dex
+04cb : ca dex
+04cc : ca dex
+04cd : ca dex
+04ce : ca dex
+04cf : ca dex ;-30
+04d0 : ca dex
+04d1 : ca dex
+04d2 : ca dex
+04d3 : ca dex
+04d4 : ca dex
+04d5 : ca dex
+04d6 : ca dex
+04d7 : ca dex
+04d8 : ca dex
+04d9 : ca dex ;-20
+04da : ca dex
+04db : ca dex
+04dc : ca dex
+04dd : ca dex
+04de : ca dex
+04df : ca dex
+04e0 : ca dex
+04e1 : ca dex
+04e2 : ca dex
+04e3 : ca dex ;-10
+04e4 : ca dex
+04e5 : ca dex
+04e6 : ca dex
+04e7 : ca dex
+04e8 : ca dex
+04e9 : ca dex
+04ea : ca dex ;-3
+04eb : range_op ;test target with zero flag=0, z=1 if previous dex
+04ec = range_adr = *+1 ;modifiable relative address
+04eb : f03e beq *+64 ;+64 if called without modification
+04ed : ca dex ;+0
+04ee : ca dex
+04ef : ca dex
+04f0 : ca dex
+04f1 : ca dex
+04f2 : ca dex
+04f3 : ca dex
+04f4 : ca dex
+04f5 : ca dex
+04f6 : ca dex
+04f7 : ca dex ;+10
+04f8 : ca dex
+04f9 : ca dex
+04fa : ca dex
+04fb : ca dex
+04fc : ca dex
+04fd : ca dex
+04fe : ca dex
+04ff : ca dex
+0500 : ca dex
+0501 : ca dex ;+20
+0502 : ca dex
+0503 : ca dex
+0504 : ca dex
+0505 : ca dex
+0506 : ca dex
+0507 : ca dex
+0508 : ca dex
+0509 : ca dex
+050a : ca dex
+050b : ca dex ;+30
+050c : ca dex
+050d : ca dex
+050e : ca dex
+050f : ca dex
+0510 : ca dex
+0511 : ca dex
+0512 : ca dex
+0513 : ca dex
+0514 : ca dex
+0515 : ca dex ;+40
+0516 : ca dex
+0517 : ca dex
+0518 : ca dex
+0519 : ca dex
+051a : ca dex
+051b : ca dex
+051c : ca dex
+051d : ca dex
+051e : ca dex
+051f : ca dex ;+50
+0520 : ca dex
+0521 : ca dex
+0522 : ca dex
+0523 : ca dex
+0524 : ca dex
+0525 : ca dex
+0526 : ca dex
+0527 : ca dex
+0528 : ca dex
+0529 : ca dex ;+60
+052a : ca dex
+052b : ca dex
+052c : ca dex
+052d : ca dex
+052e : ca dex
+052f : ca dex
+0530 : ca dex
+0531 : ca dex
+0532 : ca dex
+0533 : ca dex ;+70
+0534 : ca dex
+0535 : ca dex
+0536 : ca dex
+0537 : ca dex
+0538 : ca dex
+0539 : ca dex
+053a : ca dex
+053b : ca dex
+053c : ca dex
+053d : ca dex ;+80
+053e : ca dex
+053f : ca dex
+0540 : ca dex
+0541 : ca dex
+0542 : ca dex
+0543 : ca dex
+0544 : ca dex
+0545 : ca dex
+0546 : ca dex
+0547 : ca dex ;+90
+0548 : ca dex
+0549 : ca dex
+054a : ca dex
+054b : ca dex
+054c : ca dex
+054d : ca dex
+054e : ca dex
+054f : ca dex
+0550 : ca dex
+0551 : ca dex ;+100
+0552 : ca dex
+0553 : ca dex
+0554 : ca dex
+0555 : ca dex
+0556 : ca dex
+0557 : ca dex
+0558 : ca dex
+0559 : ca dex
+055a : ca dex
+055b : ca dex ;+110
+055c : ca dex
+055d : ca dex
+055e : ca dex
+055f : ca dex
+0560 : ca dex
+0561 : ca dex
+0562 : ca dex
+0563 : ca dex
+0564 : ca dex
+0565 : ca dex ;+120
+0566 : ca dex
+0567 : ca dex
+0568 : ca dex
+0569 : ca dex
+056a : ca dex
+056b : ca dex
+056c : ea nop ;offset landing zone - forward branch too far
+056d : ea nop
+056e : ea nop
+056f : ea nop
+0570 : ea nop
+0571 : f008 beq range_ok ;+127 - max forward
+ trap ; bad range
+0573 : 205b44 > jsr report_error
+
+0576 : ea nop ;offset landing zone - tolerate +/-5 offset to branch
+0577 : ea nop
+0578 : ea nop
+0579 : ea nop
+057a : ea nop
+057b : range_ok
+057b : ea nop
+057c : ea nop
+057d : ea nop
+057e : ea nop
+057f : ea nop
+0580 : c000 cpy #0
+0582 : f003 beq range_end
+0584 : 4c4c04 jmp range_loop
+0587 : range_end ;range test successful
+ endif
+ next_test
+0587 : ad0002 > lda test_case ;previous test
+058a : c901 > cmp #test_num
+ > trap_ne ;test is out of sequence
+058c : f003 > beq skip0010
+ > trap ;failed not equal (non zero)
+058e : 205b44 > jsr report_error
+ >
+0591 : >skip0010
+ >
+0002 = >test_num = test_num + 1
+0591 : a902 > lda #test_num ;*** next tests' number
+0593 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;partial test BNE & CMP, CPX, CPY immediate
+0596 : c001 cpy #1 ;testing BNE true
+0598 : d003 bne test_bne
+ trap
+059a : 205b44 > jsr report_error
+
+059d : test_bne
+059d : a900 lda #0
+059f : c900 cmp #0 ;test compare immediate
+ trap_ne
+05a1 : f003 > beq skip0013
+ > trap ;failed not equal (non zero)
+05a3 : 205b44 > jsr report_error
+ >
+05a6 : >skip0013
+
+ trap_cc
+05a6 : b003 > bcs skip0015
+ > trap ;failed carry clear
+05a8 : 205b44 > jsr report_error
+ >
+05ab : >skip0015
+
+ trap_mi
+05ab : 1003 > bpl skip0017
+ > trap ;failed minus (bit 7 set)
+05ad : 205b44 > jsr report_error
+ >
+05b0 : >skip0017
+
+05b0 : c901 cmp #1
+ trap_eq
+05b2 : d003 > bne skip0019
+ > trap ;failed equal (zero)
+05b4 : 205b44 > jsr report_error
+ >
+05b7 : >skip0019
+
+ trap_cs
+05b7 : 9003 > bcc skip0021
+ > trap ;failed carry set
+05b9 : 205b44 > jsr report_error
+ >
+05bc : >skip0021
+
+ trap_pl
+05bc : 3003 > bmi skip0023
+ > trap ;failed plus (bit 7 clear)
+05be : 205b44 > jsr report_error
+ >
+05c1 : >skip0023
+
+05c1 : aa tax
+05c2 : e000 cpx #0 ;test compare x immediate
+ trap_ne
+05c4 : f003 > beq skip0025
+ > trap ;failed not equal (non zero)
+05c6 : 205b44 > jsr report_error
+ >
+05c9 : >skip0025
+
+ trap_cc
+05c9 : b003 > bcs skip0027
+ > trap ;failed carry clear
+05cb : 205b44 > jsr report_error
+ >
+05ce : >skip0027
+
+ trap_mi
+05ce : 1003 > bpl skip0029
+ > trap ;failed minus (bit 7 set)
+05d0 : 205b44 > jsr report_error
+ >
+05d3 : >skip0029
+
+05d3 : e001 cpx #1
+ trap_eq
+05d5 : d003 > bne skip0031
+ > trap ;failed equal (zero)
+05d7 : 205b44 > jsr report_error
+ >
+05da : >skip0031
+
+ trap_cs
+05da : 9003 > bcc skip0033
+ > trap ;failed carry set
+05dc : 205b44 > jsr report_error
+ >
+05df : >skip0033
+
+ trap_pl
+05df : 3003 > bmi skip0035
+ > trap ;failed plus (bit 7 clear)
+05e1 : 205b44 > jsr report_error
+ >
+05e4 : >skip0035
+
+05e4 : a8 tay
+05e5 : c000 cpy #0 ;test compare y immediate
+ trap_ne
+05e7 : f003 > beq skip0037
+ > trap ;failed not equal (non zero)
+05e9 : 205b44 > jsr report_error
+ >
+05ec : >skip0037
+
+ trap_cc
+05ec : b003 > bcs skip0039
+ > trap ;failed carry clear
+05ee : 205b44 > jsr report_error
+ >
+05f1 : >skip0039
+
+ trap_mi
+05f1 : 1003 > bpl skip0041
+ > trap ;failed minus (bit 7 set)
+05f3 : 205b44 > jsr report_error
+ >
+05f6 : >skip0041
+
+05f6 : c001 cpy #1
+ trap_eq
+05f8 : d003 > bne skip0043
+ > trap ;failed equal (zero)
+05fa : 205b44 > jsr report_error
+ >
+05fd : >skip0043
+
+ trap_cs
+05fd : 9003 > bcc skip0045
+ > trap ;failed carry set
+05ff : 205b44 > jsr report_error
+ >
+0602 : >skip0045
+
+ trap_pl
+0602 : 3003 > bmi skip0047
+ > trap ;failed plus (bit 7 clear)
+0604 : 205b44 > jsr report_error
+ >
+0607 : >skip0047
+
+ next_test
+0607 : ad0002 > lda test_case ;previous test
+060a : c902 > cmp #test_num
+ > trap_ne ;test is out of sequence
+060c : f003 > beq skip0050
+ > trap ;failed not equal (non zero)
+060e : 205b44 > jsr report_error
+ >
+0611 : >skip0050
+ >
+0003 = >test_num = test_num + 1
+0611 : a903 > lda #test_num ;*** next tests' number
+0613 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ ;testing stack operations PHA PHP PLA PLP
+
+0616 : a2ff ldx #$ff ;initialize stack
+0618 : 9a txs
+0619 : a955 lda #$55
+061b : 48 pha
+061c : a9aa lda #$aa
+061e : 48 pha
+061f : cdfe01 cmp $1fe ;on stack ?
+ trap_ne
+0622 : f003 > beq skip0052
+ > trap ;failed not equal (non zero)
+0624 : 205b44 > jsr report_error
+ >
+0627 : >skip0052
+
+0627 : ba tsx
+0628 : 8a txa ;overwrite accu
+0629 : c9fd cmp #$fd ;sp decremented?
+ trap_ne
+062b : f003 > beq skip0054
+ > trap ;failed not equal (non zero)
+062d : 205b44 > jsr report_error
+ >
+0630 : >skip0054
+
+0630 : 68 pla
+0631 : c9aa cmp #$aa ;successful retreived from stack?
+ trap_ne
+0633 : f003 > beq skip0056
+ > trap ;failed not equal (non zero)
+0635 : 205b44 > jsr report_error
+ >
+0638 : >skip0056
+
+0638 : 68 pla
+0639 : c955 cmp #$55
+ trap_ne
+063b : f003 > beq skip0058
+ > trap ;failed not equal (non zero)
+063d : 205b44 > jsr report_error
+ >
+0640 : >skip0058
+
+0640 : cdff01 cmp $1ff ;remains on stack?
+ trap_ne
+0643 : f003 > beq skip0060
+ > trap ;failed not equal (non zero)
+0645 : 205b44 > jsr report_error
+ >
+0648 : >skip0060
+
+0648 : ba tsx
+0649 : e0ff cpx #$ff ;sp incremented?
+ trap_ne
+064b : f003 > beq skip0062
+ > trap ;failed not equal (non zero)
+064d : 205b44 > jsr report_error
+ >
+0650 : >skip0062
+
+ next_test
+0650 : ad0002 > lda test_case ;previous test
+0653 : c903 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0655 : f003 > beq skip0065
+ > trap ;failed not equal (non zero)
+0657 : 205b44 > jsr report_error
+ >
+065a : >skip0065
+ >
+0004 = >test_num = test_num + 1
+065a : a904 > lda #test_num ;*** next tests' number
+065c : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
+ set_stat $ff ;all on
+ > load_flag $ff
+065f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0661 : 48 > pha ;use stack to load status
+0662 : 28 > plp
+
+0663 : 101a bpl nbr1 ;branches should not be taken
+0665 : 501b bvc nbr2
+0667 : 901c bcc nbr3
+0669 : d01d bne nbr4
+066b : 3003 bmi br1 ;branches should be taken
+ trap
+066d : 205b44 > jsr report_error
+
+0670 : 7003 br1 bvs br2
+ trap
+0672 : 205b44 > jsr report_error
+
+0675 : b003 br2 bcs br3
+ trap
+0677 : 205b44 > jsr report_error
+
+067a : f00f br3 beq br4
+ trap
+067c : 205b44 > jsr report_error
+
+067f : nbr1
+ trap ;previous bpl taken
+067f : 205b44 > jsr report_error
+
+0682 : nbr2
+ trap ;previous bvc taken
+0682 : 205b44 > jsr report_error
+
+0685 : nbr3
+ trap ;previous bcc taken
+0685 : 205b44 > jsr report_error
+
+0688 : nbr4
+ trap ;previous bne taken
+0688 : 205b44 > jsr report_error
+
+068b : 08 br4 php
+068c : ba tsx
+068d : e0fe cpx #$fe ;sp after php?
+ trap_ne
+068f : f003 > beq skip0077
+ > trap ;failed not equal (non zero)
+0691 : 205b44 > jsr report_error
+ >
+0694 : >skip0077
+
+0694 : 68 pla
+ cmp_flag $ff ;returned all flags on?
+0695 : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0697 : f003 > beq skip0080
+ > trap ;failed not equal (non zero)
+0699 : 205b44 > jsr report_error
+ >
+069c : >skip0080
+
+069c : ba tsx
+069d : e0ff cpx #$ff ;sp after php?
+ trap_ne
+069f : f003 > beq skip0082
+ > trap ;failed not equal (non zero)
+06a1 : 205b44 > jsr report_error
+ >
+06a4 : >skip0082
+
+ set_stat 0 ;all off
+ > load_flag 0
+06a4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+06a6 : 48 > pha ;use stack to load status
+06a7 : 28 > plp
+
+06a8 : 301a bmi nbr11 ;branches should not be taken
+06aa : 701b bvs nbr12
+06ac : b01c bcs nbr13
+06ae : f01d beq nbr14
+06b0 : 1003 bpl br11 ;branches should be taken
+ trap
+06b2 : 205b44 > jsr report_error
+
+06b5 : 5003 br11 bvc br12
+ trap
+06b7 : 205b44 > jsr report_error
+
+06ba : 9003 br12 bcc br13
+ trap
+06bc : 205b44 > jsr report_error
+
+06bf : d00f br13 bne br14
+ trap
+06c1 : 205b44 > jsr report_error
+
+06c4 : nbr11
+ trap ;previous bmi taken
+06c4 : 205b44 > jsr report_error
+
+06c7 : nbr12
+ trap ;previous bvs taken
+06c7 : 205b44 > jsr report_error
+
+06ca : nbr13
+ trap ;previous bcs taken
+06ca : 205b44 > jsr report_error
+
+06cd : nbr14
+ trap ;previous beq taken
+06cd : 205b44 > jsr report_error
+
+06d0 : 08 br14 php
+06d1 : 68 pla
+ cmp_flag 0 ;flags off except break (pushed by sw) + reserved?
+06d2 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+06d4 : f003 > beq skip0095
+ > trap ;failed not equal (non zero)
+06d6 : 205b44 > jsr report_error
+ >
+06d9 : >skip0095
+
+ ;crosscheck flags
+ set_stat zero
+ > load_flag zero
+06d9 : a902 > lda #zero ;allow test to change I-flag (no mask)
+ >
+06db : 48 > pha ;use stack to load status
+06dc : 28 > plp
+
+06dd : d002 bne brzs1
+06df : f003 beq brzs2
+06e1 : brzs1
+ trap ;branch zero/non zero
+06e1 : 205b44 > jsr report_error
+
+06e4 : b002 brzs2 bcs brzs3
+06e6 : 9003 bcc brzs4
+06e8 : brzs3
+ trap ;branch carry/no carry
+06e8 : 205b44 > jsr report_error
+
+06eb : 3002 brzs4 bmi brzs5
+06ed : 1003 bpl brzs6
+06ef : brzs5
+ trap ;branch minus/plus
+06ef : 205b44 > jsr report_error
+
+06f2 : 7002 brzs6 bvs brzs7
+06f4 : 5003 bvc brzs8
+06f6 : brzs7
+ trap ;branch overflow/no overflow
+06f6 : 205b44 > jsr report_error
+
+06f9 : brzs8
+ set_stat carry
+ > load_flag carry
+06f9 : a901 > lda #carry ;allow test to change I-flag (no mask)
+ >
+06fb : 48 > pha ;use stack to load status
+06fc : 28 > plp
+
+06fd : f002 beq brcs1
+06ff : d003 bne brcs2
+0701 : brcs1
+ trap ;branch zero/non zero
+0701 : 205b44 > jsr report_error
+
+0704 : 9002 brcs2 bcc brcs3
+0706 : b003 bcs brcs4
+0708 : brcs3
+ trap ;branch carry/no carry
+0708 : 205b44 > jsr report_error
+
+070b : 3002 brcs4 bmi brcs5
+070d : 1003 bpl brcs6
+070f : brcs5
+ trap ;branch minus/plus
+070f : 205b44 > jsr report_error
+
+0712 : 7002 brcs6 bvs brcs7
+0714 : 5003 bvc brcs8
+0716 : brcs7
+ trap ;branch overflow/no overflow
+0716 : 205b44 > jsr report_error
+
+
+0719 : brcs8
+ set_stat minus
+ > load_flag minus
+0719 : a980 > lda #minus ;allow test to change I-flag (no mask)
+ >
+071b : 48 > pha ;use stack to load status
+071c : 28 > plp
+
+071d : f002 beq brmi1
+071f : d003 bne brmi2
+0721 : brmi1
+ trap ;branch zero/non zero
+0721 : 205b44 > jsr report_error
+
+0724 : b002 brmi2 bcs brmi3
+0726 : 9003 bcc brmi4
+0728 : brmi3
+ trap ;branch carry/no carry
+0728 : 205b44 > jsr report_error
+
+072b : 1002 brmi4 bpl brmi5
+072d : 3003 bmi brmi6
+072f : brmi5
+ trap ;branch minus/plus
+072f : 205b44 > jsr report_error
+
+0732 : 7002 brmi6 bvs brmi7
+0734 : 5003 bvc brmi8
+0736 : brmi7
+ trap ;branch overflow/no overflow
+0736 : 205b44 > jsr report_error
+
+0739 : brmi8
+ set_stat overfl
+ > load_flag overfl
+0739 : a940 > lda #overfl ;allow test to change I-flag (no mask)
+ >
+073b : 48 > pha ;use stack to load status
+073c : 28 > plp
+
+073d : f002 beq brvs1
+073f : d003 bne brvs2
+0741 : brvs1
+ trap ;branch zero/non zero
+0741 : 205b44 > jsr report_error
+
+0744 : b002 brvs2 bcs brvs3
+0746 : 9003 bcc brvs4
+0748 : brvs3
+ trap ;branch carry/no carry
+0748 : 205b44 > jsr report_error
+
+074b : 3002 brvs4 bmi brvs5
+074d : 1003 bpl brvs6
+074f : brvs5
+ trap ;branch minus/plus
+074f : 205b44 > jsr report_error
+
+0752 : 5002 brvs6 bvc brvs7
+0754 : 7003 bvs brvs8
+0756 : brvs7
+ trap ;branch overflow/no overflow
+0756 : 205b44 > jsr report_error
+
+0759 : brvs8
+ set_stat $ff-zero
+ > load_flag $ff-zero
+0759 : a9fd > lda #$ff-zero ;allow test to change I-flag (no mask)
+ >
+075b : 48 > pha ;use stack to load status
+075c : 28 > plp
+
+075d : f002 beq brzc1
+075f : d003 bne brzc2
+0761 : brzc1
+ trap ;branch zero/non zero
+0761 : 205b44 > jsr report_error
+
+0764 : 9002 brzc2 bcc brzc3
+0766 : b003 bcs brzc4
+0768 : brzc3
+ trap ;branch carry/no carry
+0768 : 205b44 > jsr report_error
+
+076b : 1002 brzc4 bpl brzc5
+076d : 3003 bmi brzc6
+076f : brzc5
+ trap ;branch minus/plus
+076f : 205b44 > jsr report_error
+
+0772 : 5002 brzc6 bvc brzc7
+0774 : 7003 bvs brzc8
+0776 : brzc7
+ trap ;branch overflow/no overflow
+0776 : 205b44 > jsr report_error
+
+0779 : brzc8
+ set_stat $ff-carry
+ > load_flag $ff-carry
+0779 : a9fe > lda #$ff-carry ;allow test to change I-flag (no mask)
+ >
+077b : 48 > pha ;use stack to load status
+077c : 28 > plp
+
+077d : d002 bne brcc1
+077f : f003 beq brcc2
+0781 : brcc1
+ trap ;branch zero/non zero
+0781 : 205b44 > jsr report_error
+
+0784 : b002 brcc2 bcs brcc3
+0786 : 9003 bcc brcc4
+0788 : brcc3
+ trap ;branch carry/no carry
+0788 : 205b44 > jsr report_error
+
+078b : 1002 brcc4 bpl brcc5
+078d : 3003 bmi brcc6
+078f : brcc5
+ trap ;branch minus/plus
+078f : 205b44 > jsr report_error
+
+0792 : 5002 brcc6 bvc brcc7
+0794 : 7003 bvs brcc8
+0796 : brcc7
+ trap ;branch overflow/no overflow
+0796 : 205b44 > jsr report_error
+
+0799 : brcc8
+ set_stat $ff-minus
+ > load_flag $ff-minus
+0799 : a97f > lda #$ff-minus ;allow test to change I-flag (no mask)
+ >
+079b : 48 > pha ;use stack to load status
+079c : 28 > plp
+
+079d : d002 bne brpl1
+079f : f003 beq brpl2
+07a1 : brpl1
+ trap ;branch zero/non zero
+07a1 : 205b44 > jsr report_error
+
+07a4 : 9002 brpl2 bcc brpl3
+07a6 : b003 bcs brpl4
+07a8 : brpl3
+ trap ;branch carry/no carry
+07a8 : 205b44 > jsr report_error
+
+07ab : 3002 brpl4 bmi brpl5
+07ad : 1003 bpl brpl6
+07af : brpl5
+ trap ;branch minus/plus
+07af : 205b44 > jsr report_error
+
+07b2 : 5002 brpl6 bvc brpl7
+07b4 : 7003 bvs brpl8
+07b6 : brpl7
+ trap ;branch overflow/no overflow
+07b6 : 205b44 > jsr report_error
+
+07b9 : brpl8
+ set_stat $ff-overfl
+ > load_flag $ff-overfl
+07b9 : a9bf > lda #$ff-overfl ;allow test to change I-flag (no mask)
+ >
+07bb : 48 > pha ;use stack to load status
+07bc : 28 > plp
+
+07bd : d002 bne brvc1
+07bf : f003 beq brvc2
+07c1 : brvc1
+ trap ;branch zero/non zero
+07c1 : 205b44 > jsr report_error
+
+07c4 : 9002 brvc2 bcc brvc3
+07c6 : b003 bcs brvc4
+07c8 : brvc3
+ trap ;branch carry/no carry
+07c8 : 205b44 > jsr report_error
+
+07cb : 1002 brvc4 bpl brvc5
+07cd : 3003 bmi brvc6
+07cf : brvc5
+ trap ;branch minus/plus
+07cf : 205b44 > jsr report_error
+
+07d2 : 7002 brvc6 bvs brvc7
+07d4 : 5003 bvc brvc8
+07d6 : brvc7
+ trap ;branch overflow/no overflow
+07d6 : 205b44 > jsr report_error
+
+07d9 : brvc8
+ next_test
+07d9 : ad0002 > lda test_case ;previous test
+07dc : c904 > cmp #test_num
+ > trap_ne ;test is out of sequence
+07de : f003 > beq skip0146
+ > trap ;failed not equal (non zero)
+07e0 : 205b44 > jsr report_error
+ >
+07e3 : >skip0146
+ >
+0005 = >test_num = test_num + 1
+07e3 : a905 > lda #test_num ;*** next tests' number
+07e5 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test PHA does not alter flags or accumulator but PLA does
+07e8 : a255 ldx #$55 ;x & y protected
+07ea : a0aa ldy #$aa
+ set_a 1,$ff ;push
+ > load_flag $ff
+07ec : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+07ee : 48 > pha ;use stack to load status
+07ef : a901 > lda #1 ;precharge accu
+07f1 : 28 > plp
+
+07f2 : 48 pha
+ tst_a 1,$ff
+07f3 : 08 > php ;save flags
+07f4 : c901 > cmp #1 ;test result
+ > trap_ne
+07f6 : f003 > beq skip0151
+ > trap ;failed not equal (non zero)
+07f8 : 205b44 > jsr report_error
+ >
+07fb : >skip0151
+ >
+07fb : 68 > pla ;load status
+07fc : 48 > pha
+ > cmp_flag $ff
+07fd : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07ff : f003 > beq skip0154
+ > trap ;failed not equal (non zero)
+0801 : 205b44 > jsr report_error
+ >
+0804 : >skip0154
+ >
+0804 : 28 > plp ;restore status
+
+ set_a 0,0
+ > load_flag 0
+0805 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0807 : 48 > pha ;use stack to load status
+0808 : a900 > lda #0 ;precharge accu
+080a : 28 > plp
+
+080b : 48 pha
+ tst_a 0,0
+080c : 08 > php ;save flags
+080d : c900 > cmp #0 ;test result
+ > trap_ne
+080f : f003 > beq skip0159
+ > trap ;failed not equal (non zero)
+0811 : 205b44 > jsr report_error
+ >
+0814 : >skip0159
+ >
+0814 : 68 > pla ;load status
+0815 : 48 > pha
+ > cmp_flag 0
+0816 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0818 : f003 > beq skip0162
+ > trap ;failed not equal (non zero)
+081a : 205b44 > jsr report_error
+ >
+081d : >skip0162
+ >
+081d : 28 > plp ;restore status
+
+ set_a $ff,$ff
+ > load_flag $ff
+081e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0820 : 48 > pha ;use stack to load status
+0821 : a9ff > lda #$ff ;precharge accu
+0823 : 28 > plp
+
+0824 : 48 pha
+ tst_a $ff,$ff
+0825 : 08 > php ;save flags
+0826 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0828 : f003 > beq skip0167
+ > trap ;failed not equal (non zero)
+082a : 205b44 > jsr report_error
+ >
+082d : >skip0167
+ >
+082d : 68 > pla ;load status
+082e : 48 > pha
+ > cmp_flag $ff
+082f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0831 : f003 > beq skip0170
+ > trap ;failed not equal (non zero)
+0833 : 205b44 > jsr report_error
+ >
+0836 : >skip0170
+ >
+0836 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+0837 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0839 : 48 > pha ;use stack to load status
+083a : a901 > lda #1 ;precharge accu
+083c : 28 > plp
+
+083d : 48 pha
+ tst_a 1,0
+083e : 08 > php ;save flags
+083f : c901 > cmp #1 ;test result
+ > trap_ne
+0841 : f003 > beq skip0175
+ > trap ;failed not equal (non zero)
+0843 : 205b44 > jsr report_error
+ >
+0846 : >skip0175
+ >
+0846 : 68 > pla ;load status
+0847 : 48 > pha
+ > cmp_flag 0
+0848 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+084a : f003 > beq skip0178
+ > trap ;failed not equal (non zero)
+084c : 205b44 > jsr report_error
+ >
+084f : >skip0178
+ >
+084f : 28 > plp ;restore status
+
+ set_a 0,$ff
+ > load_flag $ff
+0850 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0852 : 48 > pha ;use stack to load status
+0853 : a900 > lda #0 ;precharge accu
+0855 : 28 > plp
+
+0856 : 48 pha
+ tst_a 0,$ff
+0857 : 08 > php ;save flags
+0858 : c900 > cmp #0 ;test result
+ > trap_ne
+085a : f003 > beq skip0183
+ > trap ;failed not equal (non zero)
+085c : 205b44 > jsr report_error
+ >
+085f : >skip0183
+ >
+085f : 68 > pla ;load status
+0860 : 48 > pha
+ > cmp_flag $ff
+0861 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0863 : f003 > beq skip0186
+ > trap ;failed not equal (non zero)
+0865 : 205b44 > jsr report_error
+ >
+0868 : >skip0186
+ >
+0868 : 28 > plp ;restore status
+
+ set_a $ff,0
+ > load_flag 0
+0869 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+086b : 48 > pha ;use stack to load status
+086c : a9ff > lda #$ff ;precharge accu
+086e : 28 > plp
+
+086f : 48 pha
+ tst_a $ff,0
+0870 : 08 > php ;save flags
+0871 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0873 : f003 > beq skip0191
+ > trap ;failed not equal (non zero)
+0875 : 205b44 > jsr report_error
+ >
+0878 : >skip0191
+ >
+0878 : 68 > pla ;load status
+0879 : 48 > pha
+ > cmp_flag 0
+087a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+087c : f003 > beq skip0194
+ > trap ;failed not equal (non zero)
+087e : 205b44 > jsr report_error
+ >
+0881 : >skip0194
+ >
+0881 : 28 > plp ;restore status
+
+ set_a 0,$ff ;pull
+ > load_flag $ff
+0882 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0884 : 48 > pha ;use stack to load status
+0885 : a900 > lda #0 ;precharge accu
+0887 : 28 > plp
+
+0888 : 68 pla
+ tst_a $ff,$ff-zero
+0889 : 08 > php ;save flags
+088a : c9ff > cmp #$ff ;test result
+ > trap_ne
+088c : f003 > beq skip0199
+ > trap ;failed not equal (non zero)
+088e : 205b44 > jsr report_error
+ >
+0891 : >skip0199
+ >
+0891 : 68 > pla ;load status
+0892 : 48 > pha
+ > cmp_flag $ff-zero
+0893 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0895 : f003 > beq skip0202
+ > trap ;failed not equal (non zero)
+0897 : 205b44 > jsr report_error
+ >
+089a : >skip0202
+ >
+089a : 28 > plp ;restore status
+
+ set_a $ff,0
+ > load_flag 0
+089b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+089d : 48 > pha ;use stack to load status
+089e : a9ff > lda #$ff ;precharge accu
+08a0 : 28 > plp
+
+08a1 : 68 pla
+ tst_a 0,zero
+08a2 : 08 > php ;save flags
+08a3 : c900 > cmp #0 ;test result
+ > trap_ne
+08a5 : f003 > beq skip0207
+ > trap ;failed not equal (non zero)
+08a7 : 205b44 > jsr report_error
+ >
+08aa : >skip0207
+ >
+08aa : 68 > pla ;load status
+08ab : 48 > pha
+ > cmp_flag zero
+08ac : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08ae : f003 > beq skip0210
+ > trap ;failed not equal (non zero)
+08b0 : 205b44 > jsr report_error
+ >
+08b3 : >skip0210
+ >
+08b3 : 28 > plp ;restore status
+
+ set_a $fe,$ff
+ > load_flag $ff
+08b4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+08b6 : 48 > pha ;use stack to load status
+08b7 : a9fe > lda #$fe ;precharge accu
+08b9 : 28 > plp
+
+08ba : 68 pla
+ tst_a 1,$ff-zero-minus
+08bb : 08 > php ;save flags
+08bc : c901 > cmp #1 ;test result
+ > trap_ne
+08be : f003 > beq skip0215
+ > trap ;failed not equal (non zero)
+08c0 : 205b44 > jsr report_error
+ >
+08c3 : >skip0215
+ >
+08c3 : 68 > pla ;load status
+08c4 : 48 > pha
+ > cmp_flag $ff-zero-minus
+08c5 : c97d > cmp #($ff-zero-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08c7 : f003 > beq skip0218
+ > trap ;failed not equal (non zero)
+08c9 : 205b44 > jsr report_error
+ >
+08cc : >skip0218
+ >
+08cc : 28 > plp ;restore status
+
+ set_a 0,0
+ > load_flag 0
+08cd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+08cf : 48 > pha ;use stack to load status
+08d0 : a900 > lda #0 ;precharge accu
+08d2 : 28 > plp
+
+08d3 : 68 pla
+ tst_a $ff,minus
+08d4 : 08 > php ;save flags
+08d5 : c9ff > cmp #$ff ;test result
+ > trap_ne
+08d7 : f003 > beq skip0223
+ > trap ;failed not equal (non zero)
+08d9 : 205b44 > jsr report_error
+ >
+08dc : >skip0223
+ >
+08dc : 68 > pla ;load status
+08dd : 48 > pha
+ > cmp_flag minus
+08de : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08e0 : f003 > beq skip0226
+ > trap ;failed not equal (non zero)
+08e2 : 205b44 > jsr report_error
+ >
+08e5 : >skip0226
+ >
+08e5 : 28 > plp ;restore status
+
+ set_a $ff,$ff
+ > load_flag $ff
+08e6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+08e8 : 48 > pha ;use stack to load status
+08e9 : a9ff > lda #$ff ;precharge accu
+08eb : 28 > plp
+
+08ec : 68 pla
+ tst_a 0,$ff-minus
+08ed : 08 > php ;save flags
+08ee : c900 > cmp #0 ;test result
+ > trap_ne
+08f0 : f003 > beq skip0231
+ > trap ;failed not equal (non zero)
+08f2 : 205b44 > jsr report_error
+ >
+08f5 : >skip0231
+ >
+08f5 : 68 > pla ;load status
+08f6 : 48 > pha
+ > cmp_flag $ff-minus
+08f7 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08f9 : f003 > beq skip0234
+ > trap ;failed not equal (non zero)
+08fb : 205b44 > jsr report_error
+ >
+08fe : >skip0234
+ >
+08fe : 28 > plp ;restore status
+
+ set_a $fe,0
+ > load_flag 0
+08ff : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0901 : 48 > pha ;use stack to load status
+0902 : a9fe > lda #$fe ;precharge accu
+0904 : 28 > plp
+
+0905 : 68 pla
+ tst_a 1,0
+0906 : 08 > php ;save flags
+0907 : c901 > cmp #1 ;test result
+ > trap_ne
+0909 : f003 > beq skip0239
+ > trap ;failed not equal (non zero)
+090b : 205b44 > jsr report_error
+ >
+090e : >skip0239
+ >
+090e : 68 > pla ;load status
+090f : 48 > pha
+ > cmp_flag 0
+0910 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0912 : f003 > beq skip0242
+ > trap ;failed not equal (non zero)
+0914 : 205b44 > jsr report_error
+ >
+0917 : >skip0242
+ >
+0917 : 28 > plp ;restore status
+
+0918 : e055 cpx #$55 ;x & y unchanged?
+ trap_ne
+091a : f003 > beq skip0244
+ > trap ;failed not equal (non zero)
+091c : 205b44 > jsr report_error
+ >
+091f : >skip0244
+
+091f : c0aa cpy #$aa
+ trap_ne
+0921 : f003 > beq skip0246
+ > trap ;failed not equal (non zero)
+0923 : 205b44 > jsr report_error
+ >
+0926 : >skip0246
+
+ next_test
+0926 : ad0002 > lda test_case ;previous test
+0929 : c905 > cmp #test_num
+ > trap_ne ;test is out of sequence
+092b : f003 > beq skip0249
+ > trap ;failed not equal (non zero)
+092d : 205b44 > jsr report_error
+ >
+0930 : >skip0249
+ >
+0006 = >test_num = test_num + 1
+0930 : a906 > lda #test_num ;*** next tests' number
+0932 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; partial pretest EOR #
+ set_a $3c,0
+ > load_flag 0
+0935 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0937 : 48 > pha ;use stack to load status
+0938 : a93c > lda #$3c ;precharge accu
+093a : 28 > plp
+
+093b : 49c3 eor #$c3
+ tst_a $ff,fn
+093d : 08 > php ;save flags
+093e : c9ff > cmp #$ff ;test result
+ > trap_ne
+0940 : f003 > beq skip0254
+ > trap ;failed not equal (non zero)
+0942 : 205b44 > jsr report_error
+ >
+0945 : >skip0254
+ >
+0945 : 68 > pla ;load status
+0946 : 48 > pha
+ > cmp_flag fn
+0947 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0949 : f003 > beq skip0257
+ > trap ;failed not equal (non zero)
+094b : 205b44 > jsr report_error
+ >
+094e : >skip0257
+ >
+094e : 28 > plp ;restore status
+
+ set_a $c3,0
+ > load_flag 0
+094f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0951 : 48 > pha ;use stack to load status
+0952 : a9c3 > lda #$c3 ;precharge accu
+0954 : 28 > plp
+
+0955 : 49c3 eor #$c3
+ tst_a 0,fz
+0957 : 08 > php ;save flags
+0958 : c900 > cmp #0 ;test result
+ > trap_ne
+095a : f003 > beq skip0262
+ > trap ;failed not equal (non zero)
+095c : 205b44 > jsr report_error
+ >
+095f : >skip0262
+ >
+095f : 68 > pla ;load status
+0960 : 48 > pha
+ > cmp_flag fz
+0961 : c932 > cmp #(fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0963 : f003 > beq skip0265
+ > trap ;failed not equal (non zero)
+0965 : 205b44 > jsr report_error
+ >
+0968 : >skip0265
+ >
+0968 : 28 > plp ;restore status
+
+ next_test
+0969 : ad0002 > lda test_case ;previous test
+096c : c906 > cmp #test_num
+ > trap_ne ;test is out of sequence
+096e : f003 > beq skip0268
+ > trap ;failed not equal (non zero)
+0970 : 205b44 > jsr report_error
+ >
+0973 : >skip0268
+ >
+0007 = >test_num = test_num + 1
+0973 : a907 > lda #test_num ;*** next tests' number
+0975 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
+ ; testing NOP
+0978 : a224 ldx #$24
+097a : a042 ldy #$42
+ set_a $18,0
+ > load_flag 0
+097c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+097e : 48 > pha ;use stack to load status
+097f : a918 > lda #$18 ;precharge accu
+0981 : 28 > plp
+
+0982 : ea nop
+ tst_a $18,0
+0983 : 08 > php ;save flags
+0984 : c918 > cmp #$18 ;test result
+ > trap_ne
+0986 : f003 > beq skip0273
+ > trap ;failed not equal (non zero)
+0988 : 205b44 > jsr report_error
+ >
+098b : >skip0273
+ >
+098b : 68 > pla ;load status
+098c : 48 > pha
+ > cmp_flag 0
+098d : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+098f : f003 > beq skip0276
+ > trap ;failed not equal (non zero)
+0991 : 205b44 > jsr report_error
+ >
+0994 : >skip0276
+ >
+0994 : 28 > plp ;restore status
+
+0995 : e024 cpx #$24
+ trap_ne
+0997 : f003 > beq skip0278
+ > trap ;failed not equal (non zero)
+0999 : 205b44 > jsr report_error
+ >
+099c : >skip0278
+
+099c : c042 cpy #$42
+ trap_ne
+099e : f003 > beq skip0280
+ > trap ;failed not equal (non zero)
+09a0 : 205b44 > jsr report_error
+ >
+09a3 : >skip0280
+
+09a3 : a2db ldx #$db
+09a5 : a0bd ldy #$bd
+ set_a $e7,$ff
+ > load_flag $ff
+09a7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+09a9 : 48 > pha ;use stack to load status
+09aa : a9e7 > lda #$e7 ;precharge accu
+09ac : 28 > plp
+
+09ad : ea nop
+ tst_a $e7,$ff
+09ae : 08 > php ;save flags
+09af : c9e7 > cmp #$e7 ;test result
+ > trap_ne
+09b1 : f003 > beq skip0285
+ > trap ;failed not equal (non zero)
+09b3 : 205b44 > jsr report_error
+ >
+09b6 : >skip0285
+ >
+09b6 : 68 > pla ;load status
+09b7 : 48 > pha
+ > cmp_flag $ff
+09b8 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+09ba : f003 > beq skip0288
+ > trap ;failed not equal (non zero)
+09bc : 205b44 > jsr report_error
+ >
+09bf : >skip0288
+ >
+09bf : 28 > plp ;restore status
+
+09c0 : e0db cpx #$db
+ trap_ne
+09c2 : f003 > beq skip0290
+ > trap ;failed not equal (non zero)
+09c4 : 205b44 > jsr report_error
+ >
+09c7 : >skip0290
+
+09c7 : c0bd cpy #$bd
+ trap_ne
+09c9 : f003 > beq skip0292
+ > trap ;failed not equal (non zero)
+09cb : 205b44 > jsr report_error
+ >
+09ce : >skip0292
+
+ next_test
+09ce : ad0002 > lda test_case ;previous test
+09d1 : c907 > cmp #test_num
+ > trap_ne ;test is out of sequence
+09d3 : f003 > beq skip0295
+ > trap ;failed not equal (non zero)
+09d5 : 205b44 > jsr report_error
+ >
+09d8 : >skip0295
+ >
+0008 = >test_num = test_num + 1
+09d8 : a908 > lda #test_num ;*** next tests' number
+09da : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump absolute
+ set_stat $0
+ > load_flag $0
+09dd : a900 > lda #$0 ;allow test to change I-flag (no mask)
+ >
+09df : 48 > pha ;use stack to load status
+09e0 : 28 > plp
+
+09e1 : a946 lda #'F'
+09e3 : a241 ldx #'A'
+09e5 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
+09e7 : 4c8c42 jmp test_far
+09ea : ea nop
+09eb : ea nop
+ trap_ne ;runover protection
+09ec : f003 > beq skip0299
+ > trap ;failed not equal (non zero)
+09ee : 205b44 > jsr report_error
+ >
+09f1 : >skip0299
+
+09f1 : e8 inx
+09f2 : e8 inx
+09f3 : far_ret
+ trap_eq ;returned flags OK?
+09f3 : d003 > bne skip0301
+ > trap ;failed equal (zero)
+09f5 : 205b44 > jsr report_error
+ >
+09f8 : >skip0301
+
+ trap_pl
+09f8 : 3003 > bmi skip0303
+ > trap ;failed plus (bit 7 clear)
+09fa : 205b44 > jsr report_error
+ >
+09fd : >skip0303
+
+ trap_cc
+09fd : b003 > bcs skip0305
+ > trap ;failed carry clear
+09ff : 205b44 > jsr report_error
+ >
+0a02 : >skip0305
+
+ trap_vc
+0a02 : 7003 > bvs skip0307
+ > trap ;failed overflow clear
+0a04 : 205b44 > jsr report_error
+ >
+0a07 : >skip0307
+
+0a07 : c9ec cmp #('F'^$aa) ;returned registers OK?
+ trap_ne
+0a09 : f003 > beq skip0309
+ > trap ;failed not equal (non zero)
+0a0b : 205b44 > jsr report_error
+ >
+0a0e : >skip0309
+
+0a0e : e042 cpx #('A'+1)
+ trap_ne
+0a10 : f003 > beq skip0311
+ > trap ;failed not equal (non zero)
+0a12 : 205b44 > jsr report_error
+ >
+0a15 : >skip0311
+
+0a15 : c04f cpy #('R'-3)
+ trap_ne
+0a17 : f003 > beq skip0313
+ > trap ;failed not equal (non zero)
+0a19 : 205b44 > jsr report_error
+ >
+0a1c : >skip0313
+
+0a1c : ca dex
+0a1d : c8 iny
+0a1e : c8 iny
+0a1f : c8 iny
+0a20 : 49aa eor #$aa ;N=0, V=1, Z=0, C=1
+0a22 : 4c2e0a jmp test_near
+0a25 : ea nop
+0a26 : ea nop
+ trap_ne ;runover protection
+0a27 : f003 > beq skip0315
+ > trap ;failed not equal (non zero)
+0a29 : 205b44 > jsr report_error
+ >
+0a2c : >skip0315
+
+0a2c : e8 inx
+0a2d : e8 inx
+0a2e : test_near
+ trap_eq ;passed flags OK?
+0a2e : d003 > bne skip0317
+ > trap ;failed equal (zero)
+0a30 : 205b44 > jsr report_error
+ >
+0a33 : >skip0317
+
+ trap_mi
+0a33 : 1003 > bpl skip0319
+ > trap ;failed minus (bit 7 set)
+0a35 : 205b44 > jsr report_error
+ >
+0a38 : >skip0319
+
+ trap_cc
+0a38 : b003 > bcs skip0321
+ > trap ;failed carry clear
+0a3a : 205b44 > jsr report_error
+ >
+0a3d : >skip0321
+
+ trap_vc
+0a3d : 7003 > bvs skip0323
+ > trap ;failed overflow clear
+0a3f : 205b44 > jsr report_error
+ >
+0a42 : >skip0323
+
+0a42 : c946 cmp #'F' ;passed registers OK?
+ trap_ne
+0a44 : f003 > beq skip0325
+ > trap ;failed not equal (non zero)
+0a46 : 205b44 > jsr report_error
+ >
+0a49 : >skip0325
+
+0a49 : e041 cpx #'A'
+ trap_ne
+0a4b : f003 > beq skip0327
+ > trap ;failed not equal (non zero)
+0a4d : 205b44 > jsr report_error
+ >
+0a50 : >skip0327
+
+0a50 : c052 cpy #'R'
+ trap_ne
+0a52 : f003 > beq skip0329
+ > trap ;failed not equal (non zero)
+0a54 : 205b44 > jsr report_error
+ >
+0a57 : >skip0329
+
+ next_test
+0a57 : ad0002 > lda test_case ;previous test
+0a5a : c908 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0a5c : f003 > beq skip0332
+ > trap ;failed not equal (non zero)
+0a5e : 205b44 > jsr report_error
+ >
+0a61 : >skip0332
+ >
+0009 = >test_num = test_num + 1
+0a61 : a909 > lda #test_num ;*** next tests' number
+0a63 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump indirect
+ set_stat 0
+ > load_flag 0
+0a66 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0a68 : 48 > pha ;use stack to load status
+0a69 : 28 > plp
+
+0a6a : a949 lda #'I'
+0a6c : a24e ldx #'N'
+0a6e : a044 ldy #'D' ;N=0, V=0, Z=0, C=0
+0a70 : 6cd242 jmp (ptr_tst_ind)
+0a73 : ea nop
+ trap_ne ;runover protection
+0a74 : f003 > beq skip0336
+ > trap ;failed not equal (non zero)
+0a76 : 205b44 > jsr report_error
+ >
+0a79 : >skip0336
+
+0a79 : 88 dey
+0a7a : 88 dey
+0a7b : ind_ret
+0a7b : 08 php ;either SP or Y count will fail, if we do not hit
+0a7c : 88 dey
+0a7d : 88 dey
+0a7e : 88 dey
+0a7f : 28 plp
+ trap_eq ;returned flags OK?
+0a80 : d003 > bne skip0338
+ > trap ;failed equal (zero)
+0a82 : 205b44 > jsr report_error
+ >
+0a85 : >skip0338
+
+ trap_pl
+0a85 : 3003 > bmi skip0340
+ > trap ;failed plus (bit 7 clear)
+0a87 : 205b44 > jsr report_error
+ >
+0a8a : >skip0340
+
+ trap_cc
+0a8a : b003 > bcs skip0342
+ > trap ;failed carry clear
+0a8c : 205b44 > jsr report_error
+ >
+0a8f : >skip0342
+
+ trap_vc
+0a8f : 7003 > bvs skip0344
+ > trap ;failed overflow clear
+0a91 : 205b44 > jsr report_error
+ >
+0a94 : >skip0344
+
+0a94 : c9e3 cmp #('I'^$aa) ;returned registers OK?
+ trap_ne
+0a96 : f003 > beq skip0346
+ > trap ;failed not equal (non zero)
+0a98 : 205b44 > jsr report_error
+ >
+0a9b : >skip0346
+
+0a9b : e04f cpx #('N'+1)
+ trap_ne
+0a9d : f003 > beq skip0348
+ > trap ;failed not equal (non zero)
+0a9f : 205b44 > jsr report_error
+ >
+0aa2 : >skip0348
+
+0aa2 : c03e cpy #('D'-6)
+ trap_ne
+0aa4 : f003 > beq skip0350
+ > trap ;failed not equal (non zero)
+0aa6 : 205b44 > jsr report_error
+ >
+0aa9 : >skip0350
+
+0aa9 : ba tsx ;SP check
+0aaa : e0ff cpx #$ff
+ trap_ne
+0aac : f003 > beq skip0352
+ > trap ;failed not equal (non zero)
+0aae : 205b44 > jsr report_error
+ >
+0ab1 : >skip0352
+
+ next_test
+0ab1 : ad0002 > lda test_case ;previous test
+0ab4 : c909 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0ab6 : f003 > beq skip0355
+ > trap ;failed not equal (non zero)
+0ab8 : 205b44 > jsr report_error
+ >
+0abb : >skip0355
+ >
+000a = >test_num = test_num + 1
+0abb : a90a > lda #test_num ;*** next tests' number
+0abd : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump subroutine & return from subroutine
+ set_stat 0
+ > load_flag 0
+0ac0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ac2 : 48 > pha ;use stack to load status
+0ac3 : 28 > plp
+
+0ac4 : a94a lda #'J'
+0ac6 : a253 ldx #'S'
+0ac8 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
+0aca : 202943 jsr test_jsr
+0acc = jsr_ret = *-1 ;last address of jsr = return address
+0acd : 08 php ;either SP or Y count will fail, if we do not hit
+0ace : 88 dey
+0acf : 88 dey
+0ad0 : 88 dey
+0ad1 : 28 plp
+ trap_eq ;returned flags OK?
+0ad2 : d003 > bne skip0359
+ > trap ;failed equal (zero)
+0ad4 : 205b44 > jsr report_error
+ >
+0ad7 : >skip0359
+
+ trap_pl
+0ad7 : 3003 > bmi skip0361
+ > trap ;failed plus (bit 7 clear)
+0ad9 : 205b44 > jsr report_error
+ >
+0adc : >skip0361
+
+ trap_cc
+0adc : b003 > bcs skip0363
+ > trap ;failed carry clear
+0ade : 205b44 > jsr report_error
+ >
+0ae1 : >skip0363
+
+ trap_vc
+0ae1 : 7003 > bvs skip0365
+ > trap ;failed overflow clear
+0ae3 : 205b44 > jsr report_error
+ >
+0ae6 : >skip0365
+
+0ae6 : c9e0 cmp #('J'^$aa) ;returned registers OK?
+ trap_ne
+0ae8 : f003 > beq skip0367
+ > trap ;failed not equal (non zero)
+0aea : 205b44 > jsr report_error
+ >
+0aed : >skip0367
+
+0aed : e054 cpx #('S'+1)
+ trap_ne
+0aef : f003 > beq skip0369
+ > trap ;failed not equal (non zero)
+0af1 : 205b44 > jsr report_error
+ >
+0af4 : >skip0369
+
+0af4 : c04c cpy #('R'-6)
+ trap_ne
+0af6 : f003 > beq skip0371
+ > trap ;failed not equal (non zero)
+0af8 : 205b44 > jsr report_error
+ >
+0afb : >skip0371
+
+0afb : ba tsx ;sp?
+0afc : e0ff cpx #$ff
+ trap_ne
+0afe : f003 > beq skip0373
+ > trap ;failed not equal (non zero)
+0b00 : 205b44 > jsr report_error
+ >
+0b03 : >skip0373
+
+ next_test
+0b03 : ad0002 > lda test_case ;previous test
+0b06 : c90a > cmp #test_num
+ > trap_ne ;test is out of sequence
+0b08 : f003 > beq skip0376
+ > trap ;failed not equal (non zero)
+0b0a : 205b44 > jsr report_error
+ >
+0b0d : >skip0376
+ >
+000b = >test_num = test_num + 1
+0b0d : a90b > lda #test_num ;*** next tests' number
+0b0f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; break & return from interrupt
+ if ROM_vectors = 1
+ load_flag 0 ;with interrupts enabled if allowed!
+0b12 : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+0b14 : 48 pha
+0b15 : a942 lda #'B'
+0b17 : a252 ldx #'R'
+0b19 : a04b ldy #'K'
+0b1b : 28 plp ;N=0, V=0, Z=0, C=0
+0b1c : 00 brk
+ else
+ lda #hi brk_ret0 ;emulated break
+ pha
+ lda #lo brk_ret0
+ pha
+ load_flag fao ;set break & unused on stack
+ pha
+ load_flag intdis ;during interrupt
+ pha
+ lda #'B'
+ ldx #'R'
+ ldy #'K'
+ plp ;N=0, V=0, Z=0, C=0
+ jmp irq_trap
+ endif
+0b1d : 88 dey ;should not be executed
+0b1e : brk_ret0 ;address of break return
+0b1e : 08 php ;either SP or Y count will fail, if we do not hit
+0b1f : 88 dey
+0b20 : 88 dey
+0b21 : 88 dey
+0b22 : c9e8 cmp #'B'^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+0b24 : f003 > beq skip0379
+ > trap ;failed not equal (non zero)
+0b26 : 205b44 > jsr report_error
+ >
+0b29 : >skip0379
+
+0b29 : e053 cpx #'R'+1
+ trap_ne
+0b2b : f003 > beq skip0381
+ > trap ;failed not equal (non zero)
+0b2d : 205b44 > jsr report_error
+ >
+0b30 : >skip0381
+
+0b30 : c045 cpy #'K'-6
+ trap_ne
+0b32 : f003 > beq skip0383
+ > trap ;failed not equal (non zero)
+0b34 : 205b44 > jsr report_error
+ >
+0b37 : >skip0383
+
+0b37 : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag 0
+0b38 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0b3a : f003 > beq skip0386
+ > trap ;failed not equal (non zero)
+0b3c : 205b44 > jsr report_error
+ >
+0b3f : >skip0386
+
+0b3f : ba tsx ;sp?
+0b40 : e0ff cpx #$ff
+ trap_ne
+0b42 : f003 > beq skip0388
+ > trap ;failed not equal (non zero)
+0b44 : 205b44 > jsr report_error
+ >
+0b47 : >skip0388
+
+ if ROM_vectors = 1
+ load_flag $ff ;with interrupts disabled if allowed!
+0b47 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+0b49 : 48 pha
+0b4a : a9bd lda #$ff-'B'
+0b4c : a2ad ldx #$ff-'R'
+0b4e : a0b4 ldy #$ff-'K'
+0b50 : 28 plp ;N=1, V=1, Z=1, C=1
+0b51 : 00 brk
+ else
+ lda #hi brk_ret1 ;emulated break
+ pha
+ lda #lo brk_ret1
+ pha
+ load_flag $ff
+ pha ;set break & unused on stack
+ pha ;actual flags
+ lda #$ff-'B'
+ ldx #$ff-'R'
+ ldy #$ff-'K'
+ plp ;N=1, V=1, Z=1, C=1
+ jmp irq_trap
+ endif
+0b52 : 88 dey ;should not be executed
+0b53 : brk_ret1 ;address of break return
+0b53 : 08 php ;either SP or Y count will fail, if we do not hit
+0b54 : 88 dey
+0b55 : 88 dey
+0b56 : 88 dey
+0b57 : c917 cmp #($ff-'B')^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+0b59 : f003 > beq skip0391
+ > trap ;failed not equal (non zero)
+0b5b : 205b44 > jsr report_error
+ >
+0b5e : >skip0391
+
+0b5e : e0ae cpx #$ff-'R'+1
+ trap_ne
+0b60 : f003 > beq skip0393
+ > trap ;failed not equal (non zero)
+0b62 : 205b44 > jsr report_error
+ >
+0b65 : >skip0393
+
+0b65 : c0ae cpy #$ff-'K'-6
+ trap_ne
+0b67 : f003 > beq skip0395
+ > trap ;failed not equal (non zero)
+0b69 : 205b44 > jsr report_error
+ >
+0b6c : >skip0395
+
+0b6c : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag $ff
+0b6d : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+0b6f : f003 > beq skip0398
+ > trap ;failed not equal (non zero)
+0b71 : 205b44 > jsr report_error
+ >
+0b74 : >skip0398
+
+0b74 : ba tsx ;sp?
+0b75 : e0ff cpx #$ff
+ trap_ne
+0b77 : f003 > beq skip0400
+ > trap ;failed not equal (non zero)
+0b79 : 205b44 > jsr report_error
+ >
+0b7c : >skip0400
+
+ next_test
+0b7c : ad0002 > lda test_case ;previous test
+0b7f : c90b > cmp #test_num
+ > trap_ne ;test is out of sequence
+0b81 : f003 > beq skip0403
+ > trap ;failed not equal (non zero)
+0b83 : 205b44 > jsr report_error
+ >
+0b86 : >skip0403
+ >
+000c = >test_num = test_num + 1
+0b86 : a90c > lda #test_num ;*** next tests' number
+0b88 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test set and clear flags CLC CLI CLD CLV SEC SEI SED
+ set_stat $ff
+ > load_flag $ff
+0b8b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0b8d : 48 > pha ;use stack to load status
+0b8e : 28 > plp
+
+0b8f : 18 clc
+ tst_stat $ff-carry
+0b90 : 08 > php ;save status
+0b91 : 68 > pla ;use stack to retrieve status
+0b92 : 48 > pha
+ > cmp_flag $ff-carry
+0b93 : c9fe > cmp #($ff-carry|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b95 : f003 > beq skip0409
+ > trap ;failed not equal (non zero)
+0b97 : 205b44 > jsr report_error
+ >
+0b9a : >skip0409
+ >
+0b9a : 28 > plp ;restore status
+
+0b9b : 38 sec
+ tst_stat $ff
+0b9c : 08 > php ;save status
+0b9d : 68 > pla ;use stack to retrieve status
+0b9e : 48 > pha
+ > cmp_flag $ff
+0b9f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ba1 : f003 > beq skip0413
+ > trap ;failed not equal (non zero)
+0ba3 : 205b44 > jsr report_error
+ >
+0ba6 : >skip0413
+ >
+0ba6 : 28 > plp ;restore status
+
+ if I_flag = 3
+0ba7 : 58 cli
+ tst_stat $ff-intdis
+0ba8 : 08 > php ;save status
+0ba9 : 68 > pla ;use stack to retrieve status
+0baa : 48 > pha
+ > cmp_flag $ff-intdis
+0bab : c9fb > cmp #($ff-intdis|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bad : f003 > beq skip0417
+ > trap ;failed not equal (non zero)
+0baf : 205b44 > jsr report_error
+ >
+0bb2 : >skip0417
+ >
+0bb2 : 28 > plp ;restore status
+
+0bb3 : 78 sei
+ tst_stat $ff
+0bb4 : 08 > php ;save status
+0bb5 : 68 > pla ;use stack to retrieve status
+0bb6 : 48 > pha
+ > cmp_flag $ff
+0bb7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bb9 : f003 > beq skip0421
+ > trap ;failed not equal (non zero)
+0bbb : 205b44 > jsr report_error
+ >
+0bbe : >skip0421
+ >
+0bbe : 28 > plp ;restore status
+
+ endif
+0bbf : d8 cld
+ tst_stat $ff-decmode
+0bc0 : 08 > php ;save status
+0bc1 : 68 > pla ;use stack to retrieve status
+0bc2 : 48 > pha
+ > cmp_flag $ff-decmode
+0bc3 : c9f7 > cmp #($ff-decmode|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bc5 : f003 > beq skip0425
+ > trap ;failed not equal (non zero)
+0bc7 : 205b44 > jsr report_error
+ >
+0bca : >skip0425
+ >
+0bca : 28 > plp ;restore status
+
+0bcb : f8 sed
+ tst_stat $ff
+0bcc : 08 > php ;save status
+0bcd : 68 > pla ;use stack to retrieve status
+0bce : 48 > pha
+ > cmp_flag $ff
+0bcf : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bd1 : f003 > beq skip0429
+ > trap ;failed not equal (non zero)
+0bd3 : 205b44 > jsr report_error
+ >
+0bd6 : >skip0429
+ >
+0bd6 : 28 > plp ;restore status
+
+0bd7 : b8 clv
+ tst_stat $ff-overfl
+0bd8 : 08 > php ;save status
+0bd9 : 68 > pla ;use stack to retrieve status
+0bda : 48 > pha
+ > cmp_flag $ff-overfl
+0bdb : c9bf > cmp #($ff-overfl|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bdd : f003 > beq skip0433
+ > trap ;failed not equal (non zero)
+0bdf : 205b44 > jsr report_error
+ >
+0be2 : >skip0433
+ >
+0be2 : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0be3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0be5 : 48 > pha ;use stack to load status
+0be6 : 28 > plp
+
+ tst_stat 0
+0be7 : 08 > php ;save status
+0be8 : 68 > pla ;use stack to retrieve status
+0be9 : 48 > pha
+ > cmp_flag 0
+0bea : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bec : f003 > beq skip0439
+ > trap ;failed not equal (non zero)
+0bee : 205b44 > jsr report_error
+ >
+0bf1 : >skip0439
+ >
+0bf1 : 28 > plp ;restore status
+
+0bf2 : 38 sec
+ tst_stat carry
+0bf3 : 08 > php ;save status
+0bf4 : 68 > pla ;use stack to retrieve status
+0bf5 : 48 > pha
+ > cmp_flag carry
+0bf6 : c931 > cmp #(carry|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0bf8 : f003 > beq skip0443
+ > trap ;failed not equal (non zero)
+0bfa : 205b44 > jsr report_error
+ >
+0bfd : >skip0443
+ >
+0bfd : 28 > plp ;restore status
+
+0bfe : 18 clc
+ tst_stat 0
+0bff : 08 > php ;save status
+0c00 : 68 > pla ;use stack to retrieve status
+0c01 : 48 > pha
+ > cmp_flag 0
+0c02 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c04 : f003 > beq skip0447
+ > trap ;failed not equal (non zero)
+0c06 : 205b44 > jsr report_error
+ >
+0c09 : >skip0447
+ >
+0c09 : 28 > plp ;restore status
+
+ if I_flag = 3
+0c0a : 78 sei
+ tst_stat intdis
+0c0b : 08 > php ;save status
+0c0c : 68 > pla ;use stack to retrieve status
+0c0d : 48 > pha
+ > cmp_flag intdis
+0c0e : c934 > cmp #(intdis|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c10 : f003 > beq skip0451
+ > trap ;failed not equal (non zero)
+0c12 : 205b44 > jsr report_error
+ >
+0c15 : >skip0451
+ >
+0c15 : 28 > plp ;restore status
+
+0c16 : 58 cli
+ tst_stat 0
+0c17 : 08 > php ;save status
+0c18 : 68 > pla ;use stack to retrieve status
+0c19 : 48 > pha
+ > cmp_flag 0
+0c1a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c1c : f003 > beq skip0455
+ > trap ;failed not equal (non zero)
+0c1e : 205b44 > jsr report_error
+ >
+0c21 : >skip0455
+ >
+0c21 : 28 > plp ;restore status
+
+ endif
+0c22 : f8 sed
+ tst_stat decmode
+0c23 : 08 > php ;save status
+0c24 : 68 > pla ;use stack to retrieve status
+0c25 : 48 > pha
+ > cmp_flag decmode
+0c26 : c938 > cmp #(decmode|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c28 : f003 > beq skip0459
+ > trap ;failed not equal (non zero)
+0c2a : 205b44 > jsr report_error
+ >
+0c2d : >skip0459
+ >
+0c2d : 28 > plp ;restore status
+
+0c2e : d8 cld
+ tst_stat 0
+0c2f : 08 > php ;save status
+0c30 : 68 > pla ;use stack to retrieve status
+0c31 : 48 > pha
+ > cmp_flag 0
+0c32 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c34 : f003 > beq skip0463
+ > trap ;failed not equal (non zero)
+0c36 : 205b44 > jsr report_error
+ >
+0c39 : >skip0463
+ >
+0c39 : 28 > plp ;restore status
+
+ set_stat overfl
+ > load_flag overfl
+0c3a : a940 > lda #overfl ;allow test to change I-flag (no mask)
+ >
+0c3c : 48 > pha ;use stack to load status
+0c3d : 28 > plp
+
+ tst_stat overfl
+0c3e : 08 > php ;save status
+0c3f : 68 > pla ;use stack to retrieve status
+0c40 : 48 > pha
+ > cmp_flag overfl
+0c41 : c970 > cmp #(overfl|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c43 : f003 > beq skip0469
+ > trap ;failed not equal (non zero)
+0c45 : 205b44 > jsr report_error
+ >
+0c48 : >skip0469
+ >
+0c48 : 28 > plp ;restore status
+
+0c49 : b8 clv
+ tst_stat 0
+0c4a : 08 > php ;save status
+0c4b : 68 > pla ;use stack to retrieve status
+0c4c : 48 > pha
+ > cmp_flag 0
+0c4d : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c4f : f003 > beq skip0473
+ > trap ;failed not equal (non zero)
+0c51 : 205b44 > jsr report_error
+ >
+0c54 : >skip0473
+ >
+0c54 : 28 > plp ;restore status
+
+ next_test
+0c55 : ad0002 > lda test_case ;previous test
+0c58 : c90c > cmp #test_num
+ > trap_ne ;test is out of sequence
+0c5a : f003 > beq skip0476
+ > trap ;failed not equal (non zero)
+0c5c : 205b44 > jsr report_error
+ >
+0c5f : >skip0476
+ >
+000d = >test_num = test_num + 1
+0c5f : a90d > lda #test_num ;*** next tests' number
+0c61 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ ; testing index register increment/decrement and transfer
+ ; INX INY DEX DEY TAX TXA TAY TYA
+0c64 : a2fe ldx #$fe
+ set_stat $ff
+ > load_flag $ff
+0c66 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0c68 : 48 > pha ;use stack to load status
+0c69 : 28 > plp
+
+0c6a : e8 inx ;ff
+ tst_x $ff,$ff-zero
+0c6b : 08 > php ;save flags
+0c6c : e0ff > cpx #$ff ;test result
+ > trap_ne
+0c6e : f003 > beq skip0481
+ > trap ;failed not equal (non zero)
+0c70 : 205b44 > jsr report_error
+ >
+0c73 : >skip0481
+ >
+0c73 : 68 > pla ;load status
+0c74 : 48 > pha
+ > cmp_flag $ff-zero
+0c75 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c77 : f003 > beq skip0484
+ > trap ;failed not equal (non zero)
+0c79 : 205b44 > jsr report_error
+ >
+0c7c : >skip0484
+ >
+0c7c : 28 > plp ;restore status
+
+0c7d : e8 inx ;00
+ tst_x 0,$ff-minus
+0c7e : 08 > php ;save flags
+0c7f : e000 > cpx #0 ;test result
+ > trap_ne
+0c81 : f003 > beq skip0487
+ > trap ;failed not equal (non zero)
+0c83 : 205b44 > jsr report_error
+ >
+0c86 : >skip0487
+ >
+0c86 : 68 > pla ;load status
+0c87 : 48 > pha
+ > cmp_flag $ff-minus
+0c88 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c8a : f003 > beq skip0490
+ > trap ;failed not equal (non zero)
+0c8c : 205b44 > jsr report_error
+ >
+0c8f : >skip0490
+ >
+0c8f : 28 > plp ;restore status
+
+0c90 : e8 inx ;01
+ tst_x 1,$ff-minus-zero
+0c91 : 08 > php ;save flags
+0c92 : e001 > cpx #1 ;test result
+ > trap_ne
+0c94 : f003 > beq skip0493
+ > trap ;failed not equal (non zero)
+0c96 : 205b44 > jsr report_error
+ >
+0c99 : >skip0493
+ >
+0c99 : 68 > pla ;load status
+0c9a : 48 > pha
+ > cmp_flag $ff-minus-zero
+0c9b : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c9d : f003 > beq skip0496
+ > trap ;failed not equal (non zero)
+0c9f : 205b44 > jsr report_error
+ >
+0ca2 : >skip0496
+ >
+0ca2 : 28 > plp ;restore status
+
+0ca3 : ca dex ;00
+ tst_x 0,$ff-minus
+0ca4 : 08 > php ;save flags
+0ca5 : e000 > cpx #0 ;test result
+ > trap_ne
+0ca7 : f003 > beq skip0499
+ > trap ;failed not equal (non zero)
+0ca9 : 205b44 > jsr report_error
+ >
+0cac : >skip0499
+ >
+0cac : 68 > pla ;load status
+0cad : 48 > pha
+ > cmp_flag $ff-minus
+0cae : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cb0 : f003 > beq skip0502
+ > trap ;failed not equal (non zero)
+0cb2 : 205b44 > jsr report_error
+ >
+0cb5 : >skip0502
+ >
+0cb5 : 28 > plp ;restore status
+
+0cb6 : ca dex ;ff
+ tst_x $ff,$ff-zero
+0cb7 : 08 > php ;save flags
+0cb8 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0cba : f003 > beq skip0505
+ > trap ;failed not equal (non zero)
+0cbc : 205b44 > jsr report_error
+ >
+0cbf : >skip0505
+ >
+0cbf : 68 > pla ;load status
+0cc0 : 48 > pha
+ > cmp_flag $ff-zero
+0cc1 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cc3 : f003 > beq skip0508
+ > trap ;failed not equal (non zero)
+0cc5 : 205b44 > jsr report_error
+ >
+0cc8 : >skip0508
+ >
+0cc8 : 28 > plp ;restore status
+
+0cc9 : ca dex ;fe
+ set_stat 0
+ > load_flag 0
+0cca : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ccc : 48 > pha ;use stack to load status
+0ccd : 28 > plp
+
+0cce : e8 inx ;ff
+ tst_x $ff,minus
+0ccf : 08 > php ;save flags
+0cd0 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0cd2 : f003 > beq skip0513
+ > trap ;failed not equal (non zero)
+0cd4 : 205b44 > jsr report_error
+ >
+0cd7 : >skip0513
+ >
+0cd7 : 68 > pla ;load status
+0cd8 : 48 > pha
+ > cmp_flag minus
+0cd9 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cdb : f003 > beq skip0516
+ > trap ;failed not equal (non zero)
+0cdd : 205b44 > jsr report_error
+ >
+0ce0 : >skip0516
+ >
+0ce0 : 28 > plp ;restore status
+
+0ce1 : e8 inx ;00
+ tst_x 0,zero
+0ce2 : 08 > php ;save flags
+0ce3 : e000 > cpx #0 ;test result
+ > trap_ne
+0ce5 : f003 > beq skip0519
+ > trap ;failed not equal (non zero)
+0ce7 : 205b44 > jsr report_error
+ >
+0cea : >skip0519
+ >
+0cea : 68 > pla ;load status
+0ceb : 48 > pha
+ > cmp_flag zero
+0cec : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cee : f003 > beq skip0522
+ > trap ;failed not equal (non zero)
+0cf0 : 205b44 > jsr report_error
+ >
+0cf3 : >skip0522
+ >
+0cf3 : 28 > plp ;restore status
+
+0cf4 : e8 inx ;01
+ tst_x 1,0
+0cf5 : 08 > php ;save flags
+0cf6 : e001 > cpx #1 ;test result
+ > trap_ne
+0cf8 : f003 > beq skip0525
+ > trap ;failed not equal (non zero)
+0cfa : 205b44 > jsr report_error
+ >
+0cfd : >skip0525
+ >
+0cfd : 68 > pla ;load status
+0cfe : 48 > pha
+ > cmp_flag 0
+0cff : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d01 : f003 > beq skip0528
+ > trap ;failed not equal (non zero)
+0d03 : 205b44 > jsr report_error
+ >
+0d06 : >skip0528
+ >
+0d06 : 28 > plp ;restore status
+
+0d07 : ca dex ;00
+ tst_x 0,zero
+0d08 : 08 > php ;save flags
+0d09 : e000 > cpx #0 ;test result
+ > trap_ne
+0d0b : f003 > beq skip0531
+ > trap ;failed not equal (non zero)
+0d0d : 205b44 > jsr report_error
+ >
+0d10 : >skip0531
+ >
+0d10 : 68 > pla ;load status
+0d11 : 48 > pha
+ > cmp_flag zero
+0d12 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d14 : f003 > beq skip0534
+ > trap ;failed not equal (non zero)
+0d16 : 205b44 > jsr report_error
+ >
+0d19 : >skip0534
+ >
+0d19 : 28 > plp ;restore status
+
+0d1a : ca dex ;ff
+ tst_x $ff,minus
+0d1b : 08 > php ;save flags
+0d1c : e0ff > cpx #$ff ;test result
+ > trap_ne
+0d1e : f003 > beq skip0537
+ > trap ;failed not equal (non zero)
+0d20 : 205b44 > jsr report_error
+ >
+0d23 : >skip0537
+ >
+0d23 : 68 > pla ;load status
+0d24 : 48 > pha
+ > cmp_flag minus
+0d25 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d27 : f003 > beq skip0540
+ > trap ;failed not equal (non zero)
+0d29 : 205b44 > jsr report_error
+ >
+0d2c : >skip0540
+ >
+0d2c : 28 > plp ;restore status
+
+
+0d2d : a0fe ldy #$fe
+ set_stat $ff
+ > load_flag $ff
+0d2f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0d31 : 48 > pha ;use stack to load status
+0d32 : 28 > plp
+
+0d33 : c8 iny ;ff
+ tst_y $ff,$ff-zero
+0d34 : 08 > php ;save flags
+0d35 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0d37 : f003 > beq skip0545
+ > trap ;failed not equal (non zero)
+0d39 : 205b44 > jsr report_error
+ >
+0d3c : >skip0545
+ >
+0d3c : 68 > pla ;load status
+0d3d : 48 > pha
+ > cmp_flag $ff-zero
+0d3e : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d40 : f003 > beq skip0548
+ > trap ;failed not equal (non zero)
+0d42 : 205b44 > jsr report_error
+ >
+0d45 : >skip0548
+ >
+0d45 : 28 > plp ;restore status
+
+0d46 : c8 iny ;00
+ tst_y 0,$ff-minus
+0d47 : 08 > php ;save flags
+0d48 : c000 > cpy #0 ;test result
+ > trap_ne
+0d4a : f003 > beq skip0551
+ > trap ;failed not equal (non zero)
+0d4c : 205b44 > jsr report_error
+ >
+0d4f : >skip0551
+ >
+0d4f : 68 > pla ;load status
+0d50 : 48 > pha
+ > cmp_flag $ff-minus
+0d51 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d53 : f003 > beq skip0554
+ > trap ;failed not equal (non zero)
+0d55 : 205b44 > jsr report_error
+ >
+0d58 : >skip0554
+ >
+0d58 : 28 > plp ;restore status
+
+0d59 : c8 iny ;01
+ tst_y 1,$ff-minus-zero
+0d5a : 08 > php ;save flags
+0d5b : c001 > cpy #1 ;test result
+ > trap_ne
+0d5d : f003 > beq skip0557
+ > trap ;failed not equal (non zero)
+0d5f : 205b44 > jsr report_error
+ >
+0d62 : >skip0557
+ >
+0d62 : 68 > pla ;load status
+0d63 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0d64 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d66 : f003 > beq skip0560
+ > trap ;failed not equal (non zero)
+0d68 : 205b44 > jsr report_error
+ >
+0d6b : >skip0560
+ >
+0d6b : 28 > plp ;restore status
+
+0d6c : 88 dey ;00
+ tst_y 0,$ff-minus
+0d6d : 08 > php ;save flags
+0d6e : c000 > cpy #0 ;test result
+ > trap_ne
+0d70 : f003 > beq skip0563
+ > trap ;failed not equal (non zero)
+0d72 : 205b44 > jsr report_error
+ >
+0d75 : >skip0563
+ >
+0d75 : 68 > pla ;load status
+0d76 : 48 > pha
+ > cmp_flag $ff-minus
+0d77 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d79 : f003 > beq skip0566
+ > trap ;failed not equal (non zero)
+0d7b : 205b44 > jsr report_error
+ >
+0d7e : >skip0566
+ >
+0d7e : 28 > plp ;restore status
+
+0d7f : 88 dey ;ff
+ tst_y $ff,$ff-zero
+0d80 : 08 > php ;save flags
+0d81 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0d83 : f003 > beq skip0569
+ > trap ;failed not equal (non zero)
+0d85 : 205b44 > jsr report_error
+ >
+0d88 : >skip0569
+ >
+0d88 : 68 > pla ;load status
+0d89 : 48 > pha
+ > cmp_flag $ff-zero
+0d8a : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d8c : f003 > beq skip0572
+ > trap ;failed not equal (non zero)
+0d8e : 205b44 > jsr report_error
+ >
+0d91 : >skip0572
+ >
+0d91 : 28 > plp ;restore status
+
+0d92 : 88 dey ;fe
+ set_stat 0
+ > load_flag 0
+0d93 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0d95 : 48 > pha ;use stack to load status
+0d96 : 28 > plp
+
+0d97 : c8 iny ;ff
+ tst_y $ff,0+minus
+0d98 : 08 > php ;save flags
+0d99 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0d9b : f003 > beq skip0577
+ > trap ;failed not equal (non zero)
+0d9d : 205b44 > jsr report_error
+ >
+0da0 : >skip0577
+ >
+0da0 : 68 > pla ;load status
+0da1 : 48 > pha
+ > cmp_flag 0+minus
+0da2 : c9b0 > cmp #(0+minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0da4 : f003 > beq skip0580
+ > trap ;failed not equal (non zero)
+0da6 : 205b44 > jsr report_error
+ >
+0da9 : >skip0580
+ >
+0da9 : 28 > plp ;restore status
+
+0daa : c8 iny ;00
+ tst_y 0,zero
+0dab : 08 > php ;save flags
+0dac : c000 > cpy #0 ;test result
+ > trap_ne
+0dae : f003 > beq skip0583
+ > trap ;failed not equal (non zero)
+0db0 : 205b44 > jsr report_error
+ >
+0db3 : >skip0583
+ >
+0db3 : 68 > pla ;load status
+0db4 : 48 > pha
+ > cmp_flag zero
+0db5 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0db7 : f003 > beq skip0586
+ > trap ;failed not equal (non zero)
+0db9 : 205b44 > jsr report_error
+ >
+0dbc : >skip0586
+ >
+0dbc : 28 > plp ;restore status
+
+0dbd : c8 iny ;01
+ tst_y 1,0
+0dbe : 08 > php ;save flags
+0dbf : c001 > cpy #1 ;test result
+ > trap_ne
+0dc1 : f003 > beq skip0589
+ > trap ;failed not equal (non zero)
+0dc3 : 205b44 > jsr report_error
+ >
+0dc6 : >skip0589
+ >
+0dc6 : 68 > pla ;load status
+0dc7 : 48 > pha
+ > cmp_flag 0
+0dc8 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0dca : f003 > beq skip0592
+ > trap ;failed not equal (non zero)
+0dcc : 205b44 > jsr report_error
+ >
+0dcf : >skip0592
+ >
+0dcf : 28 > plp ;restore status
+
+0dd0 : 88 dey ;00
+ tst_y 0,zero
+0dd1 : 08 > php ;save flags
+0dd2 : c000 > cpy #0 ;test result
+ > trap_ne
+0dd4 : f003 > beq skip0595
+ > trap ;failed not equal (non zero)
+0dd6 : 205b44 > jsr report_error
+ >
+0dd9 : >skip0595
+ >
+0dd9 : 68 > pla ;load status
+0dda : 48 > pha
+ > cmp_flag zero
+0ddb : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ddd : f003 > beq skip0598
+ > trap ;failed not equal (non zero)
+0ddf : 205b44 > jsr report_error
+ >
+0de2 : >skip0598
+ >
+0de2 : 28 > plp ;restore status
+
+0de3 : 88 dey ;ff
+ tst_y $ff,minus
+0de4 : 08 > php ;save flags
+0de5 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0de7 : f003 > beq skip0601
+ > trap ;failed not equal (non zero)
+0de9 : 205b44 > jsr report_error
+ >
+0dec : >skip0601
+ >
+0dec : 68 > pla ;load status
+0ded : 48 > pha
+ > cmp_flag minus
+0dee : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0df0 : f003 > beq skip0604
+ > trap ;failed not equal (non zero)
+0df2 : 205b44 > jsr report_error
+ >
+0df5 : >skip0604
+ >
+0df5 : 28 > plp ;restore status
+
+
+0df6 : a2ff ldx #$ff
+ set_stat $ff
+ > load_flag $ff
+0df8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0dfa : 48 > pha ;use stack to load status
+0dfb : 28 > plp
+
+0dfc : 8a txa
+ tst_a $ff,$ff-zero
+0dfd : 08 > php ;save flags
+0dfe : c9ff > cmp #$ff ;test result
+ > trap_ne
+0e00 : f003 > beq skip0609
+ > trap ;failed not equal (non zero)
+0e02 : 205b44 > jsr report_error
+ >
+0e05 : >skip0609
+ >
+0e05 : 68 > pla ;load status
+0e06 : 48 > pha
+ > cmp_flag $ff-zero
+0e07 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e09 : f003 > beq skip0612
+ > trap ;failed not equal (non zero)
+0e0b : 205b44 > jsr report_error
+ >
+0e0e : >skip0612
+ >
+0e0e : 28 > plp ;restore status
+
+0e0f : 08 php
+0e10 : e8 inx ;00
+0e11 : 28 plp
+0e12 : 8a txa
+ tst_a 0,$ff-minus
+0e13 : 08 > php ;save flags
+0e14 : c900 > cmp #0 ;test result
+ > trap_ne
+0e16 : f003 > beq skip0615
+ > trap ;failed not equal (non zero)
+0e18 : 205b44 > jsr report_error
+ >
+0e1b : >skip0615
+ >
+0e1b : 68 > pla ;load status
+0e1c : 48 > pha
+ > cmp_flag $ff-minus
+0e1d : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e1f : f003 > beq skip0618
+ > trap ;failed not equal (non zero)
+0e21 : 205b44 > jsr report_error
+ >
+0e24 : >skip0618
+ >
+0e24 : 28 > plp ;restore status
+
+0e25 : 08 php
+0e26 : e8 inx ;01
+0e27 : 28 plp
+0e28 : 8a txa
+ tst_a 1,$ff-minus-zero
+0e29 : 08 > php ;save flags
+0e2a : c901 > cmp #1 ;test result
+ > trap_ne
+0e2c : f003 > beq skip0621
+ > trap ;failed not equal (non zero)
+0e2e : 205b44 > jsr report_error
+ >
+0e31 : >skip0621
+ >
+0e31 : 68 > pla ;load status
+0e32 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0e33 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e35 : f003 > beq skip0624
+ > trap ;failed not equal (non zero)
+0e37 : 205b44 > jsr report_error
+ >
+0e3a : >skip0624
+ >
+0e3a : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0e3b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e3d : 48 > pha ;use stack to load status
+0e3e : 28 > plp
+
+0e3f : 8a txa
+ tst_a 1,0
+0e40 : 08 > php ;save flags
+0e41 : c901 > cmp #1 ;test result
+ > trap_ne
+0e43 : f003 > beq skip0629
+ > trap ;failed not equal (non zero)
+0e45 : 205b44 > jsr report_error
+ >
+0e48 : >skip0629
+ >
+0e48 : 68 > pla ;load status
+0e49 : 48 > pha
+ > cmp_flag 0
+0e4a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e4c : f003 > beq skip0632
+ > trap ;failed not equal (non zero)
+0e4e : 205b44 > jsr report_error
+ >
+0e51 : >skip0632
+ >
+0e51 : 28 > plp ;restore status
+
+0e52 : 08 php
+0e53 : ca dex ;00
+0e54 : 28 plp
+0e55 : 8a txa
+ tst_a 0,zero
+0e56 : 08 > php ;save flags
+0e57 : c900 > cmp #0 ;test result
+ > trap_ne
+0e59 : f003 > beq skip0635
+ > trap ;failed not equal (non zero)
+0e5b : 205b44 > jsr report_error
+ >
+0e5e : >skip0635
+ >
+0e5e : 68 > pla ;load status
+0e5f : 48 > pha
+ > cmp_flag zero
+0e60 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e62 : f003 > beq skip0638
+ > trap ;failed not equal (non zero)
+0e64 : 205b44 > jsr report_error
+ >
+0e67 : >skip0638
+ >
+0e67 : 28 > plp ;restore status
+
+0e68 : 08 php
+0e69 : ca dex ;ff
+0e6a : 28 plp
+0e6b : 8a txa
+ tst_a $ff,minus
+0e6c : 08 > php ;save flags
+0e6d : c9ff > cmp #$ff ;test result
+ > trap_ne
+0e6f : f003 > beq skip0641
+ > trap ;failed not equal (non zero)
+0e71 : 205b44 > jsr report_error
+ >
+0e74 : >skip0641
+ >
+0e74 : 68 > pla ;load status
+0e75 : 48 > pha
+ > cmp_flag minus
+0e76 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e78 : f003 > beq skip0644
+ > trap ;failed not equal (non zero)
+0e7a : 205b44 > jsr report_error
+ >
+0e7d : >skip0644
+ >
+0e7d : 28 > plp ;restore status
+
+
+0e7e : a0ff ldy #$ff
+ set_stat $ff
+ > load_flag $ff
+0e80 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e82 : 48 > pha ;use stack to load status
+0e83 : 28 > plp
+
+0e84 : 98 tya
+ tst_a $ff,$ff-zero
+0e85 : 08 > php ;save flags
+0e86 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0e88 : f003 > beq skip0649
+ > trap ;failed not equal (non zero)
+0e8a : 205b44 > jsr report_error
+ >
+0e8d : >skip0649
+ >
+0e8d : 68 > pla ;load status
+0e8e : 48 > pha
+ > cmp_flag $ff-zero
+0e8f : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e91 : f003 > beq skip0652
+ > trap ;failed not equal (non zero)
+0e93 : 205b44 > jsr report_error
+ >
+0e96 : >skip0652
+ >
+0e96 : 28 > plp ;restore status
+
+0e97 : 08 php
+0e98 : c8 iny ;00
+0e99 : 28 plp
+0e9a : 98 tya
+ tst_a 0,$ff-minus
+0e9b : 08 > php ;save flags
+0e9c : c900 > cmp #0 ;test result
+ > trap_ne
+0e9e : f003 > beq skip0655
+ > trap ;failed not equal (non zero)
+0ea0 : 205b44 > jsr report_error
+ >
+0ea3 : >skip0655
+ >
+0ea3 : 68 > pla ;load status
+0ea4 : 48 > pha
+ > cmp_flag $ff-minus
+0ea5 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ea7 : f003 > beq skip0658
+ > trap ;failed not equal (non zero)
+0ea9 : 205b44 > jsr report_error
+ >
+0eac : >skip0658
+ >
+0eac : 28 > plp ;restore status
+
+0ead : 08 php
+0eae : c8 iny ;01
+0eaf : 28 plp
+0eb0 : 98 tya
+ tst_a 1,$ff-minus-zero
+0eb1 : 08 > php ;save flags
+0eb2 : c901 > cmp #1 ;test result
+ > trap_ne
+0eb4 : f003 > beq skip0661
+ > trap ;failed not equal (non zero)
+0eb6 : 205b44 > jsr report_error
+ >
+0eb9 : >skip0661
+ >
+0eb9 : 68 > pla ;load status
+0eba : 48 > pha
+ > cmp_flag $ff-minus-zero
+0ebb : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ebd : f003 > beq skip0664
+ > trap ;failed not equal (non zero)
+0ebf : 205b44 > jsr report_error
+ >
+0ec2 : >skip0664
+ >
+0ec2 : 28 > plp ;restore status
+
+ set_stat 0
+ > load_flag 0
+0ec3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ec5 : 48 > pha ;use stack to load status
+0ec6 : 28 > plp
+
+0ec7 : 98 tya
+ tst_a 1,0
+0ec8 : 08 > php ;save flags
+0ec9 : c901 > cmp #1 ;test result
+ > trap_ne
+0ecb : f003 > beq skip0669
+ > trap ;failed not equal (non zero)
+0ecd : 205b44 > jsr report_error
+ >
+0ed0 : >skip0669
+ >
+0ed0 : 68 > pla ;load status
+0ed1 : 48 > pha
+ > cmp_flag 0
+0ed2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ed4 : f003 > beq skip0672
+ > trap ;failed not equal (non zero)
+0ed6 : 205b44 > jsr report_error
+ >
+0ed9 : >skip0672
+ >
+0ed9 : 28 > plp ;restore status
+
+0eda : 08 php
+0edb : 88 dey ;00
+0edc : 28 plp
+0edd : 98 tya
+ tst_a 0,zero
+0ede : 08 > php ;save flags
+0edf : c900 > cmp #0 ;test result
+ > trap_ne
+0ee1 : f003 > beq skip0675
+ > trap ;failed not equal (non zero)
+0ee3 : 205b44 > jsr report_error
+ >
+0ee6 : >skip0675
+ >
+0ee6 : 68 > pla ;load status
+0ee7 : 48 > pha
+ > cmp_flag zero
+0ee8 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0eea : f003 > beq skip0678
+ > trap ;failed not equal (non zero)
+0eec : 205b44 > jsr report_error
+ >
+0eef : >skip0678
+ >
+0eef : 28 > plp ;restore status
+
+0ef0 : 08 php
+0ef1 : 88 dey ;ff
+0ef2 : 28 plp
+0ef3 : 98 tya
+ tst_a $ff,minus
+0ef4 : 08 > php ;save flags
+0ef5 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0ef7 : f003 > beq skip0681
+ > trap ;failed not equal (non zero)
+0ef9 : 205b44 > jsr report_error
+ >
+0efc : >skip0681
+ >
+0efc : 68 > pla ;load status
+0efd : 48 > pha
+ > cmp_flag minus
+0efe : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f00 : f003 > beq skip0684
+ > trap ;failed not equal (non zero)
+0f02 : 205b44 > jsr report_error
+ >
+0f05 : >skip0684
+ >
+0f05 : 28 > plp ;restore status
+
+
+ load_flag $ff
+0f06 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+0f08 : 48 pha
+0f09 : a2ff ldx #$ff ;ff
+0f0b : 8a txa
+0f0c : 28 plp
+0f0d : a8 tay
+ tst_y $ff,$ff-zero
+0f0e : 08 > php ;save flags
+0f0f : c0ff > cpy #$ff ;test result
+ > trap_ne
+0f11 : f003 > beq skip0688
+ > trap ;failed not equal (non zero)
+0f13 : 205b44 > jsr report_error
+ >
+0f16 : >skip0688
+ >
+0f16 : 68 > pla ;load status
+0f17 : 48 > pha
+ > cmp_flag $ff-zero
+0f18 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f1a : f003 > beq skip0691
+ > trap ;failed not equal (non zero)
+0f1c : 205b44 > jsr report_error
+ >
+0f1f : >skip0691
+ >
+0f1f : 28 > plp ;restore status
+
+0f20 : 08 php
+0f21 : e8 inx ;00
+0f22 : 8a txa
+0f23 : 28 plp
+0f24 : a8 tay
+ tst_y 0,$ff-minus
+0f25 : 08 > php ;save flags
+0f26 : c000 > cpy #0 ;test result
+ > trap_ne
+0f28 : f003 > beq skip0694
+ > trap ;failed not equal (non zero)
+0f2a : 205b44 > jsr report_error
+ >
+0f2d : >skip0694
+ >
+0f2d : 68 > pla ;load status
+0f2e : 48 > pha
+ > cmp_flag $ff-minus
+0f2f : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f31 : f003 > beq skip0697
+ > trap ;failed not equal (non zero)
+0f33 : 205b44 > jsr report_error
+ >
+0f36 : >skip0697
+ >
+0f36 : 28 > plp ;restore status
+
+0f37 : 08 php
+0f38 : e8 inx ;01
+0f39 : 8a txa
+0f3a : 28 plp
+0f3b : a8 tay
+ tst_y 1,$ff-minus-zero
+0f3c : 08 > php ;save flags
+0f3d : c001 > cpy #1 ;test result
+ > trap_ne
+0f3f : f003 > beq skip0700
+ > trap ;failed not equal (non zero)
+0f41 : 205b44 > jsr report_error
+ >
+0f44 : >skip0700
+ >
+0f44 : 68 > pla ;load status
+0f45 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0f46 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f48 : f003 > beq skip0703
+ > trap ;failed not equal (non zero)
+0f4a : 205b44 > jsr report_error
+ >
+0f4d : >skip0703
+ >
+0f4d : 28 > plp ;restore status
+
+ load_flag 0
+0f4e : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+0f50 : 48 pha
+0f51 : a900 lda #0
+0f53 : 8a txa
+0f54 : 28 plp
+0f55 : a8 tay
+ tst_y 1,0
+0f56 : 08 > php ;save flags
+0f57 : c001 > cpy #1 ;test result
+ > trap_ne
+0f59 : f003 > beq skip0707
+ > trap ;failed not equal (non zero)
+0f5b : 205b44 > jsr report_error
+ >
+0f5e : >skip0707
+ >
+0f5e : 68 > pla ;load status
+0f5f : 48 > pha
+ > cmp_flag 0
+0f60 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f62 : f003 > beq skip0710
+ > trap ;failed not equal (non zero)
+0f64 : 205b44 > jsr report_error
+ >
+0f67 : >skip0710
+ >
+0f67 : 28 > plp ;restore status
+
+0f68 : 08 php
+0f69 : ca dex ;00
+0f6a : 8a txa
+0f6b : 28 plp
+0f6c : a8 tay
+ tst_y 0,zero
+0f6d : 08 > php ;save flags
+0f6e : c000 > cpy #0 ;test result
+ > trap_ne
+0f70 : f003 > beq skip0713
+ > trap ;failed not equal (non zero)
+0f72 : 205b44 > jsr report_error
+ >
+0f75 : >skip0713
+ >
+0f75 : 68 > pla ;load status
+0f76 : 48 > pha
+ > cmp_flag zero
+0f77 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f79 : f003 > beq skip0716
+ > trap ;failed not equal (non zero)
+0f7b : 205b44 > jsr report_error
+ >
+0f7e : >skip0716
+ >
+0f7e : 28 > plp ;restore status
+
+0f7f : 08 php
+0f80 : ca dex ;ff
+0f81 : 8a txa
+0f82 : 28 plp
+0f83 : a8 tay
+ tst_y $ff,minus
+0f84 : 08 > php ;save flags
+0f85 : c0ff > cpy #$ff ;test result
+ > trap_ne
+0f87 : f003 > beq skip0719
+ > trap ;failed not equal (non zero)
+0f89 : 205b44 > jsr report_error
+ >
+0f8c : >skip0719
+ >
+0f8c : 68 > pla ;load status
+0f8d : 48 > pha
+ > cmp_flag minus
+0f8e : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f90 : f003 > beq skip0722
+ > trap ;failed not equal (non zero)
+0f92 : 205b44 > jsr report_error
+ >
+0f95 : >skip0722
+ >
+0f95 : 28 > plp ;restore status
+
+
+
+ load_flag $ff
+0f96 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+0f98 : 48 pha
+0f99 : a0ff ldy #$ff ;ff
+0f9b : 98 tya
+0f9c : 28 plp
+0f9d : aa tax
+ tst_x $ff,$ff-zero
+0f9e : 08 > php ;save flags
+0f9f : e0ff > cpx #$ff ;test result
+ > trap_ne
+0fa1 : f003 > beq skip0726
+ > trap ;failed not equal (non zero)
+0fa3 : 205b44 > jsr report_error
+ >
+0fa6 : >skip0726
+ >
+0fa6 : 68 > pla ;load status
+0fa7 : 48 > pha
+ > cmp_flag $ff-zero
+0fa8 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0faa : f003 > beq skip0729
+ > trap ;failed not equal (non zero)
+0fac : 205b44 > jsr report_error
+ >
+0faf : >skip0729
+ >
+0faf : 28 > plp ;restore status
+
+0fb0 : 08 php
+0fb1 : c8 iny ;00
+0fb2 : 98 tya
+0fb3 : 28 plp
+0fb4 : aa tax
+ tst_x 0,$ff-minus
+0fb5 : 08 > php ;save flags
+0fb6 : e000 > cpx #0 ;test result
+ > trap_ne
+0fb8 : f003 > beq skip0732
+ > trap ;failed not equal (non zero)
+0fba : 205b44 > jsr report_error
+ >
+0fbd : >skip0732
+ >
+0fbd : 68 > pla ;load status
+0fbe : 48 > pha
+ > cmp_flag $ff-minus
+0fbf : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0fc1 : f003 > beq skip0735
+ > trap ;failed not equal (non zero)
+0fc3 : 205b44 > jsr report_error
+ >
+0fc6 : >skip0735
+ >
+0fc6 : 28 > plp ;restore status
+
+0fc7 : 08 php
+0fc8 : c8 iny ;01
+0fc9 : 98 tya
+0fca : 28 plp
+0fcb : aa tax
+ tst_x 1,$ff-minus-zero
+0fcc : 08 > php ;save flags
+0fcd : e001 > cpx #1 ;test result
+ > trap_ne
+0fcf : f003 > beq skip0738
+ > trap ;failed not equal (non zero)
+0fd1 : 205b44 > jsr report_error
+ >
+0fd4 : >skip0738
+ >
+0fd4 : 68 > pla ;load status
+0fd5 : 48 > pha
+ > cmp_flag $ff-minus-zero
+0fd6 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0fd8 : f003 > beq skip0741
+ > trap ;failed not equal (non zero)
+0fda : 205b44 > jsr report_error
+ >
+0fdd : >skip0741
+ >
+0fdd : 28 > plp ;restore status
+
+ load_flag 0
+0fde : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+0fe0 : 48 pha
+0fe1 : a900 lda #0 ;preset status
+0fe3 : 98 tya
+0fe4 : 28 plp
+0fe5 : aa tax
+ tst_x 1,0
+0fe6 : 08 > php ;save flags
+0fe7 : e001 > cpx #1 ;test result
+ > trap_ne
+0fe9 : f003 > beq skip0745
+ > trap ;failed not equal (non zero)
+0feb : 205b44 > jsr report_error
+ >
+0fee : >skip0745
+ >
+0fee : 68 > pla ;load status
+0fef : 48 > pha
+ > cmp_flag 0
+0ff0 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ff2 : f003 > beq skip0748
+ > trap ;failed not equal (non zero)
+0ff4 : 205b44 > jsr report_error
+ >
+0ff7 : >skip0748
+ >
+0ff7 : 28 > plp ;restore status
+
+0ff8 : 08 php
+0ff9 : 88 dey ;00
+0ffa : 98 tya
+0ffb : 28 plp
+0ffc : aa tax
+ tst_x 0,zero
+0ffd : 08 > php ;save flags
+0ffe : e000 > cpx #0 ;test result
+ > trap_ne
+1000 : f003 > beq skip0751
+ > trap ;failed not equal (non zero)
+1002 : 205b44 > jsr report_error
+ >
+1005 : >skip0751
+ >
+1005 : 68 > pla ;load status
+1006 : 48 > pha
+ > cmp_flag zero
+1007 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1009 : f003 > beq skip0754
+ > trap ;failed not equal (non zero)
+100b : 205b44 > jsr report_error
+ >
+100e : >skip0754
+ >
+100e : 28 > plp ;restore status
+
+100f : 08 php
+1010 : 88 dey ;ff
+1011 : 98 tya
+1012 : 28 plp
+1013 : aa tax
+ tst_x $ff,minus
+1014 : 08 > php ;save flags
+1015 : e0ff > cpx #$ff ;test result
+ > trap_ne
+1017 : f003 > beq skip0757
+ > trap ;failed not equal (non zero)
+1019 : 205b44 > jsr report_error
+ >
+101c : >skip0757
+ >
+101c : 68 > pla ;load status
+101d : 48 > pha
+ > cmp_flag minus
+101e : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1020 : f003 > beq skip0760
+ > trap ;failed not equal (non zero)
+1022 : 205b44 > jsr report_error
+ >
+1025 : >skip0760
+ >
+1025 : 28 > plp ;restore status
+
+ next_test
+1026 : ad0002 > lda test_case ;previous test
+1029 : c90d > cmp #test_num
+ > trap_ne ;test is out of sequence
+102b : f003 > beq skip0763
+ > trap ;failed not equal (non zero)
+102d : 205b44 > jsr report_error
+ >
+1030 : >skip0763
+ >
+000e = >test_num = test_num + 1
+1030 : a90e > lda #test_num ;*** next tests' number
+1032 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;TSX sets NZ - TXS does not
+ ; This section also tests for proper stack wrap around.
+1035 : a201 ldx #1 ;01
+ set_stat $ff
+ > load_flag $ff
+1037 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1039 : 48 > pha ;use stack to load status
+103a : 28 > plp
+
+103b : 9a txs
+103c : 08 php
+103d : ad0101 lda $101
+ cmp_flag $ff
+1040 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1042 : f003 > beq skip0768
+ > trap ;failed not equal (non zero)
+1044 : 205b44 > jsr report_error
+ >
+1047 : >skip0768
+
+ set_stat 0
+ > load_flag 0
+1047 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1049 : 48 > pha ;use stack to load status
+104a : 28 > plp
+
+104b : 9a txs
+104c : 08 php
+104d : ad0101 lda $101
+ cmp_flag 0
+1050 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1052 : f003 > beq skip0773
+ > trap ;failed not equal (non zero)
+1054 : 205b44 > jsr report_error
+ >
+1057 : >skip0773
+
+1057 : ca dex ;00
+ set_stat $ff
+ > load_flag $ff
+1058 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+105a : 48 > pha ;use stack to load status
+105b : 28 > plp
+
+105c : 9a txs
+105d : 08 php
+105e : ad0001 lda $100
+ cmp_flag $ff
+1061 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1063 : f003 > beq skip0778
+ > trap ;failed not equal (non zero)
+1065 : 205b44 > jsr report_error
+ >
+1068 : >skip0778
+
+ set_stat 0
+ > load_flag 0
+1068 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+106a : 48 > pha ;use stack to load status
+106b : 28 > plp
+
+106c : 9a txs
+106d : 08 php
+106e : ad0001 lda $100
+ cmp_flag 0
+1071 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1073 : f003 > beq skip0783
+ > trap ;failed not equal (non zero)
+1075 : 205b44 > jsr report_error
+ >
+1078 : >skip0783
+
+1078 : ca dex ;ff
+ set_stat $ff
+ > load_flag $ff
+1079 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+107b : 48 > pha ;use stack to load status
+107c : 28 > plp
+
+107d : 9a txs
+107e : 08 php
+107f : adff01 lda $1ff
+ cmp_flag $ff
+1082 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1084 : f003 > beq skip0788
+ > trap ;failed not equal (non zero)
+1086 : 205b44 > jsr report_error
+ >
+1089 : >skip0788
+
+ set_stat 0
+ > load_flag 0
+1089 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+108b : 48 > pha ;use stack to load status
+108c : 28 > plp
+
+108d : 9a txs
+108e : 08 php
+108f : adff01 lda $1ff
+ cmp_flag 0
+1092 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+
+1094 : a201 ldx #1
+1096 : 9a txs ;sp=01
+ set_stat $ff
+ > load_flag $ff
+1097 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1099 : 48 > pha ;use stack to load status
+109a : 28 > plp
+
+109b : ba tsx ;clears Z, N
+109c : 08 php ;sp=00
+109d : e001 cpx #1
+ trap_ne
+109f : f003 > beq skip0795
+ > trap ;failed not equal (non zero)
+10a1 : 205b44 > jsr report_error
+ >
+10a4 : >skip0795
+
+10a4 : ad0101 lda $101
+ cmp_flag $ff-minus-zero
+10a7 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+10a9 : f003 > beq skip0798
+ > trap ;failed not equal (non zero)
+10ab : 205b44 > jsr report_error
+ >
+10ae : >skip0798
+
+ set_stat $ff
+ > load_flag $ff
+10ae : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+10b0 : 48 > pha ;use stack to load status
+10b1 : 28 > plp
+
+10b2 : ba tsx ;clears N, sets Z
+10b3 : 08 php ;sp=ff
+10b4 : e000 cpx #0
+ trap_ne
+10b6 : f003 > beq skip0802
+ > trap ;failed not equal (non zero)
+10b8 : 205b44 > jsr report_error
+ >
+10bb : >skip0802
+
+10bb : ad0001 lda $100
+ cmp_flag $ff-minus
+10be : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+10c0 : f003 > beq skip0805
+ > trap ;failed not equal (non zero)
+10c2 : 205b44 > jsr report_error
+ >
+10c5 : >skip0805
+
+ set_stat $ff
+ > load_flag $ff
+10c5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+10c7 : 48 > pha ;use stack to load status
+10c8 : 28 > plp
+
+10c9 : ba tsx ;clears N, sets Z
+10ca : 08 php ;sp=fe
+10cb : e0ff cpx #$ff
+ trap_ne
+10cd : f003 > beq skip0809
+ > trap ;failed not equal (non zero)
+10cf : 205b44 > jsr report_error
+ >
+10d2 : >skip0809
+
+10d2 : adff01 lda $1ff
+ cmp_flag $ff-zero
+10d5 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+10d7 : f003 > beq skip0812
+ > trap ;failed not equal (non zero)
+10d9 : 205b44 > jsr report_error
+ >
+10dc : >skip0812
+
+
+10dc : a201 ldx #1
+10de : 9a txs ;sp=01
+ set_stat 0
+ > load_flag 0
+10df : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+10e1 : 48 > pha ;use stack to load status
+10e2 : 28 > plp
+
+10e3 : ba tsx ;clears Z, N
+10e4 : 08 php ;sp=00
+10e5 : e001 cpx #1
+ trap_ne
+10e7 : f003 > beq skip0816
+ > trap ;failed not equal (non zero)
+10e9 : 205b44 > jsr report_error
+ >
+10ec : >skip0816
+
+10ec : ad0101 lda $101
+ cmp_flag 0
+10ef : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+10f1 : f003 > beq skip0819
+ > trap ;failed not equal (non zero)
+10f3 : 205b44 > jsr report_error
+ >
+10f6 : >skip0819
+
+ set_stat 0
+ > load_flag 0
+10f6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+10f8 : 48 > pha ;use stack to load status
+10f9 : 28 > plp
+
+10fa : ba tsx ;clears N, sets Z
+10fb : 08 php ;sp=ff
+10fc : e000 cpx #0
+ trap_ne
+10fe : f003 > beq skip0823
+ > trap ;failed not equal (non zero)
+1100 : 205b44 > jsr report_error
+ >
+1103 : >skip0823
+
+1103 : ad0001 lda $100
+ cmp_flag zero
+1106 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1108 : f003 > beq skip0826
+ > trap ;failed not equal (non zero)
+110a : 205b44 > jsr report_error
+ >
+110d : >skip0826
+
+ set_stat 0
+ > load_flag 0
+110d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+110f : 48 > pha ;use stack to load status
+1110 : 28 > plp
+
+1111 : ba tsx ;clears N, sets Z
+1112 : 08 php ;sp=fe
+1113 : e0ff cpx #$ff
+ trap_ne
+1115 : f003 > beq skip0830
+ > trap ;failed not equal (non zero)
+1117 : 205b44 > jsr report_error
+ >
+111a : >skip0830
+
+111a : adff01 lda $1ff
+ cmp_flag minus
+111d : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+111f : f003 > beq skip0833
+ > trap ;failed not equal (non zero)
+1121 : 205b44 > jsr report_error
+ >
+1124 : >skip0833
+
+1124 : 68 pla ;sp=ff
+ next_test
+1125 : ad0002 > lda test_case ;previous test
+1128 : c90e > cmp #test_num
+ > trap_ne ;test is out of sequence
+112a : f003 > beq skip0836
+ > trap ;failed not equal (non zero)
+112c : 205b44 > jsr report_error
+ >
+112f : >skip0836
+ >
+000f = >test_num = test_num + 1
+112f : a90f > lda #test_num ;*** next tests' number
+1131 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing index register load & store LDY LDX STY STX all addressing modes
+ ; LDX / STX - zp,y / abs,y
+1134 : a003 ldy #3
+1136 : tldx
+ set_stat 0
+ > load_flag 0
+1136 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1138 : 48 > pha ;use stack to load status
+1139 : 28 > plp
+
+113a : b613 ldx zp1,y
+113c : 08 php ;test stores do not alter flags
+113d : 8a txa
+113e : 49c3 eor #$c3
+1140 : 28 plp
+1141 : 990302 sta abst,y
+1144 : 08 php ;flags after load/store sequence
+1145 : 49c3 eor #$c3
+1147 : d91702 cmp abs1,y ;test result
+ trap_ne
+114a : f003 > beq skip0840
+ > trap ;failed not equal (non zero)
+114c : 205b44 > jsr report_error
+ >
+114f : >skip0840
+
+114f : 68 pla ;load status
+ eor_flag 0
+1150 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1152 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1155 : f003 > beq skip0843
+ > trap ;failed not equal (non zero)
+1157 : 205b44 > jsr report_error
+ >
+115a : >skip0843
+
+115a : 88 dey
+115b : 10d9 bpl tldx
+
+115d : a003 ldy #3
+115f : tldx1
+ set_stat $ff
+ > load_flag $ff
+115f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1161 : 48 > pha ;use stack to load status
+1162 : 28 > plp
+
+1163 : b613 ldx zp1,y
+1165 : 08 php ;test stores do not alter flags
+1166 : 8a txa
+1167 : 49c3 eor #$c3
+1169 : 28 plp
+116a : 990302 sta abst,y
+116d : 08 php ;flags after load/store sequence
+116e : 49c3 eor #$c3
+1170 : d91702 cmp abs1,y ;test result
+ trap_ne
+1173 : f003 > beq skip0847
+ > trap ;failed not equal (non zero)
+1175 : 205b44 > jsr report_error
+ >
+1178 : >skip0847
+
+1178 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1179 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+117b : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+117e : f003 > beq skip0850
+ > trap ;failed not equal (non zero)
+1180 : 205b44 > jsr report_error
+ >
+1183 : >skip0850
+
+1183 : 88 dey
+1184 : 10d9 bpl tldx1
+
+1186 : a003 ldy #3
+1188 : tldx2
+ set_stat 0
+ > load_flag 0
+1188 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+118a : 48 > pha ;use stack to load status
+118b : 28 > plp
+
+118c : be1702 ldx abs1,y
+118f : 08 php ;test stores do not alter flags
+1190 : 8a txa
+1191 : 49c3 eor #$c3
+1193 : aa tax
+1194 : 28 plp
+1195 : 960c stx zpt,y
+1197 : 08 php ;flags after load/store sequence
+1198 : 49c3 eor #$c3
+119a : d91300 cmp zp1,y ;test result
+ trap_ne
+119d : f003 > beq skip0854
+ > trap ;failed not equal (non zero)
+119f : 205b44 > jsr report_error
+ >
+11a2 : >skip0854
+
+11a2 : 68 pla ;load status
+ eor_flag 0
+11a3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+11a5 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+11a8 : f003 > beq skip0857
+ > trap ;failed not equal (non zero)
+11aa : 205b44 > jsr report_error
+ >
+11ad : >skip0857
+
+11ad : 88 dey
+11ae : 10d8 bpl tldx2
+
+11b0 : a003 ldy #3
+11b2 : tldx3
+ set_stat $ff
+ > load_flag $ff
+11b2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+11b4 : 48 > pha ;use stack to load status
+11b5 : 28 > plp
+
+11b6 : be1702 ldx abs1,y
+11b9 : 08 php ;test stores do not alter flags
+11ba : 8a txa
+11bb : 49c3 eor #$c3
+11bd : aa tax
+11be : 28 plp
+11bf : 960c stx zpt,y
+11c1 : 08 php ;flags after load/store sequence
+11c2 : 49c3 eor #$c3
+11c4 : d91300 cmp zp1,y ;test result
+ trap_ne
+11c7 : f003 > beq skip0861
+ > trap ;failed not equal (non zero)
+11c9 : 205b44 > jsr report_error
+ >
+11cc : >skip0861
+
+11cc : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+11cd : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+11cf : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+11d2 : f003 > beq skip0864
+ > trap ;failed not equal (non zero)
+11d4 : 205b44 > jsr report_error
+ >
+11d7 : >skip0864
+
+11d7 : 88 dey
+11d8 : 10d8 bpl tldx3
+
+11da : a003 ldy #3 ;testing store result
+11dc : a200 ldx #0
+11de : b90c00 tstx lda zpt,y
+11e1 : 49c3 eor #$c3
+11e3 : d91300 cmp zp1,y
+ trap_ne ;store to zp data
+11e6 : f003 > beq skip0866
+ > trap ;failed not equal (non zero)
+11e8 : 205b44 > jsr report_error
+ >
+11eb : >skip0866
+
+11eb : 960c stx zpt,y ;clear
+11ed : b90302 lda abst,y
+11f0 : 49c3 eor #$c3
+11f2 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+11f5 : f003 > beq skip0868
+ > trap ;failed not equal (non zero)
+11f7 : 205b44 > jsr report_error
+ >
+11fa : >skip0868
+
+11fa : 8a txa
+11fb : 990302 sta abst,y ;clear
+11fe : 88 dey
+11ff : 10dd bpl tstx
+ next_test
+1201 : ad0002 > lda test_case ;previous test
+1204 : c90f > cmp #test_num
+ > trap_ne ;test is out of sequence
+1206 : f003 > beq skip0871
+ > trap ;failed not equal (non zero)
+1208 : 205b44 > jsr report_error
+ >
+120b : >skip0871
+ >
+0010 = >test_num = test_num + 1
+120b : a910 > lda #test_num ;*** next tests' number
+120d : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+1210 : a0fd ldy #3+$fa
+1212 : b619 tldx4 ldx zp1-$fa&$ff,y ;wrap on indexed zp
+1214 : 8a txa
+1215 : 990901 sta abst-$fa,y ;no STX abs,y!
+1218 : 88 dey
+1219 : c0fa cpy #$fa
+121b : b0f5 bcs tldx4
+121d : a0fd ldy #3+$fa
+121f : be1d01 tldx5 ldx abs1-$fa,y ;no wrap on indexed abs
+1222 : 9612 stx zpt-$fa&$ff,y
+1224 : 88 dey
+1225 : c0fa cpy #$fa
+1227 : b0f6 bcs tldx5
+1229 : a003 ldy #3 ;testing wraparound result
+122b : a200 ldx #0
+122d : b90c00 tstx1 lda zpt,y
+1230 : d91300 cmp zp1,y
+ trap_ne ;store to zp data
+1233 : f003 > beq skip0873
+ > trap ;failed not equal (non zero)
+1235 : 205b44 > jsr report_error
+ >
+1238 : >skip0873
+
+1238 : 960c stx zpt,y ;clear
+123a : b90302 lda abst,y
+123d : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1240 : f003 > beq skip0875
+ > trap ;failed not equal (non zero)
+1242 : 205b44 > jsr report_error
+ >
+1245 : >skip0875
+
+1245 : 8a txa
+1246 : 990302 sta abst,y ;clear
+1249 : 88 dey
+124a : 10e1 bpl tstx1
+ next_test
+124c : ad0002 > lda test_case ;previous test
+124f : c910 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1251 : f003 > beq skip0878
+ > trap ;failed not equal (non zero)
+1253 : 205b44 > jsr report_error
+ >
+1256 : >skip0878
+ >
+0011 = >test_num = test_num + 1
+1256 : a911 > lda #test_num ;*** next tests' number
+1258 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDY / STY - zp,x / abs,x
+125b : a203 ldx #3
+125d : tldy
+ set_stat 0
+ > load_flag 0
+125d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+125f : 48 > pha ;use stack to load status
+1260 : 28 > plp
+
+1261 : b413 ldy zp1,x
+1263 : 08 php ;test stores do not alter flags
+1264 : 98 tya
+1265 : 49c3 eor #$c3
+1267 : 28 plp
+1268 : 9d0302 sta abst,x
+126b : 08 php ;flags after load/store sequence
+126c : 49c3 eor #$c3
+126e : dd1702 cmp abs1,x ;test result
+ trap_ne
+1271 : f003 > beq skip0882
+ > trap ;failed not equal (non zero)
+1273 : 205b44 > jsr report_error
+ >
+1276 : >skip0882
+
+1276 : 68 pla ;load status
+ eor_flag 0
+1277 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1279 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+127c : f003 > beq skip0885
+ > trap ;failed not equal (non zero)
+127e : 205b44 > jsr report_error
+ >
+1281 : >skip0885
+
+1281 : ca dex
+1282 : 10d9 bpl tldy
+
+1284 : a203 ldx #3
+1286 : tldy1
+ set_stat $ff
+ > load_flag $ff
+1286 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1288 : 48 > pha ;use stack to load status
+1289 : 28 > plp
+
+128a : b413 ldy zp1,x
+128c : 08 php ;test stores do not alter flags
+128d : 98 tya
+128e : 49c3 eor #$c3
+1290 : 28 plp
+1291 : 9d0302 sta abst,x
+1294 : 08 php ;flags after load/store sequence
+1295 : 49c3 eor #$c3
+1297 : dd1702 cmp abs1,x ;test result
+ trap_ne
+129a : f003 > beq skip0889
+ > trap ;failed not equal (non zero)
+129c : 205b44 > jsr report_error
+ >
+129f : >skip0889
+
+129f : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+12a0 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+12a2 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+12a5 : f003 > beq skip0892
+ > trap ;failed not equal (non zero)
+12a7 : 205b44 > jsr report_error
+ >
+12aa : >skip0892
+
+12aa : ca dex
+12ab : 10d9 bpl tldy1
+
+12ad : a203 ldx #3
+12af : tldy2
+ set_stat 0
+ > load_flag 0
+12af : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+12b1 : 48 > pha ;use stack to load status
+12b2 : 28 > plp
+
+12b3 : bc1702 ldy abs1,x
+12b6 : 08 php ;test stores do not alter flags
+12b7 : 98 tya
+12b8 : 49c3 eor #$c3
+12ba : a8 tay
+12bb : 28 plp
+12bc : 940c sty zpt,x
+12be : 08 php ;flags after load/store sequence
+12bf : 49c3 eor #$c3
+12c1 : d513 cmp zp1,x ;test result
+ trap_ne
+12c3 : f003 > beq skip0896
+ > trap ;failed not equal (non zero)
+12c5 : 205b44 > jsr report_error
+ >
+12c8 : >skip0896
+
+12c8 : 68 pla ;load status
+ eor_flag 0
+12c9 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+12cb : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+12ce : f003 > beq skip0899
+ > trap ;failed not equal (non zero)
+12d0 : 205b44 > jsr report_error
+ >
+12d3 : >skip0899
+
+12d3 : ca dex
+12d4 : 10d9 bpl tldy2
+
+12d6 : a203 ldx #3
+12d8 : tldy3
+ set_stat $ff
+ > load_flag $ff
+12d8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+12da : 48 > pha ;use stack to load status
+12db : 28 > plp
+
+12dc : bc1702 ldy abs1,x
+12df : 08 php ;test stores do not alter flags
+12e0 : 98 tya
+12e1 : 49c3 eor #$c3
+12e3 : a8 tay
+12e4 : 28 plp
+12e5 : 940c sty zpt,x
+12e7 : 08 php ;flags after load/store sequence
+12e8 : 49c3 eor #$c3
+12ea : d513 cmp zp1,x ;test result
+ trap_ne
+12ec : f003 > beq skip0903
+ > trap ;failed not equal (non zero)
+12ee : 205b44 > jsr report_error
+ >
+12f1 : >skip0903
+
+12f1 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+12f2 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+12f4 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+12f7 : f003 > beq skip0906
+ > trap ;failed not equal (non zero)
+12f9 : 205b44 > jsr report_error
+ >
+12fc : >skip0906
+
+12fc : ca dex
+12fd : 10d9 bpl tldy3
+
+12ff : a203 ldx #3 ;testing store result
+1301 : a000 ldy #0
+1303 : b50c tsty lda zpt,x
+1305 : 49c3 eor #$c3
+1307 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1309 : f003 > beq skip0908
+ > trap ;failed not equal (non zero)
+130b : 205b44 > jsr report_error
+ >
+130e : >skip0908
+
+130e : 940c sty zpt,x ;clear
+1310 : bd0302 lda abst,x
+1313 : 49c3 eor #$c3
+1315 : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+1318 : f003 > beq skip0910
+ > trap ;failed not equal (non zero)
+131a : 205b44 > jsr report_error
+ >
+131d : >skip0910
+
+131d : 8a txa
+131e : 9d0302 sta abst,x ;clear
+1321 : ca dex
+1322 : 10df bpl tsty
+ next_test
+1324 : ad0002 > lda test_case ;previous test
+1327 : c911 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1329 : f003 > beq skip0913
+ > trap ;failed not equal (non zero)
+132b : 205b44 > jsr report_error
+ >
+132e : >skip0913
+ >
+0012 = >test_num = test_num + 1
+132e : a912 > lda #test_num ;*** next tests' number
+1330 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+1333 : a2fd ldx #3+$fa
+1335 : b419 tldy4 ldy zp1-$fa&$ff,x ;wrap on indexed zp
+1337 : 98 tya
+1338 : 9d0901 sta abst-$fa,x ;no STX abs,x!
+133b : ca dex
+133c : e0fa cpx #$fa
+133e : b0f5 bcs tldy4
+1340 : a2fd ldx #3+$fa
+1342 : bc1d01 tldy5 ldy abs1-$fa,x ;no wrap on indexed abs
+1345 : 9412 sty zpt-$fa&$ff,x
+1347 : ca dex
+1348 : e0fa cpx #$fa
+134a : b0f6 bcs tldy5
+134c : a203 ldx #3 ;testing wraparound result
+134e : a000 ldy #0
+1350 : b50c tsty1 lda zpt,x
+1352 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1354 : f003 > beq skip0915
+ > trap ;failed not equal (non zero)
+1356 : 205b44 > jsr report_error
+ >
+1359 : >skip0915
+
+1359 : 940c sty zpt,x ;clear
+135b : bd0302 lda abst,x
+135e : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+1361 : f003 > beq skip0917
+ > trap ;failed not equal (non zero)
+1363 : 205b44 > jsr report_error
+ >
+1366 : >skip0917
+
+1366 : 8a txa
+1367 : 9d0302 sta abst,x ;clear
+136a : ca dex
+136b : 10e3 bpl tsty1
+ next_test
+136d : ad0002 > lda test_case ;previous test
+1370 : c912 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1372 : f003 > beq skip0920
+ > trap ;failed not equal (non zero)
+1374 : 205b44 > jsr report_error
+ >
+1377 : >skip0920
+ >
+0013 = >test_num = test_num + 1
+1377 : a913 > lda #test_num ;*** next tests' number
+1379 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDX / STX - zp / abs / #
+ set_stat 0
+ > load_flag 0
+137c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+137e : 48 > pha ;use stack to load status
+137f : 28 > plp
+
+1380 : a613 ldx zp1
+1382 : 08 php ;test stores do not alter flags
+1383 : 8a txa
+1384 : 49c3 eor #$c3
+1386 : aa tax
+1387 : 28 plp
+1388 : 8e0302 stx abst
+138b : 08 php ;flags after load/store sequence
+138c : 49c3 eor #$c3
+138e : aa tax
+138f : e0c3 cpx #$c3 ;test result
+ trap_ne
+1391 : f003 > beq skip0924
+ > trap ;failed not equal (non zero)
+1393 : 205b44 > jsr report_error
+ >
+1396 : >skip0924
+
+1396 : 68 pla ;load status
+ eor_flag 0
+1397 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1399 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+139c : f003 > beq skip0927
+ > trap ;failed not equal (non zero)
+139e : 205b44 > jsr report_error
+ >
+13a1 : >skip0927
+
+ set_stat 0
+ > load_flag 0
+13a1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+13a3 : 48 > pha ;use stack to load status
+13a4 : 28 > plp
+
+13a5 : a614 ldx zp1+1
+13a7 : 08 php ;test stores do not alter flags
+13a8 : 8a txa
+13a9 : 49c3 eor #$c3
+13ab : aa tax
+13ac : 28 plp
+13ad : 8e0402 stx abst+1
+13b0 : 08 php ;flags after load/store sequence
+13b1 : 49c3 eor #$c3
+13b3 : aa tax
+13b4 : e082 cpx #$82 ;test result
+ trap_ne
+13b6 : f003 > beq skip0931
+ > trap ;failed not equal (non zero)
+13b8 : 205b44 > jsr report_error
+ >
+13bb : >skip0931
+
+13bb : 68 pla ;load status
+ eor_flag 0
+13bc : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+13be : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+13c1 : f003 > beq skip0934
+ > trap ;failed not equal (non zero)
+13c3 : 205b44 > jsr report_error
+ >
+13c6 : >skip0934
+
+ set_stat 0
+ > load_flag 0
+13c6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+13c8 : 48 > pha ;use stack to load status
+13c9 : 28 > plp
+
+13ca : a615 ldx zp1+2
+13cc : 08 php ;test stores do not alter flags
+13cd : 8a txa
+13ce : 49c3 eor #$c3
+13d0 : aa tax
+13d1 : 28 plp
+13d2 : 8e0502 stx abst+2
+13d5 : 08 php ;flags after load/store sequence
+13d6 : 49c3 eor #$c3
+13d8 : aa tax
+13d9 : e041 cpx #$41 ;test result
+ trap_ne
+13db : f003 > beq skip0938
+ > trap ;failed not equal (non zero)
+13dd : 205b44 > jsr report_error
+ >
+13e0 : >skip0938
+
+13e0 : 68 pla ;load status
+ eor_flag 0
+13e1 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+13e3 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+13e6 : f003 > beq skip0941
+ > trap ;failed not equal (non zero)
+13e8 : 205b44 > jsr report_error
+ >
+13eb : >skip0941
+
+ set_stat 0
+ > load_flag 0
+13eb : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+13ed : 48 > pha ;use stack to load status
+13ee : 28 > plp
+
+13ef : a616 ldx zp1+3
+13f1 : 08 php ;test stores do not alter flags
+13f2 : 8a txa
+13f3 : 49c3 eor #$c3
+13f5 : aa tax
+13f6 : 28 plp
+13f7 : 8e0602 stx abst+3
+13fa : 08 php ;flags after load/store sequence
+13fb : 49c3 eor #$c3
+13fd : aa tax
+13fe : e000 cpx #0 ;test result
+ trap_ne
+1400 : f003 > beq skip0945
+ > trap ;failed not equal (non zero)
+1402 : 205b44 > jsr report_error
+ >
+1405 : >skip0945
+
+1405 : 68 pla ;load status
+ eor_flag 0
+1406 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1408 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+140b : f003 > beq skip0948
+ > trap ;failed not equal (non zero)
+140d : 205b44 > jsr report_error
+ >
+1410 : >skip0948
+
+
+ set_stat $ff
+ > load_flag $ff
+1410 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1412 : 48 > pha ;use stack to load status
+1413 : 28 > plp
+
+1414 : a613 ldx zp1
+1416 : 08 php ;test stores do not alter flags
+1417 : 8a txa
+1418 : 49c3 eor #$c3
+141a : aa tax
+141b : 28 plp
+141c : 8e0302 stx abst
+141f : 08 php ;flags after load/store sequence
+1420 : 49c3 eor #$c3
+1422 : aa tax
+1423 : e0c3 cpx #$c3 ;test result
+ trap_ne ;
+1425 : f003 > beq skip0952
+ > trap ;failed not equal (non zero)
+1427 : 205b44 > jsr report_error
+ >
+142a : >skip0952
+
+142a : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+142b : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+142d : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1430 : f003 > beq skip0955
+ > trap ;failed not equal (non zero)
+1432 : 205b44 > jsr report_error
+ >
+1435 : >skip0955
+
+ set_stat $ff
+ > load_flag $ff
+1435 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1437 : 48 > pha ;use stack to load status
+1438 : 28 > plp
+
+1439 : a614 ldx zp1+1
+143b : 08 php ;test stores do not alter flags
+143c : 8a txa
+143d : 49c3 eor #$c3
+143f : aa tax
+1440 : 28 plp
+1441 : 8e0402 stx abst+1
+1444 : 08 php ;flags after load/store sequence
+1445 : 49c3 eor #$c3
+1447 : aa tax
+1448 : e082 cpx #$82 ;test result
+ trap_ne
+144a : f003 > beq skip0959
+ > trap ;failed not equal (non zero)
+144c : 205b44 > jsr report_error
+ >
+144f : >skip0959
+
+144f : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1450 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1452 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1455 : f003 > beq skip0962
+ > trap ;failed not equal (non zero)
+1457 : 205b44 > jsr report_error
+ >
+145a : >skip0962
+
+ set_stat $ff
+ > load_flag $ff
+145a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+145c : 48 > pha ;use stack to load status
+145d : 28 > plp
+
+145e : a615 ldx zp1+2
+1460 : 08 php ;test stores do not alter flags
+1461 : 8a txa
+1462 : 49c3 eor #$c3
+1464 : aa tax
+1465 : 28 plp
+1466 : 8e0502 stx abst+2
+1469 : 08 php ;flags after load/store sequence
+146a : 49c3 eor #$c3
+146c : aa tax
+146d : e041 cpx #$41 ;test result
+ trap_ne ;
+146f : f003 > beq skip0966
+ > trap ;failed not equal (non zero)
+1471 : 205b44 > jsr report_error
+ >
+1474 : >skip0966
+
+1474 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1475 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1477 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+147a : f003 > beq skip0969
+ > trap ;failed not equal (non zero)
+147c : 205b44 > jsr report_error
+ >
+147f : >skip0969
+
+ set_stat $ff
+ > load_flag $ff
+147f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1481 : 48 > pha ;use stack to load status
+1482 : 28 > plp
+
+1483 : a616 ldx zp1+3
+1485 : 08 php ;test stores do not alter flags
+1486 : 8a txa
+1487 : 49c3 eor #$c3
+1489 : aa tax
+148a : 28 plp
+148b : 8e0602 stx abst+3
+148e : 08 php ;flags after load/store sequence
+148f : 49c3 eor #$c3
+1491 : aa tax
+1492 : e000 cpx #0 ;test result
+ trap_ne
+1494 : f003 > beq skip0973
+ > trap ;failed not equal (non zero)
+1496 : 205b44 > jsr report_error
+ >
+1499 : >skip0973
+
+1499 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+149a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+149c : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+149f : f003 > beq skip0976
+ > trap ;failed not equal (non zero)
+14a1 : 205b44 > jsr report_error
+ >
+14a4 : >skip0976
+
+
+ set_stat 0
+ > load_flag 0
+14a4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+14a6 : 48 > pha ;use stack to load status
+14a7 : 28 > plp
+
+14a8 : ae1702 ldx abs1
+14ab : 08 php ;test stores do not alter flags
+14ac : 8a txa
+14ad : 49c3 eor #$c3
+14af : aa tax
+14b0 : 28 plp
+14b1 : 860c stx zpt
+14b3 : 08 php ;flags after load/store sequence
+14b4 : 49c3 eor #$c3
+14b6 : c513 cmp zp1 ;test result
+ trap_ne
+14b8 : f003 > beq skip0980
+ > trap ;failed not equal (non zero)
+14ba : 205b44 > jsr report_error
+ >
+14bd : >skip0980
+
+14bd : 68 pla ;load status
+ eor_flag 0
+14be : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+14c0 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+14c3 : f003 > beq skip0983
+ > trap ;failed not equal (non zero)
+14c5 : 205b44 > jsr report_error
+ >
+14c8 : >skip0983
+
+ set_stat 0
+ > load_flag 0
+14c8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+14ca : 48 > pha ;use stack to load status
+14cb : 28 > plp
+
+14cc : ae1802 ldx abs1+1
+14cf : 08 php ;test stores do not alter flags
+14d0 : 8a txa
+14d1 : 49c3 eor #$c3
+14d3 : aa tax
+14d4 : 28 plp
+14d5 : 860d stx zpt+1
+14d7 : 08 php ;flags after load/store sequence
+14d8 : 49c3 eor #$c3
+14da : c514 cmp zp1+1 ;test result
+ trap_ne
+14dc : f003 > beq skip0987
+ > trap ;failed not equal (non zero)
+14de : 205b44 > jsr report_error
+ >
+14e1 : >skip0987
+
+14e1 : 68 pla ;load status
+ eor_flag 0
+14e2 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+14e4 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+14e7 : f003 > beq skip0990
+ > trap ;failed not equal (non zero)
+14e9 : 205b44 > jsr report_error
+ >
+14ec : >skip0990
+
+ set_stat 0
+ > load_flag 0
+14ec : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+14ee : 48 > pha ;use stack to load status
+14ef : 28 > plp
+
+14f0 : ae1902 ldx abs1+2
+14f3 : 08 php ;test stores do not alter flags
+14f4 : 8a txa
+14f5 : 49c3 eor #$c3
+14f7 : aa tax
+14f8 : 28 plp
+14f9 : 860e stx zpt+2
+14fb : 08 php ;flags after load/store sequence
+14fc : 49c3 eor #$c3
+14fe : c515 cmp zp1+2 ;test result
+ trap_ne
+1500 : f003 > beq skip0994
+ > trap ;failed not equal (non zero)
+1502 : 205b44 > jsr report_error
+ >
+1505 : >skip0994
+
+1505 : 68 pla ;load status
+ eor_flag 0
+1506 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1508 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+150b : f003 > beq skip0997
+ > trap ;failed not equal (non zero)
+150d : 205b44 > jsr report_error
+ >
+1510 : >skip0997
+
+ set_stat 0
+ > load_flag 0
+1510 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1512 : 48 > pha ;use stack to load status
+1513 : 28 > plp
+
+1514 : ae1a02 ldx abs1+3
+1517 : 08 php ;test stores do not alter flags
+1518 : 8a txa
+1519 : 49c3 eor #$c3
+151b : aa tax
+151c : 28 plp
+151d : 860f stx zpt+3
+151f : 08 php ;flags after load/store sequence
+1520 : 49c3 eor #$c3
+1522 : c516 cmp zp1+3 ;test result
+ trap_ne
+1524 : f003 > beq skip1001
+ > trap ;failed not equal (non zero)
+1526 : 205b44 > jsr report_error
+ >
+1529 : >skip1001
+
+1529 : 68 pla ;load status
+ eor_flag 0
+152a : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+152c : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+152f : f003 > beq skip1004
+ > trap ;failed not equal (non zero)
+1531 : 205b44 > jsr report_error
+ >
+1534 : >skip1004
+
+
+ set_stat $ff
+ > load_flag $ff
+1534 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1536 : 48 > pha ;use stack to load status
+1537 : 28 > plp
+
+1538 : ae1702 ldx abs1
+153b : 08 php ;test stores do not alter flags
+153c : 8a txa
+153d : 49c3 eor #$c3
+153f : aa tax
+1540 : 28 plp
+1541 : 860c stx zpt
+1543 : 08 php ;flags after load/store sequence
+1544 : 49c3 eor #$c3
+1546 : aa tax
+1547 : e413 cpx zp1 ;test result
+ trap_ne
+1549 : f003 > beq skip1008
+ > trap ;failed not equal (non zero)
+154b : 205b44 > jsr report_error
+ >
+154e : >skip1008
+
+154e : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+154f : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1551 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1554 : f003 > beq skip1011
+ > trap ;failed not equal (non zero)
+1556 : 205b44 > jsr report_error
+ >
+1559 : >skip1011
+
+ set_stat $ff
+ > load_flag $ff
+1559 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+155b : 48 > pha ;use stack to load status
+155c : 28 > plp
+
+155d : ae1802 ldx abs1+1
+1560 : 08 php ;test stores do not alter flags
+1561 : 8a txa
+1562 : 49c3 eor #$c3
+1564 : aa tax
+1565 : 28 plp
+1566 : 860d stx zpt+1
+1568 : 08 php ;flags after load/store sequence
+1569 : 49c3 eor #$c3
+156b : aa tax
+156c : e414 cpx zp1+1 ;test result
+ trap_ne
+156e : f003 > beq skip1015
+ > trap ;failed not equal (non zero)
+1570 : 205b44 > jsr report_error
+ >
+1573 : >skip1015
+
+1573 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1574 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1576 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1579 : f003 > beq skip1018
+ > trap ;failed not equal (non zero)
+157b : 205b44 > jsr report_error
+ >
+157e : >skip1018
+
+ set_stat $ff
+ > load_flag $ff
+157e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1580 : 48 > pha ;use stack to load status
+1581 : 28 > plp
+
+1582 : ae1902 ldx abs1+2
+1585 : 08 php ;test stores do not alter flags
+1586 : 8a txa
+1587 : 49c3 eor #$c3
+1589 : aa tax
+158a : 28 plp
+158b : 860e stx zpt+2
+158d : 08 php ;flags after load/store sequence
+158e : 49c3 eor #$c3
+1590 : aa tax
+1591 : e415 cpx zp1+2 ;test result
+ trap_ne
+1593 : f003 > beq skip1022
+ > trap ;failed not equal (non zero)
+1595 : 205b44 > jsr report_error
+ >
+1598 : >skip1022
+
+1598 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1599 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+159b : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+159e : f003 > beq skip1025
+ > trap ;failed not equal (non zero)
+15a0 : 205b44 > jsr report_error
+ >
+15a3 : >skip1025
+
+ set_stat $ff
+ > load_flag $ff
+15a3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+15a5 : 48 > pha ;use stack to load status
+15a6 : 28 > plp
+
+15a7 : ae1a02 ldx abs1+3
+15aa : 08 php ;test stores do not alter flags
+15ab : 8a txa
+15ac : 49c3 eor #$c3
+15ae : aa tax
+15af : 28 plp
+15b0 : 860f stx zpt+3
+15b2 : 08 php ;flags after load/store sequence
+15b3 : 49c3 eor #$c3
+15b5 : aa tax
+15b6 : e416 cpx zp1+3 ;test result
+ trap_ne
+15b8 : f003 > beq skip1029
+ > trap ;failed not equal (non zero)
+15ba : 205b44 > jsr report_error
+ >
+15bd : >skip1029
+
+15bd : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+15be : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+15c0 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+15c3 : f003 > beq skip1032
+ > trap ;failed not equal (non zero)
+15c5 : 205b44 > jsr report_error
+ >
+15c8 : >skip1032
+
+
+ set_stat 0
+ > load_flag 0
+15c8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+15ca : 48 > pha ;use stack to load status
+15cb : 28 > plp
+
+15cc : a2c3 ldx #$c3
+15ce : 08 php
+15cf : ec1702 cpx abs1 ;test result
+ trap_ne
+15d2 : f003 > beq skip1036
+ > trap ;failed not equal (non zero)
+15d4 : 205b44 > jsr report_error
+ >
+15d7 : >skip1036
+
+15d7 : 68 pla ;load status
+ eor_flag 0
+15d8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+15da : cd1c02 cmp fLDx ;test flags
+ trap_ne
+15dd : f003 > beq skip1039
+ > trap ;failed not equal (non zero)
+15df : 205b44 > jsr report_error
+ >
+15e2 : >skip1039
+
+ set_stat 0
+ > load_flag 0
+15e2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+15e4 : 48 > pha ;use stack to load status
+15e5 : 28 > plp
+
+15e6 : a282 ldx #$82
+15e8 : 08 php
+15e9 : ec1802 cpx abs1+1 ;test result
+ trap_ne
+15ec : f003 > beq skip1043
+ > trap ;failed not equal (non zero)
+15ee : 205b44 > jsr report_error
+ >
+15f1 : >skip1043
+
+15f1 : 68 pla ;load status
+ eor_flag 0
+15f2 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+15f4 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+15f7 : f003 > beq skip1046
+ > trap ;failed not equal (non zero)
+15f9 : 205b44 > jsr report_error
+ >
+15fc : >skip1046
+
+ set_stat 0
+ > load_flag 0
+15fc : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+15fe : 48 > pha ;use stack to load status
+15ff : 28 > plp
+
+1600 : a241 ldx #$41
+1602 : 08 php
+1603 : ec1902 cpx abs1+2 ;test result
+ trap_ne
+1606 : f003 > beq skip1050
+ > trap ;failed not equal (non zero)
+1608 : 205b44 > jsr report_error
+ >
+160b : >skip1050
+
+160b : 68 pla ;load status
+ eor_flag 0
+160c : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+160e : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1611 : f003 > beq skip1053
+ > trap ;failed not equal (non zero)
+1613 : 205b44 > jsr report_error
+ >
+1616 : >skip1053
+
+ set_stat 0
+ > load_flag 0
+1616 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1618 : 48 > pha ;use stack to load status
+1619 : 28 > plp
+
+161a : a200 ldx #0
+161c : 08 php
+161d : ec1a02 cpx abs1+3 ;test result
+ trap_ne
+1620 : f003 > beq skip1057
+ > trap ;failed not equal (non zero)
+1622 : 205b44 > jsr report_error
+ >
+1625 : >skip1057
+
+1625 : 68 pla ;load status
+ eor_flag 0
+1626 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1628 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+162b : f003 > beq skip1060
+ > trap ;failed not equal (non zero)
+162d : 205b44 > jsr report_error
+ >
+1630 : >skip1060
+
+
+ set_stat $ff
+ > load_flag $ff
+1630 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1632 : 48 > pha ;use stack to load status
+1633 : 28 > plp
+
+1634 : a2c3 ldx #$c3
+1636 : 08 php
+1637 : ec1702 cpx abs1 ;test result
+ trap_ne
+163a : f003 > beq skip1064
+ > trap ;failed not equal (non zero)
+163c : 205b44 > jsr report_error
+ >
+163f : >skip1064
+
+163f : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1640 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1642 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1645 : f003 > beq skip1067
+ > trap ;failed not equal (non zero)
+1647 : 205b44 > jsr report_error
+ >
+164a : >skip1067
+
+ set_stat $ff
+ > load_flag $ff
+164a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+164c : 48 > pha ;use stack to load status
+164d : 28 > plp
+
+164e : a282 ldx #$82
+1650 : 08 php
+1651 : ec1802 cpx abs1+1 ;test result
+ trap_ne
+1654 : f003 > beq skip1071
+ > trap ;failed not equal (non zero)
+1656 : 205b44 > jsr report_error
+ >
+1659 : >skip1071
+
+1659 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+165a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+165c : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+165f : f003 > beq skip1074
+ > trap ;failed not equal (non zero)
+1661 : 205b44 > jsr report_error
+ >
+1664 : >skip1074
+
+ set_stat $ff
+ > load_flag $ff
+1664 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1666 : 48 > pha ;use stack to load status
+1667 : 28 > plp
+
+1668 : a241 ldx #$41
+166a : 08 php
+166b : ec1902 cpx abs1+2 ;test result
+ trap_ne
+166e : f003 > beq skip1078
+ > trap ;failed not equal (non zero)
+1670 : 205b44 > jsr report_error
+ >
+1673 : >skip1078
+
+1673 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1674 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1676 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1679 : f003 > beq skip1081
+ > trap ;failed not equal (non zero)
+167b : 205b44 > jsr report_error
+ >
+167e : >skip1081
+
+ set_stat $ff
+ > load_flag $ff
+167e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1680 : 48 > pha ;use stack to load status
+1681 : 28 > plp
+
+1682 : a200 ldx #0
+1684 : 08 php
+1685 : ec1a02 cpx abs1+3 ;test result
+ trap_ne
+1688 : f003 > beq skip1085
+ > trap ;failed not equal (non zero)
+168a : 205b44 > jsr report_error
+ >
+168d : >skip1085
+
+168d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+168e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1690 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1693 : f003 > beq skip1088
+ > trap ;failed not equal (non zero)
+1695 : 205b44 > jsr report_error
+ >
+1698 : >skip1088
+
+
+1698 : a200 ldx #0
+169a : a50c lda zpt
+169c : 49c3 eor #$c3
+169e : c513 cmp zp1
+ trap_ne ;store to zp data
+16a0 : f003 > beq skip1090
+ > trap ;failed not equal (non zero)
+16a2 : 205b44 > jsr report_error
+ >
+16a5 : >skip1090
+
+16a5 : 860c stx zpt ;clear
+16a7 : ad0302 lda abst
+16aa : 49c3 eor #$c3
+16ac : cd1702 cmp abs1
+ trap_ne ;store to abs data
+16af : f003 > beq skip1092
+ > trap ;failed not equal (non zero)
+16b1 : 205b44 > jsr report_error
+ >
+16b4 : >skip1092
+
+16b4 : 8e0302 stx abst ;clear
+16b7 : a50d lda zpt+1
+16b9 : 49c3 eor #$c3
+16bb : c514 cmp zp1+1
+ trap_ne ;store to zp data
+16bd : f003 > beq skip1094
+ > trap ;failed not equal (non zero)
+16bf : 205b44 > jsr report_error
+ >
+16c2 : >skip1094
+
+16c2 : 860d stx zpt+1 ;clear
+16c4 : ad0402 lda abst+1
+16c7 : 49c3 eor #$c3
+16c9 : cd1802 cmp abs1+1
+ trap_ne ;store to abs data
+16cc : f003 > beq skip1096
+ > trap ;failed not equal (non zero)
+16ce : 205b44 > jsr report_error
+ >
+16d1 : >skip1096
+
+16d1 : 8e0402 stx abst+1 ;clear
+16d4 : a50e lda zpt+2
+16d6 : 49c3 eor #$c3
+16d8 : c515 cmp zp1+2
+ trap_ne ;store to zp data
+16da : f003 > beq skip1098
+ > trap ;failed not equal (non zero)
+16dc : 205b44 > jsr report_error
+ >
+16df : >skip1098
+
+16df : 860e stx zpt+2 ;clear
+16e1 : ad0502 lda abst+2
+16e4 : 49c3 eor #$c3
+16e6 : cd1902 cmp abs1+2
+ trap_ne ;store to abs data
+16e9 : f003 > beq skip1100
+ > trap ;failed not equal (non zero)
+16eb : 205b44 > jsr report_error
+ >
+16ee : >skip1100
+
+16ee : 8e0502 stx abst+2 ;clear
+16f1 : a50f lda zpt+3
+16f3 : 49c3 eor #$c3
+16f5 : c516 cmp zp1+3
+ trap_ne ;store to zp data
+16f7 : f003 > beq skip1102
+ > trap ;failed not equal (non zero)
+16f9 : 205b44 > jsr report_error
+ >
+16fc : >skip1102
+
+16fc : 860f stx zpt+3 ;clear
+16fe : ad0602 lda abst+3
+1701 : 49c3 eor #$c3
+1703 : cd1a02 cmp abs1+3
+ trap_ne ;store to abs data
+1706 : f003 > beq skip1104
+ > trap ;failed not equal (non zero)
+1708 : 205b44 > jsr report_error
+ >
+170b : >skip1104
+
+170b : 8e0602 stx abst+3 ;clear
+ next_test
+170e : ad0002 > lda test_case ;previous test
+1711 : c913 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1713 : f003 > beq skip1107
+ > trap ;failed not equal (non zero)
+1715 : 205b44 > jsr report_error
+ >
+1718 : >skip1107
+ >
+0014 = >test_num = test_num + 1
+1718 : a914 > lda #test_num ;*** next tests' number
+171a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDY / STY - zp / abs / #
+ set_stat 0
+ > load_flag 0
+171d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+171f : 48 > pha ;use stack to load status
+1720 : 28 > plp
+
+1721 : a413 ldy zp1
+1723 : 08 php ;test stores do not alter flags
+1724 : 98 tya
+1725 : 49c3 eor #$c3
+1727 : a8 tay
+1728 : 28 plp
+1729 : 8c0302 sty abst
+172c : 08 php ;flags after load/store sequence
+172d : 49c3 eor #$c3
+172f : a8 tay
+1730 : c0c3 cpy #$c3 ;test result
+ trap_ne
+1732 : f003 > beq skip1111
+ > trap ;failed not equal (non zero)
+1734 : 205b44 > jsr report_error
+ >
+1737 : >skip1111
+
+1737 : 68 pla ;load status
+ eor_flag 0
+1738 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+173a : cd1c02 cmp fLDx ;test flags
+ trap_ne
+173d : f003 > beq skip1114
+ > trap ;failed not equal (non zero)
+173f : 205b44 > jsr report_error
+ >
+1742 : >skip1114
+
+ set_stat 0
+ > load_flag 0
+1742 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1744 : 48 > pha ;use stack to load status
+1745 : 28 > plp
+
+1746 : a414 ldy zp1+1
+1748 : 08 php ;test stores do not alter flags
+1749 : 98 tya
+174a : 49c3 eor #$c3
+174c : a8 tay
+174d : 28 plp
+174e : 8c0402 sty abst+1
+1751 : 08 php ;flags after load/store sequence
+1752 : 49c3 eor #$c3
+1754 : a8 tay
+1755 : c082 cpy #$82 ;test result
+ trap_ne
+1757 : f003 > beq skip1118
+ > trap ;failed not equal (non zero)
+1759 : 205b44 > jsr report_error
+ >
+175c : >skip1118
+
+175c : 68 pla ;load status
+ eor_flag 0
+175d : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+175f : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1762 : f003 > beq skip1121
+ > trap ;failed not equal (non zero)
+1764 : 205b44 > jsr report_error
+ >
+1767 : >skip1121
+
+ set_stat 0
+ > load_flag 0
+1767 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1769 : 48 > pha ;use stack to load status
+176a : 28 > plp
+
+176b : a415 ldy zp1+2
+176d : 08 php ;test stores do not alter flags
+176e : 98 tya
+176f : 49c3 eor #$c3
+1771 : a8 tay
+1772 : 28 plp
+1773 : 8c0502 sty abst+2
+1776 : 08 php ;flags after load/store sequence
+1777 : 49c3 eor #$c3
+1779 : a8 tay
+177a : c041 cpy #$41 ;test result
+ trap_ne
+177c : f003 > beq skip1125
+ > trap ;failed not equal (non zero)
+177e : 205b44 > jsr report_error
+ >
+1781 : >skip1125
+
+1781 : 68 pla ;load status
+ eor_flag 0
+1782 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1784 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1787 : f003 > beq skip1128
+ > trap ;failed not equal (non zero)
+1789 : 205b44 > jsr report_error
+ >
+178c : >skip1128
+
+ set_stat 0
+ > load_flag 0
+178c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+178e : 48 > pha ;use stack to load status
+178f : 28 > plp
+
+1790 : a416 ldy zp1+3
+1792 : 08 php ;test stores do not alter flags
+1793 : 98 tya
+1794 : 49c3 eor #$c3
+1796 : a8 tay
+1797 : 28 plp
+1798 : 8c0602 sty abst+3
+179b : 08 php ;flags after load/store sequence
+179c : 49c3 eor #$c3
+179e : a8 tay
+179f : c000 cpy #0 ;test result
+ trap_ne
+17a1 : f003 > beq skip1132
+ > trap ;failed not equal (non zero)
+17a3 : 205b44 > jsr report_error
+ >
+17a6 : >skip1132
+
+17a6 : 68 pla ;load status
+ eor_flag 0
+17a7 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+17a9 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+17ac : f003 > beq skip1135
+ > trap ;failed not equal (non zero)
+17ae : 205b44 > jsr report_error
+ >
+17b1 : >skip1135
+
+
+ set_stat $ff
+ > load_flag $ff
+17b1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+17b3 : 48 > pha ;use stack to load status
+17b4 : 28 > plp
+
+17b5 : a413 ldy zp1
+17b7 : 08 php ;test stores do not alter flags
+17b8 : 98 tya
+17b9 : 49c3 eor #$c3
+17bb : a8 tay
+17bc : 28 plp
+17bd : 8c0302 sty abst
+17c0 : 08 php ;flags after load/store sequence
+17c1 : 49c3 eor #$c3
+17c3 : a8 tay
+17c4 : c0c3 cpy #$c3 ;test result
+ trap_ne
+17c6 : f003 > beq skip1139
+ > trap ;failed not equal (non zero)
+17c8 : 205b44 > jsr report_error
+ >
+17cb : >skip1139
+
+17cb : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+17cc : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+17ce : cd1c02 cmp fLDx ;test flags
+ trap_ne
+17d1 : f003 > beq skip1142
+ > trap ;failed not equal (non zero)
+17d3 : 205b44 > jsr report_error
+ >
+17d6 : >skip1142
+
+ set_stat $ff
+ > load_flag $ff
+17d6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+17d8 : 48 > pha ;use stack to load status
+17d9 : 28 > plp
+
+17da : a414 ldy zp1+1
+17dc : 08 php ;test stores do not alter flags
+17dd : 98 tya
+17de : 49c3 eor #$c3
+17e0 : a8 tay
+17e1 : 28 plp
+17e2 : 8c0402 sty abst+1
+17e5 : 08 php ;flags after load/store sequence
+17e6 : 49c3 eor #$c3
+17e8 : a8 tay
+17e9 : c082 cpy #$82 ;test result
+ trap_ne
+17eb : f003 > beq skip1146
+ > trap ;failed not equal (non zero)
+17ed : 205b44 > jsr report_error
+ >
+17f0 : >skip1146
+
+17f0 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+17f1 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+17f3 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+17f6 : f003 > beq skip1149
+ > trap ;failed not equal (non zero)
+17f8 : 205b44 > jsr report_error
+ >
+17fb : >skip1149
+
+ set_stat $ff
+ > load_flag $ff
+17fb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+17fd : 48 > pha ;use stack to load status
+17fe : 28 > plp
+
+17ff : a415 ldy zp1+2
+1801 : 08 php ;test stores do not alter flags
+1802 : 98 tya
+1803 : 49c3 eor #$c3
+1805 : a8 tay
+1806 : 28 plp
+1807 : 8c0502 sty abst+2
+180a : 08 php ;flags after load/store sequence
+180b : 49c3 eor #$c3
+180d : a8 tay
+180e : c041 cpy #$41 ;test result
+ trap_ne
+1810 : f003 > beq skip1153
+ > trap ;failed not equal (non zero)
+1812 : 205b44 > jsr report_error
+ >
+1815 : >skip1153
+
+1815 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1816 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1818 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+181b : f003 > beq skip1156
+ > trap ;failed not equal (non zero)
+181d : 205b44 > jsr report_error
+ >
+1820 : >skip1156
+
+ set_stat $ff
+ > load_flag $ff
+1820 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1822 : 48 > pha ;use stack to load status
+1823 : 28 > plp
+
+1824 : a416 ldy zp1+3
+1826 : 08 php ;test stores do not alter flags
+1827 : 98 tya
+1828 : 49c3 eor #$c3
+182a : a8 tay
+182b : 28 plp
+182c : 8c0602 sty abst+3
+182f : 08 php ;flags after load/store sequence
+1830 : 49c3 eor #$c3
+1832 : a8 tay
+1833 : c000 cpy #0 ;test result
+ trap_ne
+1835 : f003 > beq skip1160
+ > trap ;failed not equal (non zero)
+1837 : 205b44 > jsr report_error
+ >
+183a : >skip1160
+
+183a : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+183b : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+183d : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1840 : f003 > beq skip1163
+ > trap ;failed not equal (non zero)
+1842 : 205b44 > jsr report_error
+ >
+1845 : >skip1163
+
+
+ set_stat 0
+ > load_flag 0
+1845 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1847 : 48 > pha ;use stack to load status
+1848 : 28 > plp
+
+1849 : ac1702 ldy abs1
+184c : 08 php ;test stores do not alter flags
+184d : 98 tya
+184e : 49c3 eor #$c3
+1850 : a8 tay
+1851 : 28 plp
+1852 : 840c sty zpt
+1854 : 08 php ;flags after load/store sequence
+1855 : 49c3 eor #$c3
+1857 : a8 tay
+1858 : c413 cpy zp1 ;test result
+ trap_ne
+185a : f003 > beq skip1167
+ > trap ;failed not equal (non zero)
+185c : 205b44 > jsr report_error
+ >
+185f : >skip1167
+
+185f : 68 pla ;load status
+ eor_flag 0
+1860 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1862 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1865 : f003 > beq skip1170
+ > trap ;failed not equal (non zero)
+1867 : 205b44 > jsr report_error
+ >
+186a : >skip1170
+
+ set_stat 0
+ > load_flag 0
+186a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+186c : 48 > pha ;use stack to load status
+186d : 28 > plp
+
+186e : ac1802 ldy abs1+1
+1871 : 08 php ;test stores do not alter flags
+1872 : 98 tya
+1873 : 49c3 eor #$c3
+1875 : a8 tay
+1876 : 28 plp
+1877 : 840d sty zpt+1
+1879 : 08 php ;flags after load/store sequence
+187a : 49c3 eor #$c3
+187c : a8 tay
+187d : c414 cpy zp1+1 ;test result
+ trap_ne
+187f : f003 > beq skip1174
+ > trap ;failed not equal (non zero)
+1881 : 205b44 > jsr report_error
+ >
+1884 : >skip1174
+
+1884 : 68 pla ;load status
+ eor_flag 0
+1885 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1887 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+188a : f003 > beq skip1177
+ > trap ;failed not equal (non zero)
+188c : 205b44 > jsr report_error
+ >
+188f : >skip1177
+
+ set_stat 0
+ > load_flag 0
+188f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1891 : 48 > pha ;use stack to load status
+1892 : 28 > plp
+
+1893 : ac1902 ldy abs1+2
+1896 : 08 php ;test stores do not alter flags
+1897 : 98 tya
+1898 : 49c3 eor #$c3
+189a : a8 tay
+189b : 28 plp
+189c : 840e sty zpt+2
+189e : 08 php ;flags after load/store sequence
+189f : 49c3 eor #$c3
+18a1 : a8 tay
+18a2 : c415 cpy zp1+2 ;test result
+ trap_ne
+18a4 : f003 > beq skip1181
+ > trap ;failed not equal (non zero)
+18a6 : 205b44 > jsr report_error
+ >
+18a9 : >skip1181
+
+18a9 : 68 pla ;load status
+ eor_flag 0
+18aa : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+18ac : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+18af : f003 > beq skip1184
+ > trap ;failed not equal (non zero)
+18b1 : 205b44 > jsr report_error
+ >
+18b4 : >skip1184
+
+ set_stat 0
+ > load_flag 0
+18b4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+18b6 : 48 > pha ;use stack to load status
+18b7 : 28 > plp
+
+18b8 : ac1a02 ldy abs1+3
+18bb : 08 php ;test stores do not alter flags
+18bc : 98 tya
+18bd : 49c3 eor #$c3
+18bf : a8 tay
+18c0 : 28 plp
+18c1 : 840f sty zpt+3
+18c3 : 08 php ;flags after load/store sequence
+18c4 : 49c3 eor #$c3
+18c6 : a8 tay
+18c7 : c416 cpy zp1+3 ;test result
+ trap_ne
+18c9 : f003 > beq skip1188
+ > trap ;failed not equal (non zero)
+18cb : 205b44 > jsr report_error
+ >
+18ce : >skip1188
+
+18ce : 68 pla ;load status
+ eor_flag 0
+18cf : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+18d1 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+18d4 : f003 > beq skip1191
+ > trap ;failed not equal (non zero)
+18d6 : 205b44 > jsr report_error
+ >
+18d9 : >skip1191
+
+
+ set_stat $ff
+ > load_flag $ff
+18d9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+18db : 48 > pha ;use stack to load status
+18dc : 28 > plp
+
+18dd : ac1702 ldy abs1
+18e0 : 08 php ;test stores do not alter flags
+18e1 : 98 tya
+18e2 : 49c3 eor #$c3
+18e4 : a8 tay
+18e5 : 28 plp
+18e6 : 840c sty zpt
+18e8 : 08 php ;flags after load/store sequence
+18e9 : 49c3 eor #$c3
+18eb : a8 tay
+18ec : c513 cmp zp1 ;test result
+ trap_ne
+18ee : f003 > beq skip1195
+ > trap ;failed not equal (non zero)
+18f0 : 205b44 > jsr report_error
+ >
+18f3 : >skip1195
+
+18f3 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+18f4 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+18f6 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+18f9 : f003 > beq skip1198
+ > trap ;failed not equal (non zero)
+18fb : 205b44 > jsr report_error
+ >
+18fe : >skip1198
+
+ set_stat $ff
+ > load_flag $ff
+18fe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1900 : 48 > pha ;use stack to load status
+1901 : 28 > plp
+
+1902 : ac1802 ldy abs1+1
+1905 : 08 php ;test stores do not alter flags
+1906 : 98 tya
+1907 : 49c3 eor #$c3
+1909 : a8 tay
+190a : 28 plp
+190b : 840d sty zpt+1
+190d : 08 php ;flags after load/store sequence
+190e : 49c3 eor #$c3
+1910 : a8 tay
+1911 : c514 cmp zp1+1 ;test result
+ trap_ne
+1913 : f003 > beq skip1202
+ > trap ;failed not equal (non zero)
+1915 : 205b44 > jsr report_error
+ >
+1918 : >skip1202
+
+1918 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1919 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+191b : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+191e : f003 > beq skip1205
+ > trap ;failed not equal (non zero)
+1920 : 205b44 > jsr report_error
+ >
+1923 : >skip1205
+
+ set_stat $ff
+ > load_flag $ff
+1923 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1925 : 48 > pha ;use stack to load status
+1926 : 28 > plp
+
+1927 : ac1902 ldy abs1+2
+192a : 08 php ;test stores do not alter flags
+192b : 98 tya
+192c : 49c3 eor #$c3
+192e : a8 tay
+192f : 28 plp
+1930 : 840e sty zpt+2
+1932 : 08 php ;flags after load/store sequence
+1933 : 49c3 eor #$c3
+1935 : a8 tay
+1936 : c515 cmp zp1+2 ;test result
+ trap_ne
+1938 : f003 > beq skip1209
+ > trap ;failed not equal (non zero)
+193a : 205b44 > jsr report_error
+ >
+193d : >skip1209
+
+193d : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+193e : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1940 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1943 : f003 > beq skip1212
+ > trap ;failed not equal (non zero)
+1945 : 205b44 > jsr report_error
+ >
+1948 : >skip1212
+
+ set_stat $ff
+ > load_flag $ff
+1948 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+194a : 48 > pha ;use stack to load status
+194b : 28 > plp
+
+194c : ac1a02 ldy abs1+3
+194f : 08 php ;test stores do not alter flags
+1950 : 98 tya
+1951 : 49c3 eor #$c3
+1953 : a8 tay
+1954 : 28 plp
+1955 : 840f sty zpt+3
+1957 : 08 php ;flags after load/store sequence
+1958 : 49c3 eor #$c3
+195a : a8 tay
+195b : c516 cmp zp1+3 ;test result
+ trap_ne
+195d : f003 > beq skip1216
+ > trap ;failed not equal (non zero)
+195f : 205b44 > jsr report_error
+ >
+1962 : >skip1216
+
+1962 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1963 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1965 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1968 : f003 > beq skip1219
+ > trap ;failed not equal (non zero)
+196a : 205b44 > jsr report_error
+ >
+196d : >skip1219
+
+
+
+ set_stat 0
+ > load_flag 0
+196d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+196f : 48 > pha ;use stack to load status
+1970 : 28 > plp
+
+1971 : a0c3 ldy #$c3
+1973 : 08 php
+1974 : cc1702 cpy abs1 ;test result
+ trap_ne
+1977 : f003 > beq skip1223
+ > trap ;failed not equal (non zero)
+1979 : 205b44 > jsr report_error
+ >
+197c : >skip1223
+
+197c : 68 pla ;load status
+ eor_flag 0
+197d : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+197f : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1982 : f003 > beq skip1226
+ > trap ;failed not equal (non zero)
+1984 : 205b44 > jsr report_error
+ >
+1987 : >skip1226
+
+ set_stat 0
+ > load_flag 0
+1987 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1989 : 48 > pha ;use stack to load status
+198a : 28 > plp
+
+198b : a082 ldy #$82
+198d : 08 php
+198e : cc1802 cpy abs1+1 ;test result
+ trap_ne
+1991 : f003 > beq skip1230
+ > trap ;failed not equal (non zero)
+1993 : 205b44 > jsr report_error
+ >
+1996 : >skip1230
+
+1996 : 68 pla ;load status
+ eor_flag 0
+1997 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1999 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+199c : f003 > beq skip1233
+ > trap ;failed not equal (non zero)
+199e : 205b44 > jsr report_error
+ >
+19a1 : >skip1233
+
+ set_stat 0
+ > load_flag 0
+19a1 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19a3 : 48 > pha ;use stack to load status
+19a4 : 28 > plp
+
+19a5 : a041 ldy #$41
+19a7 : 08 php
+19a8 : cc1902 cpy abs1+2 ;test result
+ trap_ne
+19ab : f003 > beq skip1237
+ > trap ;failed not equal (non zero)
+19ad : 205b44 > jsr report_error
+ >
+19b0 : >skip1237
+
+19b0 : 68 pla ;load status
+ eor_flag 0
+19b1 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+19b3 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+19b6 : f003 > beq skip1240
+ > trap ;failed not equal (non zero)
+19b8 : 205b44 > jsr report_error
+ >
+19bb : >skip1240
+
+ set_stat 0
+ > load_flag 0
+19bb : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19bd : 48 > pha ;use stack to load status
+19be : 28 > plp
+
+19bf : a000 ldy #0
+19c1 : 08 php
+19c2 : cc1a02 cpy abs1+3 ;test result
+ trap_ne
+19c5 : f003 > beq skip1244
+ > trap ;failed not equal (non zero)
+19c7 : 205b44 > jsr report_error
+ >
+19ca : >skip1244
+
+19ca : 68 pla ;load status
+ eor_flag 0
+19cb : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+19cd : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+19d0 : f003 > beq skip1247
+ > trap ;failed not equal (non zero)
+19d2 : 205b44 > jsr report_error
+ >
+19d5 : >skip1247
+
+
+ set_stat $ff
+ > load_flag $ff
+19d5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+19d7 : 48 > pha ;use stack to load status
+19d8 : 28 > plp
+
+19d9 : a0c3 ldy #$c3
+19db : 08 php
+19dc : cc1702 cpy abs1 ;test result
+ trap_ne
+19df : f003 > beq skip1251
+ > trap ;failed not equal (non zero)
+19e1 : 205b44 > jsr report_error
+ >
+19e4 : >skip1251
+
+19e4 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+19e5 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+19e7 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+19ea : f003 > beq skip1254
+ > trap ;failed not equal (non zero)
+19ec : 205b44 > jsr report_error
+ >
+19ef : >skip1254
+
+ set_stat $ff
+ > load_flag $ff
+19ef : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+19f1 : 48 > pha ;use stack to load status
+19f2 : 28 > plp
+
+19f3 : a082 ldy #$82
+19f5 : 08 php
+19f6 : cc1802 cpy abs1+1 ;test result
+ trap_ne
+19f9 : f003 > beq skip1258
+ > trap ;failed not equal (non zero)
+19fb : 205b44 > jsr report_error
+ >
+19fe : >skip1258
+
+19fe : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+19ff : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a01 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1a04 : f003 > beq skip1261
+ > trap ;failed not equal (non zero)
+1a06 : 205b44 > jsr report_error
+ >
+1a09 : >skip1261
+
+ set_stat $ff
+ > load_flag $ff
+1a09 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a0b : 48 > pha ;use stack to load status
+1a0c : 28 > plp
+
+1a0d : a041 ldy #$41
+1a0f : 08 php
+1a10 : cc1902 cpy abs1+2 ;test result
+ trap_ne
+1a13 : f003 > beq skip1265
+ > trap ;failed not equal (non zero)
+1a15 : 205b44 > jsr report_error
+ >
+1a18 : >skip1265
+
+1a18 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a19 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a1b : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1a1e : f003 > beq skip1268
+ > trap ;failed not equal (non zero)
+1a20 : 205b44 > jsr report_error
+ >
+1a23 : >skip1268
+
+ set_stat $ff
+ > load_flag $ff
+1a23 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a25 : 48 > pha ;use stack to load status
+1a26 : 28 > plp
+
+1a27 : a000 ldy #0
+1a29 : 08 php
+1a2a : cc1a02 cpy abs1+3 ;test result
+ trap_ne
+1a2d : f003 > beq skip1272
+ > trap ;failed not equal (non zero)
+1a2f : 205b44 > jsr report_error
+ >
+1a32 : >skip1272
+
+1a32 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1a33 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1a35 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1a38 : f003 > beq skip1275
+ > trap ;failed not equal (non zero)
+1a3a : 205b44 > jsr report_error
+ >
+1a3d : >skip1275
+
+
+1a3d : a000 ldy #0
+1a3f : a50c lda zpt
+1a41 : 49c3 eor #$c3
+1a43 : c513 cmp zp1
+ trap_ne ;store to zp data
+1a45 : f003 > beq skip1277
+ > trap ;failed not equal (non zero)
+1a47 : 205b44 > jsr report_error
+ >
+1a4a : >skip1277
+
+1a4a : 840c sty zpt ;clear
+1a4c : ad0302 lda abst
+1a4f : 49c3 eor #$c3
+1a51 : cd1702 cmp abs1
+ trap_ne ;store to abs data
+1a54 : f003 > beq skip1279
+ > trap ;failed not equal (non zero)
+1a56 : 205b44 > jsr report_error
+ >
+1a59 : >skip1279
+
+1a59 : 8c0302 sty abst ;clear
+1a5c : a50d lda zpt+1
+1a5e : 49c3 eor #$c3
+1a60 : c514 cmp zp1+1
+ trap_ne ;store to zp+1 data
+1a62 : f003 > beq skip1281
+ > trap ;failed not equal (non zero)
+1a64 : 205b44 > jsr report_error
+ >
+1a67 : >skip1281
+
+1a67 : 840d sty zpt+1 ;clear
+1a69 : ad0402 lda abst+1
+1a6c : 49c3 eor #$c3
+1a6e : cd1802 cmp abs1+1
+ trap_ne ;store to abs+1 data
+1a71 : f003 > beq skip1283
+ > trap ;failed not equal (non zero)
+1a73 : 205b44 > jsr report_error
+ >
+1a76 : >skip1283
+
+1a76 : 8c0402 sty abst+1 ;clear
+1a79 : a50e lda zpt+2
+1a7b : 49c3 eor #$c3
+1a7d : c515 cmp zp1+2
+ trap_ne ;store to zp+2 data
+1a7f : f003 > beq skip1285
+ > trap ;failed not equal (non zero)
+1a81 : 205b44 > jsr report_error
+ >
+1a84 : >skip1285
+
+1a84 : 840e sty zpt+2 ;clear
+1a86 : ad0502 lda abst+2
+1a89 : 49c3 eor #$c3
+1a8b : cd1902 cmp abs1+2
+ trap_ne ;store to abs+2 data
+1a8e : f003 > beq skip1287
+ > trap ;failed not equal (non zero)
+1a90 : 205b44 > jsr report_error
+ >
+1a93 : >skip1287
+
+1a93 : 8c0502 sty abst+2 ;clear
+1a96 : a50f lda zpt+3
+1a98 : 49c3 eor #$c3
+1a9a : c516 cmp zp1+3
+ trap_ne ;store to zp+3 data
+1a9c : f003 > beq skip1289
+ > trap ;failed not equal (non zero)
+1a9e : 205b44 > jsr report_error
+ >
+1aa1 : >skip1289
+
+1aa1 : 840f sty zpt+3 ;clear
+1aa3 : ad0602 lda abst+3
+1aa6 : 49c3 eor #$c3
+1aa8 : cd1a02 cmp abs1+3
+ trap_ne ;store to abs+3 data
+1aab : f003 > beq skip1291
+ > trap ;failed not equal (non zero)
+1aad : 205b44 > jsr report_error
+ >
+1ab0 : >skip1291
+
+1ab0 : 8c0602 sty abst+3 ;clear
+ next_test
+1ab3 : ad0002 > lda test_case ;previous test
+1ab6 : c914 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1ab8 : f003 > beq skip1294
+ > trap ;failed not equal (non zero)
+1aba : 205b44 > jsr report_error
+ >
+1abd : >skip1294
+ >
+0015 = >test_num = test_num + 1
+1abd : a915 > lda #test_num ;*** next tests' number
+1abf : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing load / store accumulator LDA / STA all addressing modes
+ ; LDA / STA - zp,x / abs,x
+1ac2 : a203 ldx #3
+1ac4 : tldax
+ set_stat 0
+ > load_flag 0
+1ac4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ac6 : 48 > pha ;use stack to load status
+1ac7 : 28 > plp
+
+1ac8 : b513 lda zp1,x
+1aca : 08 php ;test stores do not alter flags
+1acb : 49c3 eor #$c3
+1acd : 28 plp
+1ace : 9d0302 sta abst,x
+1ad1 : 08 php ;flags after load/store sequence
+1ad2 : 49c3 eor #$c3
+1ad4 : dd1702 cmp abs1,x ;test result
+ trap_ne
+1ad7 : f003 > beq skip1298
+ > trap ;failed not equal (non zero)
+1ad9 : 205b44 > jsr report_error
+ >
+1adc : >skip1298
+
+1adc : 68 pla ;load status
+ eor_flag 0
+1add : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1adf : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1ae2 : f003 > beq skip1301
+ > trap ;failed not equal (non zero)
+1ae4 : 205b44 > jsr report_error
+ >
+1ae7 : >skip1301
+
+1ae7 : ca dex
+1ae8 : 10da bpl tldax
+
+1aea : a203 ldx #3
+1aec : tldax1
+ set_stat $ff
+ > load_flag $ff
+1aec : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1aee : 48 > pha ;use stack to load status
+1aef : 28 > plp
+
+1af0 : b513 lda zp1,x
+1af2 : 08 php ;test stores do not alter flags
+1af3 : 49c3 eor #$c3
+1af5 : 28 plp
+1af6 : 9d0302 sta abst,x
+1af9 : 08 php ;flags after load/store sequence
+1afa : 49c3 eor #$c3
+1afc : dd1702 cmp abs1,x ;test result
+ trap_ne
+1aff : f003 > beq skip1305
+ > trap ;failed not equal (non zero)
+1b01 : 205b44 > jsr report_error
+ >
+1b04 : >skip1305
+
+1b04 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1b05 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1b07 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1b0a : f003 > beq skip1308
+ > trap ;failed not equal (non zero)
+1b0c : 205b44 > jsr report_error
+ >
+1b0f : >skip1308
+
+1b0f : ca dex
+1b10 : 10da bpl tldax1
+
+1b12 : a203 ldx #3
+1b14 : tldax2
+ set_stat 0
+ > load_flag 0
+1b14 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b16 : 48 > pha ;use stack to load status
+1b17 : 28 > plp
+
+1b18 : bd1702 lda abs1,x
+1b1b : 08 php ;test stores do not alter flags
+1b1c : 49c3 eor #$c3
+1b1e : 28 plp
+1b1f : 950c sta zpt,x
+1b21 : 08 php ;flags after load/store sequence
+1b22 : 49c3 eor #$c3
+1b24 : d513 cmp zp1,x ;test result
+ trap_ne
+1b26 : f003 > beq skip1312
+ > trap ;failed not equal (non zero)
+1b28 : 205b44 > jsr report_error
+ >
+1b2b : >skip1312
+
+1b2b : 68 pla ;load status
+ eor_flag 0
+1b2c : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1b2e : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1b31 : f003 > beq skip1315
+ > trap ;failed not equal (non zero)
+1b33 : 205b44 > jsr report_error
+ >
+1b36 : >skip1315
+
+1b36 : ca dex
+1b37 : 10db bpl tldax2
+
+1b39 : a203 ldx #3
+1b3b : tldax3
+ set_stat $ff
+ > load_flag $ff
+1b3b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1b3d : 48 > pha ;use stack to load status
+1b3e : 28 > plp
+
+1b3f : bd1702 lda abs1,x
+1b42 : 08 php ;test stores do not alter flags
+1b43 : 49c3 eor #$c3
+1b45 : 28 plp
+1b46 : 950c sta zpt,x
+1b48 : 08 php ;flags after load/store sequence
+1b49 : 49c3 eor #$c3
+1b4b : d513 cmp zp1,x ;test result
+ trap_ne
+1b4d : f003 > beq skip1319
+ > trap ;failed not equal (non zero)
+1b4f : 205b44 > jsr report_error
+ >
+1b52 : >skip1319
+
+1b52 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1b53 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1b55 : dd1c02 cmp fLDx,x ;test flags
+ trap_ne
+1b58 : f003 > beq skip1322
+ > trap ;failed not equal (non zero)
+1b5a : 205b44 > jsr report_error
+ >
+1b5d : >skip1322
+
+1b5d : ca dex
+1b5e : 10db bpl tldax3
+
+1b60 : a203 ldx #3 ;testing store result
+1b62 : a000 ldy #0
+1b64 : b50c tstax lda zpt,x
+1b66 : 49c3 eor #$c3
+1b68 : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1b6a : f003 > beq skip1324
+ > trap ;failed not equal (non zero)
+1b6c : 205b44 > jsr report_error
+ >
+1b6f : >skip1324
+
+1b6f : 940c sty zpt,x ;clear
+1b71 : bd0302 lda abst,x
+1b74 : 49c3 eor #$c3
+1b76 : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+1b79 : f003 > beq skip1326
+ > trap ;failed not equal (non zero)
+1b7b : 205b44 > jsr report_error
+ >
+1b7e : >skip1326
+
+1b7e : 8a txa
+1b7f : 9d0302 sta abst,x ;clear
+1b82 : ca dex
+1b83 : 10df bpl tstax
+ next_test
+1b85 : ad0002 > lda test_case ;previous test
+1b88 : c915 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1b8a : f003 > beq skip1329
+ > trap ;failed not equal (non zero)
+1b8c : 205b44 > jsr report_error
+ >
+1b8f : >skip1329
+ >
+0016 = >test_num = test_num + 1
+1b8f : a916 > lda #test_num ;*** next tests' number
+1b91 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDA / STA - (zp),y / abs,y / (zp,x)
+1b94 : a003 ldy #3
+1b96 : tlday
+ set_stat 0
+ > load_flag 0
+1b96 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b98 : 48 > pha ;use stack to load status
+1b99 : 28 > plp
+
+1b9a : b124 lda (ind1),y
+1b9c : 08 php ;test stores do not alter flags
+1b9d : 49c3 eor #$c3
+1b9f : 28 plp
+1ba0 : 990302 sta abst,y
+1ba3 : 08 php ;flags after load/store sequence
+1ba4 : 49c3 eor #$c3
+1ba6 : d91702 cmp abs1,y ;test result
+ trap_ne
+1ba9 : f003 > beq skip1333
+ > trap ;failed not equal (non zero)
+1bab : 205b44 > jsr report_error
+ >
+1bae : >skip1333
+
+1bae : 68 pla ;load status
+ eor_flag 0
+1baf : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1bb1 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1bb4 : f003 > beq skip1336
+ > trap ;failed not equal (non zero)
+1bb6 : 205b44 > jsr report_error
+ >
+1bb9 : >skip1336
+
+1bb9 : 88 dey
+1bba : 10da bpl tlday
+
+1bbc : a003 ldy #3
+1bbe : tlday1
+ set_stat $ff
+ > load_flag $ff
+1bbe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1bc0 : 48 > pha ;use stack to load status
+1bc1 : 28 > plp
+
+1bc2 : b124 lda (ind1),y
+1bc4 : 08 php ;test stores do not alter flags
+1bc5 : 49c3 eor #$c3
+1bc7 : 28 plp
+1bc8 : 990302 sta abst,y
+1bcb : 08 php ;flags after load/store sequence
+1bcc : 49c3 eor #$c3
+1bce : d91702 cmp abs1,y ;test result
+ trap_ne
+1bd1 : f003 > beq skip1340
+ > trap ;failed not equal (non zero)
+1bd3 : 205b44 > jsr report_error
+ >
+1bd6 : >skip1340
+
+1bd6 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1bd7 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1bd9 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1bdc : f003 > beq skip1343
+ > trap ;failed not equal (non zero)
+1bde : 205b44 > jsr report_error
+ >
+1be1 : >skip1343
+
+1be1 : 88 dey
+1be2 : 10da bpl tlday1
+
+1be4 : a003 ldy #3 ;testing store result
+1be6 : a200 ldx #0
+1be8 : b90302 tstay lda abst,y
+1beb : 49c3 eor #$c3
+1bed : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1bf0 : f003 > beq skip1345
+ > trap ;failed not equal (non zero)
+1bf2 : 205b44 > jsr report_error
+ >
+1bf5 : >skip1345
+
+1bf5 : 8a txa
+1bf6 : 990302 sta abst,y ;clear
+1bf9 : 88 dey
+1bfa : 10ec bpl tstay
+
+1bfc : a003 ldy #3
+1bfe : tlday2
+ set_stat 0
+ > load_flag 0
+1bfe : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c00 : 48 > pha ;use stack to load status
+1c01 : 28 > plp
+
+1c02 : b91702 lda abs1,y
+1c05 : 08 php ;test stores do not alter flags
+1c06 : 49c3 eor #$c3
+1c08 : 28 plp
+1c09 : 9130 sta (indt),y
+1c0b : 08 php ;flags after load/store sequence
+1c0c : 49c3 eor #$c3
+1c0e : d124 cmp (ind1),y ;test result
+ trap_ne
+1c10 : f003 > beq skip1349
+ > trap ;failed not equal (non zero)
+1c12 : 205b44 > jsr report_error
+ >
+1c15 : >skip1349
+
+1c15 : 68 pla ;load status
+ eor_flag 0
+1c16 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1c18 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1c1b : f003 > beq skip1352
+ > trap ;failed not equal (non zero)
+1c1d : 205b44 > jsr report_error
+ >
+1c20 : >skip1352
+
+1c20 : 88 dey
+1c21 : 10db bpl tlday2
+
+1c23 : a003 ldy #3
+1c25 : tlday3
+ set_stat $ff
+ > load_flag $ff
+1c25 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c27 : 48 > pha ;use stack to load status
+1c28 : 28 > plp
+
+1c29 : b91702 lda abs1,y
+1c2c : 08 php ;test stores do not alter flags
+1c2d : 49c3 eor #$c3
+1c2f : 28 plp
+1c30 : 9130 sta (indt),y
+1c32 : 08 php ;flags after load/store sequence
+1c33 : 49c3 eor #$c3
+1c35 : d124 cmp (ind1),y ;test result
+ trap_ne
+1c37 : f003 > beq skip1356
+ > trap ;failed not equal (non zero)
+1c39 : 205b44 > jsr report_error
+ >
+1c3c : >skip1356
+
+1c3c : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1c3d : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1c3f : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1c42 : f003 > beq skip1359
+ > trap ;failed not equal (non zero)
+1c44 : 205b44 > jsr report_error
+ >
+1c47 : >skip1359
+
+1c47 : 88 dey
+1c48 : 10db bpl tlday3
+
+1c4a : a003 ldy #3 ;testing store result
+1c4c : a200 ldx #0
+1c4e : b90302 tstay1 lda abst,y
+1c51 : 49c3 eor #$c3
+1c53 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1c56 : f003 > beq skip1361
+ > trap ;failed not equal (non zero)
+1c58 : 205b44 > jsr report_error
+ >
+1c5b : >skip1361
+
+1c5b : 8a txa
+1c5c : 990302 sta abst,y ;clear
+1c5f : 88 dey
+1c60 : 10ec bpl tstay1
+
+1c62 : a206 ldx #6
+1c64 : a003 ldy #3
+1c66 : tldax4
+ set_stat 0
+ > load_flag 0
+1c66 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c68 : 48 > pha ;use stack to load status
+1c69 : 28 > plp
+
+1c6a : a124 lda (ind1,x)
+1c6c : 08 php ;test stores do not alter flags
+1c6d : 49c3 eor #$c3
+1c6f : 28 plp
+1c70 : 8130 sta (indt,x)
+1c72 : 08 php ;flags after load/store sequence
+1c73 : 49c3 eor #$c3
+1c75 : d91702 cmp abs1,y ;test result
+ trap_ne
+1c78 : f003 > beq skip1365
+ > trap ;failed not equal (non zero)
+1c7a : 205b44 > jsr report_error
+ >
+1c7d : >skip1365
+
+1c7d : 68 pla ;load status
+ eor_flag 0
+1c7e : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1c80 : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1c83 : f003 > beq skip1368
+ > trap ;failed not equal (non zero)
+1c85 : 205b44 > jsr report_error
+ >
+1c88 : >skip1368
+
+1c88 : ca dex
+1c89 : ca dex
+1c8a : 88 dey
+1c8b : 10d9 bpl tldax4
+
+1c8d : a206 ldx #6
+1c8f : a003 ldy #3
+1c91 : tldax5
+ set_stat $ff
+ > load_flag $ff
+1c91 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c93 : 48 > pha ;use stack to load status
+1c94 : 28 > plp
+
+1c95 : a124 lda (ind1,x)
+1c97 : 08 php ;test stores do not alter flags
+1c98 : 49c3 eor #$c3
+1c9a : 28 plp
+1c9b : 8130 sta (indt,x)
+1c9d : 08 php ;flags after load/store sequence
+1c9e : 49c3 eor #$c3
+1ca0 : d91702 cmp abs1,y ;test result
+ trap_ne
+1ca3 : f003 > beq skip1372
+ > trap ;failed not equal (non zero)
+1ca5 : 205b44 > jsr report_error
+ >
+1ca8 : >skip1372
+
+1ca8 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1ca9 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1cab : d91c02 cmp fLDx,y ;test flags
+ trap_ne
+1cae : f003 > beq skip1375
+ > trap ;failed not equal (non zero)
+1cb0 : 205b44 > jsr report_error
+ >
+1cb3 : >skip1375
+
+1cb3 : ca dex
+1cb4 : ca dex
+1cb5 : 88 dey
+1cb6 : 10d9 bpl tldax5
+
+1cb8 : a003 ldy #3 ;testing store result
+1cba : a200 ldx #0
+1cbc : b90302 tstay2 lda abst,y
+1cbf : 49c3 eor #$c3
+1cc1 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1cc4 : f003 > beq skip1377
+ > trap ;failed not equal (non zero)
+1cc6 : 205b44 > jsr report_error
+ >
+1cc9 : >skip1377
+
+1cc9 : 8a txa
+1cca : 990302 sta abst,y ;clear
+1ccd : 88 dey
+1cce : 10ec bpl tstay2
+ next_test
+1cd0 : ad0002 > lda test_case ;previous test
+1cd3 : c916 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1cd5 : f003 > beq skip1380
+ > trap ;failed not equal (non zero)
+1cd7 : 205b44 > jsr report_error
+ >
+1cda : >skip1380
+ >
+0017 = >test_num = test_num + 1
+1cda : a917 > lda #test_num ;*** next tests' number
+1cdc : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; indexed wraparound test (only zp should wrap)
+1cdf : a2fd ldx #3+$fa
+1ce1 : b519 tldax6 lda zp1-$fa&$ff,x ;wrap on indexed zp
+1ce3 : 9d0901 sta abst-$fa,x ;no STX abs,x!
+1ce6 : ca dex
+1ce7 : e0fa cpx #$fa
+1ce9 : b0f6 bcs tldax6
+1ceb : a2fd ldx #3+$fa
+1ced : bd1d01 tldax7 lda abs1-$fa,x ;no wrap on indexed abs
+1cf0 : 9512 sta zpt-$fa&$ff,x
+1cf2 : ca dex
+1cf3 : e0fa cpx #$fa
+1cf5 : b0f6 bcs tldax7
+
+1cf7 : a203 ldx #3 ;testing wraparound result
+1cf9 : a000 ldy #0
+1cfb : b50c tstax1 lda zpt,x
+1cfd : d513 cmp zp1,x
+ trap_ne ;store to zp,x data
+1cff : f003 > beq skip1382
+ > trap ;failed not equal (non zero)
+1d01 : 205b44 > jsr report_error
+ >
+1d04 : >skip1382
+
+1d04 : 940c sty zpt,x ;clear
+1d06 : bd0302 lda abst,x
+1d09 : dd1702 cmp abs1,x
+ trap_ne ;store to abs,x data
+1d0c : f003 > beq skip1384
+ > trap ;failed not equal (non zero)
+1d0e : 205b44 > jsr report_error
+ >
+1d11 : >skip1384
+
+1d11 : 8a txa
+1d12 : 9d0302 sta abst,x ;clear
+1d15 : ca dex
+1d16 : 10e3 bpl tstax1
+
+1d18 : a0fb ldy #3+$f8
+1d1a : a2fe ldx #6+$f8
+1d1c : a12c tlday4 lda (ind1-$f8&$ff,x) ;wrap on indexed zp indirect
+1d1e : 990b01 sta abst-$f8,y
+1d21 : ca dex
+1d22 : ca dex
+1d23 : 88 dey
+1d24 : c0f8 cpy #$f8
+1d26 : b0f4 bcs tlday4
+1d28 : a003 ldy #3 ;testing wraparound result
+1d2a : a200 ldx #0
+1d2c : b90302 tstay4 lda abst,y
+1d2f : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1d32 : f003 > beq skip1386
+ > trap ;failed not equal (non zero)
+1d34 : 205b44 > jsr report_error
+ >
+1d37 : >skip1386
+
+1d37 : 8a txa
+1d38 : 990302 sta abst,y ;clear
+1d3b : 88 dey
+1d3c : 10ee bpl tstay4
+
+1d3e : a0fb ldy #3+$f8
+1d40 : b91f01 tlday5 lda abs1-$f8,y ;no wrap on indexed abs
+1d43 : 9138 sta (inwt),y
+1d45 : 88 dey
+1d46 : c0f8 cpy #$f8
+1d48 : b0f6 bcs tlday5
+1d4a : a003 ldy #3 ;testing wraparound result
+1d4c : a200 ldx #0
+1d4e : b90302 tstay5 lda abst,y
+1d51 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1d54 : f003 > beq skip1388
+ > trap ;failed not equal (non zero)
+1d56 : 205b44 > jsr report_error
+ >
+1d59 : >skip1388
+
+1d59 : 8a txa
+1d5a : 990302 sta abst,y ;clear
+1d5d : 88 dey
+1d5e : 10ee bpl tstay5
+
+1d60 : a0fb ldy #3+$f8
+1d62 : a2fe ldx #6+$f8
+1d64 : b12e tlday6 lda (inw1),y ;no wrap on zp indirect indexed
+1d66 : 8138 sta (indt-$f8&$ff,x)
+1d68 : ca dex
+1d69 : ca dex
+1d6a : 88 dey
+1d6b : c0f8 cpy #$f8
+1d6d : b0f5 bcs tlday6
+1d6f : a003 ldy #3 ;testing wraparound result
+1d71 : a200 ldx #0
+1d73 : b90302 tstay6 lda abst,y
+1d76 : d91702 cmp abs1,y
+ trap_ne ;store to abs data
+1d79 : f003 > beq skip1390
+ > trap ;failed not equal (non zero)
+1d7b : 205b44 > jsr report_error
+ >
+1d7e : >skip1390
+
+1d7e : 8a txa
+1d7f : 990302 sta abst,y ;clear
+1d82 : 88 dey
+1d83 : 10ee bpl tstay6
+ next_test
+1d85 : ad0002 > lda test_case ;previous test
+1d88 : c917 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1d8a : f003 > beq skip1393
+ > trap ;failed not equal (non zero)
+1d8c : 205b44 > jsr report_error
+ >
+1d8f : >skip1393
+ >
+0018 = >test_num = test_num + 1
+1d8f : a918 > lda #test_num ;*** next tests' number
+1d91 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; LDA / STA - zp / abs / #
+ set_stat 0
+ > load_flag 0
+1d94 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1d96 : 48 > pha ;use stack to load status
+1d97 : 28 > plp
+
+1d98 : a513 lda zp1
+1d9a : 08 php ;test stores do not alter flags
+1d9b : 49c3 eor #$c3
+1d9d : 28 plp
+1d9e : 8d0302 sta abst
+1da1 : 08 php ;flags after load/store sequence
+1da2 : 49c3 eor #$c3
+1da4 : c9c3 cmp #$c3 ;test result
+ trap_ne
+1da6 : f003 > beq skip1397
+ > trap ;failed not equal (non zero)
+1da8 : 205b44 > jsr report_error
+ >
+1dab : >skip1397
+
+1dab : 68 pla ;load status
+ eor_flag 0
+1dac : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1dae : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1db1 : f003 > beq skip1400
+ > trap ;failed not equal (non zero)
+1db3 : 205b44 > jsr report_error
+ >
+1db6 : >skip1400
+
+ set_stat 0
+ > load_flag 0
+1db6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1db8 : 48 > pha ;use stack to load status
+1db9 : 28 > plp
+
+1dba : a514 lda zp1+1
+1dbc : 08 php ;test stores do not alter flags
+1dbd : 49c3 eor #$c3
+1dbf : 28 plp
+1dc0 : 8d0402 sta abst+1
+1dc3 : 08 php ;flags after load/store sequence
+1dc4 : 49c3 eor #$c3
+1dc6 : c982 cmp #$82 ;test result
+ trap_ne
+1dc8 : f003 > beq skip1404
+ > trap ;failed not equal (non zero)
+1dca : 205b44 > jsr report_error
+ >
+1dcd : >skip1404
+
+1dcd : 68 pla ;load status
+ eor_flag 0
+1dce : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1dd0 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1dd3 : f003 > beq skip1407
+ > trap ;failed not equal (non zero)
+1dd5 : 205b44 > jsr report_error
+ >
+1dd8 : >skip1407
+
+ set_stat 0
+ > load_flag 0
+1dd8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1dda : 48 > pha ;use stack to load status
+1ddb : 28 > plp
+
+1ddc : a515 lda zp1+2
+1dde : 08 php ;test stores do not alter flags
+1ddf : 49c3 eor #$c3
+1de1 : 28 plp
+1de2 : 8d0502 sta abst+2
+1de5 : 08 php ;flags after load/store sequence
+1de6 : 49c3 eor #$c3
+1de8 : c941 cmp #$41 ;test result
+ trap_ne
+1dea : f003 > beq skip1411
+ > trap ;failed not equal (non zero)
+1dec : 205b44 > jsr report_error
+ >
+1def : >skip1411
+
+1def : 68 pla ;load status
+ eor_flag 0
+1df0 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1df2 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1df5 : f003 > beq skip1414
+ > trap ;failed not equal (non zero)
+1df7 : 205b44 > jsr report_error
+ >
+1dfa : >skip1414
+
+ set_stat 0
+ > load_flag 0
+1dfa : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1dfc : 48 > pha ;use stack to load status
+1dfd : 28 > plp
+
+1dfe : a516 lda zp1+3
+1e00 : 08 php ;test stores do not alter flags
+1e01 : 49c3 eor #$c3
+1e03 : 28 plp
+1e04 : 8d0602 sta abst+3
+1e07 : 08 php ;flags after load/store sequence
+1e08 : 49c3 eor #$c3
+1e0a : c900 cmp #0 ;test result
+ trap_ne
+1e0c : f003 > beq skip1418
+ > trap ;failed not equal (non zero)
+1e0e : 205b44 > jsr report_error
+ >
+1e11 : >skip1418
+
+1e11 : 68 pla ;load status
+ eor_flag 0
+1e12 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1e14 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1e17 : f003 > beq skip1421
+ > trap ;failed not equal (non zero)
+1e19 : 205b44 > jsr report_error
+ >
+1e1c : >skip1421
+
+ set_stat $ff
+ > load_flag $ff
+1e1c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e1e : 48 > pha ;use stack to load status
+1e1f : 28 > plp
+
+1e20 : a513 lda zp1
+1e22 : 08 php ;test stores do not alter flags
+1e23 : 49c3 eor #$c3
+1e25 : 28 plp
+1e26 : 8d0302 sta abst
+1e29 : 08 php ;flags after load/store sequence
+1e2a : 49c3 eor #$c3
+1e2c : c9c3 cmp #$c3 ;test result
+ trap_ne
+1e2e : f003 > beq skip1425
+ > trap ;failed not equal (non zero)
+1e30 : 205b44 > jsr report_error
+ >
+1e33 : >skip1425
+
+1e33 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1e34 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1e36 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1e39 : f003 > beq skip1428
+ > trap ;failed not equal (non zero)
+1e3b : 205b44 > jsr report_error
+ >
+1e3e : >skip1428
+
+ set_stat $ff
+ > load_flag $ff
+1e3e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e40 : 48 > pha ;use stack to load status
+1e41 : 28 > plp
+
+1e42 : a514 lda zp1+1
+1e44 : 08 php ;test stores do not alter flags
+1e45 : 49c3 eor #$c3
+1e47 : 28 plp
+1e48 : 8d0402 sta abst+1
+1e4b : 08 php ;flags after load/store sequence
+1e4c : 49c3 eor #$c3
+1e4e : c982 cmp #$82 ;test result
+ trap_ne
+1e50 : f003 > beq skip1432
+ > trap ;failed not equal (non zero)
+1e52 : 205b44 > jsr report_error
+ >
+1e55 : >skip1432
+
+1e55 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1e56 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1e58 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1e5b : f003 > beq skip1435
+ > trap ;failed not equal (non zero)
+1e5d : 205b44 > jsr report_error
+ >
+1e60 : >skip1435
+
+ set_stat $ff
+ > load_flag $ff
+1e60 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e62 : 48 > pha ;use stack to load status
+1e63 : 28 > plp
+
+1e64 : a515 lda zp1+2
+1e66 : 08 php ;test stores do not alter flags
+1e67 : 49c3 eor #$c3
+1e69 : 28 plp
+1e6a : 8d0502 sta abst+2
+1e6d : 08 php ;flags after load/store sequence
+1e6e : 49c3 eor #$c3
+1e70 : c941 cmp #$41 ;test result
+ trap_ne
+1e72 : f003 > beq skip1439
+ > trap ;failed not equal (non zero)
+1e74 : 205b44 > jsr report_error
+ >
+1e77 : >skip1439
+
+1e77 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1e78 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1e7a : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1e7d : f003 > beq skip1442
+ > trap ;failed not equal (non zero)
+1e7f : 205b44 > jsr report_error
+ >
+1e82 : >skip1442
+
+ set_stat $ff
+ > load_flag $ff
+1e82 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e84 : 48 > pha ;use stack to load status
+1e85 : 28 > plp
+
+1e86 : a516 lda zp1+3
+1e88 : 08 php ;test stores do not alter flags
+1e89 : 49c3 eor #$c3
+1e8b : 28 plp
+1e8c : 8d0602 sta abst+3
+1e8f : 08 php ;flags after load/store sequence
+1e90 : 49c3 eor #$c3
+1e92 : c900 cmp #0 ;test result
+ trap_ne
+1e94 : f003 > beq skip1446
+ > trap ;failed not equal (non zero)
+1e96 : 205b44 > jsr report_error
+ >
+1e99 : >skip1446
+
+1e99 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1e9a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1e9c : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1e9f : f003 > beq skip1449
+ > trap ;failed not equal (non zero)
+1ea1 : 205b44 > jsr report_error
+ >
+1ea4 : >skip1449
+
+ set_stat 0
+ > load_flag 0
+1ea4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ea6 : 48 > pha ;use stack to load status
+1ea7 : 28 > plp
+
+1ea8 : ad1702 lda abs1
+1eab : 08 php ;test stores do not alter flags
+1eac : 49c3 eor #$c3
+1eae : 28 plp
+1eaf : 850c sta zpt
+1eb1 : 08 php ;flags after load/store sequence
+1eb2 : 49c3 eor #$c3
+1eb4 : c513 cmp zp1 ;test result
+ trap_ne
+1eb6 : f003 > beq skip1453
+ > trap ;failed not equal (non zero)
+1eb8 : 205b44 > jsr report_error
+ >
+1ebb : >skip1453
+
+1ebb : 68 pla ;load status
+ eor_flag 0
+1ebc : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1ebe : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1ec1 : f003 > beq skip1456
+ > trap ;failed not equal (non zero)
+1ec3 : 205b44 > jsr report_error
+ >
+1ec6 : >skip1456
+
+ set_stat 0
+ > load_flag 0
+1ec6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ec8 : 48 > pha ;use stack to load status
+1ec9 : 28 > plp
+
+1eca : ad1802 lda abs1+1
+1ecd : 08 php ;test stores do not alter flags
+1ece : 49c3 eor #$c3
+1ed0 : 28 plp
+1ed1 : 850d sta zpt+1
+1ed3 : 08 php ;flags after load/store sequence
+1ed4 : 49c3 eor #$c3
+1ed6 : c514 cmp zp1+1 ;test result
+ trap_ne
+1ed8 : f003 > beq skip1460
+ > trap ;failed not equal (non zero)
+1eda : 205b44 > jsr report_error
+ >
+1edd : >skip1460
+
+1edd : 68 pla ;load status
+ eor_flag 0
+1ede : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1ee0 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1ee3 : f003 > beq skip1463
+ > trap ;failed not equal (non zero)
+1ee5 : 205b44 > jsr report_error
+ >
+1ee8 : >skip1463
+
+ set_stat 0
+ > load_flag 0
+1ee8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1eea : 48 > pha ;use stack to load status
+1eeb : 28 > plp
+
+1eec : ad1902 lda abs1+2
+1eef : 08 php ;test stores do not alter flags
+1ef0 : 49c3 eor #$c3
+1ef2 : 28 plp
+1ef3 : 850e sta zpt+2
+1ef5 : 08 php ;flags after load/store sequence
+1ef6 : 49c3 eor #$c3
+1ef8 : c515 cmp zp1+2 ;test result
+ trap_ne
+1efa : f003 > beq skip1467
+ > trap ;failed not equal (non zero)
+1efc : 205b44 > jsr report_error
+ >
+1eff : >skip1467
+
+1eff : 68 pla ;load status
+ eor_flag 0
+1f00 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1f02 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1f05 : f003 > beq skip1470
+ > trap ;failed not equal (non zero)
+1f07 : 205b44 > jsr report_error
+ >
+1f0a : >skip1470
+
+ set_stat 0
+ > load_flag 0
+1f0a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f0c : 48 > pha ;use stack to load status
+1f0d : 28 > plp
+
+1f0e : ad1a02 lda abs1+3
+1f11 : 08 php ;test stores do not alter flags
+1f12 : 49c3 eor #$c3
+1f14 : 28 plp
+1f15 : 850f sta zpt+3
+1f17 : 08 php ;flags after load/store sequence
+1f18 : 49c3 eor #$c3
+1f1a : c516 cmp zp1+3 ;test result
+ trap_ne
+1f1c : f003 > beq skip1474
+ > trap ;failed not equal (non zero)
+1f1e : 205b44 > jsr report_error
+ >
+1f21 : >skip1474
+
+1f21 : 68 pla ;load status
+ eor_flag 0
+1f22 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1f24 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1f27 : f003 > beq skip1477
+ > trap ;failed not equal (non zero)
+1f29 : 205b44 > jsr report_error
+ >
+1f2c : >skip1477
+
+ set_stat $ff
+ > load_flag $ff
+1f2c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f2e : 48 > pha ;use stack to load status
+1f2f : 28 > plp
+
+1f30 : ad1702 lda abs1
+1f33 : 08 php ;test stores do not alter flags
+1f34 : 49c3 eor #$c3
+1f36 : 28 plp
+1f37 : 850c sta zpt
+1f39 : 08 php ;flags after load/store sequence
+1f3a : 49c3 eor #$c3
+1f3c : c513 cmp zp1 ;test result
+ trap_ne
+1f3e : f003 > beq skip1481
+ > trap ;failed not equal (non zero)
+1f40 : 205b44 > jsr report_error
+ >
+1f43 : >skip1481
+
+1f43 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1f44 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1f46 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1f49 : f003 > beq skip1484
+ > trap ;failed not equal (non zero)
+1f4b : 205b44 > jsr report_error
+ >
+1f4e : >skip1484
+
+ set_stat $ff
+ > load_flag $ff
+1f4e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f50 : 48 > pha ;use stack to load status
+1f51 : 28 > plp
+
+1f52 : ad1802 lda abs1+1
+1f55 : 08 php ;test stores do not alter flags
+1f56 : 49c3 eor #$c3
+1f58 : 28 plp
+1f59 : 850d sta zpt+1
+1f5b : 08 php ;flags after load/store sequence
+1f5c : 49c3 eor #$c3
+1f5e : c514 cmp zp1+1 ;test result
+ trap_ne
+1f60 : f003 > beq skip1488
+ > trap ;failed not equal (non zero)
+1f62 : 205b44 > jsr report_error
+ >
+1f65 : >skip1488
+
+1f65 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1f66 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1f68 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1f6b : f003 > beq skip1491
+ > trap ;failed not equal (non zero)
+1f6d : 205b44 > jsr report_error
+ >
+1f70 : >skip1491
+
+ set_stat $ff
+ > load_flag $ff
+1f70 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f72 : 48 > pha ;use stack to load status
+1f73 : 28 > plp
+
+1f74 : ad1902 lda abs1+2
+1f77 : 08 php ;test stores do not alter flags
+1f78 : 49c3 eor #$c3
+1f7a : 28 plp
+1f7b : 850e sta zpt+2
+1f7d : 08 php ;flags after load/store sequence
+1f7e : 49c3 eor #$c3
+1f80 : c515 cmp zp1+2 ;test result
+ trap_ne
+1f82 : f003 > beq skip1495
+ > trap ;failed not equal (non zero)
+1f84 : 205b44 > jsr report_error
+ >
+1f87 : >skip1495
+
+1f87 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1f88 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1f8a : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1f8d : f003 > beq skip1498
+ > trap ;failed not equal (non zero)
+1f8f : 205b44 > jsr report_error
+ >
+1f92 : >skip1498
+
+ set_stat $ff
+ > load_flag $ff
+1f92 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f94 : 48 > pha ;use stack to load status
+1f95 : 28 > plp
+
+1f96 : ad1a02 lda abs1+3
+1f99 : 08 php ;test stores do not alter flags
+1f9a : 49c3 eor #$c3
+1f9c : 28 plp
+1f9d : 850f sta zpt+3
+1f9f : 08 php ;flags after load/store sequence
+1fa0 : 49c3 eor #$c3
+1fa2 : c516 cmp zp1+3 ;test result
+ trap_ne
+1fa4 : f003 > beq skip1502
+ > trap ;failed not equal (non zero)
+1fa6 : 205b44 > jsr report_error
+ >
+1fa9 : >skip1502
+
+1fa9 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1faa : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1fac : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+1faf : f003 > beq skip1505
+ > trap ;failed not equal (non zero)
+1fb1 : 205b44 > jsr report_error
+ >
+1fb4 : >skip1505
+
+ set_stat 0
+ > load_flag 0
+1fb4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fb6 : 48 > pha ;use stack to load status
+1fb7 : 28 > plp
+
+1fb8 : a9c3 lda #$c3
+1fba : 08 php
+1fbb : cd1702 cmp abs1 ;test result
+ trap_ne
+1fbe : f003 > beq skip1509
+ > trap ;failed not equal (non zero)
+1fc0 : 205b44 > jsr report_error
+ >
+1fc3 : >skip1509
+
+1fc3 : 68 pla ;load status
+ eor_flag 0
+1fc4 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1fc6 : cd1c02 cmp fLDx ;test flags
+ trap_ne
+1fc9 : f003 > beq skip1512
+ > trap ;failed not equal (non zero)
+1fcb : 205b44 > jsr report_error
+ >
+1fce : >skip1512
+
+ set_stat 0
+ > load_flag 0
+1fce : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fd0 : 48 > pha ;use stack to load status
+1fd1 : 28 > plp
+
+1fd2 : a982 lda #$82
+1fd4 : 08 php
+1fd5 : cd1802 cmp abs1+1 ;test result
+ trap_ne
+1fd8 : f003 > beq skip1516
+ > trap ;failed not equal (non zero)
+1fda : 205b44 > jsr report_error
+ >
+1fdd : >skip1516
+
+1fdd : 68 pla ;load status
+ eor_flag 0
+1fde : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1fe0 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+1fe3 : f003 > beq skip1519
+ > trap ;failed not equal (non zero)
+1fe5 : 205b44 > jsr report_error
+ >
+1fe8 : >skip1519
+
+ set_stat 0
+ > load_flag 0
+1fe8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fea : 48 > pha ;use stack to load status
+1feb : 28 > plp
+
+1fec : a941 lda #$41
+1fee : 08 php
+1fef : cd1902 cmp abs1+2 ;test result
+ trap_ne
+1ff2 : f003 > beq skip1523
+ > trap ;failed not equal (non zero)
+1ff4 : 205b44 > jsr report_error
+ >
+1ff7 : >skip1523
+
+1ff7 : 68 pla ;load status
+ eor_flag 0
+1ff8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1ffa : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+1ffd : f003 > beq skip1526
+ > trap ;failed not equal (non zero)
+1fff : 205b44 > jsr report_error
+ >
+2002 : >skip1526
+
+ set_stat 0
+ > load_flag 0
+2002 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2004 : 48 > pha ;use stack to load status
+2005 : 28 > plp
+
+2006 : a900 lda #0
+2008 : 08 php
+2009 : cd1a02 cmp abs1+3 ;test result
+ trap_ne
+200c : f003 > beq skip1530
+ > trap ;failed not equal (non zero)
+200e : 205b44 > jsr report_error
+ >
+2011 : >skip1530
+
+2011 : 68 pla ;load status
+ eor_flag 0
+2012 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+2014 : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+2017 : f003 > beq skip1533
+ > trap ;failed not equal (non zero)
+2019 : 205b44 > jsr report_error
+ >
+201c : >skip1533
+
+
+ set_stat $ff
+ > load_flag $ff
+201c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+201e : 48 > pha ;use stack to load status
+201f : 28 > plp
+
+2020 : a9c3 lda #$c3
+2022 : 08 php
+2023 : cd1702 cmp abs1 ;test result
+ trap_ne
+2026 : f003 > beq skip1537
+ > trap ;failed not equal (non zero)
+2028 : 205b44 > jsr report_error
+ >
+202b : >skip1537
+
+202b : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+202c : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+202e : cd1c02 cmp fLDx ;test flags
+ trap_ne
+2031 : f003 > beq skip1540
+ > trap ;failed not equal (non zero)
+2033 : 205b44 > jsr report_error
+ >
+2036 : >skip1540
+
+ set_stat $ff
+ > load_flag $ff
+2036 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2038 : 48 > pha ;use stack to load status
+2039 : 28 > plp
+
+203a : a982 lda #$82
+203c : 08 php
+203d : cd1802 cmp abs1+1 ;test result
+ trap_ne
+2040 : f003 > beq skip1544
+ > trap ;failed not equal (non zero)
+2042 : 205b44 > jsr report_error
+ >
+2045 : >skip1544
+
+2045 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+2046 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+2048 : cd1d02 cmp fLDx+1 ;test flags
+ trap_ne
+204b : f003 > beq skip1547
+ > trap ;failed not equal (non zero)
+204d : 205b44 > jsr report_error
+ >
+2050 : >skip1547
+
+ set_stat $ff
+ > load_flag $ff
+2050 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2052 : 48 > pha ;use stack to load status
+2053 : 28 > plp
+
+2054 : a941 lda #$41
+2056 : 08 php
+2057 : cd1902 cmp abs1+2 ;test result
+ trap_ne
+205a : f003 > beq skip1551
+ > trap ;failed not equal (non zero)
+205c : 205b44 > jsr report_error
+ >
+205f : >skip1551
+
+205f : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+2060 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+2062 : cd1e02 cmp fLDx+2 ;test flags
+ trap_ne
+2065 : f003 > beq skip1554
+ > trap ;failed not equal (non zero)
+2067 : 205b44 > jsr report_error
+ >
+206a : >skip1554
+
+ set_stat $ff
+ > load_flag $ff
+206a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+206c : 48 > pha ;use stack to load status
+206d : 28 > plp
+
+206e : a900 lda #0
+2070 : 08 php
+2071 : cd1a02 cmp abs1+3 ;test result
+ trap_ne
+2074 : f003 > beq skip1558
+ > trap ;failed not equal (non zero)
+2076 : 205b44 > jsr report_error
+ >
+2079 : >skip1558
+
+2079 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+207a : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+207c : cd1f02 cmp fLDx+3 ;test flags
+ trap_ne
+207f : f003 > beq skip1561
+ > trap ;failed not equal (non zero)
+2081 : 205b44 > jsr report_error
+ >
+2084 : >skip1561
+
+
+2084 : a200 ldx #0
+2086 : a50c lda zpt
+2088 : 49c3 eor #$c3
+208a : c513 cmp zp1
+ trap_ne ;store to zp data
+208c : f003 > beq skip1563
+ > trap ;failed not equal (non zero)
+208e : 205b44 > jsr report_error
+ >
+2091 : >skip1563
+
+2091 : 860c stx zpt ;clear
+2093 : ad0302 lda abst
+2096 : 49c3 eor #$c3
+2098 : cd1702 cmp abs1
+ trap_ne ;store to abs data
+209b : f003 > beq skip1565
+ > trap ;failed not equal (non zero)
+209d : 205b44 > jsr report_error
+ >
+20a0 : >skip1565
+
+20a0 : 8e0302 stx abst ;clear
+20a3 : a50d lda zpt+1
+20a5 : 49c3 eor #$c3
+20a7 : c514 cmp zp1+1
+ trap_ne ;store to zp data
+20a9 : f003 > beq skip1567
+ > trap ;failed not equal (non zero)
+20ab : 205b44 > jsr report_error
+ >
+20ae : >skip1567
+
+20ae : 860d stx zpt+1 ;clear
+20b0 : ad0402 lda abst+1
+20b3 : 49c3 eor #$c3
+20b5 : cd1802 cmp abs1+1
+ trap_ne ;store to abs data
+20b8 : f003 > beq skip1569
+ > trap ;failed not equal (non zero)
+20ba : 205b44 > jsr report_error
+ >
+20bd : >skip1569
+
+20bd : 8e0402 stx abst+1 ;clear
+20c0 : a50e lda zpt+2
+20c2 : 49c3 eor #$c3
+20c4 : c515 cmp zp1+2
+ trap_ne ;store to zp data
+20c6 : f003 > beq skip1571
+ > trap ;failed not equal (non zero)
+20c8 : 205b44 > jsr report_error
+ >
+20cb : >skip1571
+
+20cb : 860e stx zpt+2 ;clear
+20cd : ad0502 lda abst+2
+20d0 : 49c3 eor #$c3
+20d2 : cd1902 cmp abs1+2
+ trap_ne ;store to abs data
+20d5 : f003 > beq skip1573
+ > trap ;failed not equal (non zero)
+20d7 : 205b44 > jsr report_error
+ >
+20da : >skip1573
+
+20da : 8e0502 stx abst+2 ;clear
+20dd : a50f lda zpt+3
+20df : 49c3 eor #$c3
+20e1 : c516 cmp zp1+3
+ trap_ne ;store to zp data
+20e3 : f003 > beq skip1575
+ > trap ;failed not equal (non zero)
+20e5 : 205b44 > jsr report_error
+ >
+20e8 : >skip1575
+
+20e8 : 860f stx zpt+3 ;clear
+20ea : ad0602 lda abst+3
+20ed : 49c3 eor #$c3
+20ef : cd1a02 cmp abs1+3
+ trap_ne ;store to abs data
+20f2 : f003 > beq skip1577
+ > trap ;failed not equal (non zero)
+20f4 : 205b44 > jsr report_error
+ >
+20f7 : >skip1577
+
+20f7 : 8e0602 stx abst+3 ;clear
+ next_test
+20fa : ad0002 > lda test_case ;previous test
+20fd : c918 > cmp #test_num
+ > trap_ne ;test is out of sequence
+20ff : f003 > beq skip1580
+ > trap ;failed not equal (non zero)
+2101 : 205b44 > jsr report_error
+ >
+2104 : >skip1580
+ >
+0019 = >test_num = test_num + 1
+2104 : a919 > lda #test_num ;*** next tests' number
+2106 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing bit test & compares BIT CPX CPY CMP all addressing modes
+ ; BIT - zp / abs
+ set_a $ff,0
+ > load_flag 0
+2109 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+210b : 48 > pha ;use stack to load status
+210c : a9ff > lda #$ff ;precharge accu
+210e : 28 > plp
+
+210f : 2416 bit zp1+3 ;00 - should set Z / clear NV
+ tst_a $ff,fz
+2111 : 08 > php ;save flags
+2112 : c9ff > cmp #$ff ;test result
+ > trap_ne
+2114 : f003 > beq skip1585
+ > trap ;failed not equal (non zero)
+2116 : 205b44 > jsr report_error
+ >
+2119 : >skip1585
+ >
+2119 : 68 > pla ;load status
+211a : 48 > pha
+ > cmp_flag fz
+211b : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+211d : f003 > beq skip1588
+ > trap ;failed not equal (non zero)
+211f : 205b44 > jsr report_error
+ >
+2122 : >skip1588
+ >
+2122 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+2123 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2125 : 48 > pha ;use stack to load status
+2126 : a901 > lda #1 ;precharge accu
+2128 : 28 > plp
+
+2129 : 2415 bit zp1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+212b : 08 > php ;save flags
+212c : c901 > cmp #1 ;test result
+ > trap_ne
+212e : f003 > beq skip1593
+ > trap ;failed not equal (non zero)
+2130 : 205b44 > jsr report_error
+ >
+2133 : >skip1593
+ >
+2133 : 68 > pla ;load status
+2134 : 48 > pha
+ > cmp_flag fv
+2135 : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2137 : f003 > beq skip1596
+ > trap ;failed not equal (non zero)
+2139 : 205b44 > jsr report_error
+ >
+213c : >skip1596
+ >
+213c : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+213d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+213f : 48 > pha ;use stack to load status
+2140 : a901 > lda #1 ;precharge accu
+2142 : 28 > plp
+
+2143 : 2414 bit zp1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+2145 : 08 > php ;save flags
+2146 : c901 > cmp #1 ;test result
+ > trap_ne
+2148 : f003 > beq skip1601
+ > trap ;failed not equal (non zero)
+214a : 205b44 > jsr report_error
+ >
+214d : >skip1601
+ >
+214d : 68 > pla ;load status
+214e : 48 > pha
+ > cmp_flag fnz
+214f : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2151 : f003 > beq skip1604
+ > trap ;failed not equal (non zero)
+2153 : 205b44 > jsr report_error
+ >
+2156 : >skip1604
+ >
+2156 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+2157 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2159 : 48 > pha ;use stack to load status
+215a : a901 > lda #1 ;precharge accu
+215c : 28 > plp
+
+215d : 2413 bit zp1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+215f : 08 > php ;save flags
+2160 : c901 > cmp #1 ;test result
+ > trap_ne
+2162 : f003 > beq skip1609
+ > trap ;failed not equal (non zero)
+2164 : 205b44 > jsr report_error
+ >
+2167 : >skip1609
+ >
+2167 : 68 > pla ;load status
+2168 : 48 > pha
+ > cmp_flag fnv
+2169 : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+216b : f003 > beq skip1612
+ > trap ;failed not equal (non zero)
+216d : 205b44 > jsr report_error
+ >
+2170 : >skip1612
+ >
+2170 : 28 > plp ;restore status
+
+
+ set_a $ff,$ff
+ > load_flag $ff
+2171 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2173 : 48 > pha ;use stack to load status
+2174 : a9ff > lda #$ff ;precharge accu
+2176 : 28 > plp
+
+2177 : 2416 bit zp1+3 ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+2179 : 08 > php ;save flags
+217a : c9ff > cmp #$ff ;test result
+ > trap_ne
+217c : f003 > beq skip1617
+ > trap ;failed not equal (non zero)
+217e : 205b44 > jsr report_error
+ >
+2181 : >skip1617
+ >
+2181 : 68 > pla ;load status
+2182 : 48 > pha
+ > cmp_flag ~fnv
+2183 : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2185 : f003 > beq skip1620
+ > trap ;failed not equal (non zero)
+2187 : 205b44 > jsr report_error
+ >
+218a : >skip1620
+ >
+218a : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+218b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+218d : 48 > pha ;use stack to load status
+218e : a901 > lda #1 ;precharge accu
+2190 : 28 > plp
+
+2191 : 2415 bit zp1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+2193 : 08 > php ;save flags
+2194 : c901 > cmp #1 ;test result
+ > trap_ne
+2196 : f003 > beq skip1625
+ > trap ;failed not equal (non zero)
+2198 : 205b44 > jsr report_error
+ >
+219b : >skip1625
+ >
+219b : 68 > pla ;load status
+219c : 48 > pha
+ > cmp_flag ~fnz
+219d : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+219f : f003 > beq skip1628
+ > trap ;failed not equal (non zero)
+21a1 : 205b44 > jsr report_error
+ >
+21a4 : >skip1628
+ >
+21a4 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+21a5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+21a7 : 48 > pha ;use stack to load status
+21a8 : a901 > lda #1 ;precharge accu
+21aa : 28 > plp
+
+21ab : 2414 bit zp1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+21ad : 08 > php ;save flags
+21ae : c901 > cmp #1 ;test result
+ > trap_ne
+21b0 : f003 > beq skip1633
+ > trap ;failed not equal (non zero)
+21b2 : 205b44 > jsr report_error
+ >
+21b5 : >skip1633
+ >
+21b5 : 68 > pla ;load status
+21b6 : 48 > pha
+ > cmp_flag ~fv
+21b7 : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21b9 : f003 > beq skip1636
+ > trap ;failed not equal (non zero)
+21bb : 205b44 > jsr report_error
+ >
+21be : >skip1636
+ >
+21be : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+21bf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+21c1 : 48 > pha ;use stack to load status
+21c2 : a901 > lda #1 ;precharge accu
+21c4 : 28 > plp
+
+21c5 : 2413 bit zp1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+21c7 : 08 > php ;save flags
+21c8 : c901 > cmp #1 ;test result
+ > trap_ne
+21ca : f003 > beq skip1641
+ > trap ;failed not equal (non zero)
+21cc : 205b44 > jsr report_error
+ >
+21cf : >skip1641
+ >
+21cf : 68 > pla ;load status
+21d0 : 48 > pha
+ > cmp_flag ~fz
+21d1 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21d3 : f003 > beq skip1644
+ > trap ;failed not equal (non zero)
+21d5 : 205b44 > jsr report_error
+ >
+21d8 : >skip1644
+ >
+21d8 : 28 > plp ;restore status
+
+
+ set_a $ff,0
+ > load_flag 0
+21d9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21db : 48 > pha ;use stack to load status
+21dc : a9ff > lda #$ff ;precharge accu
+21de : 28 > plp
+
+21df : 2c1a02 bit abs1+3 ;00 - should set Z / clear NV
+ tst_a $ff,fz
+21e2 : 08 > php ;save flags
+21e3 : c9ff > cmp #$ff ;test result
+ > trap_ne
+21e5 : f003 > beq skip1649
+ > trap ;failed not equal (non zero)
+21e7 : 205b44 > jsr report_error
+ >
+21ea : >skip1649
+ >
+21ea : 68 > pla ;load status
+21eb : 48 > pha
+ > cmp_flag fz
+21ec : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21ee : f003 > beq skip1652
+ > trap ;failed not equal (non zero)
+21f0 : 205b44 > jsr report_error
+ >
+21f3 : >skip1652
+ >
+21f3 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+21f4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21f6 : 48 > pha ;use stack to load status
+21f7 : a901 > lda #1 ;precharge accu
+21f9 : 28 > plp
+
+21fa : 2c1902 bit abs1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+21fd : 08 > php ;save flags
+21fe : c901 > cmp #1 ;test result
+ > trap_ne
+2200 : f003 > beq skip1657
+ > trap ;failed not equal (non zero)
+2202 : 205b44 > jsr report_error
+ >
+2205 : >skip1657
+ >
+2205 : 68 > pla ;load status
+2206 : 48 > pha
+ > cmp_flag fv
+2207 : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2209 : f003 > beq skip1660
+ > trap ;failed not equal (non zero)
+220b : 205b44 > jsr report_error
+ >
+220e : >skip1660
+ >
+220e : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+220f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2211 : 48 > pha ;use stack to load status
+2212 : a901 > lda #1 ;precharge accu
+2214 : 28 > plp
+
+2215 : 2c1802 bit abs1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+2218 : 08 > php ;save flags
+2219 : c901 > cmp #1 ;test result
+ > trap_ne
+221b : f003 > beq skip1665
+ > trap ;failed not equal (non zero)
+221d : 205b44 > jsr report_error
+ >
+2220 : >skip1665
+ >
+2220 : 68 > pla ;load status
+2221 : 48 > pha
+ > cmp_flag fnz
+2222 : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2224 : f003 > beq skip1668
+ > trap ;failed not equal (non zero)
+2226 : 205b44 > jsr report_error
+ >
+2229 : >skip1668
+ >
+2229 : 28 > plp ;restore status
+
+ set_a 1,0
+ > load_flag 0
+222a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+222c : 48 > pha ;use stack to load status
+222d : a901 > lda #1 ;precharge accu
+222f : 28 > plp
+
+2230 : 2c1702 bit abs1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+2233 : 08 > php ;save flags
+2234 : c901 > cmp #1 ;test result
+ > trap_ne
+2236 : f003 > beq skip1673
+ > trap ;failed not equal (non zero)
+2238 : 205b44 > jsr report_error
+ >
+223b : >skip1673
+ >
+223b : 68 > pla ;load status
+223c : 48 > pha
+ > cmp_flag fnv
+223d : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+223f : f003 > beq skip1676
+ > trap ;failed not equal (non zero)
+2241 : 205b44 > jsr report_error
+ >
+2244 : >skip1676
+ >
+2244 : 28 > plp ;restore status
+
+
+ set_a $ff,$ff
+ > load_flag $ff
+2245 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2247 : 48 > pha ;use stack to load status
+2248 : a9ff > lda #$ff ;precharge accu
+224a : 28 > plp
+
+224b : 2c1a02 bit abs1+3 ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+224e : 08 > php ;save flags
+224f : c9ff > cmp #$ff ;test result
+ > trap_ne
+2251 : f003 > beq skip1681
+ > trap ;failed not equal (non zero)
+2253 : 205b44 > jsr report_error
+ >
+2256 : >skip1681
+ >
+2256 : 68 > pla ;load status
+2257 : 48 > pha
+ > cmp_flag ~fnv
+2258 : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+225a : f003 > beq skip1684
+ > trap ;failed not equal (non zero)
+225c : 205b44 > jsr report_error
+ >
+225f : >skip1684
+ >
+225f : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+2260 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2262 : 48 > pha ;use stack to load status
+2263 : a901 > lda #1 ;precharge accu
+2265 : 28 > plp
+
+2266 : 2c1902 bit abs1+2 ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+2269 : 08 > php ;save flags
+226a : c901 > cmp #1 ;test result
+ > trap_ne
+226c : f003 > beq skip1689
+ > trap ;failed not equal (non zero)
+226e : 205b44 > jsr report_error
+ >
+2271 : >skip1689
+ >
+2271 : 68 > pla ;load status
+2272 : 48 > pha
+ > cmp_flag ~fnz
+2273 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2275 : f003 > beq skip1692
+ > trap ;failed not equal (non zero)
+2277 : 205b44 > jsr report_error
+ >
+227a : >skip1692
+ >
+227a : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+227b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+227d : 48 > pha ;use stack to load status
+227e : a901 > lda #1 ;precharge accu
+2280 : 28 > plp
+
+2281 : 2c1802 bit abs1+1 ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+2284 : 08 > php ;save flags
+2285 : c901 > cmp #1 ;test result
+ > trap_ne
+2287 : f003 > beq skip1697
+ > trap ;failed not equal (non zero)
+2289 : 205b44 > jsr report_error
+ >
+228c : >skip1697
+ >
+228c : 68 > pla ;load status
+228d : 48 > pha
+ > cmp_flag ~fv
+228e : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2290 : f003 > beq skip1700
+ > trap ;failed not equal (non zero)
+2292 : 205b44 > jsr report_error
+ >
+2295 : >skip1700
+ >
+2295 : 28 > plp ;restore status
+
+ set_a 1,$ff
+ > load_flag $ff
+2296 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2298 : 48 > pha ;use stack to load status
+2299 : a901 > lda #1 ;precharge accu
+229b : 28 > plp
+
+229c : 2c1702 bit abs1 ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+229f : 08 > php ;save flags
+22a0 : c901 > cmp #1 ;test result
+ > trap_ne
+22a2 : f003 > beq skip1705
+ > trap ;failed not equal (non zero)
+22a4 : 205b44 > jsr report_error
+ >
+22a7 : >skip1705
+ >
+22a7 : 68 > pla ;load status
+22a8 : 48 > pha
+ > cmp_flag ~fz
+22a9 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22ab : f003 > beq skip1708
+ > trap ;failed not equal (non zero)
+22ad : 205b44 > jsr report_error
+ >
+22b0 : >skip1708
+ >
+22b0 : 28 > plp ;restore status
+
+ next_test
+22b1 : ad0002 > lda test_case ;previous test
+22b4 : c919 > cmp #test_num
+ > trap_ne ;test is out of sequence
+22b6 : f003 > beq skip1711
+ > trap ;failed not equal (non zero)
+22b8 : 205b44 > jsr report_error
+ >
+22bb : >skip1711
+ >
+001a = >test_num = test_num + 1
+22bb : a91a > lda #test_num ;*** next tests' number
+22bd : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CPX - zp / abs / #
+ set_x $80,0
+ > load_flag 0
+22c0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+22c2 : 48 > pha ;use stack to load status
+22c3 : a280 > ldx #$80 ;precharge index x
+22c5 : 28 > plp
+
+22c6 : e417 cpx zp7f
+ tst_stat fc
+22c8 : 08 > php ;save status
+22c9 : 68 > pla ;use stack to retrieve status
+22ca : 48 > pha
+ > cmp_flag fc
+22cb : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22cd : f003 > beq skip1717
+ > trap ;failed not equal (non zero)
+22cf : 205b44 > jsr report_error
+ >
+22d2 : >skip1717
+ >
+22d2 : 28 > plp ;restore status
+
+22d3 : ca dex
+22d4 : e417 cpx zp7f
+ tst_stat fzc
+22d6 : 08 > php ;save status
+22d7 : 68 > pla ;use stack to retrieve status
+22d8 : 48 > pha
+ > cmp_flag fzc
+22d9 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22db : f003 > beq skip1721
+ > trap ;failed not equal (non zero)
+22dd : 205b44 > jsr report_error
+ >
+22e0 : >skip1721
+ >
+22e0 : 28 > plp ;restore status
+
+22e1 : ca dex
+22e2 : e417 cpx zp7f
+ tst_x $7e,fn
+22e4 : 08 > php ;save flags
+22e5 : e07e > cpx #$7e ;test result
+ > trap_ne
+22e7 : f003 > beq skip1724
+ > trap ;failed not equal (non zero)
+22e9 : 205b44 > jsr report_error
+ >
+22ec : >skip1724
+ >
+22ec : 68 > pla ;load status
+22ed : 48 > pha
+ > cmp_flag fn
+22ee : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22f0 : f003 > beq skip1727
+ > trap ;failed not equal (non zero)
+22f2 : 205b44 > jsr report_error
+ >
+22f5 : >skip1727
+ >
+22f5 : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+22f6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+22f8 : 48 > pha ;use stack to load status
+22f9 : a280 > ldx #$80 ;precharge index x
+22fb : 28 > plp
+
+22fc : e417 cpx zp7f
+ tst_stat ~fnz
+22fe : 08 > php ;save status
+22ff : 68 > pla ;use stack to retrieve status
+2300 : 48 > pha
+ > cmp_flag ~fnz
+2301 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2303 : f003 > beq skip1733
+ > trap ;failed not equal (non zero)
+2305 : 205b44 > jsr report_error
+ >
+2308 : >skip1733
+ >
+2308 : 28 > plp ;restore status
+
+2309 : ca dex
+230a : e417 cpx zp7f
+ tst_stat ~fn
+230c : 08 > php ;save status
+230d : 68 > pla ;use stack to retrieve status
+230e : 48 > pha
+ > cmp_flag ~fn
+230f : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2311 : f003 > beq skip1737
+ > trap ;failed not equal (non zero)
+2313 : 205b44 > jsr report_error
+ >
+2316 : >skip1737
+ >
+2316 : 28 > plp ;restore status
+
+2317 : ca dex
+2318 : e417 cpx zp7f
+ tst_x $7e,~fzc
+231a : 08 > php ;save flags
+231b : e07e > cpx #$7e ;test result
+ > trap_ne
+231d : f003 > beq skip1740
+ > trap ;failed not equal (non zero)
+231f : 205b44 > jsr report_error
+ >
+2322 : >skip1740
+ >
+2322 : 68 > pla ;load status
+2323 : 48 > pha
+ > cmp_flag ~fzc
+2324 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2326 : f003 > beq skip1743
+ > trap ;failed not equal (non zero)
+2328 : 205b44 > jsr report_error
+ >
+232b : >skip1743
+ >
+232b : 28 > plp ;restore status
+
+
+ set_x $80,0
+ > load_flag 0
+232c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+232e : 48 > pha ;use stack to load status
+232f : a280 > ldx #$80 ;precharge index x
+2331 : 28 > plp
+
+2332 : ec1b02 cpx abs7f
+ tst_stat fc
+2335 : 08 > php ;save status
+2336 : 68 > pla ;use stack to retrieve status
+2337 : 48 > pha
+ > cmp_flag fc
+2338 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+233a : f003 > beq skip1749
+ > trap ;failed not equal (non zero)
+233c : 205b44 > jsr report_error
+ >
+233f : >skip1749
+ >
+233f : 28 > plp ;restore status
+
+2340 : ca dex
+2341 : ec1b02 cpx abs7f
+ tst_stat fzc
+2344 : 08 > php ;save status
+2345 : 68 > pla ;use stack to retrieve status
+2346 : 48 > pha
+ > cmp_flag fzc
+2347 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2349 : f003 > beq skip1753
+ > trap ;failed not equal (non zero)
+234b : 205b44 > jsr report_error
+ >
+234e : >skip1753
+ >
+234e : 28 > plp ;restore status
+
+234f : ca dex
+2350 : ec1b02 cpx abs7f
+ tst_x $7e,fn
+2353 : 08 > php ;save flags
+2354 : e07e > cpx #$7e ;test result
+ > trap_ne
+2356 : f003 > beq skip1756
+ > trap ;failed not equal (non zero)
+2358 : 205b44 > jsr report_error
+ >
+235b : >skip1756
+ >
+235b : 68 > pla ;load status
+235c : 48 > pha
+ > cmp_flag fn
+235d : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+235f : f003 > beq skip1759
+ > trap ;failed not equal (non zero)
+2361 : 205b44 > jsr report_error
+ >
+2364 : >skip1759
+ >
+2364 : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+2365 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2367 : 48 > pha ;use stack to load status
+2368 : a280 > ldx #$80 ;precharge index x
+236a : 28 > plp
+
+236b : ec1b02 cpx abs7f
+ tst_stat ~fnz
+236e : 08 > php ;save status
+236f : 68 > pla ;use stack to retrieve status
+2370 : 48 > pha
+ > cmp_flag ~fnz
+2371 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2373 : f003 > beq skip1765
+ > trap ;failed not equal (non zero)
+2375 : 205b44 > jsr report_error
+ >
+2378 : >skip1765
+ >
+2378 : 28 > plp ;restore status
+
+2379 : ca dex
+237a : ec1b02 cpx abs7f
+ tst_stat ~fn
+237d : 08 > php ;save status
+237e : 68 > pla ;use stack to retrieve status
+237f : 48 > pha
+ > cmp_flag ~fn
+2380 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2382 : f003 > beq skip1769
+ > trap ;failed not equal (non zero)
+2384 : 205b44 > jsr report_error
+ >
+2387 : >skip1769
+ >
+2387 : 28 > plp ;restore status
+
+2388 : ca dex
+2389 : ec1b02 cpx abs7f
+ tst_x $7e,~fzc
+238c : 08 > php ;save flags
+238d : e07e > cpx #$7e ;test result
+ > trap_ne
+238f : f003 > beq skip1772
+ > trap ;failed not equal (non zero)
+2391 : 205b44 > jsr report_error
+ >
+2394 : >skip1772
+ >
+2394 : 68 > pla ;load status
+2395 : 48 > pha
+ > cmp_flag ~fzc
+2396 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2398 : f003 > beq skip1775
+ > trap ;failed not equal (non zero)
+239a : 205b44 > jsr report_error
+ >
+239d : >skip1775
+ >
+239d : 28 > plp ;restore status
+
+
+ set_x $80,0
+ > load_flag 0
+239e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+23a0 : 48 > pha ;use stack to load status
+23a1 : a280 > ldx #$80 ;precharge index x
+23a3 : 28 > plp
+
+23a4 : e07f cpx #$7f
+ tst_stat fc
+23a6 : 08 > php ;save status
+23a7 : 68 > pla ;use stack to retrieve status
+23a8 : 48 > pha
+ > cmp_flag fc
+23a9 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+23ab : f003 > beq skip1781
+ > trap ;failed not equal (non zero)
+23ad : 205b44 > jsr report_error
+ >
+23b0 : >skip1781
+ >
+23b0 : 28 > plp ;restore status
+
+23b1 : ca dex
+23b2 : e07f cpx #$7f
+ tst_stat fzc
+23b4 : 08 > php ;save status
+23b5 : 68 > pla ;use stack to retrieve status
+23b6 : 48 > pha
+ > cmp_flag fzc
+23b7 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+23b9 : f003 > beq skip1785
+ > trap ;failed not equal (non zero)
+23bb : 205b44 > jsr report_error
+ >
+23be : >skip1785
+ >
+23be : 28 > plp ;restore status
+
+23bf : ca dex
+23c0 : e07f cpx #$7f
+ tst_x $7e,fn
+23c2 : 08 > php ;save flags
+23c3 : e07e > cpx #$7e ;test result
+ > trap_ne
+23c5 : f003 > beq skip1788
+ > trap ;failed not equal (non zero)
+23c7 : 205b44 > jsr report_error
+ >
+23ca : >skip1788
+ >
+23ca : 68 > pla ;load status
+23cb : 48 > pha
+ > cmp_flag fn
+23cc : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+23ce : f003 > beq skip1791
+ > trap ;failed not equal (non zero)
+23d0 : 205b44 > jsr report_error
+ >
+23d3 : >skip1791
+ >
+23d3 : 28 > plp ;restore status
+
+ set_x $80,$ff
+ > load_flag $ff
+23d4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+23d6 : 48 > pha ;use stack to load status
+23d7 : a280 > ldx #$80 ;precharge index x
+23d9 : 28 > plp
+
+23da : e07f cpx #$7f
+ tst_stat ~fnz
+23dc : 08 > php ;save status
+23dd : 68 > pla ;use stack to retrieve status
+23de : 48 > pha
+ > cmp_flag ~fnz
+23df : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+23e1 : f003 > beq skip1797
+ > trap ;failed not equal (non zero)
+23e3 : 205b44 > jsr report_error
+ >
+23e6 : >skip1797
+ >
+23e6 : 28 > plp ;restore status
+
+23e7 : ca dex
+23e8 : e07f cpx #$7f
+ tst_stat ~fn
+23ea : 08 > php ;save status
+23eb : 68 > pla ;use stack to retrieve status
+23ec : 48 > pha
+ > cmp_flag ~fn
+23ed : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+23ef : f003 > beq skip1801
+ > trap ;failed not equal (non zero)
+23f1 : 205b44 > jsr report_error
+ >
+23f4 : >skip1801
+ >
+23f4 : 28 > plp ;restore status
+
+23f5 : ca dex
+23f6 : e07f cpx #$7f
+ tst_x $7e,~fzc
+23f8 : 08 > php ;save flags
+23f9 : e07e > cpx #$7e ;test result
+ > trap_ne
+23fb : f003 > beq skip1804
+ > trap ;failed not equal (non zero)
+23fd : 205b44 > jsr report_error
+ >
+2400 : >skip1804
+ >
+2400 : 68 > pla ;load status
+2401 : 48 > pha
+ > cmp_flag ~fzc
+2402 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2404 : f003 > beq skip1807
+ > trap ;failed not equal (non zero)
+2406 : 205b44 > jsr report_error
+ >
+2409 : >skip1807
+ >
+2409 : 28 > plp ;restore status
+
+ next_test
+240a : ad0002 > lda test_case ;previous test
+240d : c91a > cmp #test_num
+ > trap_ne ;test is out of sequence
+240f : f003 > beq skip1810
+ > trap ;failed not equal (non zero)
+2411 : 205b44 > jsr report_error
+ >
+2414 : >skip1810
+ >
+001b = >test_num = test_num + 1
+2414 : a91b > lda #test_num ;*** next tests' number
+2416 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CPY - zp / abs / #
+ set_y $80,0
+ > load_flag 0
+2419 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+241b : 48 > pha ;use stack to load status
+241c : a080 > ldy #$80 ;precharge index y
+241e : 28 > plp
+
+241f : c417 cpy zp7f
+ tst_stat fc
+2421 : 08 > php ;save status
+2422 : 68 > pla ;use stack to retrieve status
+2423 : 48 > pha
+ > cmp_flag fc
+2424 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2426 : f003 > beq skip1816
+ > trap ;failed not equal (non zero)
+2428 : 205b44 > jsr report_error
+ >
+242b : >skip1816
+ >
+242b : 28 > plp ;restore status
+
+242c : 88 dey
+242d : c417 cpy zp7f
+ tst_stat fzc
+242f : 08 > php ;save status
+2430 : 68 > pla ;use stack to retrieve status
+2431 : 48 > pha
+ > cmp_flag fzc
+2432 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2434 : f003 > beq skip1820
+ > trap ;failed not equal (non zero)
+2436 : 205b44 > jsr report_error
+ >
+2439 : >skip1820
+ >
+2439 : 28 > plp ;restore status
+
+243a : 88 dey
+243b : c417 cpy zp7f
+ tst_y $7e,fn
+243d : 08 > php ;save flags
+243e : c07e > cpy #$7e ;test result
+ > trap_ne
+2440 : f003 > beq skip1823
+ > trap ;failed not equal (non zero)
+2442 : 205b44 > jsr report_error
+ >
+2445 : >skip1823
+ >
+2445 : 68 > pla ;load status
+2446 : 48 > pha
+ > cmp_flag fn
+2447 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2449 : f003 > beq skip1826
+ > trap ;failed not equal (non zero)
+244b : 205b44 > jsr report_error
+ >
+244e : >skip1826
+ >
+244e : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+244f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2451 : 48 > pha ;use stack to load status
+2452 : a080 > ldy #$80 ;precharge index y
+2454 : 28 > plp
+
+2455 : c417 cpy zp7f
+ tst_stat ~fnz
+2457 : 08 > php ;save status
+2458 : 68 > pla ;use stack to retrieve status
+2459 : 48 > pha
+ > cmp_flag ~fnz
+245a : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+245c : f003 > beq skip1832
+ > trap ;failed not equal (non zero)
+245e : 205b44 > jsr report_error
+ >
+2461 : >skip1832
+ >
+2461 : 28 > plp ;restore status
+
+2462 : 88 dey
+2463 : c417 cpy zp7f
+ tst_stat ~fn
+2465 : 08 > php ;save status
+2466 : 68 > pla ;use stack to retrieve status
+2467 : 48 > pha
+ > cmp_flag ~fn
+2468 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+246a : f003 > beq skip1836
+ > trap ;failed not equal (non zero)
+246c : 205b44 > jsr report_error
+ >
+246f : >skip1836
+ >
+246f : 28 > plp ;restore status
+
+2470 : 88 dey
+2471 : c417 cpy zp7f
+ tst_y $7e,~fzc
+2473 : 08 > php ;save flags
+2474 : c07e > cpy #$7e ;test result
+ > trap_ne
+2476 : f003 > beq skip1839
+ > trap ;failed not equal (non zero)
+2478 : 205b44 > jsr report_error
+ >
+247b : >skip1839
+ >
+247b : 68 > pla ;load status
+247c : 48 > pha
+ > cmp_flag ~fzc
+247d : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+247f : f003 > beq skip1842
+ > trap ;failed not equal (non zero)
+2481 : 205b44 > jsr report_error
+ >
+2484 : >skip1842
+ >
+2484 : 28 > plp ;restore status
+
+
+ set_y $80,0
+ > load_flag 0
+2485 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2487 : 48 > pha ;use stack to load status
+2488 : a080 > ldy #$80 ;precharge index y
+248a : 28 > plp
+
+248b : cc1b02 cpy abs7f
+ tst_stat fc
+248e : 08 > php ;save status
+248f : 68 > pla ;use stack to retrieve status
+2490 : 48 > pha
+ > cmp_flag fc
+2491 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2493 : f003 > beq skip1848
+ > trap ;failed not equal (non zero)
+2495 : 205b44 > jsr report_error
+ >
+2498 : >skip1848
+ >
+2498 : 28 > plp ;restore status
+
+2499 : 88 dey
+249a : cc1b02 cpy abs7f
+ tst_stat fzc
+249d : 08 > php ;save status
+249e : 68 > pla ;use stack to retrieve status
+249f : 48 > pha
+ > cmp_flag fzc
+24a0 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+24a2 : f003 > beq skip1852
+ > trap ;failed not equal (non zero)
+24a4 : 205b44 > jsr report_error
+ >
+24a7 : >skip1852
+ >
+24a7 : 28 > plp ;restore status
+
+24a8 : 88 dey
+24a9 : cc1b02 cpy abs7f
+ tst_y $7e,fn
+24ac : 08 > php ;save flags
+24ad : c07e > cpy #$7e ;test result
+ > trap_ne
+24af : f003 > beq skip1855
+ > trap ;failed not equal (non zero)
+24b1 : 205b44 > jsr report_error
+ >
+24b4 : >skip1855
+ >
+24b4 : 68 > pla ;load status
+24b5 : 48 > pha
+ > cmp_flag fn
+24b6 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+24b8 : f003 > beq skip1858
+ > trap ;failed not equal (non zero)
+24ba : 205b44 > jsr report_error
+ >
+24bd : >skip1858
+ >
+24bd : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+24be : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+24c0 : 48 > pha ;use stack to load status
+24c1 : a080 > ldy #$80 ;precharge index y
+24c3 : 28 > plp
+
+24c4 : cc1b02 cpy abs7f
+ tst_stat ~fnz
+24c7 : 08 > php ;save status
+24c8 : 68 > pla ;use stack to retrieve status
+24c9 : 48 > pha
+ > cmp_flag ~fnz
+24ca : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+24cc : f003 > beq skip1864
+ > trap ;failed not equal (non zero)
+24ce : 205b44 > jsr report_error
+ >
+24d1 : >skip1864
+ >
+24d1 : 28 > plp ;restore status
+
+24d2 : 88 dey
+24d3 : cc1b02 cpy abs7f
+ tst_stat ~fn
+24d6 : 08 > php ;save status
+24d7 : 68 > pla ;use stack to retrieve status
+24d8 : 48 > pha
+ > cmp_flag ~fn
+24d9 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+24db : f003 > beq skip1868
+ > trap ;failed not equal (non zero)
+24dd : 205b44 > jsr report_error
+ >
+24e0 : >skip1868
+ >
+24e0 : 28 > plp ;restore status
+
+24e1 : 88 dey
+24e2 : cc1b02 cpy abs7f
+ tst_y $7e,~fzc
+24e5 : 08 > php ;save flags
+24e6 : c07e > cpy #$7e ;test result
+ > trap_ne
+24e8 : f003 > beq skip1871
+ > trap ;failed not equal (non zero)
+24ea : 205b44 > jsr report_error
+ >
+24ed : >skip1871
+ >
+24ed : 68 > pla ;load status
+24ee : 48 > pha
+ > cmp_flag ~fzc
+24ef : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+24f1 : f003 > beq skip1874
+ > trap ;failed not equal (non zero)
+24f3 : 205b44 > jsr report_error
+ >
+24f6 : >skip1874
+ >
+24f6 : 28 > plp ;restore status
+
+
+ set_y $80,0
+ > load_flag 0
+24f7 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+24f9 : 48 > pha ;use stack to load status
+24fa : a080 > ldy #$80 ;precharge index y
+24fc : 28 > plp
+
+24fd : c07f cpy #$7f
+ tst_stat fc
+24ff : 08 > php ;save status
+2500 : 68 > pla ;use stack to retrieve status
+2501 : 48 > pha
+ > cmp_flag fc
+2502 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2504 : f003 > beq skip1880
+ > trap ;failed not equal (non zero)
+2506 : 205b44 > jsr report_error
+ >
+2509 : >skip1880
+ >
+2509 : 28 > plp ;restore status
+
+250a : 88 dey
+250b : c07f cpy #$7f
+ tst_stat fzc
+250d : 08 > php ;save status
+250e : 68 > pla ;use stack to retrieve status
+250f : 48 > pha
+ > cmp_flag fzc
+2510 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2512 : f003 > beq skip1884
+ > trap ;failed not equal (non zero)
+2514 : 205b44 > jsr report_error
+ >
+2517 : >skip1884
+ >
+2517 : 28 > plp ;restore status
+
+2518 : 88 dey
+2519 : c07f cpy #$7f
+ tst_y $7e,fn
+251b : 08 > php ;save flags
+251c : c07e > cpy #$7e ;test result
+ > trap_ne
+251e : f003 > beq skip1887
+ > trap ;failed not equal (non zero)
+2520 : 205b44 > jsr report_error
+ >
+2523 : >skip1887
+ >
+2523 : 68 > pla ;load status
+2524 : 48 > pha
+ > cmp_flag fn
+2525 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2527 : f003 > beq skip1890
+ > trap ;failed not equal (non zero)
+2529 : 205b44 > jsr report_error
+ >
+252c : >skip1890
+ >
+252c : 28 > plp ;restore status
+
+ set_y $80,$ff
+ > load_flag $ff
+252d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+252f : 48 > pha ;use stack to load status
+2530 : a080 > ldy #$80 ;precharge index y
+2532 : 28 > plp
+
+2533 : c07f cpy #$7f
+ tst_stat ~fnz
+2535 : 08 > php ;save status
+2536 : 68 > pla ;use stack to retrieve status
+2537 : 48 > pha
+ > cmp_flag ~fnz
+2538 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+253a : f003 > beq skip1896
+ > trap ;failed not equal (non zero)
+253c : 205b44 > jsr report_error
+ >
+253f : >skip1896
+ >
+253f : 28 > plp ;restore status
+
+2540 : 88 dey
+2541 : c07f cpy #$7f
+ tst_stat ~fn
+2543 : 08 > php ;save status
+2544 : 68 > pla ;use stack to retrieve status
+2545 : 48 > pha
+ > cmp_flag ~fn
+2546 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2548 : f003 > beq skip1900
+ > trap ;failed not equal (non zero)
+254a : 205b44 > jsr report_error
+ >
+254d : >skip1900
+ >
+254d : 28 > plp ;restore status
+
+254e : 88 dey
+254f : c07f cpy #$7f
+ tst_y $7e,~fzc
+2551 : 08 > php ;save flags
+2552 : c07e > cpy #$7e ;test result
+ > trap_ne
+2554 : f003 > beq skip1903
+ > trap ;failed not equal (non zero)
+2556 : 205b44 > jsr report_error
+ >
+2559 : >skip1903
+ >
+2559 : 68 > pla ;load status
+255a : 48 > pha
+ > cmp_flag ~fzc
+255b : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+255d : f003 > beq skip1906
+ > trap ;failed not equal (non zero)
+255f : 205b44 > jsr report_error
+ >
+2562 : >skip1906
+ >
+2562 : 28 > plp ;restore status
+
+ next_test
+2563 : ad0002 > lda test_case ;previous test
+2566 : c91b > cmp #test_num
+ > trap_ne ;test is out of sequence
+2568 : f003 > beq skip1909
+ > trap ;failed not equal (non zero)
+256a : 205b44 > jsr report_error
+ >
+256d : >skip1909
+ >
+001c = >test_num = test_num + 1
+256d : a91c > lda #test_num ;*** next tests' number
+256f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; CMP - zp / abs / #
+ set_a $80,0
+ > load_flag 0
+2572 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2574 : 48 > pha ;use stack to load status
+2575 : a980 > lda #$80 ;precharge accu
+2577 : 28 > plp
+
+2578 : c517 cmp zp7f
+ tst_a $80,fc
+257a : 08 > php ;save flags
+257b : c980 > cmp #$80 ;test result
+ > trap_ne
+257d : f003 > beq skip1914
+ > trap ;failed not equal (non zero)
+257f : 205b44 > jsr report_error
+ >
+2582 : >skip1914
+ >
+2582 : 68 > pla ;load status
+2583 : 48 > pha
+ > cmp_flag fc
+2584 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2586 : f003 > beq skip1917
+ > trap ;failed not equal (non zero)
+2588 : 205b44 > jsr report_error
+ >
+258b : >skip1917
+ >
+258b : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+258c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+258e : 48 > pha ;use stack to load status
+258f : a97f > lda #$7f ;precharge accu
+2591 : 28 > plp
+
+2592 : c517 cmp zp7f
+ tst_a $7f,fzc
+2594 : 08 > php ;save flags
+2595 : c97f > cmp #$7f ;test result
+ > trap_ne
+2597 : f003 > beq skip1922
+ > trap ;failed not equal (non zero)
+2599 : 205b44 > jsr report_error
+ >
+259c : >skip1922
+ >
+259c : 68 > pla ;load status
+259d : 48 > pha
+ > cmp_flag fzc
+259e : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+25a0 : f003 > beq skip1925
+ > trap ;failed not equal (non zero)
+25a2 : 205b44 > jsr report_error
+ >
+25a5 : >skip1925
+ >
+25a5 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+25a6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+25a8 : 48 > pha ;use stack to load status
+25a9 : a97e > lda #$7e ;precharge accu
+25ab : 28 > plp
+
+25ac : c517 cmp zp7f
+ tst_a $7e,fn
+25ae : 08 > php ;save flags
+25af : c97e > cmp #$7e ;test result
+ > trap_ne
+25b1 : f003 > beq skip1930
+ > trap ;failed not equal (non zero)
+25b3 : 205b44 > jsr report_error
+ >
+25b6 : >skip1930
+ >
+25b6 : 68 > pla ;load status
+25b7 : 48 > pha
+ > cmp_flag fn
+25b8 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+25ba : f003 > beq skip1933
+ > trap ;failed not equal (non zero)
+25bc : 205b44 > jsr report_error
+ >
+25bf : >skip1933
+ >
+25bf : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+25c0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+25c2 : 48 > pha ;use stack to load status
+25c3 : a980 > lda #$80 ;precharge accu
+25c5 : 28 > plp
+
+25c6 : c517 cmp zp7f
+ tst_a $80,~fnz
+25c8 : 08 > php ;save flags
+25c9 : c980 > cmp #$80 ;test result
+ > trap_ne
+25cb : f003 > beq skip1938
+ > trap ;failed not equal (non zero)
+25cd : 205b44 > jsr report_error
+ >
+25d0 : >skip1938
+ >
+25d0 : 68 > pla ;load status
+25d1 : 48 > pha
+ > cmp_flag ~fnz
+25d2 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+25d4 : f003 > beq skip1941
+ > trap ;failed not equal (non zero)
+25d6 : 205b44 > jsr report_error
+ >
+25d9 : >skip1941
+ >
+25d9 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+25da : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+25dc : 48 > pha ;use stack to load status
+25dd : a97f > lda #$7f ;precharge accu
+25df : 28 > plp
+
+25e0 : c517 cmp zp7f
+ tst_a $7f,~fn
+25e2 : 08 > php ;save flags
+25e3 : c97f > cmp #$7f ;test result
+ > trap_ne
+25e5 : f003 > beq skip1946
+ > trap ;failed not equal (non zero)
+25e7 : 205b44 > jsr report_error
+ >
+25ea : >skip1946
+ >
+25ea : 68 > pla ;load status
+25eb : 48 > pha
+ > cmp_flag ~fn
+25ec : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+25ee : f003 > beq skip1949
+ > trap ;failed not equal (non zero)
+25f0 : 205b44 > jsr report_error
+ >
+25f3 : >skip1949
+ >
+25f3 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+25f4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+25f6 : 48 > pha ;use stack to load status
+25f7 : a97e > lda #$7e ;precharge accu
+25f9 : 28 > plp
+
+25fa : c517 cmp zp7f
+ tst_a $7e,~fzc
+25fc : 08 > php ;save flags
+25fd : c97e > cmp #$7e ;test result
+ > trap_ne
+25ff : f003 > beq skip1954
+ > trap ;failed not equal (non zero)
+2601 : 205b44 > jsr report_error
+ >
+2604 : >skip1954
+ >
+2604 : 68 > pla ;load status
+2605 : 48 > pha
+ > cmp_flag ~fzc
+2606 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2608 : f003 > beq skip1957
+ > trap ;failed not equal (non zero)
+260a : 205b44 > jsr report_error
+ >
+260d : >skip1957
+ >
+260d : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+260e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2610 : 48 > pha ;use stack to load status
+2611 : a980 > lda #$80 ;precharge accu
+2613 : 28 > plp
+
+2614 : cd1b02 cmp abs7f
+ tst_a $80,fc
+2617 : 08 > php ;save flags
+2618 : c980 > cmp #$80 ;test result
+ > trap_ne
+261a : f003 > beq skip1962
+ > trap ;failed not equal (non zero)
+261c : 205b44 > jsr report_error
+ >
+261f : >skip1962
+ >
+261f : 68 > pla ;load status
+2620 : 48 > pha
+ > cmp_flag fc
+2621 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2623 : f003 > beq skip1965
+ > trap ;failed not equal (non zero)
+2625 : 205b44 > jsr report_error
+ >
+2628 : >skip1965
+ >
+2628 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+2629 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+262b : 48 > pha ;use stack to load status
+262c : a97f > lda #$7f ;precharge accu
+262e : 28 > plp
+
+262f : cd1b02 cmp abs7f
+ tst_a $7f,fzc
+2632 : 08 > php ;save flags
+2633 : c97f > cmp #$7f ;test result
+ > trap_ne
+2635 : f003 > beq skip1970
+ > trap ;failed not equal (non zero)
+2637 : 205b44 > jsr report_error
+ >
+263a : >skip1970
+ >
+263a : 68 > pla ;load status
+263b : 48 > pha
+ > cmp_flag fzc
+263c : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+263e : f003 > beq skip1973
+ > trap ;failed not equal (non zero)
+2640 : 205b44 > jsr report_error
+ >
+2643 : >skip1973
+ >
+2643 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2644 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2646 : 48 > pha ;use stack to load status
+2647 : a97e > lda #$7e ;precharge accu
+2649 : 28 > plp
+
+264a : cd1b02 cmp abs7f
+ tst_a $7e,fn
+264d : 08 > php ;save flags
+264e : c97e > cmp #$7e ;test result
+ > trap_ne
+2650 : f003 > beq skip1978
+ > trap ;failed not equal (non zero)
+2652 : 205b44 > jsr report_error
+ >
+2655 : >skip1978
+ >
+2655 : 68 > pla ;load status
+2656 : 48 > pha
+ > cmp_flag fn
+2657 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2659 : f003 > beq skip1981
+ > trap ;failed not equal (non zero)
+265b : 205b44 > jsr report_error
+ >
+265e : >skip1981
+ >
+265e : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+265f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2661 : 48 > pha ;use stack to load status
+2662 : a980 > lda #$80 ;precharge accu
+2664 : 28 > plp
+
+2665 : cd1b02 cmp abs7f
+ tst_a $80,~fnz
+2668 : 08 > php ;save flags
+2669 : c980 > cmp #$80 ;test result
+ > trap_ne
+266b : f003 > beq skip1986
+ > trap ;failed not equal (non zero)
+266d : 205b44 > jsr report_error
+ >
+2670 : >skip1986
+ >
+2670 : 68 > pla ;load status
+2671 : 48 > pha
+ > cmp_flag ~fnz
+2672 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2674 : f003 > beq skip1989
+ > trap ;failed not equal (non zero)
+2676 : 205b44 > jsr report_error
+ >
+2679 : >skip1989
+ >
+2679 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+267a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+267c : 48 > pha ;use stack to load status
+267d : a97f > lda #$7f ;precharge accu
+267f : 28 > plp
+
+2680 : cd1b02 cmp abs7f
+ tst_a $7f,~fn
+2683 : 08 > php ;save flags
+2684 : c97f > cmp #$7f ;test result
+ > trap_ne
+2686 : f003 > beq skip1994
+ > trap ;failed not equal (non zero)
+2688 : 205b44 > jsr report_error
+ >
+268b : >skip1994
+ >
+268b : 68 > pla ;load status
+268c : 48 > pha
+ > cmp_flag ~fn
+268d : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+268f : f003 > beq skip1997
+ > trap ;failed not equal (non zero)
+2691 : 205b44 > jsr report_error
+ >
+2694 : >skip1997
+ >
+2694 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2695 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2697 : 48 > pha ;use stack to load status
+2698 : a97e > lda #$7e ;precharge accu
+269a : 28 > plp
+
+269b : cd1b02 cmp abs7f
+ tst_a $7e,~fzc
+269e : 08 > php ;save flags
+269f : c97e > cmp #$7e ;test result
+ > trap_ne
+26a1 : f003 > beq skip2002
+ > trap ;failed not equal (non zero)
+26a3 : 205b44 > jsr report_error
+ >
+26a6 : >skip2002
+ >
+26a6 : 68 > pla ;load status
+26a7 : 48 > pha
+ > cmp_flag ~fzc
+26a8 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+26aa : f003 > beq skip2005
+ > trap ;failed not equal (non zero)
+26ac : 205b44 > jsr report_error
+ >
+26af : >skip2005
+ >
+26af : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+26b0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+26b2 : 48 > pha ;use stack to load status
+26b3 : a980 > lda #$80 ;precharge accu
+26b5 : 28 > plp
+
+26b6 : c97f cmp #$7f
+ tst_a $80,fc
+26b8 : 08 > php ;save flags
+26b9 : c980 > cmp #$80 ;test result
+ > trap_ne
+26bb : f003 > beq skip2010
+ > trap ;failed not equal (non zero)
+26bd : 205b44 > jsr report_error
+ >
+26c0 : >skip2010
+ >
+26c0 : 68 > pla ;load status
+26c1 : 48 > pha
+ > cmp_flag fc
+26c2 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+26c4 : f003 > beq skip2013
+ > trap ;failed not equal (non zero)
+26c6 : 205b44 > jsr report_error
+ >
+26c9 : >skip2013
+ >
+26c9 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+26ca : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+26cc : 48 > pha ;use stack to load status
+26cd : a97f > lda #$7f ;precharge accu
+26cf : 28 > plp
+
+26d0 : c97f cmp #$7f
+ tst_a $7f,fzc
+26d2 : 08 > php ;save flags
+26d3 : c97f > cmp #$7f ;test result
+ > trap_ne
+26d5 : f003 > beq skip2018
+ > trap ;failed not equal (non zero)
+26d7 : 205b44 > jsr report_error
+ >
+26da : >skip2018
+ >
+26da : 68 > pla ;load status
+26db : 48 > pha
+ > cmp_flag fzc
+26dc : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+26de : f003 > beq skip2021
+ > trap ;failed not equal (non zero)
+26e0 : 205b44 > jsr report_error
+ >
+26e3 : >skip2021
+ >
+26e3 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+26e4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+26e6 : 48 > pha ;use stack to load status
+26e7 : a97e > lda #$7e ;precharge accu
+26e9 : 28 > plp
+
+26ea : c97f cmp #$7f
+ tst_a $7e,fn
+26ec : 08 > php ;save flags
+26ed : c97e > cmp #$7e ;test result
+ > trap_ne
+26ef : f003 > beq skip2026
+ > trap ;failed not equal (non zero)
+26f1 : 205b44 > jsr report_error
+ >
+26f4 : >skip2026
+ >
+26f4 : 68 > pla ;load status
+26f5 : 48 > pha
+ > cmp_flag fn
+26f6 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+26f8 : f003 > beq skip2029
+ > trap ;failed not equal (non zero)
+26fa : 205b44 > jsr report_error
+ >
+26fd : >skip2029
+ >
+26fd : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+26fe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2700 : 48 > pha ;use stack to load status
+2701 : a980 > lda #$80 ;precharge accu
+2703 : 28 > plp
+
+2704 : c97f cmp #$7f
+ tst_a $80,~fnz
+2706 : 08 > php ;save flags
+2707 : c980 > cmp #$80 ;test result
+ > trap_ne
+2709 : f003 > beq skip2034
+ > trap ;failed not equal (non zero)
+270b : 205b44 > jsr report_error
+ >
+270e : >skip2034
+ >
+270e : 68 > pla ;load status
+270f : 48 > pha
+ > cmp_flag ~fnz
+2710 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2712 : f003 > beq skip2037
+ > trap ;failed not equal (non zero)
+2714 : 205b44 > jsr report_error
+ >
+2717 : >skip2037
+ >
+2717 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+2718 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+271a : 48 > pha ;use stack to load status
+271b : a97f > lda #$7f ;precharge accu
+271d : 28 > plp
+
+271e : c97f cmp #$7f
+ tst_a $7f,~fn
+2720 : 08 > php ;save flags
+2721 : c97f > cmp #$7f ;test result
+ > trap_ne
+2723 : f003 > beq skip2042
+ > trap ;failed not equal (non zero)
+2725 : 205b44 > jsr report_error
+ >
+2728 : >skip2042
+ >
+2728 : 68 > pla ;load status
+2729 : 48 > pha
+ > cmp_flag ~fn
+272a : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+272c : f003 > beq skip2045
+ > trap ;failed not equal (non zero)
+272e : 205b44 > jsr report_error
+ >
+2731 : >skip2045
+ >
+2731 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2732 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2734 : 48 > pha ;use stack to load status
+2735 : a97e > lda #$7e ;precharge accu
+2737 : 28 > plp
+
+2738 : c97f cmp #$7f
+ tst_a $7e,~fzc
+273a : 08 > php ;save flags
+273b : c97e > cmp #$7e ;test result
+ > trap_ne
+273d : f003 > beq skip2050
+ > trap ;failed not equal (non zero)
+273f : 205b44 > jsr report_error
+ >
+2742 : >skip2050
+ >
+2742 : 68 > pla ;load status
+2743 : 48 > pha
+ > cmp_flag ~fzc
+2744 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2746 : f003 > beq skip2053
+ > trap ;failed not equal (non zero)
+2748 : 205b44 > jsr report_error
+ >
+274b : >skip2053
+ >
+274b : 28 > plp ;restore status
+
+
+274c : a204 ldx #4 ;with indexing by X
+ set_a $80,0
+ > load_flag 0
+274e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2750 : 48 > pha ;use stack to load status
+2751 : a980 > lda #$80 ;precharge accu
+2753 : 28 > plp
+
+2754 : d513 cmp zp1,x
+ tst_a $80,fc
+2756 : 08 > php ;save flags
+2757 : c980 > cmp #$80 ;test result
+ > trap_ne
+2759 : f003 > beq skip2058
+ > trap ;failed not equal (non zero)
+275b : 205b44 > jsr report_error
+ >
+275e : >skip2058
+ >
+275e : 68 > pla ;load status
+275f : 48 > pha
+ > cmp_flag fc
+2760 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2762 : f003 > beq skip2061
+ > trap ;failed not equal (non zero)
+2764 : 205b44 > jsr report_error
+ >
+2767 : >skip2061
+ >
+2767 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+2768 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+276a : 48 > pha ;use stack to load status
+276b : a97f > lda #$7f ;precharge accu
+276d : 28 > plp
+
+276e : d513 cmp zp1,x
+ tst_a $7f,fzc
+2770 : 08 > php ;save flags
+2771 : c97f > cmp #$7f ;test result
+ > trap_ne
+2773 : f003 > beq skip2066
+ > trap ;failed not equal (non zero)
+2775 : 205b44 > jsr report_error
+ >
+2778 : >skip2066
+ >
+2778 : 68 > pla ;load status
+2779 : 48 > pha
+ > cmp_flag fzc
+277a : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+277c : f003 > beq skip2069
+ > trap ;failed not equal (non zero)
+277e : 205b44 > jsr report_error
+ >
+2781 : >skip2069
+ >
+2781 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2782 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2784 : 48 > pha ;use stack to load status
+2785 : a97e > lda #$7e ;precharge accu
+2787 : 28 > plp
+
+2788 : d513 cmp zp1,x
+ tst_a $7e,fn
+278a : 08 > php ;save flags
+278b : c97e > cmp #$7e ;test result
+ > trap_ne
+278d : f003 > beq skip2074
+ > trap ;failed not equal (non zero)
+278f : 205b44 > jsr report_error
+ >
+2792 : >skip2074
+ >
+2792 : 68 > pla ;load status
+2793 : 48 > pha
+ > cmp_flag fn
+2794 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2796 : f003 > beq skip2077
+ > trap ;failed not equal (non zero)
+2798 : 205b44 > jsr report_error
+ >
+279b : >skip2077
+ >
+279b : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+279c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+279e : 48 > pha ;use stack to load status
+279f : a980 > lda #$80 ;precharge accu
+27a1 : 28 > plp
+
+27a2 : d513 cmp zp1,x
+ tst_a $80,~fnz
+27a4 : 08 > php ;save flags
+27a5 : c980 > cmp #$80 ;test result
+ > trap_ne
+27a7 : f003 > beq skip2082
+ > trap ;failed not equal (non zero)
+27a9 : 205b44 > jsr report_error
+ >
+27ac : >skip2082
+ >
+27ac : 68 > pla ;load status
+27ad : 48 > pha
+ > cmp_flag ~fnz
+27ae : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+27b0 : f003 > beq skip2085
+ > trap ;failed not equal (non zero)
+27b2 : 205b44 > jsr report_error
+ >
+27b5 : >skip2085
+ >
+27b5 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+27b6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+27b8 : 48 > pha ;use stack to load status
+27b9 : a97f > lda #$7f ;precharge accu
+27bb : 28 > plp
+
+27bc : d513 cmp zp1,x
+ tst_a $7f,~fn
+27be : 08 > php ;save flags
+27bf : c97f > cmp #$7f ;test result
+ > trap_ne
+27c1 : f003 > beq skip2090
+ > trap ;failed not equal (non zero)
+27c3 : 205b44 > jsr report_error
+ >
+27c6 : >skip2090
+ >
+27c6 : 68 > pla ;load status
+27c7 : 48 > pha
+ > cmp_flag ~fn
+27c8 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+27ca : f003 > beq skip2093
+ > trap ;failed not equal (non zero)
+27cc : 205b44 > jsr report_error
+ >
+27cf : >skip2093
+ >
+27cf : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+27d0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+27d2 : 48 > pha ;use stack to load status
+27d3 : a97e > lda #$7e ;precharge accu
+27d5 : 28 > plp
+
+27d6 : d513 cmp zp1,x
+ tst_a $7e,~fzc
+27d8 : 08 > php ;save flags
+27d9 : c97e > cmp #$7e ;test result
+ > trap_ne
+27db : f003 > beq skip2098
+ > trap ;failed not equal (non zero)
+27dd : 205b44 > jsr report_error
+ >
+27e0 : >skip2098
+ >
+27e0 : 68 > pla ;load status
+27e1 : 48 > pha
+ > cmp_flag ~fzc
+27e2 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+27e4 : f003 > beq skip2101
+ > trap ;failed not equal (non zero)
+27e6 : 205b44 > jsr report_error
+ >
+27e9 : >skip2101
+ >
+27e9 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+27ea : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+27ec : 48 > pha ;use stack to load status
+27ed : a980 > lda #$80 ;precharge accu
+27ef : 28 > plp
+
+27f0 : dd1702 cmp abs1,x
+ tst_a $80,fc
+27f3 : 08 > php ;save flags
+27f4 : c980 > cmp #$80 ;test result
+ > trap_ne
+27f6 : f003 > beq skip2106
+ > trap ;failed not equal (non zero)
+27f8 : 205b44 > jsr report_error
+ >
+27fb : >skip2106
+ >
+27fb : 68 > pla ;load status
+27fc : 48 > pha
+ > cmp_flag fc
+27fd : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+27ff : f003 > beq skip2109
+ > trap ;failed not equal (non zero)
+2801 : 205b44 > jsr report_error
+ >
+2804 : >skip2109
+ >
+2804 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+2805 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2807 : 48 > pha ;use stack to load status
+2808 : a97f > lda #$7f ;precharge accu
+280a : 28 > plp
+
+280b : dd1702 cmp abs1,x
+ tst_a $7f,fzc
+280e : 08 > php ;save flags
+280f : c97f > cmp #$7f ;test result
+ > trap_ne
+2811 : f003 > beq skip2114
+ > trap ;failed not equal (non zero)
+2813 : 205b44 > jsr report_error
+ >
+2816 : >skip2114
+ >
+2816 : 68 > pla ;load status
+2817 : 48 > pha
+ > cmp_flag fzc
+2818 : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+281a : f003 > beq skip2117
+ > trap ;failed not equal (non zero)
+281c : 205b44 > jsr report_error
+ >
+281f : >skip2117
+ >
+281f : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2820 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2822 : 48 > pha ;use stack to load status
+2823 : a97e > lda #$7e ;precharge accu
+2825 : 28 > plp
+
+2826 : dd1702 cmp abs1,x
+ tst_a $7e,fn
+2829 : 08 > php ;save flags
+282a : c97e > cmp #$7e ;test result
+ > trap_ne
+282c : f003 > beq skip2122
+ > trap ;failed not equal (non zero)
+282e : 205b44 > jsr report_error
+ >
+2831 : >skip2122
+ >
+2831 : 68 > pla ;load status
+2832 : 48 > pha
+ > cmp_flag fn
+2833 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2835 : f003 > beq skip2125
+ > trap ;failed not equal (non zero)
+2837 : 205b44 > jsr report_error
+ >
+283a : >skip2125
+ >
+283a : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+283b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+283d : 48 > pha ;use stack to load status
+283e : a980 > lda #$80 ;precharge accu
+2840 : 28 > plp
+
+2841 : dd1702 cmp abs1,x
+ tst_a $80,~fnz
+2844 : 08 > php ;save flags
+2845 : c980 > cmp #$80 ;test result
+ > trap_ne
+2847 : f003 > beq skip2130
+ > trap ;failed not equal (non zero)
+2849 : 205b44 > jsr report_error
+ >
+284c : >skip2130
+ >
+284c : 68 > pla ;load status
+284d : 48 > pha
+ > cmp_flag ~fnz
+284e : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2850 : f003 > beq skip2133
+ > trap ;failed not equal (non zero)
+2852 : 205b44 > jsr report_error
+ >
+2855 : >skip2133
+ >
+2855 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+2856 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2858 : 48 > pha ;use stack to load status
+2859 : a97f > lda #$7f ;precharge accu
+285b : 28 > plp
+
+285c : dd1702 cmp abs1,x
+ tst_a $7f,~fn
+285f : 08 > php ;save flags
+2860 : c97f > cmp #$7f ;test result
+ > trap_ne
+2862 : f003 > beq skip2138
+ > trap ;failed not equal (non zero)
+2864 : 205b44 > jsr report_error
+ >
+2867 : >skip2138
+ >
+2867 : 68 > pla ;load status
+2868 : 48 > pha
+ > cmp_flag ~fn
+2869 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+286b : f003 > beq skip2141
+ > trap ;failed not equal (non zero)
+286d : 205b44 > jsr report_error
+ >
+2870 : >skip2141
+ >
+2870 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2871 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2873 : 48 > pha ;use stack to load status
+2874 : a97e > lda #$7e ;precharge accu
+2876 : 28 > plp
+
+2877 : dd1702 cmp abs1,x
+ tst_a $7e,~fzc
+287a : 08 > php ;save flags
+287b : c97e > cmp #$7e ;test result
+ > trap_ne
+287d : f003 > beq skip2146
+ > trap ;failed not equal (non zero)
+287f : 205b44 > jsr report_error
+ >
+2882 : >skip2146
+ >
+2882 : 68 > pla ;load status
+2883 : 48 > pha
+ > cmp_flag ~fzc
+2884 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2886 : f003 > beq skip2149
+ > trap ;failed not equal (non zero)
+2888 : 205b44 > jsr report_error
+ >
+288b : >skip2149
+ >
+288b : 28 > plp ;restore status
+
+
+288c : a004 ldy #4 ;with indexing by Y
+288e : a208 ldx #8 ;with indexed indirect
+ set_a $80,0
+ > load_flag 0
+2890 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2892 : 48 > pha ;use stack to load status
+2893 : a980 > lda #$80 ;precharge accu
+2895 : 28 > plp
+
+2896 : d91702 cmp abs1,y
+ tst_a $80,fc
+2899 : 08 > php ;save flags
+289a : c980 > cmp #$80 ;test result
+ > trap_ne
+289c : f003 > beq skip2154
+ > trap ;failed not equal (non zero)
+289e : 205b44 > jsr report_error
+ >
+28a1 : >skip2154
+ >
+28a1 : 68 > pla ;load status
+28a2 : 48 > pha
+ > cmp_flag fc
+28a3 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+28a5 : f003 > beq skip2157
+ > trap ;failed not equal (non zero)
+28a7 : 205b44 > jsr report_error
+ >
+28aa : >skip2157
+ >
+28aa : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+28ab : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+28ad : 48 > pha ;use stack to load status
+28ae : a97f > lda #$7f ;precharge accu
+28b0 : 28 > plp
+
+28b1 : d91702 cmp abs1,y
+ tst_a $7f,fzc
+28b4 : 08 > php ;save flags
+28b5 : c97f > cmp #$7f ;test result
+ > trap_ne
+28b7 : f003 > beq skip2162
+ > trap ;failed not equal (non zero)
+28b9 : 205b44 > jsr report_error
+ >
+28bc : >skip2162
+ >
+28bc : 68 > pla ;load status
+28bd : 48 > pha
+ > cmp_flag fzc
+28be : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+28c0 : f003 > beq skip2165
+ > trap ;failed not equal (non zero)
+28c2 : 205b44 > jsr report_error
+ >
+28c5 : >skip2165
+ >
+28c5 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+28c6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+28c8 : 48 > pha ;use stack to load status
+28c9 : a97e > lda #$7e ;precharge accu
+28cb : 28 > plp
+
+28cc : d91702 cmp abs1,y
+ tst_a $7e,fn
+28cf : 08 > php ;save flags
+28d0 : c97e > cmp #$7e ;test result
+ > trap_ne
+28d2 : f003 > beq skip2170
+ > trap ;failed not equal (non zero)
+28d4 : 205b44 > jsr report_error
+ >
+28d7 : >skip2170
+ >
+28d7 : 68 > pla ;load status
+28d8 : 48 > pha
+ > cmp_flag fn
+28d9 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+28db : f003 > beq skip2173
+ > trap ;failed not equal (non zero)
+28dd : 205b44 > jsr report_error
+ >
+28e0 : >skip2173
+ >
+28e0 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+28e1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+28e3 : 48 > pha ;use stack to load status
+28e4 : a980 > lda #$80 ;precharge accu
+28e6 : 28 > plp
+
+28e7 : d91702 cmp abs1,y
+ tst_a $80,~fnz
+28ea : 08 > php ;save flags
+28eb : c980 > cmp #$80 ;test result
+ > trap_ne
+28ed : f003 > beq skip2178
+ > trap ;failed not equal (non zero)
+28ef : 205b44 > jsr report_error
+ >
+28f2 : >skip2178
+ >
+28f2 : 68 > pla ;load status
+28f3 : 48 > pha
+ > cmp_flag ~fnz
+28f4 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+28f6 : f003 > beq skip2181
+ > trap ;failed not equal (non zero)
+28f8 : 205b44 > jsr report_error
+ >
+28fb : >skip2181
+ >
+28fb : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+28fc : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+28fe : 48 > pha ;use stack to load status
+28ff : a97f > lda #$7f ;precharge accu
+2901 : 28 > plp
+
+2902 : d91702 cmp abs1,y
+ tst_a $7f,~fn
+2905 : 08 > php ;save flags
+2906 : c97f > cmp #$7f ;test result
+ > trap_ne
+2908 : f003 > beq skip2186
+ > trap ;failed not equal (non zero)
+290a : 205b44 > jsr report_error
+ >
+290d : >skip2186
+ >
+290d : 68 > pla ;load status
+290e : 48 > pha
+ > cmp_flag ~fn
+290f : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2911 : f003 > beq skip2189
+ > trap ;failed not equal (non zero)
+2913 : 205b44 > jsr report_error
+ >
+2916 : >skip2189
+ >
+2916 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2917 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2919 : 48 > pha ;use stack to load status
+291a : a97e > lda #$7e ;precharge accu
+291c : 28 > plp
+
+291d : d91702 cmp abs1,y
+ tst_a $7e,~fzc
+2920 : 08 > php ;save flags
+2921 : c97e > cmp #$7e ;test result
+ > trap_ne
+2923 : f003 > beq skip2194
+ > trap ;failed not equal (non zero)
+2925 : 205b44 > jsr report_error
+ >
+2928 : >skip2194
+ >
+2928 : 68 > pla ;load status
+2929 : 48 > pha
+ > cmp_flag ~fzc
+292a : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+292c : f003 > beq skip2197
+ > trap ;failed not equal (non zero)
+292e : 205b44 > jsr report_error
+ >
+2931 : >skip2197
+ >
+2931 : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+2932 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2934 : 48 > pha ;use stack to load status
+2935 : a980 > lda #$80 ;precharge accu
+2937 : 28 > plp
+
+2938 : c124 cmp (ind1,x)
+ tst_a $80,fc
+293a : 08 > php ;save flags
+293b : c980 > cmp #$80 ;test result
+ > trap_ne
+293d : f003 > beq skip2202
+ > trap ;failed not equal (non zero)
+293f : 205b44 > jsr report_error
+ >
+2942 : >skip2202
+ >
+2942 : 68 > pla ;load status
+2943 : 48 > pha
+ > cmp_flag fc
+2944 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2946 : f003 > beq skip2205
+ > trap ;failed not equal (non zero)
+2948 : 205b44 > jsr report_error
+ >
+294b : >skip2205
+ >
+294b : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+294c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+294e : 48 > pha ;use stack to load status
+294f : a97f > lda #$7f ;precharge accu
+2951 : 28 > plp
+
+2952 : c124 cmp (ind1,x)
+ tst_a $7f,fzc
+2954 : 08 > php ;save flags
+2955 : c97f > cmp #$7f ;test result
+ > trap_ne
+2957 : f003 > beq skip2210
+ > trap ;failed not equal (non zero)
+2959 : 205b44 > jsr report_error
+ >
+295c : >skip2210
+ >
+295c : 68 > pla ;load status
+295d : 48 > pha
+ > cmp_flag fzc
+295e : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2960 : f003 > beq skip2213
+ > trap ;failed not equal (non zero)
+2962 : 205b44 > jsr report_error
+ >
+2965 : >skip2213
+ >
+2965 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2966 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2968 : 48 > pha ;use stack to load status
+2969 : a97e > lda #$7e ;precharge accu
+296b : 28 > plp
+
+296c : c124 cmp (ind1,x)
+ tst_a $7e,fn
+296e : 08 > php ;save flags
+296f : c97e > cmp #$7e ;test result
+ > trap_ne
+2971 : f003 > beq skip2218
+ > trap ;failed not equal (non zero)
+2973 : 205b44 > jsr report_error
+ >
+2976 : >skip2218
+ >
+2976 : 68 > pla ;load status
+2977 : 48 > pha
+ > cmp_flag fn
+2978 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+297a : f003 > beq skip2221
+ > trap ;failed not equal (non zero)
+297c : 205b44 > jsr report_error
+ >
+297f : >skip2221
+ >
+297f : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2980 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2982 : 48 > pha ;use stack to load status
+2983 : a980 > lda #$80 ;precharge accu
+2985 : 28 > plp
+
+2986 : c124 cmp (ind1,x)
+ tst_a $80,~fnz
+2988 : 08 > php ;save flags
+2989 : c980 > cmp #$80 ;test result
+ > trap_ne
+298b : f003 > beq skip2226
+ > trap ;failed not equal (non zero)
+298d : 205b44 > jsr report_error
+ >
+2990 : >skip2226
+ >
+2990 : 68 > pla ;load status
+2991 : 48 > pha
+ > cmp_flag ~fnz
+2992 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2994 : f003 > beq skip2229
+ > trap ;failed not equal (non zero)
+2996 : 205b44 > jsr report_error
+ >
+2999 : >skip2229
+ >
+2999 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+299a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+299c : 48 > pha ;use stack to load status
+299d : a97f > lda #$7f ;precharge accu
+299f : 28 > plp
+
+29a0 : c124 cmp (ind1,x)
+ tst_a $7f,~fn
+29a2 : 08 > php ;save flags
+29a3 : c97f > cmp #$7f ;test result
+ > trap_ne
+29a5 : f003 > beq skip2234
+ > trap ;failed not equal (non zero)
+29a7 : 205b44 > jsr report_error
+ >
+29aa : >skip2234
+ >
+29aa : 68 > pla ;load status
+29ab : 48 > pha
+ > cmp_flag ~fn
+29ac : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+29ae : f003 > beq skip2237
+ > trap ;failed not equal (non zero)
+29b0 : 205b44 > jsr report_error
+ >
+29b3 : >skip2237
+ >
+29b3 : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+29b4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+29b6 : 48 > pha ;use stack to load status
+29b7 : a97e > lda #$7e ;precharge accu
+29b9 : 28 > plp
+
+29ba : c124 cmp (ind1,x)
+ tst_a $7e,~fzc
+29bc : 08 > php ;save flags
+29bd : c97e > cmp #$7e ;test result
+ > trap_ne
+29bf : f003 > beq skip2242
+ > trap ;failed not equal (non zero)
+29c1 : 205b44 > jsr report_error
+ >
+29c4 : >skip2242
+ >
+29c4 : 68 > pla ;load status
+29c5 : 48 > pha
+ > cmp_flag ~fzc
+29c6 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+29c8 : f003 > beq skip2245
+ > trap ;failed not equal (non zero)
+29ca : 205b44 > jsr report_error
+ >
+29cd : >skip2245
+ >
+29cd : 28 > plp ;restore status
+
+
+ set_a $80,0
+ > load_flag 0
+29ce : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+29d0 : 48 > pha ;use stack to load status
+29d1 : a980 > lda #$80 ;precharge accu
+29d3 : 28 > plp
+
+29d4 : d124 cmp (ind1),y
+ tst_a $80,fc
+29d6 : 08 > php ;save flags
+29d7 : c980 > cmp #$80 ;test result
+ > trap_ne
+29d9 : f003 > beq skip2250
+ > trap ;failed not equal (non zero)
+29db : 205b44 > jsr report_error
+ >
+29de : >skip2250
+ >
+29de : 68 > pla ;load status
+29df : 48 > pha
+ > cmp_flag fc
+29e0 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+29e2 : f003 > beq skip2253
+ > trap ;failed not equal (non zero)
+29e4 : 205b44 > jsr report_error
+ >
+29e7 : >skip2253
+ >
+29e7 : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+29e8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+29ea : 48 > pha ;use stack to load status
+29eb : a97f > lda #$7f ;precharge accu
+29ed : 28 > plp
+
+29ee : d124 cmp (ind1),y
+ tst_a $7f,fzc
+29f0 : 08 > php ;save flags
+29f1 : c97f > cmp #$7f ;test result
+ > trap_ne
+29f3 : f003 > beq skip2258
+ > trap ;failed not equal (non zero)
+29f5 : 205b44 > jsr report_error
+ >
+29f8 : >skip2258
+ >
+29f8 : 68 > pla ;load status
+29f9 : 48 > pha
+ > cmp_flag fzc
+29fa : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+29fc : f003 > beq skip2261
+ > trap ;failed not equal (non zero)
+29fe : 205b44 > jsr report_error
+ >
+2a01 : >skip2261
+ >
+2a01 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2a02 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2a04 : 48 > pha ;use stack to load status
+2a05 : a97e > lda #$7e ;precharge accu
+2a07 : 28 > plp
+
+2a08 : d124 cmp (ind1),y
+ tst_a $7e,fn
+2a0a : 08 > php ;save flags
+2a0b : c97e > cmp #$7e ;test result
+ > trap_ne
+2a0d : f003 > beq skip2266
+ > trap ;failed not equal (non zero)
+2a0f : 205b44 > jsr report_error
+ >
+2a12 : >skip2266
+ >
+2a12 : 68 > pla ;load status
+2a13 : 48 > pha
+ > cmp_flag fn
+2a14 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2a16 : f003 > beq skip2269
+ > trap ;failed not equal (non zero)
+2a18 : 205b44 > jsr report_error
+ >
+2a1b : >skip2269
+ >
+2a1b : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2a1c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2a1e : 48 > pha ;use stack to load status
+2a1f : a980 > lda #$80 ;precharge accu
+2a21 : 28 > plp
+
+2a22 : d124 cmp (ind1),y
+ tst_a $80,~fnz
+2a24 : 08 > php ;save flags
+2a25 : c980 > cmp #$80 ;test result
+ > trap_ne
+2a27 : f003 > beq skip2274
+ > trap ;failed not equal (non zero)
+2a29 : 205b44 > jsr report_error
+ >
+2a2c : >skip2274
+ >
+2a2c : 68 > pla ;load status
+2a2d : 48 > pha
+ > cmp_flag ~fnz
+2a2e : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2a30 : f003 > beq skip2277
+ > trap ;failed not equal (non zero)
+2a32 : 205b44 > jsr report_error
+ >
+2a35 : >skip2277
+ >
+2a35 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+2a36 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2a38 : 48 > pha ;use stack to load status
+2a39 : a97f > lda #$7f ;precharge accu
+2a3b : 28 > plp
+
+2a3c : d124 cmp (ind1),y
+ tst_a $7f,~fn
+2a3e : 08 > php ;save flags
+2a3f : c97f > cmp #$7f ;test result
+ > trap_ne
+2a41 : f003 > beq skip2282
+ > trap ;failed not equal (non zero)
+2a43 : 205b44 > jsr report_error
+ >
+2a46 : >skip2282
+ >
+2a46 : 68 > pla ;load status
+2a47 : 48 > pha
+ > cmp_flag ~fn
+2a48 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2a4a : f003 > beq skip2285
+ > trap ;failed not equal (non zero)
+2a4c : 205b44 > jsr report_error
+ >
+2a4f : >skip2285
+ >
+2a4f : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+2a50 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2a52 : 48 > pha ;use stack to load status
+2a53 : a97e > lda #$7e ;precharge accu
+2a55 : 28 > plp
+
+2a56 : d124 cmp (ind1),y
+ tst_a $7e,~fzc
+2a58 : 08 > php ;save flags
+2a59 : c97e > cmp #$7e ;test result
+ > trap_ne
+2a5b : f003 > beq skip2290
+ > trap ;failed not equal (non zero)
+2a5d : 205b44 > jsr report_error
+ >
+2a60 : >skip2290
+ >
+2a60 : 68 > pla ;load status
+2a61 : 48 > pha
+ > cmp_flag ~fzc
+2a62 : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2a64 : f003 > beq skip2293
+ > trap ;failed not equal (non zero)
+2a66 : 205b44 > jsr report_error
+ >
+2a69 : >skip2293
+ >
+2a69 : 28 > plp ;restore status
+
+ next_test
+2a6a : ad0002 > lda test_case ;previous test
+2a6d : c91c > cmp #test_num
+ > trap_ne ;test is out of sequence
+2a6f : f003 > beq skip2296
+ > trap ;failed not equal (non zero)
+2a71 : 205b44 > jsr report_error
+ >
+2a74 : >skip2296
+ >
+001d = >test_num = test_num + 1
+2a74 : a91d > lda #test_num ;*** next tests' number
+2a76 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing shifts - ASL LSR ROL ROR all addressing modes
+ ; shifts - accumulator
+2a79 : a203 ldx #3
+2a7b : tasl
+ set_ax zp1,0
+ > load_flag 0
+2a7b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2a7d : 48 > pha ;use stack to load status
+2a7e : b513 > lda zp1,x ;precharge accu
+2a80 : 28 > plp
+
+2a81 : 0a asl a
+ tst_ax rASL,fASL,0
+2a82 : 08 > php ;save flags
+2a83 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2a86 : f003 > beq skip2301
+ > trap ;failed not equal (non zero)
+2a88 : 205b44 > jsr report_error
+ >
+2a8b : >skip2301
+ >
+2a8b : 68 > pla ;load status
+ > eor_flag 0
+2a8c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2a8e : dd3002 > cmp fASL,x ;test flags
+ > trap_ne ;
+2a91 : f003 > beq skip2304
+ > trap ;failed not equal (non zero)
+2a93 : 205b44 > jsr report_error
+ >
+2a96 : >skip2304
+ >
+
+2a96 : ca dex
+2a97 : 10e2 bpl tasl
+2a99 : a203 ldx #3
+2a9b : tasl1
+ set_ax zp1,$ff
+ > load_flag $ff
+2a9b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2a9d : 48 > pha ;use stack to load status
+2a9e : b513 > lda zp1,x ;precharge accu
+2aa0 : 28 > plp
+
+2aa1 : 0a asl a
+ tst_ax rASL,fASL,$ff-fnzc
+2aa2 : 08 > php ;save flags
+2aa3 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2aa6 : f003 > beq skip2309
+ > trap ;failed not equal (non zero)
+2aa8 : 205b44 > jsr report_error
+ >
+2aab : >skip2309
+ >
+2aab : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2aac : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2aae : dd3002 > cmp fASL,x ;test flags
+ > trap_ne ;
+2ab1 : f003 > beq skip2312
+ > trap ;failed not equal (non zero)
+2ab3 : 205b44 > jsr report_error
+ >
+2ab6 : >skip2312
+ >
+
+2ab6 : ca dex
+2ab7 : 10e2 bpl tasl1
+
+2ab9 : a203 ldx #3
+2abb : tlsr
+ set_ax zp1,0
+ > load_flag 0
+2abb : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2abd : 48 > pha ;use stack to load status
+2abe : b513 > lda zp1,x ;precharge accu
+2ac0 : 28 > plp
+
+2ac1 : 4a lsr a
+ tst_ax rLSR,fLSR,0
+2ac2 : 08 > php ;save flags
+2ac3 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2ac6 : f003 > beq skip2317
+ > trap ;failed not equal (non zero)
+2ac8 : 205b44 > jsr report_error
+ >
+2acb : >skip2317
+ >
+2acb : 68 > pla ;load status
+ > eor_flag 0
+2acc : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ace : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne ;
+2ad1 : f003 > beq skip2320
+ > trap ;failed not equal (non zero)
+2ad3 : 205b44 > jsr report_error
+ >
+2ad6 : >skip2320
+ >
+
+2ad6 : ca dex
+2ad7 : 10e2 bpl tlsr
+2ad9 : a203 ldx #3
+2adb : tlsr1
+ set_ax zp1,$ff
+ > load_flag $ff
+2adb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2add : 48 > pha ;use stack to load status
+2ade : b513 > lda zp1,x ;precharge accu
+2ae0 : 28 > plp
+
+2ae1 : 4a lsr a
+ tst_ax rLSR,fLSR,$ff-fnzc
+2ae2 : 08 > php ;save flags
+2ae3 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2ae6 : f003 > beq skip2325
+ > trap ;failed not equal (non zero)
+2ae8 : 205b44 > jsr report_error
+ >
+2aeb : >skip2325
+ >
+2aeb : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2aec : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2aee : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne ;
+2af1 : f003 > beq skip2328
+ > trap ;failed not equal (non zero)
+2af3 : 205b44 > jsr report_error
+ >
+2af6 : >skip2328
+ >
+
+2af6 : ca dex
+2af7 : 10e2 bpl tlsr1
+
+2af9 : a203 ldx #3
+2afb : trol
+ set_ax zp1,0
+ > load_flag 0
+2afb : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2afd : 48 > pha ;use stack to load status
+2afe : b513 > lda zp1,x ;precharge accu
+2b00 : 28 > plp
+
+2b01 : 2a rol a
+ tst_ax rROL,fROL,0
+2b02 : 08 > php ;save flags
+2b03 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2b06 : f003 > beq skip2333
+ > trap ;failed not equal (non zero)
+2b08 : 205b44 > jsr report_error
+ >
+2b0b : >skip2333
+ >
+2b0b : 68 > pla ;load status
+ > eor_flag 0
+2b0c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2b0e : dd3002 > cmp fROL,x ;test flags
+ > trap_ne ;
+2b11 : f003 > beq skip2336
+ > trap ;failed not equal (non zero)
+2b13 : 205b44 > jsr report_error
+ >
+2b16 : >skip2336
+ >
+
+2b16 : ca dex
+2b17 : 10e2 bpl trol
+2b19 : a203 ldx #3
+2b1b : trol1
+ set_ax zp1,$ff-fc
+ > load_flag $ff-fc
+2b1b : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2b1d : 48 > pha ;use stack to load status
+2b1e : b513 > lda zp1,x ;precharge accu
+2b20 : 28 > plp
+
+2b21 : 2a rol a
+ tst_ax rROL,fROL,$ff-fnzc
+2b22 : 08 > php ;save flags
+2b23 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2b26 : f003 > beq skip2341
+ > trap ;failed not equal (non zero)
+2b28 : 205b44 > jsr report_error
+ >
+2b2b : >skip2341
+ >
+2b2b : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2b2c : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2b2e : dd3002 > cmp fROL,x ;test flags
+ > trap_ne ;
+2b31 : f003 > beq skip2344
+ > trap ;failed not equal (non zero)
+2b33 : 205b44 > jsr report_error
+ >
+2b36 : >skip2344
+ >
+
+2b36 : ca dex
+2b37 : 10e2 bpl trol1
+
+2b39 : a203 ldx #3
+2b3b : trolc
+ set_ax zp1,fc
+ > load_flag fc
+2b3b : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2b3d : 48 > pha ;use stack to load status
+2b3e : b513 > lda zp1,x ;precharge accu
+2b40 : 28 > plp
+
+2b41 : 2a rol a
+ tst_ax rROLc,fROLc,0
+2b42 : 08 > php ;save flags
+2b43 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2b46 : f003 > beq skip2349
+ > trap ;failed not equal (non zero)
+2b48 : 205b44 > jsr report_error
+ >
+2b4b : >skip2349
+ >
+2b4b : 68 > pla ;load status
+ > eor_flag 0
+2b4c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2b4e : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne ;
+2b51 : f003 > beq skip2352
+ > trap ;failed not equal (non zero)
+2b53 : 205b44 > jsr report_error
+ >
+2b56 : >skip2352
+ >
+
+2b56 : ca dex
+2b57 : 10e2 bpl trolc
+2b59 : a203 ldx #3
+2b5b : trolc1
+ set_ax zp1,$ff
+ > load_flag $ff
+2b5b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2b5d : 48 > pha ;use stack to load status
+2b5e : b513 > lda zp1,x ;precharge accu
+2b60 : 28 > plp
+
+2b61 : 2a rol a
+ tst_ax rROLc,fROLc,$ff-fnzc
+2b62 : 08 > php ;save flags
+2b63 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2b66 : f003 > beq skip2357
+ > trap ;failed not equal (non zero)
+2b68 : 205b44 > jsr report_error
+ >
+2b6b : >skip2357
+ >
+2b6b : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2b6c : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2b6e : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne ;
+2b71 : f003 > beq skip2360
+ > trap ;failed not equal (non zero)
+2b73 : 205b44 > jsr report_error
+ >
+2b76 : >skip2360
+ >
+
+2b76 : ca dex
+2b77 : 10e2 bpl trolc1
+
+2b79 : a203 ldx #3
+2b7b : tror
+ set_ax zp1,0
+ > load_flag 0
+2b7b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2b7d : 48 > pha ;use stack to load status
+2b7e : b513 > lda zp1,x ;precharge accu
+2b80 : 28 > plp
+
+2b81 : 6a ror a
+ tst_ax rROR,fROR,0
+2b82 : 08 > php ;save flags
+2b83 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2b86 : f003 > beq skip2365
+ > trap ;failed not equal (non zero)
+2b88 : 205b44 > jsr report_error
+ >
+2b8b : >skip2365
+ >
+2b8b : 68 > pla ;load status
+ > eor_flag 0
+2b8c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2b8e : dd3802 > cmp fROR,x ;test flags
+ > trap_ne ;
+2b91 : f003 > beq skip2368
+ > trap ;failed not equal (non zero)
+2b93 : 205b44 > jsr report_error
+ >
+2b96 : >skip2368
+ >
+
+2b96 : ca dex
+2b97 : 10e2 bpl tror
+2b99 : a203 ldx #3
+2b9b : tror1
+ set_ax zp1,$ff-fc
+ > load_flag $ff-fc
+2b9b : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2b9d : 48 > pha ;use stack to load status
+2b9e : b513 > lda zp1,x ;precharge accu
+2ba0 : 28 > plp
+
+2ba1 : 6a ror a
+ tst_ax rROR,fROR,$ff-fnzc
+2ba2 : 08 > php ;save flags
+2ba3 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2ba6 : f003 > beq skip2373
+ > trap ;failed not equal (non zero)
+2ba8 : 205b44 > jsr report_error
+ >
+2bab : >skip2373
+ >
+2bab : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2bac : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2bae : dd3802 > cmp fROR,x ;test flags
+ > trap_ne ;
+2bb1 : f003 > beq skip2376
+ > trap ;failed not equal (non zero)
+2bb3 : 205b44 > jsr report_error
+ >
+2bb6 : >skip2376
+ >
+
+2bb6 : ca dex
+2bb7 : 10e2 bpl tror1
+
+2bb9 : a203 ldx #3
+2bbb : trorc
+ set_ax zp1,fc
+ > load_flag fc
+2bbb : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2bbd : 48 > pha ;use stack to load status
+2bbe : b513 > lda zp1,x ;precharge accu
+2bc0 : 28 > plp
+
+2bc1 : 6a ror a
+ tst_ax rRORc,fRORc,0
+2bc2 : 08 > php ;save flags
+2bc3 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2bc6 : f003 > beq skip2381
+ > trap ;failed not equal (non zero)
+2bc8 : 205b44 > jsr report_error
+ >
+2bcb : >skip2381
+ >
+2bcb : 68 > pla ;load status
+ > eor_flag 0
+2bcc : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2bce : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne ;
+2bd1 : f003 > beq skip2384
+ > trap ;failed not equal (non zero)
+2bd3 : 205b44 > jsr report_error
+ >
+2bd6 : >skip2384
+ >
+
+2bd6 : ca dex
+2bd7 : 10e2 bpl trorc
+2bd9 : a203 ldx #3
+2bdb : trorc1
+ set_ax zp1,$ff
+ > load_flag $ff
+2bdb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2bdd : 48 > pha ;use stack to load status
+2bde : b513 > lda zp1,x ;precharge accu
+2be0 : 28 > plp
+
+2be1 : 6a ror a
+ tst_ax rRORc,fRORc,$ff-fnzc
+2be2 : 08 > php ;save flags
+2be3 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2be6 : f003 > beq skip2389
+ > trap ;failed not equal (non zero)
+2be8 : 205b44 > jsr report_error
+ >
+2beb : >skip2389
+ >
+2beb : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2bec : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2bee : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne ;
+2bf1 : f003 > beq skip2392
+ > trap ;failed not equal (non zero)
+2bf3 : 205b44 > jsr report_error
+ >
+2bf6 : >skip2392
+ >
+
+2bf6 : ca dex
+2bf7 : 10e2 bpl trorc1
+ next_test
+2bf9 : ad0002 > lda test_case ;previous test
+2bfc : c91d > cmp #test_num
+ > trap_ne ;test is out of sequence
+2bfe : f003 > beq skip2395
+ > trap ;failed not equal (non zero)
+2c00 : 205b44 > jsr report_error
+ >
+2c03 : >skip2395
+ >
+001e = >test_num = test_num + 1
+2c03 : a91e > lda #test_num ;*** next tests' number
+2c05 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - zeropage
+2c08 : a203 ldx #3
+2c0a : tasl2
+ set_z zp1,0
+ > load_flag 0
+2c0a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2c0c : 48 > pha ;use stack to load status
+2c0d : b513 > lda zp1,x ;load to zeropage
+2c0f : 850c > sta zpt
+2c11 : 28 > plp
+
+2c12 : 060c asl zpt
+ tst_z rASL,fASL,0
+2c14 : 08 > php ;save flags
+2c15 : a50c > lda zpt
+2c17 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2c1a : f003 > beq skip2400
+ > trap ;failed not equal (non zero)
+2c1c : 205b44 > jsr report_error
+ >
+2c1f : >skip2400
+ >
+2c1f : 68 > pla ;load status
+ > eor_flag 0
+2c20 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2c22 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2c25 : f003 > beq skip2403
+ > trap ;failed not equal (non zero)
+2c27 : 205b44 > jsr report_error
+ >
+2c2a : >skip2403
+ >
+
+2c2a : ca dex
+2c2b : 10dd bpl tasl2
+2c2d : a203 ldx #3
+2c2f : tasl3
+ set_z zp1,$ff
+ > load_flag $ff
+2c2f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2c31 : 48 > pha ;use stack to load status
+2c32 : b513 > lda zp1,x ;load to zeropage
+2c34 : 850c > sta zpt
+2c36 : 28 > plp
+
+2c37 : 060c asl zpt
+ tst_z rASL,fASL,$ff-fnzc
+2c39 : 08 > php ;save flags
+2c3a : a50c > lda zpt
+2c3c : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2c3f : f003 > beq skip2408
+ > trap ;failed not equal (non zero)
+2c41 : 205b44 > jsr report_error
+ >
+2c44 : >skip2408
+ >
+2c44 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2c45 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2c47 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2c4a : f003 > beq skip2411
+ > trap ;failed not equal (non zero)
+2c4c : 205b44 > jsr report_error
+ >
+2c4f : >skip2411
+ >
+
+2c4f : ca dex
+2c50 : 10dd bpl tasl3
+
+2c52 : a203 ldx #3
+2c54 : tlsr2
+ set_z zp1,0
+ > load_flag 0
+2c54 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2c56 : 48 > pha ;use stack to load status
+2c57 : b513 > lda zp1,x ;load to zeropage
+2c59 : 850c > sta zpt
+2c5b : 28 > plp
+
+2c5c : 460c lsr zpt
+ tst_z rLSR,fLSR,0
+2c5e : 08 > php ;save flags
+2c5f : a50c > lda zpt
+2c61 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2c64 : f003 > beq skip2416
+ > trap ;failed not equal (non zero)
+2c66 : 205b44 > jsr report_error
+ >
+2c69 : >skip2416
+ >
+2c69 : 68 > pla ;load status
+ > eor_flag 0
+2c6a : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2c6c : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+2c6f : f003 > beq skip2419
+ > trap ;failed not equal (non zero)
+2c71 : 205b44 > jsr report_error
+ >
+2c74 : >skip2419
+ >
+
+2c74 : ca dex
+2c75 : 10dd bpl tlsr2
+2c77 : a203 ldx #3
+2c79 : tlsr3
+ set_z zp1,$ff
+ > load_flag $ff
+2c79 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2c7b : 48 > pha ;use stack to load status
+2c7c : b513 > lda zp1,x ;load to zeropage
+2c7e : 850c > sta zpt
+2c80 : 28 > plp
+
+2c81 : 460c lsr zpt
+ tst_z rLSR,fLSR,$ff-fnzc
+2c83 : 08 > php ;save flags
+2c84 : a50c > lda zpt
+2c86 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2c89 : f003 > beq skip2424
+ > trap ;failed not equal (non zero)
+2c8b : 205b44 > jsr report_error
+ >
+2c8e : >skip2424
+ >
+2c8e : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2c8f : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2c91 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+2c94 : f003 > beq skip2427
+ > trap ;failed not equal (non zero)
+2c96 : 205b44 > jsr report_error
+ >
+2c99 : >skip2427
+ >
+
+2c99 : ca dex
+2c9a : 10dd bpl tlsr3
+
+2c9c : a203 ldx #3
+2c9e : trol2
+ set_z zp1,0
+ > load_flag 0
+2c9e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2ca0 : 48 > pha ;use stack to load status
+2ca1 : b513 > lda zp1,x ;load to zeropage
+2ca3 : 850c > sta zpt
+2ca5 : 28 > plp
+
+2ca6 : 260c rol zpt
+ tst_z rROL,fROL,0
+2ca8 : 08 > php ;save flags
+2ca9 : a50c > lda zpt
+2cab : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2cae : f003 > beq skip2432
+ > trap ;failed not equal (non zero)
+2cb0 : 205b44 > jsr report_error
+ >
+2cb3 : >skip2432
+ >
+2cb3 : 68 > pla ;load status
+ > eor_flag 0
+2cb4 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2cb6 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2cb9 : f003 > beq skip2435
+ > trap ;failed not equal (non zero)
+2cbb : 205b44 > jsr report_error
+ >
+2cbe : >skip2435
+ >
+
+2cbe : ca dex
+2cbf : 10dd bpl trol2
+2cc1 : a203 ldx #3
+2cc3 : trol3
+ set_z zp1,$ff-fc
+ > load_flag $ff-fc
+2cc3 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2cc5 : 48 > pha ;use stack to load status
+2cc6 : b513 > lda zp1,x ;load to zeropage
+2cc8 : 850c > sta zpt
+2cca : 28 > plp
+
+2ccb : 260c rol zpt
+ tst_z rROL,fROL,$ff-fnzc
+2ccd : 08 > php ;save flags
+2cce : a50c > lda zpt
+2cd0 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2cd3 : f003 > beq skip2440
+ > trap ;failed not equal (non zero)
+2cd5 : 205b44 > jsr report_error
+ >
+2cd8 : >skip2440
+ >
+2cd8 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2cd9 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2cdb : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2cde : f003 > beq skip2443
+ > trap ;failed not equal (non zero)
+2ce0 : 205b44 > jsr report_error
+ >
+2ce3 : >skip2443
+ >
+
+2ce3 : ca dex
+2ce4 : 10dd bpl trol3
+
+2ce6 : a203 ldx #3
+2ce8 : trolc2
+ set_z zp1,fc
+ > load_flag fc
+2ce8 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2cea : 48 > pha ;use stack to load status
+2ceb : b513 > lda zp1,x ;load to zeropage
+2ced : 850c > sta zpt
+2cef : 28 > plp
+
+2cf0 : 260c rol zpt
+ tst_z rROLc,fROLc,0
+2cf2 : 08 > php ;save flags
+2cf3 : a50c > lda zpt
+2cf5 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2cf8 : f003 > beq skip2448
+ > trap ;failed not equal (non zero)
+2cfa : 205b44 > jsr report_error
+ >
+2cfd : >skip2448
+ >
+2cfd : 68 > pla ;load status
+ > eor_flag 0
+2cfe : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2d00 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2d03 : f003 > beq skip2451
+ > trap ;failed not equal (non zero)
+2d05 : 205b44 > jsr report_error
+ >
+2d08 : >skip2451
+ >
+
+2d08 : ca dex
+2d09 : 10dd bpl trolc2
+2d0b : a203 ldx #3
+2d0d : trolc3
+ set_z zp1,$ff
+ > load_flag $ff
+2d0d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2d0f : 48 > pha ;use stack to load status
+2d10 : b513 > lda zp1,x ;load to zeropage
+2d12 : 850c > sta zpt
+2d14 : 28 > plp
+
+2d15 : 260c rol zpt
+ tst_z rROLc,fROLc,$ff-fnzc
+2d17 : 08 > php ;save flags
+2d18 : a50c > lda zpt
+2d1a : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2d1d : f003 > beq skip2456
+ > trap ;failed not equal (non zero)
+2d1f : 205b44 > jsr report_error
+ >
+2d22 : >skip2456
+ >
+2d22 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2d23 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2d25 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2d28 : f003 > beq skip2459
+ > trap ;failed not equal (non zero)
+2d2a : 205b44 > jsr report_error
+ >
+2d2d : >skip2459
+ >
+
+2d2d : ca dex
+2d2e : 10dd bpl trolc3
+
+2d30 : a203 ldx #3
+2d32 : tror2
+ set_z zp1,0
+ > load_flag 0
+2d32 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2d34 : 48 > pha ;use stack to load status
+2d35 : b513 > lda zp1,x ;load to zeropage
+2d37 : 850c > sta zpt
+2d39 : 28 > plp
+
+2d3a : 660c ror zpt
+ tst_z rROR,fROR,0
+2d3c : 08 > php ;save flags
+2d3d : a50c > lda zpt
+2d3f : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2d42 : f003 > beq skip2464
+ > trap ;failed not equal (non zero)
+2d44 : 205b44 > jsr report_error
+ >
+2d47 : >skip2464
+ >
+2d47 : 68 > pla ;load status
+ > eor_flag 0
+2d48 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2d4a : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2d4d : f003 > beq skip2467
+ > trap ;failed not equal (non zero)
+2d4f : 205b44 > jsr report_error
+ >
+2d52 : >skip2467
+ >
+
+2d52 : ca dex
+2d53 : 10dd bpl tror2
+2d55 : a203 ldx #3
+2d57 : tror3
+ set_z zp1,$ff-fc
+ > load_flag $ff-fc
+2d57 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2d59 : 48 > pha ;use stack to load status
+2d5a : b513 > lda zp1,x ;load to zeropage
+2d5c : 850c > sta zpt
+2d5e : 28 > plp
+
+2d5f : 660c ror zpt
+ tst_z rROR,fROR,$ff-fnzc
+2d61 : 08 > php ;save flags
+2d62 : a50c > lda zpt
+2d64 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2d67 : f003 > beq skip2472
+ > trap ;failed not equal (non zero)
+2d69 : 205b44 > jsr report_error
+ >
+2d6c : >skip2472
+ >
+2d6c : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2d6d : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2d6f : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2d72 : f003 > beq skip2475
+ > trap ;failed not equal (non zero)
+2d74 : 205b44 > jsr report_error
+ >
+2d77 : >skip2475
+ >
+
+2d77 : ca dex
+2d78 : 10dd bpl tror3
+
+2d7a : a203 ldx #3
+2d7c : trorc2
+ set_z zp1,fc
+ > load_flag fc
+2d7c : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2d7e : 48 > pha ;use stack to load status
+2d7f : b513 > lda zp1,x ;load to zeropage
+2d81 : 850c > sta zpt
+2d83 : 28 > plp
+
+2d84 : 660c ror zpt
+ tst_z rRORc,fRORc,0
+2d86 : 08 > php ;save flags
+2d87 : a50c > lda zpt
+2d89 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2d8c : f003 > beq skip2480
+ > trap ;failed not equal (non zero)
+2d8e : 205b44 > jsr report_error
+ >
+2d91 : >skip2480
+ >
+2d91 : 68 > pla ;load status
+ > eor_flag 0
+2d92 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2d94 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2d97 : f003 > beq skip2483
+ > trap ;failed not equal (non zero)
+2d99 : 205b44 > jsr report_error
+ >
+2d9c : >skip2483
+ >
+
+2d9c : ca dex
+2d9d : 10dd bpl trorc2
+2d9f : a203 ldx #3
+2da1 : trorc3
+ set_z zp1,$ff
+ > load_flag $ff
+2da1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2da3 : 48 > pha ;use stack to load status
+2da4 : b513 > lda zp1,x ;load to zeropage
+2da6 : 850c > sta zpt
+2da8 : 28 > plp
+
+2da9 : 660c ror zpt
+ tst_z rRORc,fRORc,$ff-fnzc
+2dab : 08 > php ;save flags
+2dac : a50c > lda zpt
+2dae : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2db1 : f003 > beq skip2488
+ > trap ;failed not equal (non zero)
+2db3 : 205b44 > jsr report_error
+ >
+2db6 : >skip2488
+ >
+2db6 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2db7 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2db9 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2dbc : f003 > beq skip2491
+ > trap ;failed not equal (non zero)
+2dbe : 205b44 > jsr report_error
+ >
+2dc1 : >skip2491
+ >
+
+2dc1 : ca dex
+2dc2 : 10dd bpl trorc3
+ next_test
+2dc4 : ad0002 > lda test_case ;previous test
+2dc7 : c91e > cmp #test_num
+ > trap_ne ;test is out of sequence
+2dc9 : f003 > beq skip2494
+ > trap ;failed not equal (non zero)
+2dcb : 205b44 > jsr report_error
+ >
+2dce : >skip2494
+ >
+001f = >test_num = test_num + 1
+2dce : a91f > lda #test_num ;*** next tests' number
+2dd0 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - absolute
+2dd3 : a203 ldx #3
+2dd5 : tasl4
+ set_abs zp1,0
+ > load_flag 0
+2dd5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2dd7 : 48 > pha ;use stack to load status
+2dd8 : b513 > lda zp1,x ;load to memory
+2dda : 8d0302 > sta abst
+2ddd : 28 > plp
+
+2dde : 0e0302 asl abst
+ tst_abs rASL,fASL,0
+2de1 : 08 > php ;save flags
+2de2 : ad0302 > lda abst
+2de5 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2de8 : f003 > beq skip2499
+ > trap ;failed not equal (non zero)
+2dea : 205b44 > jsr report_error
+ >
+2ded : >skip2499
+ >
+2ded : 68 > pla ;load status
+ > eor_flag 0
+2dee : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2df0 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2df3 : f003 > beq skip2502
+ > trap ;failed not equal (non zero)
+2df5 : 205b44 > jsr report_error
+ >
+2df8 : >skip2502
+ >
+
+2df8 : ca dex
+2df9 : 10da bpl tasl4
+2dfb : a203 ldx #3
+2dfd : tasl5
+ set_abs zp1,$ff
+ > load_flag $ff
+2dfd : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2dff : 48 > pha ;use stack to load status
+2e00 : b513 > lda zp1,x ;load to memory
+2e02 : 8d0302 > sta abst
+2e05 : 28 > plp
+
+2e06 : 0e0302 asl abst
+ tst_abs rASL,fASL,$ff-fnzc
+2e09 : 08 > php ;save flags
+2e0a : ad0302 > lda abst
+2e0d : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2e10 : f003 > beq skip2507
+ > trap ;failed not equal (non zero)
+2e12 : 205b44 > jsr report_error
+ >
+2e15 : >skip2507
+ >
+2e15 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2e16 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2e18 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2e1b : f003 > beq skip2510
+ > trap ;failed not equal (non zero)
+2e1d : 205b44 > jsr report_error
+ >
+2e20 : >skip2510
+ >
+
+2e20 : ca dex
+2e21 : 10da bpl tasl5
+
+2e23 : a203 ldx #3
+2e25 : tlsr4
+ set_abs zp1,0
+ > load_flag 0
+2e25 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2e27 : 48 > pha ;use stack to load status
+2e28 : b513 > lda zp1,x ;load to memory
+2e2a : 8d0302 > sta abst
+2e2d : 28 > plp
+
+2e2e : 4e0302 lsr abst
+ tst_abs rLSR,fLSR,0
+2e31 : 08 > php ;save flags
+2e32 : ad0302 > lda abst
+2e35 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2e38 : f003 > beq skip2515
+ > trap ;failed not equal (non zero)
+2e3a : 205b44 > jsr report_error
+ >
+2e3d : >skip2515
+ >
+2e3d : 68 > pla ;load status
+ > eor_flag 0
+2e3e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2e40 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+2e43 : f003 > beq skip2518
+ > trap ;failed not equal (non zero)
+2e45 : 205b44 > jsr report_error
+ >
+2e48 : >skip2518
+ >
+
+2e48 : ca dex
+2e49 : 10da bpl tlsr4
+2e4b : a203 ldx #3
+2e4d : tlsr5
+ set_abs zp1,$ff
+ > load_flag $ff
+2e4d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2e4f : 48 > pha ;use stack to load status
+2e50 : b513 > lda zp1,x ;load to memory
+2e52 : 8d0302 > sta abst
+2e55 : 28 > plp
+
+2e56 : 4e0302 lsr abst
+ tst_abs rLSR,fLSR,$ff-fnzc
+2e59 : 08 > php ;save flags
+2e5a : ad0302 > lda abst
+2e5d : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+2e60 : f003 > beq skip2523
+ > trap ;failed not equal (non zero)
+2e62 : 205b44 > jsr report_error
+ >
+2e65 : >skip2523
+ >
+2e65 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2e66 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2e68 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+2e6b : f003 > beq skip2526
+ > trap ;failed not equal (non zero)
+2e6d : 205b44 > jsr report_error
+ >
+2e70 : >skip2526
+ >
+
+2e70 : ca dex
+2e71 : 10da bpl tlsr5
+
+2e73 : a203 ldx #3
+2e75 : trol4
+ set_abs zp1,0
+ > load_flag 0
+2e75 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2e77 : 48 > pha ;use stack to load status
+2e78 : b513 > lda zp1,x ;load to memory
+2e7a : 8d0302 > sta abst
+2e7d : 28 > plp
+
+2e7e : 2e0302 rol abst
+ tst_abs rROL,fROL,0
+2e81 : 08 > php ;save flags
+2e82 : ad0302 > lda abst
+2e85 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2e88 : f003 > beq skip2531
+ > trap ;failed not equal (non zero)
+2e8a : 205b44 > jsr report_error
+ >
+2e8d : >skip2531
+ >
+2e8d : 68 > pla ;load status
+ > eor_flag 0
+2e8e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2e90 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2e93 : f003 > beq skip2534
+ > trap ;failed not equal (non zero)
+2e95 : 205b44 > jsr report_error
+ >
+2e98 : >skip2534
+ >
+
+2e98 : ca dex
+2e99 : 10da bpl trol4
+2e9b : a203 ldx #3
+2e9d : trol5
+ set_abs zp1,$ff-fc
+ > load_flag $ff-fc
+2e9d : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2e9f : 48 > pha ;use stack to load status
+2ea0 : b513 > lda zp1,x ;load to memory
+2ea2 : 8d0302 > sta abst
+2ea5 : 28 > plp
+
+2ea6 : 2e0302 rol abst
+ tst_abs rROL,fROL,$ff-fnzc
+2ea9 : 08 > php ;save flags
+2eaa : ad0302 > lda abst
+2ead : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+2eb0 : f003 > beq skip2539
+ > trap ;failed not equal (non zero)
+2eb2 : 205b44 > jsr report_error
+ >
+2eb5 : >skip2539
+ >
+2eb5 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2eb6 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2eb8 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+2ebb : f003 > beq skip2542
+ > trap ;failed not equal (non zero)
+2ebd : 205b44 > jsr report_error
+ >
+2ec0 : >skip2542
+ >
+
+2ec0 : ca dex
+2ec1 : 10da bpl trol5
+
+2ec3 : a203 ldx #3
+2ec5 : trolc4
+ set_abs zp1,fc
+ > load_flag fc
+2ec5 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2ec7 : 48 > pha ;use stack to load status
+2ec8 : b513 > lda zp1,x ;load to memory
+2eca : 8d0302 > sta abst
+2ecd : 28 > plp
+
+2ece : 2e0302 rol abst
+ tst_abs rROLc,fROLc,0
+2ed1 : 08 > php ;save flags
+2ed2 : ad0302 > lda abst
+2ed5 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2ed8 : f003 > beq skip2547
+ > trap ;failed not equal (non zero)
+2eda : 205b44 > jsr report_error
+ >
+2edd : >skip2547
+ >
+2edd : 68 > pla ;load status
+ > eor_flag 0
+2ede : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2ee0 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2ee3 : f003 > beq skip2550
+ > trap ;failed not equal (non zero)
+2ee5 : 205b44 > jsr report_error
+ >
+2ee8 : >skip2550
+ >
+
+2ee8 : ca dex
+2ee9 : 10da bpl trolc4
+2eeb : a203 ldx #3
+2eed : trolc5
+ set_abs zp1,$ff
+ > load_flag $ff
+2eed : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2eef : 48 > pha ;use stack to load status
+2ef0 : b513 > lda zp1,x ;load to memory
+2ef2 : 8d0302 > sta abst
+2ef5 : 28 > plp
+
+2ef6 : 2e0302 rol abst
+ tst_abs rROLc,fROLc,$ff-fnzc
+2ef9 : 08 > php ;save flags
+2efa : ad0302 > lda abst
+2efd : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+2f00 : f003 > beq skip2555
+ > trap ;failed not equal (non zero)
+2f02 : 205b44 > jsr report_error
+ >
+2f05 : >skip2555
+ >
+2f05 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2f06 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2f08 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+2f0b : f003 > beq skip2558
+ > trap ;failed not equal (non zero)
+2f0d : 205b44 > jsr report_error
+ >
+2f10 : >skip2558
+ >
+
+2f10 : ca dex
+2f11 : 10da bpl trolc5
+
+2f13 : a203 ldx #3
+2f15 : tror4
+ set_abs zp1,0
+ > load_flag 0
+2f15 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2f17 : 48 > pha ;use stack to load status
+2f18 : b513 > lda zp1,x ;load to memory
+2f1a : 8d0302 > sta abst
+2f1d : 28 > plp
+
+2f1e : 6e0302 ror abst
+ tst_abs rROR,fROR,0
+2f21 : 08 > php ;save flags
+2f22 : ad0302 > lda abst
+2f25 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2f28 : f003 > beq skip2563
+ > trap ;failed not equal (non zero)
+2f2a : 205b44 > jsr report_error
+ >
+2f2d : >skip2563
+ >
+2f2d : 68 > pla ;load status
+ > eor_flag 0
+2f2e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2f30 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2f33 : f003 > beq skip2566
+ > trap ;failed not equal (non zero)
+2f35 : 205b44 > jsr report_error
+ >
+2f38 : >skip2566
+ >
+
+2f38 : ca dex
+2f39 : 10da bpl tror4
+2f3b : a203 ldx #3
+2f3d : tror5
+ set_abs zp1,$ff-fc
+ > load_flag $ff-fc
+2f3d : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+2f3f : 48 > pha ;use stack to load status
+2f40 : b513 > lda zp1,x ;load to memory
+2f42 : 8d0302 > sta abst
+2f45 : 28 > plp
+
+2f46 : 6e0302 ror abst
+ tst_abs rROR,fROR,$ff-fnzc
+2f49 : 08 > php ;save flags
+2f4a : ad0302 > lda abst
+2f4d : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+2f50 : f003 > beq skip2571
+ > trap ;failed not equal (non zero)
+2f52 : 205b44 > jsr report_error
+ >
+2f55 : >skip2571
+ >
+2f55 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2f56 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2f58 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+2f5b : f003 > beq skip2574
+ > trap ;failed not equal (non zero)
+2f5d : 205b44 > jsr report_error
+ >
+2f60 : >skip2574
+ >
+
+2f60 : ca dex
+2f61 : 10da bpl tror5
+
+2f63 : a203 ldx #3
+2f65 : trorc4
+ set_abs zp1,fc
+ > load_flag fc
+2f65 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+2f67 : 48 > pha ;use stack to load status
+2f68 : b513 > lda zp1,x ;load to memory
+2f6a : 8d0302 > sta abst
+2f6d : 28 > plp
+
+2f6e : 6e0302 ror abst
+ tst_abs rRORc,fRORc,0
+2f71 : 08 > php ;save flags
+2f72 : ad0302 > lda abst
+2f75 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2f78 : f003 > beq skip2579
+ > trap ;failed not equal (non zero)
+2f7a : 205b44 > jsr report_error
+ >
+2f7d : >skip2579
+ >
+2f7d : 68 > pla ;load status
+ > eor_flag 0
+2f7e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2f80 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2f83 : f003 > beq skip2582
+ > trap ;failed not equal (non zero)
+2f85 : 205b44 > jsr report_error
+ >
+2f88 : >skip2582
+ >
+
+2f88 : ca dex
+2f89 : 10da bpl trorc4
+2f8b : a203 ldx #3
+2f8d : trorc5
+ set_abs zp1,$ff
+ > load_flag $ff
+2f8d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2f8f : 48 > pha ;use stack to load status
+2f90 : b513 > lda zp1,x ;load to memory
+2f92 : 8d0302 > sta abst
+2f95 : 28 > plp
+
+2f96 : 6e0302 ror abst
+ tst_abs rRORc,fRORc,$ff-fnzc
+2f99 : 08 > php ;save flags
+2f9a : ad0302 > lda abst
+2f9d : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+2fa0 : f003 > beq skip2587
+ > trap ;failed not equal (non zero)
+2fa2 : 205b44 > jsr report_error
+ >
+2fa5 : >skip2587
+ >
+2fa5 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2fa6 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+2fa8 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+2fab : f003 > beq skip2590
+ > trap ;failed not equal (non zero)
+2fad : 205b44 > jsr report_error
+ >
+2fb0 : >skip2590
+ >
+
+2fb0 : ca dex
+2fb1 : 10da bpl trorc5
+ next_test
+2fb3 : ad0002 > lda test_case ;previous test
+2fb6 : c91f > cmp #test_num
+ > trap_ne ;test is out of sequence
+2fb8 : f003 > beq skip2593
+ > trap ;failed not equal (non zero)
+2fba : 205b44 > jsr report_error
+ >
+2fbd : >skip2593
+ >
+0020 = >test_num = test_num + 1
+2fbd : a920 > lda #test_num ;*** next tests' number
+2fbf : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - zp indexed
+2fc2 : a203 ldx #3
+2fc4 : tasl6
+ set_zx zp1,0
+ > load_flag 0
+2fc4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2fc6 : 48 > pha ;use stack to load status
+2fc7 : b513 > lda zp1,x ;load to indexed zeropage
+2fc9 : 950c > sta zpt,x
+2fcb : 28 > plp
+
+2fcc : 160c asl zpt,x
+ tst_zx rASL,fASL,0
+2fce : 08 > php ;save flags
+2fcf : b50c > lda zpt,x
+2fd1 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2fd4 : f003 > beq skip2598
+ > trap ;failed not equal (non zero)
+2fd6 : 205b44 > jsr report_error
+ >
+2fd9 : >skip2598
+ >
+2fd9 : 68 > pla ;load status
+ > eor_flag 0
+2fda : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2fdc : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+2fdf : f003 > beq skip2601
+ > trap ;failed not equal (non zero)
+2fe1 : 205b44 > jsr report_error
+ >
+2fe4 : >skip2601
+ >
+
+2fe4 : ca dex
+2fe5 : 10dd bpl tasl6
+2fe7 : a203 ldx #3
+2fe9 : tasl7
+ set_zx zp1,$ff
+ > load_flag $ff
+2fe9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2feb : 48 > pha ;use stack to load status
+2fec : b513 > lda zp1,x ;load to indexed zeropage
+2fee : 950c > sta zpt,x
+2ff0 : 28 > plp
+
+2ff1 : 160c asl zpt,x
+ tst_zx rASL,fASL,$ff-fnzc
+2ff3 : 08 > php ;save flags
+2ff4 : b50c > lda zpt,x
+2ff6 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+2ff9 : f003 > beq skip2606
+ > trap ;failed not equal (non zero)
+2ffb : 205b44 > jsr report_error
+ >
+2ffe : >skip2606
+ >
+2ffe : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+2fff : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3001 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+3004 : f003 > beq skip2609
+ > trap ;failed not equal (non zero)
+3006 : 205b44 > jsr report_error
+ >
+3009 : >skip2609
+ >
+
+3009 : ca dex
+300a : 10dd bpl tasl7
+
+300c : a203 ldx #3
+300e : tlsr6
+ set_zx zp1,0
+ > load_flag 0
+300e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3010 : 48 > pha ;use stack to load status
+3011 : b513 > lda zp1,x ;load to indexed zeropage
+3013 : 950c > sta zpt,x
+3015 : 28 > plp
+
+3016 : 560c lsr zpt,x
+ tst_zx rLSR,fLSR,0
+3018 : 08 > php ;save flags
+3019 : b50c > lda zpt,x
+301b : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+301e : f003 > beq skip2614
+ > trap ;failed not equal (non zero)
+3020 : 205b44 > jsr report_error
+ >
+3023 : >skip2614
+ >
+3023 : 68 > pla ;load status
+ > eor_flag 0
+3024 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3026 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+3029 : f003 > beq skip2617
+ > trap ;failed not equal (non zero)
+302b : 205b44 > jsr report_error
+ >
+302e : >skip2617
+ >
+
+302e : ca dex
+302f : 10dd bpl tlsr6
+3031 : a203 ldx #3
+3033 : tlsr7
+ set_zx zp1,$ff
+ > load_flag $ff
+3033 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3035 : 48 > pha ;use stack to load status
+3036 : b513 > lda zp1,x ;load to indexed zeropage
+3038 : 950c > sta zpt,x
+303a : 28 > plp
+
+303b : 560c lsr zpt,x
+ tst_zx rLSR,fLSR,$ff-fnzc
+303d : 08 > php ;save flags
+303e : b50c > lda zpt,x
+3040 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+3043 : f003 > beq skip2622
+ > trap ;failed not equal (non zero)
+3045 : 205b44 > jsr report_error
+ >
+3048 : >skip2622
+ >
+3048 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3049 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+304b : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+304e : f003 > beq skip2625
+ > trap ;failed not equal (non zero)
+3050 : 205b44 > jsr report_error
+ >
+3053 : >skip2625
+ >
+
+3053 : ca dex
+3054 : 10dd bpl tlsr7
+
+3056 : a203 ldx #3
+3058 : trol6
+ set_zx zp1,0
+ > load_flag 0
+3058 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+305a : 48 > pha ;use stack to load status
+305b : b513 > lda zp1,x ;load to indexed zeropage
+305d : 950c > sta zpt,x
+305f : 28 > plp
+
+3060 : 360c rol zpt,x
+ tst_zx rROL,fROL,0
+3062 : 08 > php ;save flags
+3063 : b50c > lda zpt,x
+3065 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+3068 : f003 > beq skip2630
+ > trap ;failed not equal (non zero)
+306a : 205b44 > jsr report_error
+ >
+306d : >skip2630
+ >
+306d : 68 > pla ;load status
+ > eor_flag 0
+306e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3070 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+3073 : f003 > beq skip2633
+ > trap ;failed not equal (non zero)
+3075 : 205b44 > jsr report_error
+ >
+3078 : >skip2633
+ >
+
+3078 : ca dex
+3079 : 10dd bpl trol6
+307b : a203 ldx #3
+307d : trol7
+ set_zx zp1,$ff-fc
+ > load_flag $ff-fc
+307d : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+307f : 48 > pha ;use stack to load status
+3080 : b513 > lda zp1,x ;load to indexed zeropage
+3082 : 950c > sta zpt,x
+3084 : 28 > plp
+
+3085 : 360c rol zpt,x
+ tst_zx rROL,fROL,$ff-fnzc
+3087 : 08 > php ;save flags
+3088 : b50c > lda zpt,x
+308a : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+308d : f003 > beq skip2638
+ > trap ;failed not equal (non zero)
+308f : 205b44 > jsr report_error
+ >
+3092 : >skip2638
+ >
+3092 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3093 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3095 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+3098 : f003 > beq skip2641
+ > trap ;failed not equal (non zero)
+309a : 205b44 > jsr report_error
+ >
+309d : >skip2641
+ >
+
+309d : ca dex
+309e : 10dd bpl trol7
+
+30a0 : a203 ldx #3
+30a2 : trolc6
+ set_zx zp1,fc
+ > load_flag fc
+30a2 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+30a4 : 48 > pha ;use stack to load status
+30a5 : b513 > lda zp1,x ;load to indexed zeropage
+30a7 : 950c > sta zpt,x
+30a9 : 28 > plp
+
+30aa : 360c rol zpt,x
+ tst_zx rROLc,fROLc,0
+30ac : 08 > php ;save flags
+30ad : b50c > lda zpt,x
+30af : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+30b2 : f003 > beq skip2646
+ > trap ;failed not equal (non zero)
+30b4 : 205b44 > jsr report_error
+ >
+30b7 : >skip2646
+ >
+30b7 : 68 > pla ;load status
+ > eor_flag 0
+30b8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+30ba : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+30bd : f003 > beq skip2649
+ > trap ;failed not equal (non zero)
+30bf : 205b44 > jsr report_error
+ >
+30c2 : >skip2649
+ >
+
+30c2 : ca dex
+30c3 : 10dd bpl trolc6
+30c5 : a203 ldx #3
+30c7 : trolc7
+ set_zx zp1,$ff
+ > load_flag $ff
+30c7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+30c9 : 48 > pha ;use stack to load status
+30ca : b513 > lda zp1,x ;load to indexed zeropage
+30cc : 950c > sta zpt,x
+30ce : 28 > plp
+
+30cf : 360c rol zpt,x
+ tst_zx rROLc,fROLc,$ff-fnzc
+30d1 : 08 > php ;save flags
+30d2 : b50c > lda zpt,x
+30d4 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+30d7 : f003 > beq skip2654
+ > trap ;failed not equal (non zero)
+30d9 : 205b44 > jsr report_error
+ >
+30dc : >skip2654
+ >
+30dc : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+30dd : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+30df : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+30e2 : f003 > beq skip2657
+ > trap ;failed not equal (non zero)
+30e4 : 205b44 > jsr report_error
+ >
+30e7 : >skip2657
+ >
+
+30e7 : ca dex
+30e8 : 10dd bpl trolc7
+
+30ea : a203 ldx #3
+30ec : tror6
+ set_zx zp1,0
+ > load_flag 0
+30ec : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+30ee : 48 > pha ;use stack to load status
+30ef : b513 > lda zp1,x ;load to indexed zeropage
+30f1 : 950c > sta zpt,x
+30f3 : 28 > plp
+
+30f4 : 760c ror zpt,x
+ tst_zx rROR,fROR,0
+30f6 : 08 > php ;save flags
+30f7 : b50c > lda zpt,x
+30f9 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+30fc : f003 > beq skip2662
+ > trap ;failed not equal (non zero)
+30fe : 205b44 > jsr report_error
+ >
+3101 : >skip2662
+ >
+3101 : 68 > pla ;load status
+ > eor_flag 0
+3102 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3104 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+3107 : f003 > beq skip2665
+ > trap ;failed not equal (non zero)
+3109 : 205b44 > jsr report_error
+ >
+310c : >skip2665
+ >
+
+310c : ca dex
+310d : 10dd bpl tror6
+310f : a203 ldx #3
+3111 : tror7
+ set_zx zp1,$ff-fc
+ > load_flag $ff-fc
+3111 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+3113 : 48 > pha ;use stack to load status
+3114 : b513 > lda zp1,x ;load to indexed zeropage
+3116 : 950c > sta zpt,x
+3118 : 28 > plp
+
+3119 : 760c ror zpt,x
+ tst_zx rROR,fROR,$ff-fnzc
+311b : 08 > php ;save flags
+311c : b50c > lda zpt,x
+311e : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+3121 : f003 > beq skip2670
+ > trap ;failed not equal (non zero)
+3123 : 205b44 > jsr report_error
+ >
+3126 : >skip2670
+ >
+3126 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3127 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3129 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+312c : f003 > beq skip2673
+ > trap ;failed not equal (non zero)
+312e : 205b44 > jsr report_error
+ >
+3131 : >skip2673
+ >
+
+3131 : ca dex
+3132 : 10dd bpl tror7
+
+3134 : a203 ldx #3
+3136 : trorc6
+ set_zx zp1,fc
+ > load_flag fc
+3136 : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+3138 : 48 > pha ;use stack to load status
+3139 : b513 > lda zp1,x ;load to indexed zeropage
+313b : 950c > sta zpt,x
+313d : 28 > plp
+
+313e : 760c ror zpt,x
+ tst_zx rRORc,fRORc,0
+3140 : 08 > php ;save flags
+3141 : b50c > lda zpt,x
+3143 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+3146 : f003 > beq skip2678
+ > trap ;failed not equal (non zero)
+3148 : 205b44 > jsr report_error
+ >
+314b : >skip2678
+ >
+314b : 68 > pla ;load status
+ > eor_flag 0
+314c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+314e : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+3151 : f003 > beq skip2681
+ > trap ;failed not equal (non zero)
+3153 : 205b44 > jsr report_error
+ >
+3156 : >skip2681
+ >
+
+3156 : ca dex
+3157 : 10dd bpl trorc6
+3159 : a203 ldx #3
+315b : trorc7
+ set_zx zp1,$ff
+ > load_flag $ff
+315b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+315d : 48 > pha ;use stack to load status
+315e : b513 > lda zp1,x ;load to indexed zeropage
+3160 : 950c > sta zpt,x
+3162 : 28 > plp
+
+3163 : 760c ror zpt,x
+ tst_zx rRORc,fRORc,$ff-fnzc
+3165 : 08 > php ;save flags
+3166 : b50c > lda zpt,x
+3168 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+316b : f003 > beq skip2686
+ > trap ;failed not equal (non zero)
+316d : 205b44 > jsr report_error
+ >
+3170 : >skip2686
+ >
+3170 : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3171 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3173 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+3176 : f003 > beq skip2689
+ > trap ;failed not equal (non zero)
+3178 : 205b44 > jsr report_error
+ >
+317b : >skip2689
+ >
+
+317b : ca dex
+317c : 10dd bpl trorc7
+ next_test
+317e : ad0002 > lda test_case ;previous test
+3181 : c920 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3183 : f003 > beq skip2692
+ > trap ;failed not equal (non zero)
+3185 : 205b44 > jsr report_error
+ >
+3188 : >skip2692
+ >
+0021 = >test_num = test_num + 1
+3188 : a921 > lda #test_num ;*** next tests' number
+318a : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; shifts - abs indexed
+318d : a203 ldx #3
+318f : tasl8
+ set_absx zp1,0
+ > load_flag 0
+318f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3191 : 48 > pha ;use stack to load status
+3192 : b513 > lda zp1,x ;load to indexed memory
+3194 : 9d0302 > sta abst,x
+3197 : 28 > plp
+
+3198 : 1e0302 asl abst,x
+ tst_absx rASL,fASL,0
+319b : 08 > php ;save flags
+319c : bd0302 > lda abst,x
+319f : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+31a2 : f003 > beq skip2697
+ > trap ;failed not equal (non zero)
+31a4 : 205b44 > jsr report_error
+ >
+31a7 : >skip2697
+ >
+31a7 : 68 > pla ;load status
+ > eor_flag 0
+31a8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+31aa : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+31ad : f003 > beq skip2700
+ > trap ;failed not equal (non zero)
+31af : 205b44 > jsr report_error
+ >
+31b2 : >skip2700
+ >
+
+31b2 : ca dex
+31b3 : 10da bpl tasl8
+31b5 : a203 ldx #3
+31b7 : tasl9
+ set_absx zp1,$ff
+ > load_flag $ff
+31b7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+31b9 : 48 > pha ;use stack to load status
+31ba : b513 > lda zp1,x ;load to indexed memory
+31bc : 9d0302 > sta abst,x
+31bf : 28 > plp
+
+31c0 : 1e0302 asl abst,x
+ tst_absx rASL,fASL,$ff-fnzc
+31c3 : 08 > php ;save flags
+31c4 : bd0302 > lda abst,x
+31c7 : dd2002 > cmp rASL,x ;test result
+ > trap_ne
+31ca : f003 > beq skip2705
+ > trap ;failed not equal (non zero)
+31cc : 205b44 > jsr report_error
+ >
+31cf : >skip2705
+ >
+31cf : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+31d0 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+31d2 : dd3002 > cmp fASL,x ;test flags
+ > trap_ne
+31d5 : f003 > beq skip2708
+ > trap ;failed not equal (non zero)
+31d7 : 205b44 > jsr report_error
+ >
+31da : >skip2708
+ >
+
+31da : ca dex
+31db : 10da bpl tasl9
+
+31dd : a203 ldx #3
+31df : tlsr8
+ set_absx zp1,0
+ > load_flag 0
+31df : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+31e1 : 48 > pha ;use stack to load status
+31e2 : b513 > lda zp1,x ;load to indexed memory
+31e4 : 9d0302 > sta abst,x
+31e7 : 28 > plp
+
+31e8 : 5e0302 lsr abst,x
+ tst_absx rLSR,fLSR,0
+31eb : 08 > php ;save flags
+31ec : bd0302 > lda abst,x
+31ef : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+31f2 : f003 > beq skip2713
+ > trap ;failed not equal (non zero)
+31f4 : 205b44 > jsr report_error
+ >
+31f7 : >skip2713
+ >
+31f7 : 68 > pla ;load status
+ > eor_flag 0
+31f8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+31fa : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+31fd : f003 > beq skip2716
+ > trap ;failed not equal (non zero)
+31ff : 205b44 > jsr report_error
+ >
+3202 : >skip2716
+ >
+
+3202 : ca dex
+3203 : 10da bpl tlsr8
+3205 : a203 ldx #3
+3207 : tlsr9
+ set_absx zp1,$ff
+ > load_flag $ff
+3207 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3209 : 48 > pha ;use stack to load status
+320a : b513 > lda zp1,x ;load to indexed memory
+320c : 9d0302 > sta abst,x
+320f : 28 > plp
+
+3210 : 5e0302 lsr abst,x
+ tst_absx rLSR,fLSR,$ff-fnzc
+3213 : 08 > php ;save flags
+3214 : bd0302 > lda abst,x
+3217 : dd2802 > cmp rLSR,x ;test result
+ > trap_ne
+321a : f003 > beq skip2721
+ > trap ;failed not equal (non zero)
+321c : 205b44 > jsr report_error
+ >
+321f : >skip2721
+ >
+321f : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3220 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3222 : dd3802 > cmp fLSR,x ;test flags
+ > trap_ne
+3225 : f003 > beq skip2724
+ > trap ;failed not equal (non zero)
+3227 : 205b44 > jsr report_error
+ >
+322a : >skip2724
+ >
+
+322a : ca dex
+322b : 10da bpl tlsr9
+
+322d : a203 ldx #3
+322f : trol8
+ set_absx zp1,0
+ > load_flag 0
+322f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3231 : 48 > pha ;use stack to load status
+3232 : b513 > lda zp1,x ;load to indexed memory
+3234 : 9d0302 > sta abst,x
+3237 : 28 > plp
+
+3238 : 3e0302 rol abst,x
+ tst_absx rROL,fROL,0
+323b : 08 > php ;save flags
+323c : bd0302 > lda abst,x
+323f : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+3242 : f003 > beq skip2729
+ > trap ;failed not equal (non zero)
+3244 : 205b44 > jsr report_error
+ >
+3247 : >skip2729
+ >
+3247 : 68 > pla ;load status
+ > eor_flag 0
+3248 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+324a : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+324d : f003 > beq skip2732
+ > trap ;failed not equal (non zero)
+324f : 205b44 > jsr report_error
+ >
+3252 : >skip2732
+ >
+
+3252 : ca dex
+3253 : 10da bpl trol8
+3255 : a203 ldx #3
+3257 : trol9
+ set_absx zp1,$ff-fc
+ > load_flag $ff-fc
+3257 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+3259 : 48 > pha ;use stack to load status
+325a : b513 > lda zp1,x ;load to indexed memory
+325c : 9d0302 > sta abst,x
+325f : 28 > plp
+
+3260 : 3e0302 rol abst,x
+ tst_absx rROL,fROL,$ff-fnzc
+3263 : 08 > php ;save flags
+3264 : bd0302 > lda abst,x
+3267 : dd2002 > cmp rROL,x ;test result
+ > trap_ne
+326a : f003 > beq skip2737
+ > trap ;failed not equal (non zero)
+326c : 205b44 > jsr report_error
+ >
+326f : >skip2737
+ >
+326f : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3270 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3272 : dd3002 > cmp fROL,x ;test flags
+ > trap_ne
+3275 : f003 > beq skip2740
+ > trap ;failed not equal (non zero)
+3277 : 205b44 > jsr report_error
+ >
+327a : >skip2740
+ >
+
+327a : ca dex
+327b : 10da bpl trol9
+
+327d : a203 ldx #3
+327f : trolc8
+ set_absx zp1,fc
+ > load_flag fc
+327f : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+3281 : 48 > pha ;use stack to load status
+3282 : b513 > lda zp1,x ;load to indexed memory
+3284 : 9d0302 > sta abst,x
+3287 : 28 > plp
+
+3288 : 3e0302 rol abst,x
+ tst_absx rROLc,fROLc,0
+328b : 08 > php ;save flags
+328c : bd0302 > lda abst,x
+328f : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+3292 : f003 > beq skip2745
+ > trap ;failed not equal (non zero)
+3294 : 205b44 > jsr report_error
+ >
+3297 : >skip2745
+ >
+3297 : 68 > pla ;load status
+ > eor_flag 0
+3298 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+329a : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+329d : f003 > beq skip2748
+ > trap ;failed not equal (non zero)
+329f : 205b44 > jsr report_error
+ >
+32a2 : >skip2748
+ >
+
+32a2 : ca dex
+32a3 : 10da bpl trolc8
+32a5 : a203 ldx #3
+32a7 : trolc9
+ set_absx zp1,$ff
+ > load_flag $ff
+32a7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+32a9 : 48 > pha ;use stack to load status
+32aa : b513 > lda zp1,x ;load to indexed memory
+32ac : 9d0302 > sta abst,x
+32af : 28 > plp
+
+32b0 : 3e0302 rol abst,x
+ tst_absx rROLc,fROLc,$ff-fnzc
+32b3 : 08 > php ;save flags
+32b4 : bd0302 > lda abst,x
+32b7 : dd2402 > cmp rROLc,x ;test result
+ > trap_ne
+32ba : f003 > beq skip2753
+ > trap ;failed not equal (non zero)
+32bc : 205b44 > jsr report_error
+ >
+32bf : >skip2753
+ >
+32bf : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+32c0 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+32c2 : dd3402 > cmp fROLc,x ;test flags
+ > trap_ne
+32c5 : f003 > beq skip2756
+ > trap ;failed not equal (non zero)
+32c7 : 205b44 > jsr report_error
+ >
+32ca : >skip2756
+ >
+
+32ca : ca dex
+32cb : 10da bpl trolc9
+
+32cd : a203 ldx #3
+32cf : tror8
+ set_absx zp1,0
+ > load_flag 0
+32cf : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+32d1 : 48 > pha ;use stack to load status
+32d2 : b513 > lda zp1,x ;load to indexed memory
+32d4 : 9d0302 > sta abst,x
+32d7 : 28 > plp
+
+32d8 : 7e0302 ror abst,x
+ tst_absx rROR,fROR,0
+32db : 08 > php ;save flags
+32dc : bd0302 > lda abst,x
+32df : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+32e2 : f003 > beq skip2761
+ > trap ;failed not equal (non zero)
+32e4 : 205b44 > jsr report_error
+ >
+32e7 : >skip2761
+ >
+32e7 : 68 > pla ;load status
+ > eor_flag 0
+32e8 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+32ea : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+32ed : f003 > beq skip2764
+ > trap ;failed not equal (non zero)
+32ef : 205b44 > jsr report_error
+ >
+32f2 : >skip2764
+ >
+
+32f2 : ca dex
+32f3 : 10da bpl tror8
+32f5 : a203 ldx #3
+32f7 : tror9
+ set_absx zp1,$ff-fc
+ > load_flag $ff-fc
+32f7 : a9fe > lda #$ff-fc ;allow test to change I-flag (no mask)
+ >
+32f9 : 48 > pha ;use stack to load status
+32fa : b513 > lda zp1,x ;load to indexed memory
+32fc : 9d0302 > sta abst,x
+32ff : 28 > plp
+
+3300 : 7e0302 ror abst,x
+ tst_absx rROR,fROR,$ff-fnzc
+3303 : 08 > php ;save flags
+3304 : bd0302 > lda abst,x
+3307 : dd2802 > cmp rROR,x ;test result
+ > trap_ne
+330a : f003 > beq skip2769
+ > trap ;failed not equal (non zero)
+330c : 205b44 > jsr report_error
+ >
+330f : >skip2769
+ >
+330f : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3310 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3312 : dd3802 > cmp fROR,x ;test flags
+ > trap_ne
+3315 : f003 > beq skip2772
+ > trap ;failed not equal (non zero)
+3317 : 205b44 > jsr report_error
+ >
+331a : >skip2772
+ >
+
+331a : ca dex
+331b : 10da bpl tror9
+
+331d : a203 ldx #3
+331f : trorc8
+ set_absx zp1,fc
+ > load_flag fc
+331f : a901 > lda #fc ;allow test to change I-flag (no mask)
+ >
+3321 : 48 > pha ;use stack to load status
+3322 : b513 > lda zp1,x ;load to indexed memory
+3324 : 9d0302 > sta abst,x
+3327 : 28 > plp
+
+3328 : 7e0302 ror abst,x
+ tst_absx rRORc,fRORc,0
+332b : 08 > php ;save flags
+332c : bd0302 > lda abst,x
+332f : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+3332 : f003 > beq skip2777
+ > trap ;failed not equal (non zero)
+3334 : 205b44 > jsr report_error
+ >
+3337 : >skip2777
+ >
+3337 : 68 > pla ;load status
+ > eor_flag 0
+3338 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+333a : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+333d : f003 > beq skip2780
+ > trap ;failed not equal (non zero)
+333f : 205b44 > jsr report_error
+ >
+3342 : >skip2780
+ >
+
+3342 : ca dex
+3343 : 10da bpl trorc8
+3345 : a203 ldx #3
+3347 : trorc9
+ set_absx zp1,$ff
+ > load_flag $ff
+3347 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3349 : 48 > pha ;use stack to load status
+334a : b513 > lda zp1,x ;load to indexed memory
+334c : 9d0302 > sta abst,x
+334f : 28 > plp
+
+3350 : 7e0302 ror abst,x
+ tst_absx rRORc,fRORc,$ff-fnzc
+3353 : 08 > php ;save flags
+3354 : bd0302 > lda abst,x
+3357 : dd2c02 > cmp rRORc,x ;test result
+ > trap_ne
+335a : f003 > beq skip2785
+ > trap ;failed not equal (non zero)
+335c : 205b44 > jsr report_error
+ >
+335f : >skip2785
+ >
+335f : 68 > pla ;load status
+ > eor_flag $ff-fnzc
+3360 : 497c > eor #$ff-fnzc|fao ;invert expected flags + always on bits
+ >
+3362 : dd3c02 > cmp fRORc,x ;test flags
+ > trap_ne
+3365 : f003 > beq skip2788
+ > trap ;failed not equal (non zero)
+3367 : 205b44 > jsr report_error
+ >
+336a : >skip2788
+ >
+
+336a : ca dex
+336b : 10da bpl trorc9
+ next_test
+336d : ad0002 > lda test_case ;previous test
+3370 : c921 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3372 : f003 > beq skip2791
+ > trap ;failed not equal (non zero)
+3374 : 205b44 > jsr report_error
+ >
+3377 : >skip2791
+ >
+0022 = >test_num = test_num + 1
+3377 : a922 > lda #test_num ;*** next tests' number
+3379 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing memory increment/decrement - INC DEC all addressing modes
+ ; zeropage
+337c : a200 ldx #0
+337e : a97e lda #$7e
+3380 : 850c sta zpt
+3382 : tinc
+ set_stat 0
+ > load_flag 0
+3382 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3384 : 48 > pha ;use stack to load status
+3385 : 28 > plp
+
+3386 : e60c inc zpt
+ tst_z rINC,fINC,0
+3388 : 08 > php ;save flags
+3389 : a50c > lda zpt
+338b : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+338e : f003 > beq skip2796
+ > trap ;failed not equal (non zero)
+3390 : 205b44 > jsr report_error
+ >
+3393 : >skip2796
+ >
+3393 : 68 > pla ;load status
+ > eor_flag 0
+3394 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3396 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3399 : f003 > beq skip2799
+ > trap ;failed not equal (non zero)
+339b : 205b44 > jsr report_error
+ >
+339e : >skip2799
+ >
+
+339e : e8 inx
+339f : e002 cpx #2
+33a1 : d004 bne tinc1
+33a3 : a9fe lda #$fe
+33a5 : 850c sta zpt
+33a7 : e005 tinc1 cpx #5
+33a9 : d0d7 bne tinc
+33ab : ca dex
+33ac : e60c inc zpt
+33ae : tdec
+ set_stat 0
+ > load_flag 0
+33ae : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+33b0 : 48 > pha ;use stack to load status
+33b1 : 28 > plp
+
+33b2 : c60c dec zpt
+ tst_z rINC,fINC,0
+33b4 : 08 > php ;save flags
+33b5 : a50c > lda zpt
+33b7 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+33ba : f003 > beq skip2804
+ > trap ;failed not equal (non zero)
+33bc : 205b44 > jsr report_error
+ >
+33bf : >skip2804
+ >
+33bf : 68 > pla ;load status
+ > eor_flag 0
+33c0 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+33c2 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+33c5 : f003 > beq skip2807
+ > trap ;failed not equal (non zero)
+33c7 : 205b44 > jsr report_error
+ >
+33ca : >skip2807
+ >
+
+33ca : ca dex
+33cb : 300a bmi tdec1
+33cd : e001 cpx #1
+33cf : d0dd bne tdec
+33d1 : a981 lda #$81
+33d3 : 850c sta zpt
+33d5 : d0d7 bne tdec
+33d7 : tdec1
+33d7 : a200 ldx #0
+33d9 : a97e lda #$7e
+33db : 850c sta zpt
+33dd : tinc10
+ set_stat $ff
+ > load_flag $ff
+33dd : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+33df : 48 > pha ;use stack to load status
+33e0 : 28 > plp
+
+33e1 : e60c inc zpt
+ tst_z rINC,fINC,$ff-fnz
+33e3 : 08 > php ;save flags
+33e4 : a50c > lda zpt
+33e6 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+33e9 : f003 > beq skip2812
+ > trap ;failed not equal (non zero)
+33eb : 205b44 > jsr report_error
+ >
+33ee : >skip2812
+ >
+33ee : 68 > pla ;load status
+ > eor_flag $ff-fnz
+33ef : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+33f1 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+33f4 : f003 > beq skip2815
+ > trap ;failed not equal (non zero)
+33f6 : 205b44 > jsr report_error
+ >
+33f9 : >skip2815
+ >
+
+33f9 : e8 inx
+33fa : e002 cpx #2
+33fc : d004 bne tinc11
+33fe : a9fe lda #$fe
+3400 : 850c sta zpt
+3402 : e005 tinc11 cpx #5
+3404 : d0d7 bne tinc10
+3406 : ca dex
+3407 : e60c inc zpt
+3409 : tdec10
+ set_stat $ff
+ > load_flag $ff
+3409 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+340b : 48 > pha ;use stack to load status
+340c : 28 > plp
+
+340d : c60c dec zpt
+ tst_z rINC,fINC,$ff-fnz
+340f : 08 > php ;save flags
+3410 : a50c > lda zpt
+3412 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3415 : f003 > beq skip2820
+ > trap ;failed not equal (non zero)
+3417 : 205b44 > jsr report_error
+ >
+341a : >skip2820
+ >
+341a : 68 > pla ;load status
+ > eor_flag $ff-fnz
+341b : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+341d : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3420 : f003 > beq skip2823
+ > trap ;failed not equal (non zero)
+3422 : 205b44 > jsr report_error
+ >
+3425 : >skip2823
+ >
+
+3425 : ca dex
+3426 : 300a bmi tdec11
+3428 : e001 cpx #1
+342a : d0dd bne tdec10
+342c : a981 lda #$81
+342e : 850c sta zpt
+3430 : d0d7 bne tdec10
+3432 : tdec11
+ next_test
+3432 : ad0002 > lda test_case ;previous test
+3435 : c922 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3437 : f003 > beq skip2826
+ > trap ;failed not equal (non zero)
+3439 : 205b44 > jsr report_error
+ >
+343c : >skip2826
+ >
+0023 = >test_num = test_num + 1
+343c : a923 > lda #test_num ;*** next tests' number
+343e : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; absolute memory
+3441 : a200 ldx #0
+3443 : a97e lda #$7e
+3445 : 8d0302 sta abst
+3448 : tinc2
+ set_stat 0
+ > load_flag 0
+3448 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+344a : 48 > pha ;use stack to load status
+344b : 28 > plp
+
+344c : ee0302 inc abst
+ tst_abs rINC,fINC,0
+344f : 08 > php ;save flags
+3450 : ad0302 > lda abst
+3453 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3456 : f003 > beq skip2831
+ > trap ;failed not equal (non zero)
+3458 : 205b44 > jsr report_error
+ >
+345b : >skip2831
+ >
+345b : 68 > pla ;load status
+ > eor_flag 0
+345c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+345e : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3461 : f003 > beq skip2834
+ > trap ;failed not equal (non zero)
+3463 : 205b44 > jsr report_error
+ >
+3466 : >skip2834
+ >
+
+3466 : e8 inx
+3467 : e002 cpx #2
+3469 : d005 bne tinc3
+346b : a9fe lda #$fe
+346d : 8d0302 sta abst
+3470 : e005 tinc3 cpx #5
+3472 : d0d4 bne tinc2
+3474 : ca dex
+3475 : ee0302 inc abst
+3478 : tdec2
+ set_stat 0
+ > load_flag 0
+3478 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+347a : 48 > pha ;use stack to load status
+347b : 28 > plp
+
+347c : ce0302 dec abst
+ tst_abs rINC,fINC,0
+347f : 08 > php ;save flags
+3480 : ad0302 > lda abst
+3483 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3486 : f003 > beq skip2839
+ > trap ;failed not equal (non zero)
+3488 : 205b44 > jsr report_error
+ >
+348b : >skip2839
+ >
+348b : 68 > pla ;load status
+ > eor_flag 0
+348c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+348e : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3491 : f003 > beq skip2842
+ > trap ;failed not equal (non zero)
+3493 : 205b44 > jsr report_error
+ >
+3496 : >skip2842
+ >
+
+3496 : ca dex
+3497 : 300b bmi tdec3
+3499 : e001 cpx #1
+349b : d0db bne tdec2
+349d : a981 lda #$81
+349f : 8d0302 sta abst
+34a2 : d0d4 bne tdec2
+34a4 : tdec3
+34a4 : a200 ldx #0
+34a6 : a97e lda #$7e
+34a8 : 8d0302 sta abst
+34ab : tinc12
+ set_stat $ff
+ > load_flag $ff
+34ab : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+34ad : 48 > pha ;use stack to load status
+34ae : 28 > plp
+
+34af : ee0302 inc abst
+ tst_abs rINC,fINC,$ff-fnz
+34b2 : 08 > php ;save flags
+34b3 : ad0302 > lda abst
+34b6 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+34b9 : f003 > beq skip2847
+ > trap ;failed not equal (non zero)
+34bb : 205b44 > jsr report_error
+ >
+34be : >skip2847
+ >
+34be : 68 > pla ;load status
+ > eor_flag $ff-fnz
+34bf : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+34c1 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+34c4 : f003 > beq skip2850
+ > trap ;failed not equal (non zero)
+34c6 : 205b44 > jsr report_error
+ >
+34c9 : >skip2850
+ >
+
+34c9 : e8 inx
+34ca : e002 cpx #2
+34cc : d005 bne tinc13
+34ce : a9fe lda #$fe
+34d0 : 8d0302 sta abst
+34d3 : e005 tinc13 cpx #5
+34d5 : d0d4 bne tinc12
+34d7 : ca dex
+34d8 : ee0302 inc abst
+34db : tdec12
+ set_stat $ff
+ > load_flag $ff
+34db : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+34dd : 48 > pha ;use stack to load status
+34de : 28 > plp
+
+34df : ce0302 dec abst
+ tst_abs rINC,fINC,$ff-fnz
+34e2 : 08 > php ;save flags
+34e3 : ad0302 > lda abst
+34e6 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+34e9 : f003 > beq skip2855
+ > trap ;failed not equal (non zero)
+34eb : 205b44 > jsr report_error
+ >
+34ee : >skip2855
+ >
+34ee : 68 > pla ;load status
+ > eor_flag $ff-fnz
+34ef : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+34f1 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+34f4 : f003 > beq skip2858
+ > trap ;failed not equal (non zero)
+34f6 : 205b44 > jsr report_error
+ >
+34f9 : >skip2858
+ >
+
+34f9 : ca dex
+34fa : 300b bmi tdec13
+34fc : e001 cpx #1
+34fe : d0db bne tdec12
+3500 : a981 lda #$81
+3502 : 8d0302 sta abst
+3505 : d0d4 bne tdec12
+3507 : tdec13
+ next_test
+3507 : ad0002 > lda test_case ;previous test
+350a : c923 > cmp #test_num
+ > trap_ne ;test is out of sequence
+350c : f003 > beq skip2861
+ > trap ;failed not equal (non zero)
+350e : 205b44 > jsr report_error
+ >
+3511 : >skip2861
+ >
+0024 = >test_num = test_num + 1
+3511 : a924 > lda #test_num ;*** next tests' number
+3513 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; zeropage indexed
+3516 : a200 ldx #0
+3518 : a97e lda #$7e
+351a : 950c tinc4 sta zpt,x
+ set_stat 0
+ > load_flag 0
+351c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+351e : 48 > pha ;use stack to load status
+351f : 28 > plp
+
+3520 : f60c inc zpt,x
+ tst_zx rINC,fINC,0
+3522 : 08 > php ;save flags
+3523 : b50c > lda zpt,x
+3525 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3528 : f003 > beq skip2866
+ > trap ;failed not equal (non zero)
+352a : 205b44 > jsr report_error
+ >
+352d : >skip2866
+ >
+352d : 68 > pla ;load status
+ > eor_flag 0
+352e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3530 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3533 : f003 > beq skip2869
+ > trap ;failed not equal (non zero)
+3535 : 205b44 > jsr report_error
+ >
+3538 : >skip2869
+ >
+
+3538 : b50c lda zpt,x
+353a : e8 inx
+353b : e002 cpx #2
+353d : d002 bne tinc5
+353f : a9fe lda #$fe
+3541 : e005 tinc5 cpx #5
+3543 : d0d5 bne tinc4
+3545 : ca dex
+3546 : a902 lda #2
+3548 : 950c tdec4 sta zpt,x
+ set_stat 0
+ > load_flag 0
+354a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+354c : 48 > pha ;use stack to load status
+354d : 28 > plp
+
+354e : d60c dec zpt,x
+ tst_zx rINC,fINC,0
+3550 : 08 > php ;save flags
+3551 : b50c > lda zpt,x
+3553 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3556 : f003 > beq skip2874
+ > trap ;failed not equal (non zero)
+3558 : 205b44 > jsr report_error
+ >
+355b : >skip2874
+ >
+355b : 68 > pla ;load status
+ > eor_flag 0
+355c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+355e : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3561 : f003 > beq skip2877
+ > trap ;failed not equal (non zero)
+3563 : 205b44 > jsr report_error
+ >
+3566 : >skip2877
+ >
+
+3566 : b50c lda zpt,x
+3568 : ca dex
+3569 : 3008 bmi tdec5
+356b : e001 cpx #1
+356d : d0d9 bne tdec4
+356f : a981 lda #$81
+3571 : d0d5 bne tdec4
+3573 : tdec5
+3573 : a200 ldx #0
+3575 : a97e lda #$7e
+3577 : 950c tinc14 sta zpt,x
+ set_stat $ff
+ > load_flag $ff
+3579 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+357b : 48 > pha ;use stack to load status
+357c : 28 > plp
+
+357d : f60c inc zpt,x
+ tst_zx rINC,fINC,$ff-fnz
+357f : 08 > php ;save flags
+3580 : b50c > lda zpt,x
+3582 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3585 : f003 > beq skip2882
+ > trap ;failed not equal (non zero)
+3587 : 205b44 > jsr report_error
+ >
+358a : >skip2882
+ >
+358a : 68 > pla ;load status
+ > eor_flag $ff-fnz
+358b : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+358d : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3590 : f003 > beq skip2885
+ > trap ;failed not equal (non zero)
+3592 : 205b44 > jsr report_error
+ >
+3595 : >skip2885
+ >
+
+3595 : b50c lda zpt,x
+3597 : e8 inx
+3598 : e002 cpx #2
+359a : d002 bne tinc15
+359c : a9fe lda #$fe
+359e : e005 tinc15 cpx #5
+35a0 : d0d5 bne tinc14
+35a2 : ca dex
+35a3 : a902 lda #2
+35a5 : 950c tdec14 sta zpt,x
+ set_stat $ff
+ > load_flag $ff
+35a7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+35a9 : 48 > pha ;use stack to load status
+35aa : 28 > plp
+
+35ab : d60c dec zpt,x
+ tst_zx rINC,fINC,$ff-fnz
+35ad : 08 > php ;save flags
+35ae : b50c > lda zpt,x
+35b0 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+35b3 : f003 > beq skip2890
+ > trap ;failed not equal (non zero)
+35b5 : 205b44 > jsr report_error
+ >
+35b8 : >skip2890
+ >
+35b8 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+35b9 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+35bb : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+35be : f003 > beq skip2893
+ > trap ;failed not equal (non zero)
+35c0 : 205b44 > jsr report_error
+ >
+35c3 : >skip2893
+ >
+
+35c3 : b50c lda zpt,x
+35c5 : ca dex
+35c6 : 3008 bmi tdec15
+35c8 : e001 cpx #1
+35ca : d0d9 bne tdec14
+35cc : a981 lda #$81
+35ce : d0d5 bne tdec14
+35d0 : tdec15
+ next_test
+35d0 : ad0002 > lda test_case ;previous test
+35d3 : c924 > cmp #test_num
+ > trap_ne ;test is out of sequence
+35d5 : f003 > beq skip2896
+ > trap ;failed not equal (non zero)
+35d7 : 205b44 > jsr report_error
+ >
+35da : >skip2896
+ >
+0025 = >test_num = test_num + 1
+35da : a925 > lda #test_num ;*** next tests' number
+35dc : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; memory indexed
+35df : a200 ldx #0
+35e1 : a97e lda #$7e
+35e3 : 9d0302 tinc6 sta abst,x
+ set_stat 0
+ > load_flag 0
+35e6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+35e8 : 48 > pha ;use stack to load status
+35e9 : 28 > plp
+
+35ea : fe0302 inc abst,x
+ tst_absx rINC,fINC,0
+35ed : 08 > php ;save flags
+35ee : bd0302 > lda abst,x
+35f1 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+35f4 : f003 > beq skip2901
+ > trap ;failed not equal (non zero)
+35f6 : 205b44 > jsr report_error
+ >
+35f9 : >skip2901
+ >
+35f9 : 68 > pla ;load status
+ > eor_flag 0
+35fa : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+35fc : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+35ff : f003 > beq skip2904
+ > trap ;failed not equal (non zero)
+3601 : 205b44 > jsr report_error
+ >
+3604 : >skip2904
+ >
+
+3604 : bd0302 lda abst,x
+3607 : e8 inx
+3608 : e002 cpx #2
+360a : d002 bne tinc7
+360c : a9fe lda #$fe
+360e : e005 tinc7 cpx #5
+3610 : d0d1 bne tinc6
+3612 : ca dex
+3613 : a902 lda #2
+3615 : 9d0302 tdec6 sta abst,x
+ set_stat 0
+ > load_flag 0
+3618 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+361a : 48 > pha ;use stack to load status
+361b : 28 > plp
+
+361c : de0302 dec abst,x
+ tst_absx rINC,fINC,0
+361f : 08 > php ;save flags
+3620 : bd0302 > lda abst,x
+3623 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3626 : f003 > beq skip2909
+ > trap ;failed not equal (non zero)
+3628 : 205b44 > jsr report_error
+ >
+362b : >skip2909
+ >
+362b : 68 > pla ;load status
+ > eor_flag 0
+362c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+362e : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3631 : f003 > beq skip2912
+ > trap ;failed not equal (non zero)
+3633 : 205b44 > jsr report_error
+ >
+3636 : >skip2912
+ >
+
+3636 : bd0302 lda abst,x
+3639 : ca dex
+363a : 3008 bmi tdec7
+363c : e001 cpx #1
+363e : d0d5 bne tdec6
+3640 : a981 lda #$81
+3642 : d0d1 bne tdec6
+3644 : tdec7
+3644 : a200 ldx #0
+3646 : a97e lda #$7e
+3648 : 9d0302 tinc16 sta abst,x
+ set_stat $ff
+ > load_flag $ff
+364b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+364d : 48 > pha ;use stack to load status
+364e : 28 > plp
+
+364f : fe0302 inc abst,x
+ tst_absx rINC,fINC,$ff-fnz
+3652 : 08 > php ;save flags
+3653 : bd0302 > lda abst,x
+3656 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+3659 : f003 > beq skip2917
+ > trap ;failed not equal (non zero)
+365b : 205b44 > jsr report_error
+ >
+365e : >skip2917
+ >
+365e : 68 > pla ;load status
+ > eor_flag $ff-fnz
+365f : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3661 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3664 : f003 > beq skip2920
+ > trap ;failed not equal (non zero)
+3666 : 205b44 > jsr report_error
+ >
+3669 : >skip2920
+ >
+
+3669 : bd0302 lda abst,x
+366c : e8 inx
+366d : e002 cpx #2
+366f : d002 bne tinc17
+3671 : a9fe lda #$fe
+3673 : e005 tinc17 cpx #5
+3675 : d0d1 bne tinc16
+3677 : ca dex
+3678 : a902 lda #2
+367a : 9d0302 tdec16 sta abst,x
+ set_stat $ff
+ > load_flag $ff
+367d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+367f : 48 > pha ;use stack to load status
+3680 : 28 > plp
+
+3681 : de0302 dec abst,x
+ tst_absx rINC,fINC,$ff-fnz
+3684 : 08 > php ;save flags
+3685 : bd0302 > lda abst,x
+3688 : dd4002 > cmp rINC,x ;test result
+ > trap_ne
+368b : f003 > beq skip2925
+ > trap ;failed not equal (non zero)
+368d : 205b44 > jsr report_error
+ >
+3690 : >skip2925
+ >
+3690 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3691 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3693 : dd4502 > cmp fINC,x ;test flags
+ > trap_ne
+3696 : f003 > beq skip2928
+ > trap ;failed not equal (non zero)
+3698 : 205b44 > jsr report_error
+ >
+369b : >skip2928
+ >
+
+369b : bd0302 lda abst,x
+369e : ca dex
+369f : 3008 bmi tdec17
+36a1 : e001 cpx #1
+36a3 : d0d5 bne tdec16
+36a5 : a981 lda #$81
+36a7 : d0d1 bne tdec16
+36a9 : tdec17
+ next_test
+36a9 : ad0002 > lda test_case ;previous test
+36ac : c925 > cmp #test_num
+ > trap_ne ;test is out of sequence
+36ae : f003 > beq skip2931
+ > trap ;failed not equal (non zero)
+36b0 : 205b44 > jsr report_error
+ >
+36b3 : >skip2931
+ >
+0026 = >test_num = test_num + 1
+36b3 : a926 > lda #test_num ;*** next tests' number
+36b5 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing logical instructions - AND EOR ORA all addressing modes
+ ; AND
+36b8 : a203 ldx #3 ;immediate
+36ba : b51c tand lda zpAN,x
+36bc : 8d0902 sta ex_andi+1 ;set AND # operand
+ set_ax absANa,0
+ > load_flag 0
+36bf : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+36c1 : 48 > pha ;use stack to load status
+36c2 : bd5a02 > lda absANa,x ;precharge accu
+36c5 : 28 > plp
+
+36c6 : 200802 jsr ex_andi ;execute AND # in RAM
+ tst_ax absrlo,absflo,0
+36c9 : 08 > php ;save flags
+36ca : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+36cd : f003 > beq skip2936
+ > trap ;failed not equal (non zero)
+36cf : 205b44 > jsr report_error
+ >
+36d2 : >skip2936
+ >
+36d2 : 68 > pla ;load status
+ > eor_flag 0
+36d3 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+36d5 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+36d8 : f003 > beq skip2939
+ > trap ;failed not equal (non zero)
+36da : 205b44 > jsr report_error
+ >
+36dd : >skip2939
+ >
+
+36dd : ca dex
+36de : 10da bpl tand
+36e0 : a203 ldx #3
+36e2 : b51c tand1 lda zpAN,x
+36e4 : 8d0902 sta ex_andi+1 ;set AND # operand
+ set_ax absANa,$ff
+ > load_flag $ff
+36e7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+36e9 : 48 > pha ;use stack to load status
+36ea : bd5a02 > lda absANa,x ;precharge accu
+36ed : 28 > plp
+
+36ee : 200802 jsr ex_andi ;execute AND # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+36f1 : 08 > php ;save flags
+36f2 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+36f5 : f003 > beq skip2944
+ > trap ;failed not equal (non zero)
+36f7 : 205b44 > jsr report_error
+ >
+36fa : >skip2944
+ >
+36fa : 68 > pla ;load status
+ > eor_flag $ff-fnz
+36fb : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+36fd : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3700 : f003 > beq skip2947
+ > trap ;failed not equal (non zero)
+3702 : 205b44 > jsr report_error
+ >
+3705 : >skip2947
+ >
+
+3705 : ca dex
+3706 : 10da bpl tand1
+
+3708 : a203 ldx #3 ;zp
+370a : b51c tand2 lda zpAN,x
+370c : 850c sta zpt
+ set_ax absANa,0
+ > load_flag 0
+370e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3710 : 48 > pha ;use stack to load status
+3711 : bd5a02 > lda absANa,x ;precharge accu
+3714 : 28 > plp
+
+3715 : 250c and zpt
+ tst_ax absrlo,absflo,0
+3717 : 08 > php ;save flags
+3718 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+371b : f003 > beq skip2952
+ > trap ;failed not equal (non zero)
+371d : 205b44 > jsr report_error
+ >
+3720 : >skip2952
+ >
+3720 : 68 > pla ;load status
+ > eor_flag 0
+3721 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3723 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3726 : f003 > beq skip2955
+ > trap ;failed not equal (non zero)
+3728 : 205b44 > jsr report_error
+ >
+372b : >skip2955
+ >
+
+372b : ca dex
+372c : 10dc bpl tand2
+372e : a203 ldx #3
+3730 : b51c tand3 lda zpAN,x
+3732 : 850c sta zpt
+ set_ax absANa,$ff
+ > load_flag $ff
+3734 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3736 : 48 > pha ;use stack to load status
+3737 : bd5a02 > lda absANa,x ;precharge accu
+373a : 28 > plp
+
+373b : 250c and zpt
+ tst_ax absrlo,absflo,$ff-fnz
+373d : 08 > php ;save flags
+373e : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3741 : f003 > beq skip2960
+ > trap ;failed not equal (non zero)
+3743 : 205b44 > jsr report_error
+ >
+3746 : >skip2960
+ >
+3746 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3747 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3749 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+374c : f003 > beq skip2963
+ > trap ;failed not equal (non zero)
+374e : 205b44 > jsr report_error
+ >
+3751 : >skip2963
+ >
+
+3751 : ca dex
+3752 : 10dc bpl tand3
+
+3754 : a203 ldx #3 ;abs
+3756 : b51c tand4 lda zpAN,x
+3758 : 8d0302 sta abst
+ set_ax absANa,0
+ > load_flag 0
+375b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+375d : 48 > pha ;use stack to load status
+375e : bd5a02 > lda absANa,x ;precharge accu
+3761 : 28 > plp
+
+3762 : 2d0302 and abst
+ tst_ax absrlo,absflo,0
+3765 : 08 > php ;save flags
+3766 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3769 : f003 > beq skip2968
+ > trap ;failed not equal (non zero)
+376b : 205b44 > jsr report_error
+ >
+376e : >skip2968
+ >
+376e : 68 > pla ;load status
+ > eor_flag 0
+376f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3771 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3774 : f003 > beq skip2971
+ > trap ;failed not equal (non zero)
+3776 : 205b44 > jsr report_error
+ >
+3779 : >skip2971
+ >
+
+3779 : ca dex
+377a : 10da bpl tand4
+377c : a203 ldx #3
+377e : b51c tand5 lda zpAN,x
+3780 : 8d0302 sta abst
+ set_ax absANa,$ff
+ > load_flag $ff
+3783 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3785 : 48 > pha ;use stack to load status
+3786 : bd5a02 > lda absANa,x ;precharge accu
+3789 : 28 > plp
+
+378a : 2d0302 and abst
+ tst_ax absrlo,absflo,$ff-fnz
+378d : 08 > php ;save flags
+378e : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3791 : f003 > beq skip2976
+ > trap ;failed not equal (non zero)
+3793 : 205b44 > jsr report_error
+ >
+3796 : >skip2976
+ >
+3796 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3797 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3799 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+379c : f003 > beq skip2979
+ > trap ;failed not equal (non zero)
+379e : 205b44 > jsr report_error
+ >
+37a1 : >skip2979
+ >
+
+37a1 : ca dex
+37a2 : 1002 bpl tand6
+
+37a4 : a203 ldx #3 ;zp,x
+37a6 : tand6
+ set_ax absANa,0
+ > load_flag 0
+37a6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+37a8 : 48 > pha ;use stack to load status
+37a9 : bd5a02 > lda absANa,x ;precharge accu
+37ac : 28 > plp
+
+37ad : 351c and zpAN,x
+ tst_ax absrlo,absflo,0
+37af : 08 > php ;save flags
+37b0 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+37b3 : f003 > beq skip2984
+ > trap ;failed not equal (non zero)
+37b5 : 205b44 > jsr report_error
+ >
+37b8 : >skip2984
+ >
+37b8 : 68 > pla ;load status
+ > eor_flag 0
+37b9 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+37bb : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+37be : f003 > beq skip2987
+ > trap ;failed not equal (non zero)
+37c0 : 205b44 > jsr report_error
+ >
+37c3 : >skip2987
+ >
+
+37c3 : ca dex
+37c4 : 10e0 bpl tand6
+37c6 : a203 ldx #3
+37c8 : tand7
+ set_ax absANa,$ff
+ > load_flag $ff
+37c8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+37ca : 48 > pha ;use stack to load status
+37cb : bd5a02 > lda absANa,x ;precharge accu
+37ce : 28 > plp
+
+37cf : 351c and zpAN,x
+ tst_ax absrlo,absflo,$ff-fnz
+37d1 : 08 > php ;save flags
+37d2 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+37d5 : f003 > beq skip2992
+ > trap ;failed not equal (non zero)
+37d7 : 205b44 > jsr report_error
+ >
+37da : >skip2992
+ >
+37da : 68 > pla ;load status
+ > eor_flag $ff-fnz
+37db : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+37dd : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+37e0 : f003 > beq skip2995
+ > trap ;failed not equal (non zero)
+37e2 : 205b44 > jsr report_error
+ >
+37e5 : >skip2995
+ >
+
+37e5 : ca dex
+37e6 : 10e0 bpl tand7
+
+37e8 : a203 ldx #3 ;abs,x
+37ea : tand8
+ set_ax absANa,0
+ > load_flag 0
+37ea : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+37ec : 48 > pha ;use stack to load status
+37ed : bd5a02 > lda absANa,x ;precharge accu
+37f0 : 28 > plp
+
+37f1 : 3d4e02 and absAN,x
+ tst_ax absrlo,absflo,0
+37f4 : 08 > php ;save flags
+37f5 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+37f8 : f003 > beq skip3000
+ > trap ;failed not equal (non zero)
+37fa : 205b44 > jsr report_error
+ >
+37fd : >skip3000
+ >
+37fd : 68 > pla ;load status
+ > eor_flag 0
+37fe : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3800 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3803 : f003 > beq skip3003
+ > trap ;failed not equal (non zero)
+3805 : 205b44 > jsr report_error
+ >
+3808 : >skip3003
+ >
+
+3808 : ca dex
+3809 : 10df bpl tand8
+380b : a203 ldx #3
+380d : tand9
+ set_ax absANa,$ff
+ > load_flag $ff
+380d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+380f : 48 > pha ;use stack to load status
+3810 : bd5a02 > lda absANa,x ;precharge accu
+3813 : 28 > plp
+
+3814 : 3d4e02 and absAN,x
+ tst_ax absrlo,absflo,$ff-fnz
+3817 : 08 > php ;save flags
+3818 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+381b : f003 > beq skip3008
+ > trap ;failed not equal (non zero)
+381d : 205b44 > jsr report_error
+ >
+3820 : >skip3008
+ >
+3820 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3821 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3823 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3826 : f003 > beq skip3011
+ > trap ;failed not equal (non zero)
+3828 : 205b44 > jsr report_error
+ >
+382b : >skip3011
+ >
+
+382b : ca dex
+382c : 10df bpl tand9
+
+382e : a003 ldy #3 ;abs,y
+3830 : tand10
+ set_ay absANa,0
+ > load_flag 0
+3830 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3832 : 48 > pha ;use stack to load status
+3833 : b95a02 > lda absANa,y ;precharge accu
+3836 : 28 > plp
+
+3837 : 394e02 and absAN,y
+ tst_ay absrlo,absflo,0
+383a : 08 > php ;save flags
+383b : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+383e : f003 > beq skip3016
+ > trap ;failed not equal (non zero)
+3840 : 205b44 > jsr report_error
+ >
+3843 : >skip3016
+ >
+3843 : 68 > pla ;load status
+ > eor_flag 0
+3844 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3846 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3849 : f003 > beq skip3019
+ > trap ;failed not equal (non zero)
+384b : 205b44 > jsr report_error
+ >
+384e : >skip3019
+ >
+
+384e : 88 dey
+384f : 10df bpl tand10
+3851 : a003 ldy #3
+3853 : tand11
+ set_ay absANa,$ff
+ > load_flag $ff
+3853 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3855 : 48 > pha ;use stack to load status
+3856 : b95a02 > lda absANa,y ;precharge accu
+3859 : 28 > plp
+
+385a : 394e02 and absAN,y
+ tst_ay absrlo,absflo,$ff-fnz
+385d : 08 > php ;save flags
+385e : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3861 : f003 > beq skip3024
+ > trap ;failed not equal (non zero)
+3863 : 205b44 > jsr report_error
+ >
+3866 : >skip3024
+ >
+3866 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3867 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3869 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+386c : f003 > beq skip3027
+ > trap ;failed not equal (non zero)
+386e : 205b44 > jsr report_error
+ >
+3871 : >skip3027
+ >
+
+3871 : 88 dey
+3872 : 10df bpl tand11
+
+3874 : a206 ldx #6 ;(zp,x)
+3876 : a003 ldy #3
+3878 : tand12
+ set_ay absANa,0
+ > load_flag 0
+3878 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+387a : 48 > pha ;use stack to load status
+387b : b95a02 > lda absANa,y ;precharge accu
+387e : 28 > plp
+
+387f : 213a and (indAN,x)
+ tst_ay absrlo,absflo,0
+3881 : 08 > php ;save flags
+3882 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3885 : f003 > beq skip3032
+ > trap ;failed not equal (non zero)
+3887 : 205b44 > jsr report_error
+ >
+388a : >skip3032
+ >
+388a : 68 > pla ;load status
+ > eor_flag 0
+388b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+388d : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3890 : f003 > beq skip3035
+ > trap ;failed not equal (non zero)
+3892 : 205b44 > jsr report_error
+ >
+3895 : >skip3035
+ >
+
+3895 : ca dex
+3896 : ca dex
+3897 : 88 dey
+3898 : 10de bpl tand12
+389a : a206 ldx #6
+389c : a003 ldy #3
+389e : tand13
+ set_ay absANa,$ff
+ > load_flag $ff
+389e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+38a0 : 48 > pha ;use stack to load status
+38a1 : b95a02 > lda absANa,y ;precharge accu
+38a4 : 28 > plp
+
+38a5 : 213a and (indAN,x)
+ tst_ay absrlo,absflo,$ff-fnz
+38a7 : 08 > php ;save flags
+38a8 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+38ab : f003 > beq skip3040
+ > trap ;failed not equal (non zero)
+38ad : 205b44 > jsr report_error
+ >
+38b0 : >skip3040
+ >
+38b0 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+38b1 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+38b3 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+38b6 : f003 > beq skip3043
+ > trap ;failed not equal (non zero)
+38b8 : 205b44 > jsr report_error
+ >
+38bb : >skip3043
+ >
+
+38bb : ca dex
+38bc : ca dex
+38bd : 88 dey
+38be : 10de bpl tand13
+
+38c0 : a003 ldy #3 ;(zp),y
+38c2 : tand14
+ set_ay absANa,0
+ > load_flag 0
+38c2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+38c4 : 48 > pha ;use stack to load status
+38c5 : b95a02 > lda absANa,y ;precharge accu
+38c8 : 28 > plp
+
+38c9 : 313a and (indAN),y
+ tst_ay absrlo,absflo,0
+38cb : 08 > php ;save flags
+38cc : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+38cf : f003 > beq skip3048
+ > trap ;failed not equal (non zero)
+38d1 : 205b44 > jsr report_error
+ >
+38d4 : >skip3048
+ >
+38d4 : 68 > pla ;load status
+ > eor_flag 0
+38d5 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+38d7 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+38da : f003 > beq skip3051
+ > trap ;failed not equal (non zero)
+38dc : 205b44 > jsr report_error
+ >
+38df : >skip3051
+ >
+
+38df : 88 dey
+38e0 : 10e0 bpl tand14
+38e2 : a003 ldy #3
+38e4 : tand15
+ set_ay absANa,$ff
+ > load_flag $ff
+38e4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+38e6 : 48 > pha ;use stack to load status
+38e7 : b95a02 > lda absANa,y ;precharge accu
+38ea : 28 > plp
+
+38eb : 313a and (indAN),y
+ tst_ay absrlo,absflo,$ff-fnz
+38ed : 08 > php ;save flags
+38ee : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+38f1 : f003 > beq skip3056
+ > trap ;failed not equal (non zero)
+38f3 : 205b44 > jsr report_error
+ >
+38f6 : >skip3056
+ >
+38f6 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+38f7 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+38f9 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+38fc : f003 > beq skip3059
+ > trap ;failed not equal (non zero)
+38fe : 205b44 > jsr report_error
+ >
+3901 : >skip3059
+ >
+
+3901 : 88 dey
+3902 : 10e0 bpl tand15
+ next_test
+3904 : ad0002 > lda test_case ;previous test
+3907 : c926 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3909 : f003 > beq skip3062
+ > trap ;failed not equal (non zero)
+390b : 205b44 > jsr report_error
+ >
+390e : >skip3062
+ >
+0027 = >test_num = test_num + 1
+390e : a927 > lda #test_num ;*** next tests' number
+3910 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; EOR
+3913 : a203 ldx #3 ;immediate - self modifying code
+3915 : b520 teor lda zpEO,x
+3917 : 8d0c02 sta ex_eori+1 ;set EOR # operand
+ set_ax absEOa,0
+ > load_flag 0
+391a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+391c : 48 > pha ;use stack to load status
+391d : bd5e02 > lda absEOa,x ;precharge accu
+3920 : 28 > plp
+
+3921 : 200b02 jsr ex_eori ;execute EOR # in RAM
+ tst_ax absrlo,absflo,0
+3924 : 08 > php ;save flags
+3925 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3928 : f003 > beq skip3067
+ > trap ;failed not equal (non zero)
+392a : 205b44 > jsr report_error
+ >
+392d : >skip3067
+ >
+392d : 68 > pla ;load status
+ > eor_flag 0
+392e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3930 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3933 : f003 > beq skip3070
+ > trap ;failed not equal (non zero)
+3935 : 205b44 > jsr report_error
+ >
+3938 : >skip3070
+ >
+
+3938 : ca dex
+3939 : 10da bpl teor
+393b : a203 ldx #3
+393d : b520 teor1 lda zpEO,x
+393f : 8d0c02 sta ex_eori+1 ;set EOR # operand
+ set_ax absEOa,$ff
+ > load_flag $ff
+3942 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3944 : 48 > pha ;use stack to load status
+3945 : bd5e02 > lda absEOa,x ;precharge accu
+3948 : 28 > plp
+
+3949 : 200b02 jsr ex_eori ;execute EOR # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+394c : 08 > php ;save flags
+394d : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3950 : f003 > beq skip3075
+ > trap ;failed not equal (non zero)
+3952 : 205b44 > jsr report_error
+ >
+3955 : >skip3075
+ >
+3955 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3956 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3958 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+395b : f003 > beq skip3078
+ > trap ;failed not equal (non zero)
+395d : 205b44 > jsr report_error
+ >
+3960 : >skip3078
+ >
+
+3960 : ca dex
+3961 : 10da bpl teor1
+
+3963 : a203 ldx #3 ;zp
+3965 : b520 teor2 lda zpEO,x
+3967 : 850c sta zpt
+ set_ax absEOa,0
+ > load_flag 0
+3969 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+396b : 48 > pha ;use stack to load status
+396c : bd5e02 > lda absEOa,x ;precharge accu
+396f : 28 > plp
+
+3970 : 450c eor zpt
+ tst_ax absrlo,absflo,0
+3972 : 08 > php ;save flags
+3973 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3976 : f003 > beq skip3083
+ > trap ;failed not equal (non zero)
+3978 : 205b44 > jsr report_error
+ >
+397b : >skip3083
+ >
+397b : 68 > pla ;load status
+ > eor_flag 0
+397c : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+397e : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3981 : f003 > beq skip3086
+ > trap ;failed not equal (non zero)
+3983 : 205b44 > jsr report_error
+ >
+3986 : >skip3086
+ >
+
+3986 : ca dex
+3987 : 10dc bpl teor2
+3989 : a203 ldx #3
+398b : b520 teor3 lda zpEO,x
+398d : 850c sta zpt
+ set_ax absEOa,$ff
+ > load_flag $ff
+398f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3991 : 48 > pha ;use stack to load status
+3992 : bd5e02 > lda absEOa,x ;precharge accu
+3995 : 28 > plp
+
+3996 : 450c eor zpt
+ tst_ax absrlo,absflo,$ff-fnz
+3998 : 08 > php ;save flags
+3999 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+399c : f003 > beq skip3091
+ > trap ;failed not equal (non zero)
+399e : 205b44 > jsr report_error
+ >
+39a1 : >skip3091
+ >
+39a1 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+39a2 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+39a4 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+39a7 : f003 > beq skip3094
+ > trap ;failed not equal (non zero)
+39a9 : 205b44 > jsr report_error
+ >
+39ac : >skip3094
+ >
+
+39ac : ca dex
+39ad : 10dc bpl teor3
+
+39af : a203 ldx #3 ;abs
+39b1 : b520 teor4 lda zpEO,x
+39b3 : 8d0302 sta abst
+ set_ax absEOa,0
+ > load_flag 0
+39b6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+39b8 : 48 > pha ;use stack to load status
+39b9 : bd5e02 > lda absEOa,x ;precharge accu
+39bc : 28 > plp
+
+39bd : 4d0302 eor abst
+ tst_ax absrlo,absflo,0
+39c0 : 08 > php ;save flags
+39c1 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+39c4 : f003 > beq skip3099
+ > trap ;failed not equal (non zero)
+39c6 : 205b44 > jsr report_error
+ >
+39c9 : >skip3099
+ >
+39c9 : 68 > pla ;load status
+ > eor_flag 0
+39ca : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+39cc : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+39cf : f003 > beq skip3102
+ > trap ;failed not equal (non zero)
+39d1 : 205b44 > jsr report_error
+ >
+39d4 : >skip3102
+ >
+
+39d4 : ca dex
+39d5 : 10da bpl teor4
+39d7 : a203 ldx #3
+39d9 : b520 teor5 lda zpEO,x
+39db : 8d0302 sta abst
+ set_ax absEOa,$ff
+ > load_flag $ff
+39de : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+39e0 : 48 > pha ;use stack to load status
+39e1 : bd5e02 > lda absEOa,x ;precharge accu
+39e4 : 28 > plp
+
+39e5 : 4d0302 eor abst
+ tst_ax absrlo,absflo,$ff-fnz
+39e8 : 08 > php ;save flags
+39e9 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+39ec : f003 > beq skip3107
+ > trap ;failed not equal (non zero)
+39ee : 205b44 > jsr report_error
+ >
+39f1 : >skip3107
+ >
+39f1 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+39f2 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+39f4 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+39f7 : f003 > beq skip3110
+ > trap ;failed not equal (non zero)
+39f9 : 205b44 > jsr report_error
+ >
+39fc : >skip3110
+ >
+
+39fc : ca dex
+39fd : 1002 bpl teor6
+
+39ff : a203 ldx #3 ;zp,x
+3a01 : teor6
+ set_ax absEOa,0
+ > load_flag 0
+3a01 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3a03 : 48 > pha ;use stack to load status
+3a04 : bd5e02 > lda absEOa,x ;precharge accu
+3a07 : 28 > plp
+
+3a08 : 5520 eor zpEO,x
+ tst_ax absrlo,absflo,0
+3a0a : 08 > php ;save flags
+3a0b : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3a0e : f003 > beq skip3115
+ > trap ;failed not equal (non zero)
+3a10 : 205b44 > jsr report_error
+ >
+3a13 : >skip3115
+ >
+3a13 : 68 > pla ;load status
+ > eor_flag 0
+3a14 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3a16 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3a19 : f003 > beq skip3118
+ > trap ;failed not equal (non zero)
+3a1b : 205b44 > jsr report_error
+ >
+3a1e : >skip3118
+ >
+
+3a1e : ca dex
+3a1f : 10e0 bpl teor6
+3a21 : a203 ldx #3
+3a23 : teor7
+ set_ax absEOa,$ff
+ > load_flag $ff
+3a23 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3a25 : 48 > pha ;use stack to load status
+3a26 : bd5e02 > lda absEOa,x ;precharge accu
+3a29 : 28 > plp
+
+3a2a : 5520 eor zpEO,x
+ tst_ax absrlo,absflo,$ff-fnz
+3a2c : 08 > php ;save flags
+3a2d : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3a30 : f003 > beq skip3123
+ > trap ;failed not equal (non zero)
+3a32 : 205b44 > jsr report_error
+ >
+3a35 : >skip3123
+ >
+3a35 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3a36 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3a38 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3a3b : f003 > beq skip3126
+ > trap ;failed not equal (non zero)
+3a3d : 205b44 > jsr report_error
+ >
+3a40 : >skip3126
+ >
+
+3a40 : ca dex
+3a41 : 10e0 bpl teor7
+
+3a43 : a203 ldx #3 ;abs,x
+3a45 : teor8
+ set_ax absEOa,0
+ > load_flag 0
+3a45 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3a47 : 48 > pha ;use stack to load status
+3a48 : bd5e02 > lda absEOa,x ;precharge accu
+3a4b : 28 > plp
+
+3a4c : 5d5202 eor absEO,x
+ tst_ax absrlo,absflo,0
+3a4f : 08 > php ;save flags
+3a50 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3a53 : f003 > beq skip3131
+ > trap ;failed not equal (non zero)
+3a55 : 205b44 > jsr report_error
+ >
+3a58 : >skip3131
+ >
+3a58 : 68 > pla ;load status
+ > eor_flag 0
+3a59 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3a5b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3a5e : f003 > beq skip3134
+ > trap ;failed not equal (non zero)
+3a60 : 205b44 > jsr report_error
+ >
+3a63 : >skip3134
+ >
+
+3a63 : ca dex
+3a64 : 10df bpl teor8
+3a66 : a203 ldx #3
+3a68 : teor9
+ set_ax absEOa,$ff
+ > load_flag $ff
+3a68 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3a6a : 48 > pha ;use stack to load status
+3a6b : bd5e02 > lda absEOa,x ;precharge accu
+3a6e : 28 > plp
+
+3a6f : 5d5202 eor absEO,x
+ tst_ax absrlo,absflo,$ff-fnz
+3a72 : 08 > php ;save flags
+3a73 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3a76 : f003 > beq skip3139
+ > trap ;failed not equal (non zero)
+3a78 : 205b44 > jsr report_error
+ >
+3a7b : >skip3139
+ >
+3a7b : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3a7c : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3a7e : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3a81 : f003 > beq skip3142
+ > trap ;failed not equal (non zero)
+3a83 : 205b44 > jsr report_error
+ >
+3a86 : >skip3142
+ >
+
+3a86 : ca dex
+3a87 : 10df bpl teor9
+
+3a89 : a003 ldy #3 ;abs,y
+3a8b : teor10
+ set_ay absEOa,0
+ > load_flag 0
+3a8b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3a8d : 48 > pha ;use stack to load status
+3a8e : b95e02 > lda absEOa,y ;precharge accu
+3a91 : 28 > plp
+
+3a92 : 595202 eor absEO,y
+ tst_ay absrlo,absflo,0
+3a95 : 08 > php ;save flags
+3a96 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3a99 : f003 > beq skip3147
+ > trap ;failed not equal (non zero)
+3a9b : 205b44 > jsr report_error
+ >
+3a9e : >skip3147
+ >
+3a9e : 68 > pla ;load status
+ > eor_flag 0
+3a9f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3aa1 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3aa4 : f003 > beq skip3150
+ > trap ;failed not equal (non zero)
+3aa6 : 205b44 > jsr report_error
+ >
+3aa9 : >skip3150
+ >
+
+3aa9 : 88 dey
+3aaa : 10df bpl teor10
+3aac : a003 ldy #3
+3aae : teor11
+ set_ay absEOa,$ff
+ > load_flag $ff
+3aae : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3ab0 : 48 > pha ;use stack to load status
+3ab1 : b95e02 > lda absEOa,y ;precharge accu
+3ab4 : 28 > plp
+
+3ab5 : 595202 eor absEO,y
+ tst_ay absrlo,absflo,$ff-fnz
+3ab8 : 08 > php ;save flags
+3ab9 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3abc : f003 > beq skip3155
+ > trap ;failed not equal (non zero)
+3abe : 205b44 > jsr report_error
+ >
+3ac1 : >skip3155
+ >
+3ac1 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3ac2 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3ac4 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3ac7 : f003 > beq skip3158
+ > trap ;failed not equal (non zero)
+3ac9 : 205b44 > jsr report_error
+ >
+3acc : >skip3158
+ >
+
+3acc : 88 dey
+3acd : 10df bpl teor11
+
+3acf : a206 ldx #6 ;(zp,x)
+3ad1 : a003 ldy #3
+3ad3 : teor12
+ set_ay absEOa,0
+ > load_flag 0
+3ad3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3ad5 : 48 > pha ;use stack to load status
+3ad6 : b95e02 > lda absEOa,y ;precharge accu
+3ad9 : 28 > plp
+
+3ada : 4142 eor (indEO,x)
+ tst_ay absrlo,absflo,0
+3adc : 08 > php ;save flags
+3add : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3ae0 : f003 > beq skip3163
+ > trap ;failed not equal (non zero)
+3ae2 : 205b44 > jsr report_error
+ >
+3ae5 : >skip3163
+ >
+3ae5 : 68 > pla ;load status
+ > eor_flag 0
+3ae6 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3ae8 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3aeb : f003 > beq skip3166
+ > trap ;failed not equal (non zero)
+3aed : 205b44 > jsr report_error
+ >
+3af0 : >skip3166
+ >
+
+3af0 : ca dex
+3af1 : ca dex
+3af2 : 88 dey
+3af3 : 10de bpl teor12
+3af5 : a206 ldx #6
+3af7 : a003 ldy #3
+3af9 : teor13
+ set_ay absEOa,$ff
+ > load_flag $ff
+3af9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3afb : 48 > pha ;use stack to load status
+3afc : b95e02 > lda absEOa,y ;precharge accu
+3aff : 28 > plp
+
+3b00 : 4142 eor (indEO,x)
+ tst_ay absrlo,absflo,$ff-fnz
+3b02 : 08 > php ;save flags
+3b03 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3b06 : f003 > beq skip3171
+ > trap ;failed not equal (non zero)
+3b08 : 205b44 > jsr report_error
+ >
+3b0b : >skip3171
+ >
+3b0b : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3b0c : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3b0e : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3b11 : f003 > beq skip3174
+ > trap ;failed not equal (non zero)
+3b13 : 205b44 > jsr report_error
+ >
+3b16 : >skip3174
+ >
+
+3b16 : ca dex
+3b17 : ca dex
+3b18 : 88 dey
+3b19 : 10de bpl teor13
+
+3b1b : a003 ldy #3 ;(zp),y
+3b1d : teor14
+ set_ay absEOa,0
+ > load_flag 0
+3b1d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3b1f : 48 > pha ;use stack to load status
+3b20 : b95e02 > lda absEOa,y ;precharge accu
+3b23 : 28 > plp
+
+3b24 : 5142 eor (indEO),y
+ tst_ay absrlo,absflo,0
+3b26 : 08 > php ;save flags
+3b27 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3b2a : f003 > beq skip3179
+ > trap ;failed not equal (non zero)
+3b2c : 205b44 > jsr report_error
+ >
+3b2f : >skip3179
+ >
+3b2f : 68 > pla ;load status
+ > eor_flag 0
+3b30 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3b32 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3b35 : f003 > beq skip3182
+ > trap ;failed not equal (non zero)
+3b37 : 205b44 > jsr report_error
+ >
+3b3a : >skip3182
+ >
+
+3b3a : 88 dey
+3b3b : 10e0 bpl teor14
+3b3d : a003 ldy #3
+3b3f : teor15
+ set_ay absEOa,$ff
+ > load_flag $ff
+3b3f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3b41 : 48 > pha ;use stack to load status
+3b42 : b95e02 > lda absEOa,y ;precharge accu
+3b45 : 28 > plp
+
+3b46 : 5142 eor (indEO),y
+ tst_ay absrlo,absflo,$ff-fnz
+3b48 : 08 > php ;save flags
+3b49 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3b4c : f003 > beq skip3187
+ > trap ;failed not equal (non zero)
+3b4e : 205b44 > jsr report_error
+ >
+3b51 : >skip3187
+ >
+3b51 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3b52 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3b54 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3b57 : f003 > beq skip3190
+ > trap ;failed not equal (non zero)
+3b59 : 205b44 > jsr report_error
+ >
+3b5c : >skip3190
+ >
+
+3b5c : 88 dey
+3b5d : 10e0 bpl teor15
+ next_test
+3b5f : ad0002 > lda test_case ;previous test
+3b62 : c927 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3b64 : f003 > beq skip3193
+ > trap ;failed not equal (non zero)
+3b66 : 205b44 > jsr report_error
+ >
+3b69 : >skip3193
+ >
+0028 = >test_num = test_num + 1
+3b69 : a928 > lda #test_num ;*** next tests' number
+3b6b : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; OR
+3b6e : a203 ldx #3 ;immediate - self modifying code
+3b70 : b518 tora lda zpOR,x
+3b72 : 8d0f02 sta ex_orai+1 ;set ORA # operand
+ set_ax absORa,0
+ > load_flag 0
+3b75 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3b77 : 48 > pha ;use stack to load status
+3b78 : bd5602 > lda absORa,x ;precharge accu
+3b7b : 28 > plp
+
+3b7c : 200e02 jsr ex_orai ;execute ORA # in RAM
+ tst_ax absrlo,absflo,0
+3b7f : 08 > php ;save flags
+3b80 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3b83 : f003 > beq skip3198
+ > trap ;failed not equal (non zero)
+3b85 : 205b44 > jsr report_error
+ >
+3b88 : >skip3198
+ >
+3b88 : 68 > pla ;load status
+ > eor_flag 0
+3b89 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3b8b : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3b8e : f003 > beq skip3201
+ > trap ;failed not equal (non zero)
+3b90 : 205b44 > jsr report_error
+ >
+3b93 : >skip3201
+ >
+
+3b93 : ca dex
+3b94 : 10da bpl tora
+3b96 : a203 ldx #3
+3b98 : b518 tora1 lda zpOR,x
+3b9a : 8d0f02 sta ex_orai+1 ;set ORA # operand
+ set_ax absORa,$ff
+ > load_flag $ff
+3b9d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3b9f : 48 > pha ;use stack to load status
+3ba0 : bd5602 > lda absORa,x ;precharge accu
+3ba3 : 28 > plp
+
+3ba4 : 200e02 jsr ex_orai ;execute ORA # in RAM
+ tst_ax absrlo,absflo,$ff-fnz
+3ba7 : 08 > php ;save flags
+3ba8 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3bab : f003 > beq skip3206
+ > trap ;failed not equal (non zero)
+3bad : 205b44 > jsr report_error
+ >
+3bb0 : >skip3206
+ >
+3bb0 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3bb1 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3bb3 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3bb6 : f003 > beq skip3209
+ > trap ;failed not equal (non zero)
+3bb8 : 205b44 > jsr report_error
+ >
+3bbb : >skip3209
+ >
+
+3bbb : ca dex
+3bbc : 10da bpl tora1
+
+3bbe : a203 ldx #3 ;zp
+3bc0 : b518 tora2 lda zpOR,x
+3bc2 : 850c sta zpt
+ set_ax absORa,0
+ > load_flag 0
+3bc4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3bc6 : 48 > pha ;use stack to load status
+3bc7 : bd5602 > lda absORa,x ;precharge accu
+3bca : 28 > plp
+
+3bcb : 050c ora zpt
+ tst_ax absrlo,absflo,0
+3bcd : 08 > php ;save flags
+3bce : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3bd1 : f003 > beq skip3214
+ > trap ;failed not equal (non zero)
+3bd3 : 205b44 > jsr report_error
+ >
+3bd6 : >skip3214
+ >
+3bd6 : 68 > pla ;load status
+ > eor_flag 0
+3bd7 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3bd9 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3bdc : f003 > beq skip3217
+ > trap ;failed not equal (non zero)
+3bde : 205b44 > jsr report_error
+ >
+3be1 : >skip3217
+ >
+
+3be1 : ca dex
+3be2 : 10dc bpl tora2
+3be4 : a203 ldx #3
+3be6 : b518 tora3 lda zpOR,x
+3be8 : 850c sta zpt
+ set_ax absORa,$ff
+ > load_flag $ff
+3bea : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3bec : 48 > pha ;use stack to load status
+3bed : bd5602 > lda absORa,x ;precharge accu
+3bf0 : 28 > plp
+
+3bf1 : 050c ora zpt
+ tst_ax absrlo,absflo,$ff-fnz
+3bf3 : 08 > php ;save flags
+3bf4 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3bf7 : f003 > beq skip3222
+ > trap ;failed not equal (non zero)
+3bf9 : 205b44 > jsr report_error
+ >
+3bfc : >skip3222
+ >
+3bfc : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3bfd : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3bff : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3c02 : f003 > beq skip3225
+ > trap ;failed not equal (non zero)
+3c04 : 205b44 > jsr report_error
+ >
+3c07 : >skip3225
+ >
+
+3c07 : ca dex
+3c08 : 10dc bpl tora3
+
+3c0a : a203 ldx #3 ;abs
+3c0c : b518 tora4 lda zpOR,x
+3c0e : 8d0302 sta abst
+ set_ax absORa,0
+ > load_flag 0
+3c11 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3c13 : 48 > pha ;use stack to load status
+3c14 : bd5602 > lda absORa,x ;precharge accu
+3c17 : 28 > plp
+
+3c18 : 0d0302 ora abst
+ tst_ax absrlo,absflo,0
+3c1b : 08 > php ;save flags
+3c1c : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3c1f : f003 > beq skip3230
+ > trap ;failed not equal (non zero)
+3c21 : 205b44 > jsr report_error
+ >
+3c24 : >skip3230
+ >
+3c24 : 68 > pla ;load status
+ > eor_flag 0
+3c25 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3c27 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3c2a : f003 > beq skip3233
+ > trap ;failed not equal (non zero)
+3c2c : 205b44 > jsr report_error
+ >
+3c2f : >skip3233
+ >
+
+3c2f : ca dex
+3c30 : 10da bpl tora4
+3c32 : a203 ldx #3
+3c34 : b518 tora5 lda zpOR,x
+3c36 : 8d0302 sta abst
+ set_ax absORa,$ff
+ > load_flag $ff
+3c39 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3c3b : 48 > pha ;use stack to load status
+3c3c : bd5602 > lda absORa,x ;precharge accu
+3c3f : 28 > plp
+
+3c40 : 0d0302 ora abst
+ tst_ax absrlo,absflo,$ff-fnz
+3c43 : 08 > php ;save flags
+3c44 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3c47 : f003 > beq skip3238
+ > trap ;failed not equal (non zero)
+3c49 : 205b44 > jsr report_error
+ >
+3c4c : >skip3238
+ >
+3c4c : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3c4d : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3c4f : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3c52 : f003 > beq skip3241
+ > trap ;failed not equal (non zero)
+3c54 : 205b44 > jsr report_error
+ >
+3c57 : >skip3241
+ >
+
+3c57 : ca dex
+3c58 : 1002 bpl tora6
+
+3c5a : a203 ldx #3 ;zp,x
+3c5c : tora6
+ set_ax absORa,0
+ > load_flag 0
+3c5c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3c5e : 48 > pha ;use stack to load status
+3c5f : bd5602 > lda absORa,x ;precharge accu
+3c62 : 28 > plp
+
+3c63 : 1518 ora zpOR,x
+ tst_ax absrlo,absflo,0
+3c65 : 08 > php ;save flags
+3c66 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3c69 : f003 > beq skip3246
+ > trap ;failed not equal (non zero)
+3c6b : 205b44 > jsr report_error
+ >
+3c6e : >skip3246
+ >
+3c6e : 68 > pla ;load status
+ > eor_flag 0
+3c6f : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3c71 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3c74 : f003 > beq skip3249
+ > trap ;failed not equal (non zero)
+3c76 : 205b44 > jsr report_error
+ >
+3c79 : >skip3249
+ >
+
+3c79 : ca dex
+3c7a : 10e0 bpl tora6
+3c7c : a203 ldx #3
+3c7e : tora7
+ set_ax absORa,$ff
+ > load_flag $ff
+3c7e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3c80 : 48 > pha ;use stack to load status
+3c81 : bd5602 > lda absORa,x ;precharge accu
+3c84 : 28 > plp
+
+3c85 : 1518 ora zpOR,x
+ tst_ax absrlo,absflo,$ff-fnz
+3c87 : 08 > php ;save flags
+3c88 : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3c8b : f003 > beq skip3254
+ > trap ;failed not equal (non zero)
+3c8d : 205b44 > jsr report_error
+ >
+3c90 : >skip3254
+ >
+3c90 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3c91 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3c93 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3c96 : f003 > beq skip3257
+ > trap ;failed not equal (non zero)
+3c98 : 205b44 > jsr report_error
+ >
+3c9b : >skip3257
+ >
+
+3c9b : ca dex
+3c9c : 10e0 bpl tora7
+
+3c9e : a203 ldx #3 ;abs,x
+3ca0 : tora8
+ set_ax absORa,0
+ > load_flag 0
+3ca0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3ca2 : 48 > pha ;use stack to load status
+3ca3 : bd5602 > lda absORa,x ;precharge accu
+3ca6 : 28 > plp
+
+3ca7 : 1d4a02 ora absOR,x
+ tst_ax absrlo,absflo,0
+3caa : 08 > php ;save flags
+3cab : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3cae : f003 > beq skip3262
+ > trap ;failed not equal (non zero)
+3cb0 : 205b44 > jsr report_error
+ >
+3cb3 : >skip3262
+ >
+3cb3 : 68 > pla ;load status
+ > eor_flag 0
+3cb4 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3cb6 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3cb9 : f003 > beq skip3265
+ > trap ;failed not equal (non zero)
+3cbb : 205b44 > jsr report_error
+ >
+3cbe : >skip3265
+ >
+
+3cbe : ca dex
+3cbf : 10df bpl tora8
+3cc1 : a203 ldx #3
+3cc3 : tora9
+ set_ax absORa,$ff
+ > load_flag $ff
+3cc3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3cc5 : 48 > pha ;use stack to load status
+3cc6 : bd5602 > lda absORa,x ;precharge accu
+3cc9 : 28 > plp
+
+3cca : 1d4a02 ora absOR,x
+ tst_ax absrlo,absflo,$ff-fnz
+3ccd : 08 > php ;save flags
+3cce : dd6202 > cmp absrlo,x ;test result
+ > trap_ne
+3cd1 : f003 > beq skip3270
+ > trap ;failed not equal (non zero)
+3cd3 : 205b44 > jsr report_error
+ >
+3cd6 : >skip3270
+ >
+3cd6 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3cd7 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3cd9 : dd6602 > cmp absflo,x ;test flags
+ > trap_ne ;
+3cdc : f003 > beq skip3273
+ > trap ;failed not equal (non zero)
+3cde : 205b44 > jsr report_error
+ >
+3ce1 : >skip3273
+ >
+
+3ce1 : ca dex
+3ce2 : 10df bpl tora9
+
+3ce4 : a003 ldy #3 ;abs,y
+3ce6 : tora10
+ set_ay absORa,0
+ > load_flag 0
+3ce6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3ce8 : 48 > pha ;use stack to load status
+3ce9 : b95602 > lda absORa,y ;precharge accu
+3cec : 28 > plp
+
+3ced : 194a02 ora absOR,y
+ tst_ay absrlo,absflo,0
+3cf0 : 08 > php ;save flags
+3cf1 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3cf4 : f003 > beq skip3278
+ > trap ;failed not equal (non zero)
+3cf6 : 205b44 > jsr report_error
+ >
+3cf9 : >skip3278
+ >
+3cf9 : 68 > pla ;load status
+ > eor_flag 0
+3cfa : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3cfc : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3cff : f003 > beq skip3281
+ > trap ;failed not equal (non zero)
+3d01 : 205b44 > jsr report_error
+ >
+3d04 : >skip3281
+ >
+
+3d04 : 88 dey
+3d05 : 10df bpl tora10
+3d07 : a003 ldy #3
+3d09 : tora11
+ set_ay absORa,$ff
+ > load_flag $ff
+3d09 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3d0b : 48 > pha ;use stack to load status
+3d0c : b95602 > lda absORa,y ;precharge accu
+3d0f : 28 > plp
+
+3d10 : 194a02 ora absOR,y
+ tst_ay absrlo,absflo,$ff-fnz
+3d13 : 08 > php ;save flags
+3d14 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3d17 : f003 > beq skip3286
+ > trap ;failed not equal (non zero)
+3d19 : 205b44 > jsr report_error
+ >
+3d1c : >skip3286
+ >
+3d1c : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3d1d : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3d1f : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3d22 : f003 > beq skip3289
+ > trap ;failed not equal (non zero)
+3d24 : 205b44 > jsr report_error
+ >
+3d27 : >skip3289
+ >
+
+3d27 : 88 dey
+3d28 : 10df bpl tora11
+
+3d2a : a206 ldx #6 ;(zp,x)
+3d2c : a003 ldy #3
+3d2e : tora12
+ set_ay absORa,0
+ > load_flag 0
+3d2e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3d30 : 48 > pha ;use stack to load status
+3d31 : b95602 > lda absORa,y ;precharge accu
+3d34 : 28 > plp
+
+3d35 : 014a ora (indOR,x)
+ tst_ay absrlo,absflo,0
+3d37 : 08 > php ;save flags
+3d38 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3d3b : f003 > beq skip3294
+ > trap ;failed not equal (non zero)
+3d3d : 205b44 > jsr report_error
+ >
+3d40 : >skip3294
+ >
+3d40 : 68 > pla ;load status
+ > eor_flag 0
+3d41 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3d43 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3d46 : f003 > beq skip3297
+ > trap ;failed not equal (non zero)
+3d48 : 205b44 > jsr report_error
+ >
+3d4b : >skip3297
+ >
+
+3d4b : ca dex
+3d4c : ca dex
+3d4d : 88 dey
+3d4e : 10de bpl tora12
+3d50 : a206 ldx #6
+3d52 : a003 ldy #3
+3d54 : tora13
+ set_ay absORa,$ff
+ > load_flag $ff
+3d54 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3d56 : 48 > pha ;use stack to load status
+3d57 : b95602 > lda absORa,y ;precharge accu
+3d5a : 28 > plp
+
+3d5b : 014a ora (indOR,x)
+ tst_ay absrlo,absflo,$ff-fnz
+3d5d : 08 > php ;save flags
+3d5e : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3d61 : f003 > beq skip3302
+ > trap ;failed not equal (non zero)
+3d63 : 205b44 > jsr report_error
+ >
+3d66 : >skip3302
+ >
+3d66 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3d67 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3d69 : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3d6c : f003 > beq skip3305
+ > trap ;failed not equal (non zero)
+3d6e : 205b44 > jsr report_error
+ >
+3d71 : >skip3305
+ >
+
+3d71 : ca dex
+3d72 : ca dex
+3d73 : 88 dey
+3d74 : 10de bpl tora13
+
+3d76 : a003 ldy #3 ;(zp),y
+3d78 : tora14
+ set_ay absORa,0
+ > load_flag 0
+3d78 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+3d7a : 48 > pha ;use stack to load status
+3d7b : b95602 > lda absORa,y ;precharge accu
+3d7e : 28 > plp
+
+3d7f : 114a ora (indOR),y
+ tst_ay absrlo,absflo,0
+3d81 : 08 > php ;save flags
+3d82 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3d85 : f003 > beq skip3310
+ > trap ;failed not equal (non zero)
+3d87 : 205b44 > jsr report_error
+ >
+3d8a : >skip3310
+ >
+3d8a : 68 > pla ;load status
+ > eor_flag 0
+3d8b : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+3d8d : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3d90 : f003 > beq skip3313
+ > trap ;failed not equal (non zero)
+3d92 : 205b44 > jsr report_error
+ >
+3d95 : >skip3313
+ >
+
+3d95 : 88 dey
+3d96 : 10e0 bpl tora14
+3d98 : a003 ldy #3
+3d9a : tora15
+ set_ay absORa,$ff
+ > load_flag $ff
+3d9a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+3d9c : 48 > pha ;use stack to load status
+3d9d : b95602 > lda absORa,y ;precharge accu
+3da0 : 28 > plp
+
+3da1 : 114a ora (indOR),y
+ tst_ay absrlo,absflo,$ff-fnz
+3da3 : 08 > php ;save flags
+3da4 : d96202 > cmp absrlo,y ;test result
+ > trap_ne ;
+3da7 : f003 > beq skip3318
+ > trap ;failed not equal (non zero)
+3da9 : 205b44 > jsr report_error
+ >
+3dac : >skip3318
+ >
+3dac : 68 > pla ;load status
+ > eor_flag $ff-fnz
+3dad : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+3daf : d96602 > cmp absflo,y ;test flags
+ > trap_ne
+3db2 : f003 > beq skip3321
+ > trap ;failed not equal (non zero)
+3db4 : 205b44 > jsr report_error
+ >
+3db7 : >skip3321
+ >
+
+3db7 : 88 dey
+3db8 : 10e0 bpl tora15
+ if I_flag = 3
+3dba : 58 cli
+ endif
+ next_test
+3dbb : ad0002 > lda test_case ;previous test
+3dbe : c928 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3dc0 : f003 > beq skip3324
+ > trap ;failed not equal (non zero)
+3dc2 : 205b44 > jsr report_error
+ >
+3dc5 : >skip3324
+ >
+0029 = >test_num = test_num + 1
+3dc5 : a929 > lda #test_num ;*** next tests' number
+3dc7 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; full binary add/subtract test
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+3dca : d8 cld
+3dcb : a20e ldx #ad2 ;for indexed test
+3dcd : a0ff ldy #$ff ;max range
+3dcf : a900 lda #0 ;start with adding zeroes & no carry
+3dd1 : 850c sta adfc ;carry in - for diag
+3dd3 : 850d sta ad1 ;operand 1 - accumulator
+3dd5 : 850e sta ad2 ;operand 2 - memory or immediate
+3dd7 : 8d0302 sta ada2 ;non zp
+3dda : 850f sta adrl ;expected result bits 0-7
+3ddc : 8510 sta adrh ;expected result bit 8 (carry out)
+3dde : a9ff lda #$ff ;complemented operand 2 for subtract
+3de0 : 8512 sta sb2
+3de2 : 8d0402 sta sba2 ;non zp
+3de5 : a902 lda #2 ;expected Z-flag
+3de7 : 8511 sta adrf
+3de9 : 18 tadd clc ;test with carry clear
+3dea : 20df40 jsr chkadd
+3ded : e60c inc adfc ;now with carry
+3def : e60f inc adrl ;result +1
+3df1 : 08 php ;save N & Z from low result
+3df2 : 08 php
+3df3 : 68 pla ;accu holds expected flags
+3df4 : 2982 and #$82 ;mask N & Z
+3df6 : 28 plp
+3df7 : d002 bne tadd1
+3df9 : e610 inc adrh ;result bit 8 - carry
+3dfb : 0510 tadd1 ora adrh ;merge C to expected flags
+3dfd : 8511 sta adrf ;save expected flags except overflow
+3dff : 38 sec ;test with carry set
+3e00 : 20df40 jsr chkadd
+3e03 : c60c dec adfc ;same for operand +1 but no carry
+3e05 : e60d inc ad1
+3e07 : d0e0 bne tadd ;iterate op1
+3e09 : a900 lda #0 ;preset result to op2 when op1 = 0
+3e0b : 8510 sta adrh
+3e0d : ee0302 inc ada2
+3e10 : e60e inc ad2
+3e12 : 08 php ;save NZ as operand 2 becomes the new result
+3e13 : 68 pla
+3e14 : 2982 and #$82 ;mask N00000Z0
+3e16 : 8511 sta adrf ;no need to check carry as we are adding to 0
+3e18 : c612 dec sb2 ;complement subtract operand 2
+3e1a : ce0402 dec sba2
+3e1d : a50e lda ad2
+3e1f : 850f sta adrl
+3e21 : d0c6 bne tadd ;iterate op2
+ if disable_decimal < 1
+ next_test
+3e23 : ad0002 > lda test_case ;previous test
+3e26 : c929 > cmp #test_num
+ > trap_ne ;test is out of sequence
+3e28 : f003 > beq skip3327
+ > trap ;failed not equal (non zero)
+3e2a : 205b44 > jsr report_error
+ >
+3e2d : >skip3327
+ >
+002a = >test_num = test_num + 1
+3e2d : a92a > lda #test_num ;*** next tests' number
+3e2f : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, N V Z flags are ignored
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+3e32 : f8 sed
+3e33 : a20e ldx #ad2 ;for indexed test
+3e35 : a0ff ldy #$ff ;max range
+3e37 : a999 lda #$99 ;start with adding 99 to 99 with carry
+3e39 : 850d sta ad1 ;operand 1 - accumulator
+3e3b : 850e sta ad2 ;operand 2 - memory or immediate
+3e3d : 8d0302 sta ada2 ;non zp
+3e40 : 850f sta adrl ;expected result bits 0-7
+3e42 : a901 lda #1 ;set carry in & out
+3e44 : 850c sta adfc ;carry in - for diag
+3e46 : 8510 sta adrh ;expected result bit 8 (carry out)
+3e48 : a900 lda #0 ;complemented operand 2 for subtract
+3e4a : 8512 sta sb2
+3e4c : 8d0402 sta sba2 ;non zp
+3e4f : 38 tdad sec ;test with carry set
+3e50 : 204c3f jsr chkdad
+3e53 : c60c dec adfc ;now with carry clear
+3e55 : a50f lda adrl ;decimal adjust result
+3e57 : d008 bne tdad1 ;skip clear carry & preset result 99 (9A-1)
+3e59 : c610 dec adrh
+3e5b : a999 lda #$99
+3e5d : 850f sta adrl
+3e5f : d012 bne tdad3
+3e61 : 290f tdad1 and #$f ;lower nibble mask
+3e63 : d00c bne tdad2 ;no decimal adjust needed
+3e65 : c60f dec adrl ;decimal adjust (?0-6)
+3e67 : c60f dec adrl
+3e69 : c60f dec adrl
+3e6b : c60f dec adrl
+3e6d : c60f dec adrl
+3e6f : c60f dec adrl
+3e71 : c60f tdad2 dec adrl ;result -1
+3e73 : 18 tdad3 clc ;test with carry clear
+3e74 : 204c3f jsr chkdad
+3e77 : e60c inc adfc ;same for operand -1 but with carry
+3e79 : a50d lda ad1 ;decimal adjust operand 1
+3e7b : f015 beq tdad5 ;iterate operand 2
+3e7d : 290f and #$f ;lower nibble mask
+3e7f : d00c bne tdad4 ;skip decimal adjust
+3e81 : c60d dec ad1 ;decimal adjust (?0-6)
+3e83 : c60d dec ad1
+3e85 : c60d dec ad1
+3e87 : c60d dec ad1
+3e89 : c60d dec ad1
+3e8b : c60d dec ad1
+3e8d : c60d tdad4 dec ad1 ;operand 1 -1
+3e8f : 4c4f3e jmp tdad ;iterate op1
+
+3e92 : a999 tdad5 lda #$99 ;precharge op1 max
+3e94 : 850d sta ad1
+3e96 : a50e lda ad2 ;decimal adjust operand 2
+3e98 : f030 beq tdad7 ;end of iteration
+3e9a : 290f and #$f ;lower nibble mask
+3e9c : d018 bne tdad6 ;skip decimal adjust
+3e9e : c60e dec ad2 ;decimal adjust (?0-6)
+3ea0 : c60e dec ad2
+3ea2 : c60e dec ad2
+3ea4 : c60e dec ad2
+3ea6 : c60e dec ad2
+3ea8 : c60e dec ad2
+3eaa : e612 inc sb2 ;complemented decimal adjust for subtract (?9+6)
+3eac : e612 inc sb2
+3eae : e612 inc sb2
+3eb0 : e612 inc sb2
+3eb2 : e612 inc sb2
+3eb4 : e612 inc sb2
+3eb6 : c60e tdad6 dec ad2 ;operand 2 -1
+3eb8 : e612 inc sb2 ;complemented operand for subtract
+3eba : a512 lda sb2
+3ebc : 8d0402 sta sba2 ;copy as non zp operand
+3ebf : a50e lda ad2
+3ec1 : 8d0302 sta ada2 ;copy as non zp operand
+3ec4 : 850f sta adrl ;new result since op1+carry=00+carry +op2=op2
+3ec6 : e610 inc adrh ;result carry
+3ec8 : d085 bne tdad ;iterate op2
+3eca : tdad7
+ next_test
+3eca : ad0002 > lda test_case ;previous test
+3ecd : c92a > cmp #test_num
+ > trap_ne ;test is out of sequence
+3ecf : f003 > beq skip3330
+ > trap ;failed not equal (non zero)
+3ed1 : 205b44 > jsr report_error
+ >
+3ed4 : >skip3330
+ >
+002b = >test_num = test_num + 1
+3ed4 : a92b > lda #test_num ;*** next tests' number
+3ed6 : 8d0002 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; decimal/binary switch test
+ ; tests CLD, SED, PLP, RTI to properly switch between decimal & binary opcode
+ ; tables
+3ed9 : 18 clc
+3eda : d8 cld
+3edb : 08 php
+3edc : a955 lda #$55
+3ede : 6955 adc #$55
+3ee0 : c9aa cmp #$aa
+ trap_ne ;expected binary result after cld
+3ee2 : f003 > beq skip3332
+ > trap ;failed not equal (non zero)
+3ee4 : 205b44 > jsr report_error
+ >
+3ee7 : >skip3332
+
+3ee7 : 18 clc
+3ee8 : f8 sed
+3ee9 : 08 php
+3eea : a955 lda #$55
+3eec : 6955 adc #$55
+3eee : c910 cmp #$10
+ trap_ne ;expected decimal result after sed
+3ef0 : f003 > beq skip3334
+ > trap ;failed not equal (non zero)
+3ef2 : 205b44 > jsr report_error
+ >
+3ef5 : >skip3334
+
+3ef5 : d8 cld
+3ef6 : 28 plp
+3ef7 : a955 lda #$55
+3ef9 : 6955 adc #$55
+3efb : c910 cmp #$10
+ trap_ne ;expected decimal result after plp D=1
+3efd : f003 > beq skip3336
+ > trap ;failed not equal (non zero)
+3eff : 205b44 > jsr report_error
+ >
+3f02 : >skip3336
+
+3f02 : 28 plp
+3f03 : a955 lda #$55
+3f05 : 6955 adc #$55
+3f07 : c9aa cmp #$aa
+ trap_ne ;expected binary result after plp D=0
+3f09 : f003 > beq skip3338
+ > trap ;failed not equal (non zero)
+3f0b : 205b44 > jsr report_error
+ >
+3f0e : >skip3338
+
+3f0e : 18 clc
+3f0f : a93f lda #hi bin_rti_ret ;emulated interrupt for rti
+3f11 : 48 pha
+3f12 : a92c lda #lo bin_rti_ret
+3f14 : 48 pha
+3f15 : 08 php
+3f16 : f8 sed
+3f17 : a93f lda #hi dec_rti_ret ;emulated interrupt for rti
+3f19 : 48 pha
+3f1a : a920 lda #lo dec_rti_ret
+3f1c : 48 pha
+3f1d : 08 php
+3f1e : d8 cld
+3f1f : 40 rti
+3f20 : dec_rti_ret
+3f20 : a955 lda #$55
+3f22 : 6955 adc #$55
+3f24 : c910 cmp #$10
+ trap_ne ;expected decimal result after rti D=1
+3f26 : f003 > beq skip3340
+ > trap ;failed not equal (non zero)
+3f28 : 205b44 > jsr report_error
+ >
+3f2b : >skip3340
+
+3f2b : 40 rti
+3f2c : bin_rti_ret
+3f2c : a955 lda #$55
+3f2e : 6955 adc #$55
+3f30 : c9aa cmp #$aa
+ trap_ne ;expected binary result after rti D=0
+3f32 : f003 > beq skip3342
+ > trap ;failed not equal (non zero)
+3f34 : 205b44 > jsr report_error
+ >
+3f37 : >skip3342
+
+ endif
+
+3f37 : ad0002 lda test_case
+3f3a : c92b cmp #test_num
+ trap_ne ;previous test is out of sequence
+3f3c : f003 > beq skip3344
+ > trap ;failed not equal (non zero)
+3f3e : 205b44 > jsr report_error
+ >
+3f41 : >skip3344
+
+3f41 : a9f0 lda #$f0 ;mark opcode testing complete
+3f43 : 8d0002 sta test_case
+
+ ; final RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ check_ram
+ > ;RAM check disabled - RAM size not set
+
+ ; *** DEBUG INFO ***
+ ; to debug checksum errors uncomment check_ram in the next_test macro to
+ ; narrow down the responsible opcode.
+ ; may give false errors when monitor, OS or other background activity is
+ ; allowed during previous tests.
+
+
+ ; S U C C E S S ************************************************
+ ; -------------
+ success ;if you get here everything went well
+3f46 : 202445 > jsr report_success
+
+ ; -------------
+ ; S U C C E S S ************************************************
+3f49 : 4c0004 jmp start ;run again
+
+ if disable_decimal < 1
+ ; core subroutine of the decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, N V Z flags are ignored
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+3f4c : chkdad
+ ; decimal ADC / SBC zp
+3f4c : 08 php ;save carry for subtract
+3f4d : a50d lda ad1
+3f4f : 650e adc ad2 ;perform add
+3f51 : 08 php
+3f52 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3f54 : f003 > beq skip3348
+ > trap ;failed not equal (non zero)
+3f56 : 205b44 > jsr report_error
+ >
+3f59 : >skip3348
+
+3f59 : 68 pla ;check flags
+3f5a : 2901 and #1 ;mask carry
+3f5c : c510 cmp adrh
+ trap_ne ;bad carry
+3f5e : f003 > beq skip3350
+ > trap ;failed not equal (non zero)
+3f60 : 205b44 > jsr report_error
+ >
+3f63 : >skip3350
+
+3f63 : 28 plp
+3f64 : 08 php ;save carry for next add
+3f65 : a50d lda ad1
+3f67 : e512 sbc sb2 ;perform subtract
+3f69 : 08 php
+3f6a : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3f6c : f003 > beq skip3352
+ > trap ;failed not equal (non zero)
+3f6e : 205b44 > jsr report_error
+ >
+3f71 : >skip3352
+
+3f71 : 68 pla ;check flags
+3f72 : 2901 and #1 ;mask carry
+3f74 : c510 cmp adrh
+ trap_ne ;bad flags
+3f76 : f003 > beq skip3354
+ > trap ;failed not equal (non zero)
+3f78 : 205b44 > jsr report_error
+ >
+3f7b : >skip3354
+
+3f7b : 28 plp
+ ; decimal ADC / SBC abs
+3f7c : 08 php ;save carry for subtract
+3f7d : a50d lda ad1
+3f7f : 6d0302 adc ada2 ;perform add
+3f82 : 08 php
+3f83 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3f85 : f003 > beq skip3356
+ > trap ;failed not equal (non zero)
+3f87 : 205b44 > jsr report_error
+ >
+3f8a : >skip3356
+
+3f8a : 68 pla ;check flags
+3f8b : 2901 and #1 ;mask carry
+3f8d : c510 cmp adrh
+ trap_ne ;bad carry
+3f8f : f003 > beq skip3358
+ > trap ;failed not equal (non zero)
+3f91 : 205b44 > jsr report_error
+ >
+3f94 : >skip3358
+
+3f94 : 28 plp
+3f95 : 08 php ;save carry for next add
+3f96 : a50d lda ad1
+3f98 : ed0402 sbc sba2 ;perform subtract
+3f9b : 08 php
+3f9c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3f9e : f003 > beq skip3360
+ > trap ;failed not equal (non zero)
+3fa0 : 205b44 > jsr report_error
+ >
+3fa3 : >skip3360
+
+3fa3 : 68 pla ;check flags
+3fa4 : 2901 and #1 ;mask carry
+3fa6 : c510 cmp adrh
+ trap_ne ;bad carry
+3fa8 : f003 > beq skip3362
+ > trap ;failed not equal (non zero)
+3faa : 205b44 > jsr report_error
+ >
+3fad : >skip3362
+
+3fad : 28 plp
+ ; decimal ADC / SBC #
+3fae : 08 php ;save carry for subtract
+3faf : a50e lda ad2
+3fb1 : 8d1202 sta ex_adci+1 ;set ADC # operand
+3fb4 : a50d lda ad1
+3fb6 : 201102 jsr ex_adci ;execute ADC # in RAM
+3fb9 : 08 php
+3fba : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3fbc : f003 > beq skip3364
+ > trap ;failed not equal (non zero)
+3fbe : 205b44 > jsr report_error
+ >
+3fc1 : >skip3364
+
+3fc1 : 68 pla ;check flags
+3fc2 : 2901 and #1 ;mask carry
+3fc4 : c510 cmp adrh
+ trap_ne ;bad carry
+3fc6 : f003 > beq skip3366
+ > trap ;failed not equal (non zero)
+3fc8 : 205b44 > jsr report_error
+ >
+3fcb : >skip3366
+
+3fcb : 28 plp
+3fcc : 08 php ;save carry for next add
+3fcd : a512 lda sb2
+3fcf : 8d1502 sta ex_sbci+1 ;set SBC # operand
+3fd2 : a50d lda ad1
+3fd4 : 201402 jsr ex_sbci ;execute SBC # in RAM
+3fd7 : 08 php
+3fd8 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3fda : f003 > beq skip3368
+ > trap ;failed not equal (non zero)
+3fdc : 205b44 > jsr report_error
+ >
+3fdf : >skip3368
+
+3fdf : 68 pla ;check flags
+3fe0 : 2901 and #1 ;mask carry
+3fe2 : c510 cmp adrh
+ trap_ne ;bad carry
+3fe4 : f003 > beq skip3370
+ > trap ;failed not equal (non zero)
+3fe6 : 205b44 > jsr report_error
+ >
+3fe9 : >skip3370
+
+3fe9 : 28 plp
+ ; decimal ADC / SBC zp,x
+3fea : 08 php ;save carry for subtract
+3feb : a50d lda ad1
+3fed : 7500 adc 0,x ;perform add
+3fef : 08 php
+3ff0 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+3ff2 : f003 > beq skip3372
+ > trap ;failed not equal (non zero)
+3ff4 : 205b44 > jsr report_error
+ >
+3ff7 : >skip3372
+
+3ff7 : 68 pla ;check flags
+3ff8 : 2901 and #1 ;mask carry
+3ffa : c510 cmp adrh
+ trap_ne ;bad carry
+3ffc : f003 > beq skip3374
+ > trap ;failed not equal (non zero)
+3ffe : 205b44 > jsr report_error
+ >
+4001 : >skip3374
+
+4001 : 28 plp
+4002 : 08 php ;save carry for next add
+4003 : a50d lda ad1
+4005 : f504 sbc sb2-ad2,x ;perform subtract
+4007 : 08 php
+4008 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+400a : f003 > beq skip3376
+ > trap ;failed not equal (non zero)
+400c : 205b44 > jsr report_error
+ >
+400f : >skip3376
+
+400f : 68 pla ;check flags
+4010 : 2901 and #1 ;mask carry
+4012 : c510 cmp adrh
+ trap_ne ;bad carry
+4014 : f003 > beq skip3378
+ > trap ;failed not equal (non zero)
+4016 : 205b44 > jsr report_error
+ >
+4019 : >skip3378
+
+4019 : 28 plp
+ ; decimal ADC / SBC abs,x
+401a : 08 php ;save carry for subtract
+401b : a50d lda ad1
+401d : 7df501 adc ada2-ad2,x ;perform add
+4020 : 08 php
+4021 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4023 : f003 > beq skip3380
+ > trap ;failed not equal (non zero)
+4025 : 205b44 > jsr report_error
+ >
+4028 : >skip3380
+
+4028 : 68 pla ;check flags
+4029 : 2901 and #1 ;mask carry
+402b : c510 cmp adrh
+ trap_ne ;bad carry
+402d : f003 > beq skip3382
+ > trap ;failed not equal (non zero)
+402f : 205b44 > jsr report_error
+ >
+4032 : >skip3382
+
+4032 : 28 plp
+4033 : 08 php ;save carry for next add
+4034 : a50d lda ad1
+4036 : fdf601 sbc sba2-ad2,x ;perform subtract
+4039 : 08 php
+403a : c50f cmp adrl ;check result
+ trap_ne ;bad result
+403c : f003 > beq skip3384
+ > trap ;failed not equal (non zero)
+403e : 205b44 > jsr report_error
+ >
+4041 : >skip3384
+
+4041 : 68 pla ;check flags
+4042 : 2901 and #1 ;mask carry
+4044 : c510 cmp adrh
+ trap_ne ;bad carry
+4046 : f003 > beq skip3386
+ > trap ;failed not equal (non zero)
+4048 : 205b44 > jsr report_error
+ >
+404b : >skip3386
+
+404b : 28 plp
+ ; decimal ADC / SBC abs,y
+404c : 08 php ;save carry for subtract
+404d : a50d lda ad1
+404f : 790401 adc ada2-$ff,y ;perform add
+4052 : 08 php
+4053 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4055 : f003 > beq skip3388
+ > trap ;failed not equal (non zero)
+4057 : 205b44 > jsr report_error
+ >
+405a : >skip3388
+
+405a : 68 pla ;check flags
+405b : 2901 and #1 ;mask carry
+405d : c510 cmp adrh
+ trap_ne ;bad carry
+405f : f003 > beq skip3390
+ > trap ;failed not equal (non zero)
+4061 : 205b44 > jsr report_error
+ >
+4064 : >skip3390
+
+4064 : 28 plp
+4065 : 08 php ;save carry for next add
+4066 : a50d lda ad1
+4068 : f90501 sbc sba2-$ff,y ;perform subtract
+406b : 08 php
+406c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+406e : f003 > beq skip3392
+ > trap ;failed not equal (non zero)
+4070 : 205b44 > jsr report_error
+ >
+4073 : >skip3392
+
+4073 : 68 pla ;check flags
+4074 : 2901 and #1 ;mask carry
+4076 : c510 cmp adrh
+ trap_ne ;bad carry
+4078 : f003 > beq skip3394
+ > trap ;failed not equal (non zero)
+407a : 205b44 > jsr report_error
+ >
+407d : >skip3394
+
+407d : 28 plp
+ ; decimal ADC / SBC (zp,x)
+407e : 08 php ;save carry for subtract
+407f : a50d lda ad1
+4081 : 6144 adc (lo adi2-ad2,x) ;perform add
+4083 : 08 php
+4084 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4086 : f003 > beq skip3396
+ > trap ;failed not equal (non zero)
+4088 : 205b44 > jsr report_error
+ >
+408b : >skip3396
+
+408b : 68 pla ;check flags
+408c : 2901 and #1 ;mask carry
+408e : c510 cmp adrh
+ trap_ne ;bad carry
+4090 : f003 > beq skip3398
+ > trap ;failed not equal (non zero)
+4092 : 205b44 > jsr report_error
+ >
+4095 : >skip3398
+
+4095 : 28 plp
+4096 : 08 php ;save carry for next add
+4097 : a50d lda ad1
+4099 : e146 sbc (lo sbi2-ad2,x) ;perform subtract
+409b : 08 php
+409c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+409e : f003 > beq skip3400
+ > trap ;failed not equal (non zero)
+40a0 : 205b44 > jsr report_error
+ >
+40a3 : >skip3400
+
+40a3 : 68 pla ;check flags
+40a4 : 2901 and #1 ;mask carry
+40a6 : c510 cmp adrh
+ trap_ne ;bad carry
+40a8 : f003 > beq skip3402
+ > trap ;failed not equal (non zero)
+40aa : 205b44 > jsr report_error
+ >
+40ad : >skip3402
+
+40ad : 28 plp
+ ; decimal ADC / SBC (abs),y
+40ae : 08 php ;save carry for subtract
+40af : a50d lda ad1
+40b1 : 7156 adc (adiy2),y ;perform add
+40b3 : 08 php
+40b4 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+40b6 : f003 > beq skip3404
+ > trap ;failed not equal (non zero)
+40b8 : 205b44 > jsr report_error
+ >
+40bb : >skip3404
+
+40bb : 68 pla ;check flags
+40bc : 2901 and #1 ;mask carry
+40be : c510 cmp adrh
+ trap_ne ;bad carry
+40c0 : f003 > beq skip3406
+ > trap ;failed not equal (non zero)
+40c2 : 205b44 > jsr report_error
+ >
+40c5 : >skip3406
+
+40c5 : 28 plp
+40c6 : 08 php ;save carry for next add
+40c7 : a50d lda ad1
+40c9 : f158 sbc (sbiy2),y ;perform subtract
+40cb : 08 php
+40cc : c50f cmp adrl ;check result
+ trap_ne ;bad result
+40ce : f003 > beq skip3408
+ > trap ;failed not equal (non zero)
+40d0 : 205b44 > jsr report_error
+ >
+40d3 : >skip3408
+
+40d3 : 68 pla ;check flags
+40d4 : 2901 and #1 ;mask carry
+40d6 : c510 cmp adrh
+ trap_ne ;bad carry
+40d8 : f003 > beq skip3410
+ > trap ;failed not equal (non zero)
+40da : 205b44 > jsr report_error
+ >
+40dd : >skip3410
+
+40dd : 28 plp
+40de : 60 rts
+ endif
+
+ ; core subroutine of the full binary add/subtract test
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+40df : a511 chkadd lda adrf ;add V-flag if overflow
+40e1 : 2983 and #$83 ;keep N-----ZC / clear V
+40e3 : 48 pha
+40e4 : a50d lda ad1 ;test sign unequal between operands
+40e6 : 450e eor ad2
+40e8 : 300a bmi ckad1 ;no overflow possible - operands have different sign
+40ea : a50d lda ad1 ;test sign equal between operands and result
+40ec : 450f eor adrl
+40ee : 1004 bpl ckad1 ;no overflow occured - operand and result have same sign
+40f0 : 68 pla
+40f1 : 0940 ora #$40 ;set V
+40f3 : 48 pha
+40f4 : 68 ckad1 pla
+40f5 : 8511 sta adrf ;save expected flags
+ ; binary ADC / SBC zp
+40f7 : 08 php ;save carry for subtract
+40f8 : a50d lda ad1
+40fa : 650e adc ad2 ;perform add
+40fc : 08 php
+40fd : c50f cmp adrl ;check result
+ trap_ne ;bad result
+40ff : f003 > beq skip3412
+ > trap ;failed not equal (non zero)
+4101 : 205b44 > jsr report_error
+ >
+4104 : >skip3412
+
+4104 : 68 pla ;check flags
+4105 : 29c3 and #$c3 ;mask NV----ZC
+4107 : c511 cmp adrf
+ trap_ne ;bad flags
+4109 : f003 > beq skip3414
+ > trap ;failed not equal (non zero)
+410b : 205b44 > jsr report_error
+ >
+410e : >skip3414
+
+410e : 28 plp
+410f : 08 php ;save carry for next add
+4110 : a50d lda ad1
+4112 : e512 sbc sb2 ;perform subtract
+4114 : 08 php
+4115 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4117 : f003 > beq skip3416
+ > trap ;failed not equal (non zero)
+4119 : 205b44 > jsr report_error
+ >
+411c : >skip3416
+
+411c : 68 pla ;check flags
+411d : 29c3 and #$c3 ;mask NV----ZC
+411f : c511 cmp adrf
+ trap_ne ;bad flags
+4121 : f003 > beq skip3418
+ > trap ;failed not equal (non zero)
+4123 : 205b44 > jsr report_error
+ >
+4126 : >skip3418
+
+4126 : 28 plp
+ ; binary ADC / SBC abs
+4127 : 08 php ;save carry for subtract
+4128 : a50d lda ad1
+412a : 6d0302 adc ada2 ;perform add
+412d : 08 php
+412e : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4130 : f003 > beq skip3420
+ > trap ;failed not equal (non zero)
+4132 : 205b44 > jsr report_error
+ >
+4135 : >skip3420
+
+4135 : 68 pla ;check flags
+4136 : 29c3 and #$c3 ;mask NV----ZC
+4138 : c511 cmp adrf
+ trap_ne ;bad flags
+413a : f003 > beq skip3422
+ > trap ;failed not equal (non zero)
+413c : 205b44 > jsr report_error
+ >
+413f : >skip3422
+
+413f : 28 plp
+4140 : 08 php ;save carry for next add
+4141 : a50d lda ad1
+4143 : ed0402 sbc sba2 ;perform subtract
+4146 : 08 php
+4147 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4149 : f003 > beq skip3424
+ > trap ;failed not equal (non zero)
+414b : 205b44 > jsr report_error
+ >
+414e : >skip3424
+
+414e : 68 pla ;check flags
+414f : 29c3 and #$c3 ;mask NV----ZC
+4151 : c511 cmp adrf
+ trap_ne ;bad flags
+4153 : f003 > beq skip3426
+ > trap ;failed not equal (non zero)
+4155 : 205b44 > jsr report_error
+ >
+4158 : >skip3426
+
+4158 : 28 plp
+ ; binary ADC / SBC #
+4159 : 08 php ;save carry for subtract
+415a : a50e lda ad2
+415c : 8d1202 sta ex_adci+1 ;set ADC # operand
+415f : a50d lda ad1
+4161 : 201102 jsr ex_adci ;execute ADC # in RAM
+4164 : 08 php
+4165 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4167 : f003 > beq skip3428
+ > trap ;failed not equal (non zero)
+4169 : 205b44 > jsr report_error
+ >
+416c : >skip3428
+
+416c : 68 pla ;check flags
+416d : 29c3 and #$c3 ;mask NV----ZC
+416f : c511 cmp adrf
+ trap_ne ;bad flags
+4171 : f003 > beq skip3430
+ > trap ;failed not equal (non zero)
+4173 : 205b44 > jsr report_error
+ >
+4176 : >skip3430
+
+4176 : 28 plp
+4177 : 08 php ;save carry for next add
+4178 : a512 lda sb2
+417a : 8d1502 sta ex_sbci+1 ;set SBC # operand
+417d : a50d lda ad1
+417f : 201402 jsr ex_sbci ;execute SBC # in RAM
+4182 : 08 php
+4183 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4185 : f003 > beq skip3432
+ > trap ;failed not equal (non zero)
+4187 : 205b44 > jsr report_error
+ >
+418a : >skip3432
+
+418a : 68 pla ;check flags
+418b : 29c3 and #$c3 ;mask NV----ZC
+418d : c511 cmp adrf
+ trap_ne ;bad flags
+418f : f003 > beq skip3434
+ > trap ;failed not equal (non zero)
+4191 : 205b44 > jsr report_error
+ >
+4194 : >skip3434
+
+4194 : 28 plp
+ ; binary ADC / SBC zp,x
+4195 : 08 php ;save carry for subtract
+4196 : a50d lda ad1
+4198 : 7500 adc 0,x ;perform add
+419a : 08 php
+419b : c50f cmp adrl ;check result
+ trap_ne ;bad result
+419d : f003 > beq skip3436
+ > trap ;failed not equal (non zero)
+419f : 205b44 > jsr report_error
+ >
+41a2 : >skip3436
+
+41a2 : 68 pla ;check flags
+41a3 : 29c3 and #$c3 ;mask NV----ZC
+41a5 : c511 cmp adrf
+ trap_ne ;bad flags
+41a7 : f003 > beq skip3438
+ > trap ;failed not equal (non zero)
+41a9 : 205b44 > jsr report_error
+ >
+41ac : >skip3438
+
+41ac : 28 plp
+41ad : 08 php ;save carry for next add
+41ae : a50d lda ad1
+41b0 : f504 sbc sb2-ad2,x ;perform subtract
+41b2 : 08 php
+41b3 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+41b5 : f003 > beq skip3440
+ > trap ;failed not equal (non zero)
+41b7 : 205b44 > jsr report_error
+ >
+41ba : >skip3440
+
+41ba : 68 pla ;check flags
+41bb : 29c3 and #$c3 ;mask NV----ZC
+41bd : c511 cmp adrf
+ trap_ne ;bad flags
+41bf : f003 > beq skip3442
+ > trap ;failed not equal (non zero)
+41c1 : 205b44 > jsr report_error
+ >
+41c4 : >skip3442
+
+41c4 : 28 plp
+ ; binary ADC / SBC abs,x
+41c5 : 08 php ;save carry for subtract
+41c6 : a50d lda ad1
+41c8 : 7df501 adc ada2-ad2,x ;perform add
+41cb : 08 php
+41cc : c50f cmp adrl ;check result
+ trap_ne ;bad result
+41ce : f003 > beq skip3444
+ > trap ;failed not equal (non zero)
+41d0 : 205b44 > jsr report_error
+ >
+41d3 : >skip3444
+
+41d3 : 68 pla ;check flags
+41d4 : 29c3 and #$c3 ;mask NV----ZC
+41d6 : c511 cmp adrf
+ trap_ne ;bad flags
+41d8 : f003 > beq skip3446
+ > trap ;failed not equal (non zero)
+41da : 205b44 > jsr report_error
+ >
+41dd : >skip3446
+
+41dd : 28 plp
+41de : 08 php ;save carry for next add
+41df : a50d lda ad1
+41e1 : fdf601 sbc sba2-ad2,x ;perform subtract
+41e4 : 08 php
+41e5 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+41e7 : f003 > beq skip3448
+ > trap ;failed not equal (non zero)
+41e9 : 205b44 > jsr report_error
+ >
+41ec : >skip3448
+
+41ec : 68 pla ;check flags
+41ed : 29c3 and #$c3 ;mask NV----ZC
+41ef : c511 cmp adrf
+ trap_ne ;bad flags
+41f1 : f003 > beq skip3450
+ > trap ;failed not equal (non zero)
+41f3 : 205b44 > jsr report_error
+ >
+41f6 : >skip3450
+
+41f6 : 28 plp
+ ; binary ADC / SBC abs,y
+41f7 : 08 php ;save carry for subtract
+41f8 : a50d lda ad1
+41fa : 790401 adc ada2-$ff,y ;perform add
+41fd : 08 php
+41fe : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4200 : f003 > beq skip3452
+ > trap ;failed not equal (non zero)
+4202 : 205b44 > jsr report_error
+ >
+4205 : >skip3452
+
+4205 : 68 pla ;check flags
+4206 : 29c3 and #$c3 ;mask NV----ZC
+4208 : c511 cmp adrf
+ trap_ne ;bad flags
+420a : f003 > beq skip3454
+ > trap ;failed not equal (non zero)
+420c : 205b44 > jsr report_error
+ >
+420f : >skip3454
+
+420f : 28 plp
+4210 : 08 php ;save carry for next add
+4211 : a50d lda ad1
+4213 : f90501 sbc sba2-$ff,y ;perform subtract
+4216 : 08 php
+4217 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4219 : f003 > beq skip3456
+ > trap ;failed not equal (non zero)
+421b : 205b44 > jsr report_error
+ >
+421e : >skip3456
+
+421e : 68 pla ;check flags
+421f : 29c3 and #$c3 ;mask NV----ZC
+4221 : c511 cmp adrf
+ trap_ne ;bad flags
+4223 : f003 > beq skip3458
+ > trap ;failed not equal (non zero)
+4225 : 205b44 > jsr report_error
+ >
+4228 : >skip3458
+
+4228 : 28 plp
+ ; binary ADC / SBC (zp,x)
+4229 : 08 php ;save carry for subtract
+422a : a50d lda ad1
+422c : 6144 adc (lo adi2-ad2,x) ;perform add
+422e : 08 php
+422f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4231 : f003 > beq skip3460
+ > trap ;failed not equal (non zero)
+4233 : 205b44 > jsr report_error
+ >
+4236 : >skip3460
+
+4236 : 68 pla ;check flags
+4237 : 29c3 and #$c3 ;mask NV----ZC
+4239 : c511 cmp adrf
+ trap_ne ;bad flags
+423b : f003 > beq skip3462
+ > trap ;failed not equal (non zero)
+423d : 205b44 > jsr report_error
+ >
+4240 : >skip3462
+
+4240 : 28 plp
+4241 : 08 php ;save carry for next add
+4242 : a50d lda ad1
+4244 : e146 sbc (lo sbi2-ad2,x) ;perform subtract
+4246 : 08 php
+4247 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4249 : f003 > beq skip3464
+ > trap ;failed not equal (non zero)
+424b : 205b44 > jsr report_error
+ >
+424e : >skip3464
+
+424e : 68 pla ;check flags
+424f : 29c3 and #$c3 ;mask NV----ZC
+4251 : c511 cmp adrf
+ trap_ne ;bad flags
+4253 : f003 > beq skip3466
+ > trap ;failed not equal (non zero)
+4255 : 205b44 > jsr report_error
+ >
+4258 : >skip3466
+
+4258 : 28 plp
+ ; binary ADC / SBC (abs),y
+4259 : 08 php ;save carry for subtract
+425a : a50d lda ad1
+425c : 7156 adc (adiy2),y ;perform add
+425e : 08 php
+425f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4261 : f003 > beq skip3468
+ > trap ;failed not equal (non zero)
+4263 : 205b44 > jsr report_error
+ >
+4266 : >skip3468
+
+4266 : 68 pla ;check flags
+4267 : 29c3 and #$c3 ;mask NV----ZC
+4269 : c511 cmp adrf
+ trap_ne ;bad flags
+426b : f003 > beq skip3470
+ > trap ;failed not equal (non zero)
+426d : 205b44 > jsr report_error
+ >
+4270 : >skip3470
+
+4270 : 28 plp
+4271 : 08 php ;save carry for next add
+4272 : a50d lda ad1
+4274 : f158 sbc (sbiy2),y ;perform subtract
+4276 : 08 php
+4277 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+4279 : f003 > beq skip3472
+ > trap ;failed not equal (non zero)
+427b : 205b44 > jsr report_error
+ >
+427e : >skip3472
+
+427e : 68 pla ;check flags
+427f : 29c3 and #$c3 ;mask NV----ZC
+4281 : c511 cmp adrf
+ trap_ne ;bad flags
+4283 : f003 > beq skip3474
+ > trap ;failed not equal (non zero)
+4285 : 205b44 > jsr report_error
+ >
+4288 : >skip3474
+
+4288 : 28 plp
+4289 : 60 rts
+
+ ; target for the jump absolute test
+428a : 88 dey
+428b : 88 dey
+428c : test_far
+428c : 08 php ;either SP or Y count will fail, if we do not hit
+428d : 88 dey
+428e : 88 dey
+428f : 88 dey
+4290 : 28 plp
+ trap_cs ;flags loaded?
+4291 : 9003 > bcc skip3476
+ > trap ;failed carry set
+4293 : 205b44 > jsr report_error
+ >
+4296 : >skip3476
+
+ trap_vs
+4296 : 5003 > bvc skip3478
+ > trap ;failed overflow set
+4298 : 205b44 > jsr report_error
+ >
+429b : >skip3478
+
+ trap_mi
+429b : 1003 > bpl skip3480
+ > trap ;failed minus (bit 7 set)
+429d : 205b44 > jsr report_error
+ >
+42a0 : >skip3480
+
+ trap_eq
+42a0 : d003 > bne skip3482
+ > trap ;failed equal (zero)
+42a2 : 205b44 > jsr report_error
+ >
+42a5 : >skip3482
+
+42a5 : c946 cmp #'F' ;registers loaded?
+ trap_ne
+42a7 : f003 > beq skip3484
+ > trap ;failed not equal (non zero)
+42a9 : 205b44 > jsr report_error
+ >
+42ac : >skip3484
+
+42ac : e041 cpx #'A'
+ trap_ne
+42ae : f003 > beq skip3486
+ > trap ;failed not equal (non zero)
+42b0 : 205b44 > jsr report_error
+ >
+42b3 : >skip3486
+
+42b3 : c04f cpy #('R'-3)
+ trap_ne
+42b5 : f003 > beq skip3488
+ > trap ;failed not equal (non zero)
+42b7 : 205b44 > jsr report_error
+ >
+42ba : >skip3488
+
+42ba : 48 pha ;save a,x
+42bb : 8a txa
+42bc : 48 pha
+42bd : ba tsx
+42be : e0fd cpx #$fd ;check SP
+ trap_ne
+42c0 : f003 > beq skip3490
+ > trap ;failed not equal (non zero)
+42c2 : 205b44 > jsr report_error
+ >
+42c5 : >skip3490
+
+42c5 : 68 pla ;restore x
+42c6 : aa tax
+ set_stat $ff
+ > load_flag $ff
+42c7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+42c9 : 48 > pha ;use stack to load status
+42ca : 28 > plp
+
+42cb : 68 pla ;restore a
+42cc : e8 inx ;return registers with modifications
+42cd : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+42cf : 4cf309 jmp far_ret
+
+ ; target for the jump indirect test
+ align
+42d2 : db42 ptr_tst_ind dw test_ind
+42d4 : 7b0a ptr_ind_ret dw ind_ret
+ trap ;runover protection
+42d6 : 205b44 > jsr report_error
+
+42d9 : 88 dey
+42da : 88 dey
+42db : test_ind
+42db : 08 php ;either SP or Y count will fail, if we do not hit
+42dc : 88 dey
+42dd : 88 dey
+42de : 88 dey
+42df : 28 plp
+ trap_cs ;flags loaded?
+42e0 : 9003 > bcc skip3495
+ > trap ;failed carry set
+42e2 : 205b44 > jsr report_error
+ >
+42e5 : >skip3495
+
+ trap_vs
+42e5 : 5003 > bvc skip3497
+ > trap ;failed overflow set
+42e7 : 205b44 > jsr report_error
+ >
+42ea : >skip3497
+
+ trap_mi
+42ea : 1003 > bpl skip3499
+ > trap ;failed minus (bit 7 set)
+42ec : 205b44 > jsr report_error
+ >
+42ef : >skip3499
+
+ trap_eq
+42ef : d003 > bne skip3501
+ > trap ;failed equal (zero)
+42f1 : 205b44 > jsr report_error
+ >
+42f4 : >skip3501
+
+42f4 : c949 cmp #'I' ;registers loaded?
+ trap_ne
+42f6 : f003 > beq skip3503
+ > trap ;failed not equal (non zero)
+42f8 : 205b44 > jsr report_error
+ >
+42fb : >skip3503
+
+42fb : e04e cpx #'N'
+ trap_ne
+42fd : f003 > beq skip3505
+ > trap ;failed not equal (non zero)
+42ff : 205b44 > jsr report_error
+ >
+4302 : >skip3505
+
+4302 : c041 cpy #('D'-3)
+ trap_ne
+4304 : f003 > beq skip3507
+ > trap ;failed not equal (non zero)
+4306 : 205b44 > jsr report_error
+ >
+4309 : >skip3507
+
+4309 : 48 pha ;save a,x
+430a : 8a txa
+430b : 48 pha
+430c : ba tsx
+430d : e0fd cpx #$fd ;check SP
+ trap_ne
+430f : f003 > beq skip3509
+ > trap ;failed not equal (non zero)
+4311 : 205b44 > jsr report_error
+ >
+4314 : >skip3509
+
+4314 : 68 pla ;restore x
+4315 : aa tax
+ set_stat $ff
+ > load_flag $ff
+4316 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+4318 : 48 > pha ;use stack to load status
+4319 : 28 > plp
+
+431a : 68 pla ;restore a
+431b : e8 inx ;return registers with modifications
+431c : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+431e : 6cd442 jmp (ptr_ind_ret)
+ trap ;runover protection
+4321 : 205b44 > jsr report_error
+
+4324 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ; target for the jump subroutine test
+4327 : 88 dey
+4328 : 88 dey
+4329 : test_jsr
+4329 : 08 php ;either SP or Y count will fail, if we do not hit
+432a : 88 dey
+432b : 88 dey
+432c : 88 dey
+432d : 28 plp
+ trap_cs ;flags loaded?
+432e : 9003 > bcc skip3514
+ > trap ;failed carry set
+4330 : 205b44 > jsr report_error
+ >
+4333 : >skip3514
+
+ trap_vs
+4333 : 5003 > bvc skip3516
+ > trap ;failed overflow set
+4335 : 205b44 > jsr report_error
+ >
+4338 : >skip3516
+
+ trap_mi
+4338 : 1003 > bpl skip3518
+ > trap ;failed minus (bit 7 set)
+433a : 205b44 > jsr report_error
+ >
+433d : >skip3518
+
+ trap_eq
+433d : d003 > bne skip3520
+ > trap ;failed equal (zero)
+433f : 205b44 > jsr report_error
+ >
+4342 : >skip3520
+
+4342 : c94a cmp #'J' ;registers loaded?
+ trap_ne
+4344 : f003 > beq skip3522
+ > trap ;failed not equal (non zero)
+4346 : 205b44 > jsr report_error
+ >
+4349 : >skip3522
+
+4349 : e053 cpx #'S'
+ trap_ne
+434b : f003 > beq skip3524
+ > trap ;failed not equal (non zero)
+434d : 205b44 > jsr report_error
+ >
+4350 : >skip3524
+
+4350 : c04f cpy #('R'-3)
+ trap_ne
+4352 : f003 > beq skip3526
+ > trap ;failed not equal (non zero)
+4354 : 205b44 > jsr report_error
+ >
+4357 : >skip3526
+
+4357 : 48 pha ;save a,x
+4358 : 8a txa
+4359 : 48 pha
+435a : ba tsx ;sp -4? (return addr,a,x)
+435b : e0fb cpx #$fb
+ trap_ne
+435d : f003 > beq skip3528
+ > trap ;failed not equal (non zero)
+435f : 205b44 > jsr report_error
+ >
+4362 : >skip3528
+
+4362 : adff01 lda $1ff ;propper return on stack
+4365 : c90a cmp #hi(jsr_ret)
+ trap_ne
+4367 : f003 > beq skip3530
+ > trap ;failed not equal (non zero)
+4369 : 205b44 > jsr report_error
+ >
+436c : >skip3530
+
+436c : adfe01 lda $1fe
+436f : c9cc cmp #lo(jsr_ret)
+ trap_ne
+4371 : f003 > beq skip3532
+ > trap ;failed not equal (non zero)
+4373 : 205b44 > jsr report_error
+ >
+4376 : >skip3532
+
+ set_stat $ff
+ > load_flag $ff
+4376 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+4378 : 48 > pha ;use stack to load status
+4379 : 28 > plp
+
+437a : 68 pla ;pull x,a
+437b : aa tax
+437c : 68 pla
+437d : e8 inx ;return registers with modifications
+437e : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+4380 : 60 rts
+ trap ;runover protection
+4381 : 205b44 > jsr report_error
+
+4384 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ;trap in case of unexpected IRQ, NMI, BRK, RESET - BRK test target
+4387 : nmi_trap
+ trap ;check stack for conditions at NMI
+4387 : 205b44 > jsr report_error
+
+438a : 4c0004 jmp start ;catastrophic error - cannot continue
+438d : res_trap
+ trap ;unexpected RESET
+438d : 205b44 > jsr report_error
+
+4390 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+4393 : 88 dey
+4394 : 88 dey
+4395 : irq_trap ;BRK test or unextpected BRK or IRQ
+4395 : 08 php ;either SP or Y count will fail, if we do not hit
+4396 : 88 dey
+4397 : 88 dey
+4398 : 88 dey
+ ;next traps could be caused by unexpected BRK or IRQ
+ ;check stack for BREAK and originating location
+ ;possible jump/branch into weeds (uninitialized space)
+4399 : c9bd cmp #$ff-'B' ;BRK pass 2 registers loaded?
+439b : f05a beq break2
+439d : c942 cmp #'B' ;BRK pass 1 registers loaded?
+ trap_ne
+439f : f003 > beq skip3539
+ > trap ;failed not equal (non zero)
+43a1 : 205b44 > jsr report_error
+ >
+43a4 : >skip3539
+
+43a4 : e052 cpx #'R'
+ trap_ne
+43a6 : f003 > beq skip3541
+ > trap ;failed not equal (non zero)
+43a8 : 205b44 > jsr report_error
+ >
+43ab : >skip3541
+
+43ab : c048 cpy #'K'-3
+ trap_ne
+43ad : f003 > beq skip3543
+ > trap ;failed not equal (non zero)
+43af : 205b44 > jsr report_error
+ >
+43b2 : >skip3543
+
+43b2 : 850a sta irq_a ;save registers during break test
+43b4 : 860b stx irq_x
+43b6 : ba tsx ;test break on stack
+43b7 : bd0201 lda $102,x
+ cmp_flag 0 ;break test should have B=1 & unused=1 on stack
+43ba : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ; - no break flag on stack
+43bc : f003 > beq skip3546
+ > trap ;failed not equal (non zero)
+43be : 205b44 > jsr report_error
+ >
+43c1 : >skip3546
+
+43c1 : 68 pla
+ cmp_flag intdis ;should have added interrupt disable
+43c2 : c934 > cmp #(intdis |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+43c4 : f003 > beq skip3549
+ > trap ;failed not equal (non zero)
+43c6 : 205b44 > jsr report_error
+ >
+43c9 : >skip3549
+
+43c9 : ba tsx
+43ca : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+43cc : f003 > beq skip3551
+ > trap ;failed not equal (non zero)
+43ce : 205b44 > jsr report_error
+ >
+43d1 : >skip3551
+
+43d1 : adff01 lda $1ff ;propper return on stack
+43d4 : c90b cmp #hi(brk_ret0)
+ trap_ne
+43d6 : f003 > beq skip3553
+ > trap ;failed not equal (non zero)
+43d8 : 205b44 > jsr report_error
+ >
+43db : >skip3553
+
+43db : adfe01 lda $1fe
+43de : c91e cmp #lo(brk_ret0)
+ trap_ne
+43e0 : f003 > beq skip3555
+ > trap ;failed not equal (non zero)
+43e2 : 205b44 > jsr report_error
+ >
+43e5 : >skip3555
+
+ load_flag $ff
+43e5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+43e7 : 48 pha
+43e8 : a60b ldx irq_x
+43ea : e8 inx ;return registers with modifications
+43eb : a50a lda irq_a
+43ed : 49aa eor #$aa
+43ef : 28 plp ;N=1, V=1, Z=1, C=1 but original flags should be restored
+43f0 : 40 rti
+ trap ;runover protection
+43f1 : 205b44 > jsr report_error
+
+43f4 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+43f7 : break2 ;BRK pass 2
+43f7 : e0ad cpx #$ff-'R'
+ trap_ne
+43f9 : f003 > beq skip3559
+ > trap ;failed not equal (non zero)
+43fb : 205b44 > jsr report_error
+ >
+43fe : >skip3559
+
+43fe : c0b1 cpy #$ff-'K'-3
+ trap_ne
+4400 : f003 > beq skip3561
+ > trap ;failed not equal (non zero)
+4402 : 205b44 > jsr report_error
+ >
+4405 : >skip3561
+
+4405 : 850a sta irq_a ;save registers during break test
+4407 : 860b stx irq_x
+4409 : ba tsx ;test break on stack
+440a : bd0201 lda $102,x
+ cmp_flag $ff ;break test should have B=1
+440d : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ; - no break flag on stack
+440f : f003 > beq skip3564
+ > trap ;failed not equal (non zero)
+4411 : 205b44 > jsr report_error
+ >
+4414 : >skip3564
+
+4414 : 68 pla
+4415 : 0908 ora #decmode ;ignore decmode cleared if 65c02
+ cmp_flag $ff ;actual passed flags
+4417 : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+4419 : f003 > beq skip3567
+ > trap ;failed not equal (non zero)
+441b : 205b44 > jsr report_error
+ >
+441e : >skip3567
+
+441e : ba tsx
+441f : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+4421 : f003 > beq skip3569
+ > trap ;failed not equal (non zero)
+4423 : 205b44 > jsr report_error
+ >
+4426 : >skip3569
+
+4426 : adff01 lda $1ff ;propper return on stack
+4429 : c90b cmp #hi(brk_ret1)
+ trap_ne
+442b : f003 > beq skip3571
+ > trap ;failed not equal (non zero)
+442d : 205b44 > jsr report_error
+ >
+4430 : >skip3571
+
+4430 : adfe01 lda $1fe
+4433 : c953 cmp #lo(brk_ret1)
+ trap_ne
+4435 : f003 > beq skip3573
+ > trap ;failed not equal (non zero)
+4437 : 205b44 > jsr report_error
+ >
+443a : >skip3573
+
+ load_flag intdis
+443a : a904 > lda #intdis ;allow test to change I-flag (no mask)
+
+443c : 48 pha
+443d : a60b ldx irq_x
+443f : e8 inx ;return registers with modifications
+4440 : a50a lda irq_a
+4442 : 49aa eor #$aa
+4444 : 28 plp ;N=0, V=0, Z=0, C=0 but original flags should be restored
+4445 : 40 rti
+ trap ;runover protection
+4446 : 205b44 > jsr report_error
+
+4449 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ if report = 1
+ include "report.i65"
+ ;**** report 6502 funtional test errors to standard I/O ****
+ ;
+ ;this include file is part of the 6502 functional tests
+ ;it is used when you configure report = 1 in the tests
+ ;
+ ;to adopt the standard output vectors of your test environment
+ ;you must modify the rchar and rget subroutines in this include
+ ;
+ ;I/O hardware may have to be initialized in report_init
+
+ ;print message macro - \1 = message location
+ rprt macro
+ ldx #0
+ lda \1
+ loop\?
+ jsr rchar
+ inx
+ lda \1,x
+ bne loop\?
+ endm
+
+ ;initialize I/O as required (example: configure & enable ACIA)
+444c : report_init
+ ;nothing to initialize
+ rprt rmsg_start
+444c : a200 > ldx #0
+444e : ad6945 > lda rmsg_start
+4451 : >loop3577
+4451 : 206545 > jsr rchar
+4454 : e8 > inx
+4455 : bd6945 > lda rmsg_start,x
+4458 : d0f7 > bne loop3577
+
+445a : 60 rts
+
+ ;show stack (with saved registers), zeropage and absolute memory workspace
+ ;after an error was trapped in the test program
+445b : report_error
+ ;save registers
+445b : 08 php
+445c : 48 pha
+445d : 8a txa
+445e : 48 pha
+445f : 98 tya
+4460 : 48 pha
+4461 : d8 cld
+ ;show stack with index to registers at error
+ rprt rmsg_stack
+4462 : a200 > ldx #0
+4464 : ad7d45 > lda rmsg_stack
+4467 : >loop3578
+4467 : 206545 > jsr rchar
+446a : e8 > inx
+446b : bd7d45 > lda rmsg_stack,x
+446e : d0f7 > bne loop3578
+
+4470 : ba tsx
+4471 : e8 inx
+4472 : a901 lda #1 ;address high
+4474 : 205145 jsr rhex
+4477 : 8a txa ;address low
+4478 : 205145 jsr rhex
+447b : 204d45 rstack jsr rspace
+447e : bd0001 lda $100,x ;stack data
+4481 : 205145 jsr rhex
+4484 : e8 inx
+4485 : d0f4 bne rstack
+4487 : 204445 jsr rcrlf ;new line
+ ;show zero page workspace
+448a : a900 lda #0
+448c : 205145 jsr rhex
+448f : a90c lda #zpt
+4491 : aa tax
+4492 : 205145 jsr rhex
+4495 : 204d45 rzp jsr rspace
+4498 : b500 lda 0,x
+449a : 205145 jsr rhex
+449d : e8 inx
+449e : e013 cpx #zp_bss
+44a0 : d0f3 bne rzp
+44a2 : 204445 jsr rcrlf
+ ;show absolute workspace
+44a5 : a902 lda #hi(data_segment)
+44a7 : 205145 jsr rhex
+44aa : a900 lda #lo(data_segment)
+44ac : 205145 jsr rhex
+44af : a200 ldx #0
+44b1 : 204d45 rabs jsr rspace
+44b4 : bd0002 lda data_segment,x
+44b7 : 205145 jsr rhex
+44ba : e8 inx
+44bb : e008 cpx #(data_bss-data_segment)
+44bd : d0f2 bne rabs
+ ;ask to continue
+ rprt rmsg_cont
+44bf : a200 > ldx #0
+44c1 : ad9945 > lda rmsg_cont
+44c4 : >loop3579
+44c4 : 206545 > jsr rchar
+44c7 : e8 > inx
+44c8 : bd9945 > lda rmsg_cont,x
+44cb : d0f7 > bne loop3579
+
+44cd : 203a45 rerr1 jsr rget
+44d0 : c953 cmp #'S'
+44d2 : f00b beq rskip
+44d4 : c943 cmp #'C'
+44d6 : d0f5 bne rerr1
+ ;restore registers
+44d8 : 68 pla
+44d9 : a8 tay
+44da : 68 pla
+44db : aa tax
+44dc : 68 pla
+44dd : 28 plp
+44de : 60 rts
+ ;skip the current test
+44df : a9f0 rskip lda #$f0 ;already end of tests?
+44e1 : cd0002 cmp test_case
+44e4 : f0e7 beq rerr1 ;skip is not available
+44e6 : a2ff ldx #$ff ;clear stack
+44e8 : 9a txs
+44e9 : ee0002 inc test_case ;next test
+44ec : a900 lda #lo(start) ;find begin of test
+44ee : 850c sta zpt
+44f0 : a904 lda #hi(start)
+44f2 : 850d sta zpt+1
+44f4 : a004 rskipl1 ldy #4 ;search pattern
+44f6 : b10c rskipl2 lda (zpt),y ;next byte
+44f8 : d91f45 cmp rmark,y
+44fb : d00a bne rskipnx ;no match
+44fd : 88 dey
+44fe : 300f bmi rskipf ;found pattern
+4500 : c001 cpy #1 ;skip immediate value
+4502 : d0f2 bne rskipl2
+4504 : 88 dey
+4505 : f0ef beq rskipl2
+
+4507 : e60c rskipnx inc zpt ;next RAM location
+4509 : d0e9 bne rskipl1
+450b : e60d inc zpt+1
+450d : d0e5 bne rskipl1
+
+450f : a001 rskipf ldy #1 ;pattern found - check test number
+4511 : b10c lda (zpt),y ;test number
+4513 : c9f0 cmp #$f0 ;end of last test?
+4515 : f005 beq rskipe ;ask to rerun all
+4517 : cd0002 cmp test_case ;is next test?
+451a : d0eb bne rskipnx ;continue searching
+451c : 6c0c00 rskipe jmp (zpt) ;start next test or rerun at end of tests
+
+451f : a900 rmark lda #0 ;begin of test search pattern
+4521 : 8d0002 sta test_case
+
+ ;show test has ended, ask to repeat
+4524 : report_success
+ if rep_int = 1
+ rprt rmsg_priority
+ lda data_segment ;show interrupt sequence
+ jsr rhex
+ jsr rspace
+ lda data_segment+1
+ jsr rhex
+ jsr rspace
+ lda data_segment+2
+ jsr rhex
+ endif
+ rprt rmsg_success
+4524 : a200 > ldx #0
+4526 : adcb45 > lda rmsg_success
+4529 : >loop3580
+4529 : 206545 > jsr rchar
+452c : e8 > inx
+452d : bdcb45 > lda rmsg_success,x
+4530 : d0f7 > bne loop3580
+
+4532 : 203a45 rsuc1 jsr rget
+4535 : c952 cmp #'R'
+4537 : d0f9 bne rsuc1
+4539 : 60 rts
+
+ ;input subroutine
+ ;get a character from standard input
+ ;adjust according to the needs in your test environment
+453a : rget ;get character in A
+ ;rget1
+ ; lda $bff1 ;wait RDRF
+ ; and #8
+ ; beq rget1
+ ;not a real ACIA - so RDRF is not checked
+ ; lda $bff0 ;read acia rx reg
+453a : ad04f0 lda $f004 ;Kowalski simulator default
+ ;the load can be replaced by a call to a kernal routine
+ ; jsr $ffcf ;example: CHRIN for a C64
+453d : c961 cmp #'a' ;lower case
+453f : 9002 bcc rget1
+4541 : 295f and #$5f ;convert to upper case
+4543 : 60 rget1 rts
+
+ ;output subroutines
+4544 : a90a rcrlf lda #10
+4546 : 206545 jsr rchar
+4549 : a90d lda #13
+454b : d018 bne rchar
+
+454d : a920 rspace lda #' '
+454f : d014 bne rchar
+
+4551 : 48 rhex pha ;report hex byte in A
+4552 : 4a lsr a ;high nibble first
+4553 : 4a lsr a
+4554 : 4a lsr a
+4555 : 4a lsr a
+4556 : 205c45 jsr rnib
+4559 : 68 pla ;now low nibble
+455a : 290f and #$f
+
+455c : 18 rnib clc ;report nibble in A
+455d : 6930 adc #'0' ;make printable 0-9
+455f : c93a cmp #'9'+1
+4561 : 9002 bcc rchar
+4563 : 6906 adc #6 ;make printable A-F
+
+ ;send a character to standard output
+ ;adjust according to the needs in your test environment
+ ;register X needs to be preserved!
+4565 : rchar ;report character in A
+ ; pha ;wait TDRF
+ ;rchar1 lda $bff1
+ ; and #$10
+ ; beq rchar1
+ ; pla
+ ;not a real ACIA - so TDRF is not checked
+ ; sta $bff0 ;write acia tx reg
+4565 : 8d01f0 sta $f001 ;Kowalski simulator default
+ ;the store can be replaced by a call to a kernal routine
+ ; jsr $ffd2 ;example: CHROUT for a C64
+4568 : 60 rts
+
+4569 : rmsg_start
+4569 : 0a0d5374617274.. db 10,13,"Started testing",10,13,0
+457d : rmsg_stack
+457d : 0a0d7265677320.. db 10,13,"regs Y X A PS PCLPCH",10,13,0
+4599 : rmsg_cont
+4599 : 0a0d7072657373.. db 10,13,"press C to continue or S to skip current test",10,13,0
+45cb : rmsg_success
+45cb : 0a0d416c6c2074.. db 10,13,"All tests completed, press R to repeat",10,13,0
+ if rep_int = 1
+ rmsg_priority
+ db 10,13,"interrupt sequence (NMI IRQ BRK) ",0
+ endif
+
+ endif
+
+ ;copy of data to initialize BSS segment
+ if load_data_direct != 1
+ zp_init
+ zp1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ zp7f_ db $7f ;test pattern for compare
+ ;logical zeropage operands
+ zpOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ zpAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ zpEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+ ind1_ dw abs1 ;indirect pointer to pattern in absolute memory
+ dw abs1+1
+ dw abs1+2
+ dw abs1+3
+ dw abs7f
+ inw1_ dw abs1-$f8 ;indirect pointer for wrap-test pattern
+ indt_ dw abst ;indirect pointer to store area in absolute memory
+ dw abst+1
+ dw abst+2
+ dw abst+3
+ inwt_ dw abst-$f8 ;indirect pointer for wrap-test store
+ indAN_ dw absAN ;indirect pointer to AND pattern in absolute memory
+ dw absAN+1
+ dw absAN+2
+ dw absAN+3
+ indEO_ dw absEO ;indirect pointer to EOR pattern in absolute memory
+ dw absEO+1
+ dw absEO+2
+ dw absEO+3
+ indOR_ dw absOR ;indirect pointer to OR pattern in absolute memory
+ dw absOR+1
+ dw absOR+2
+ dw absOR+3
+ ;add/subtract indirect pointers
+ adi2_ dw ada2 ;indirect pointer to operand 2 in absolute memory
+ sbi2_ dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+ adiy2_ dw ada2-$ff ;with offset for indirect indexed
+ sbiy2_ dw sba2-$ff
+ zp_end
+ if (zp_end - zp_init) != (zp_bss_end - zp_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and zeropage data
+ endif
+ data_init
+ ex_and_ and #0 ;execute immediate opcodes
+ rts
+ ex_eor_ eor #0 ;execute immediate opcodes
+ rts
+ ex_ora_ ora #0 ;execute immediate opcodes
+ rts
+ ex_adc_ adc #0 ;execute immediate opcodes
+ rts
+ ex_sbc_ sbc #0 ;execute immediate opcodes
+ rts
+ abs1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ abs7f_ db $7f ;test pattern for compare
+ ;loads
+ fLDx_ db fn,fn,0,fz ;expected flags for load
+ ;shifts
+ rASL_ ;expected result ASL & ROL -carry
+ rROL_ db $86,$04,$82,0 ; "
+ rROLc_ db $87,$05,$83,1 ;expected result ROL +carry
+ rLSR_ ;expected result LSR & ROR -carry
+ rROR_ db $61,$41,$20,0 ; "
+ rRORc_ db $e1,$c1,$a0,$80 ;expected result ROR +carry
+ fASL_ ;expected flags for shifts
+ fROL_ db fnc,fc,fn,fz ;no carry in
+ fROLc_ db fnc,fc,fn,0 ;carry in
+ fLSR_
+ fROR_ db fc,0,fc,fz ;no carry in
+ fRORc_ db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+ rINC_ db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+ fINC_ db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+ absOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ absAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ absEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+ absORa_ db 0,$f1,$1f,0 ;test pattern for OR
+ absANa_ db $f0,$ff,$ff,$ff ;test pattern for AND
+ absEOa_ db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+ absrlo_ db 0,$ff,$7f,$80
+ absflo_ db fz,fn,0,fn
+ data_end
+ if (data_end - data_init) != (data_bss_end - data_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and data
+ endif
+
+ vec_init
+ dw nmi_trap
+ dw res_trap
+ dw irq_trap
+ vec_bss equ $fffa
+ endif ;end of RAM init data
+
+ if (load_data_direct = 1) & (ROM_vectors = 1)
+fffa = org $fffa ;vectors
+fffa : 8743 dw nmi_trap
+fffc : 8d43 dw res_trap
+fffe : 9543 dw irq_trap
+ endif
+
+fffa = end start
+
+No errors in pass 2.
diff --git a/tests/65C02_extended_opcodes_test.bin b/tests/65C02_extended_opcodes_test.bin
new file mode 100644
index 0000000..de99bc4
Binary files /dev/null and b/tests/65C02_extended_opcodes_test.bin differ
diff --git a/tests/65C02_extended_opcodes_test.hex b/tests/65C02_extended_opcodes_test.hex
new file mode 100644
index 0000000..13450fd
--- /dev/null
+++ b/tests/65C02_extended_opcodes_test.hex
@@ -0,0 +1,302 @@
+:16000A00000000000000000000C38241007F001F71800FFF7F80BE
+:20002000FF0F8F8F10021102120213021402180105020602070208020D0147024802490209
+:1A0040004A024B024C024D024E0243024402450246020502060206010701E8
+:2002000000000000000000000000690060E90060C38241007F8080000286048200870583AA
+:200220000161412000E1C1A080810180028101800001000102818081807F80FF00010080AE
+:20024000800200001F71800FFF7F80FF0F8F8F00F11F00F0FFFFFFFFF0F00F00FF7F8002E8
+:030260008000809B
+:20040000D8A2FF9AA9008D0202AD0202C900D0FEA9018D0202A999A2FF9AA255DAA2AADA98
+:20042000ECFE01D0FEBAE0FDD0FE7AC0AAD0FE7AC055D0FECCFF01D0FEBAE0FFD0FEA0A549
+:200440005AA05A5ACCFE01D0FEBAE0FDD0FEFAE05AD0FEFAE0A5D0FEECFF01D0FEBAE0FF4E
+:20046000D0FEC999D0FEAD0202C901D0FEA9028D0202A0AAA9FF48A20128DA08E001D0FE63
+:200480006848C9FFD0FE28A90048A20028DA08E000D0FE6848C930D0FE28A9FF48A2FF284B
+:2004A000DA08E0FFD0FE6848C9FFD0FE28A90048A20128DA08E001D0FE6848C930D0FE2853
+:2004C000A9FF48A20028DA08E000D0FE6848C9FFD0FE28A90048A2FF28DA08E0FFD0FE68B3
+:2004E00048C930D0FE28A9FF48A20028FA08E0FFD0FE6848C9FDD0FE28A90048A2FF28FA3C
+:2005000008E000D0FE6848C932D0FE28A9FF48A2FE28FA08E001D0FE6848C97DD0FE28A986
+:200520000048A20028FA08E0FFD0FE6848C9B0D0FE28A9FF48A2FF28FA08E000D0FE6848C2
+:20054000C97FD0FE28A90048A2FE28FA08E001D0FE6848C930D0FE28C0AAD0FEAD0202C9A2
+:2005600002D0FEA9038D0202A255A9FF48A001285A08C001D0FE6848C9FFD0FE28A900486E
+:20058000A000285A08C000D0FE6848C930D0FE28A9FF48A0FF285A08C0FFD0FE6848C9FFE6
+:2005A000D0FE28A90048A001285A08C001D0FE6848C930D0FE28A9FF48A000285A08C00021
+:2005C000D0FE6848C9FFD0FE28A90048A0FF285A08C0FFD0FE6848C930D0FE28A9FF48A009
+:2005E00000287A08C0FFD0FE6848C9FDD0FE28A90048A0FF287A08C000D0FE6848C932D015
+:20060000FE28A9FF48A0FE287A08C001D0FE6848C97DD0FE28A90048A000287A08C0FFD037
+:20062000FE6848C9B0D0FE28A9FF48A0FF287A08C000D0FE6848C97FD0FE28A90048A0FE59
+:20064000287A08C001D0FE6848C930D0FE28E055D0FEAD0202C903D0FEA9048D0202A28113
+:20066000A07EA9FF48A9002880034C6A0608C900D0FE6848C9FFD0FE28A90048A9FF28800E
+:20068000034C810608C9FFD0FE6848C930D0FE28E081D0FEC07ED0FEAD0202C904D0FEA917
+:2006A000058D0202A0008061C001D0FEC88053C003D0FEC88045C005D0FEC8A0008004C894
+:2006C000C8C8C88003C8C8C8C88002C8C8C8C88001C8C8C8C88000C8C8C8C8C00AD0FE8024
+:2006E0001288888888800E88888880F5888880F78880F980FBC000D0FE8015C004D0FEC8AD
+:2007000080B4C002D0FEC880A6C000D0FEC88098AD0202C905D0FEA9068D0202A211A022B7
+:20072000A901850CA90048A933280F0C068F0C064C30074C330708C933D0FE6848C930D073
+:20074000FE28A9FF48A9CC280F0C068F0C064C4E074C510708C9CCD0FE6848C9FFD0FE2806
+:20076000A50CC901D0FEA9FE850CA90048A933288F0C060F0C064C76074C790708C933D0D8
+:20078000FE6848C930D0FE28A9FF48A9CC288F0C060F0C064C94074C970708C9CCD0FE68C9
+:2007A00048C9FFD0FE28A50CC9FED0FEA902850CA90048A933281F0C069F0C064CBC074C7F
+:2007C000BF0708C933D0FE6848C930D0FE28A9FF48A9CC281F0C069F0C064CDA074CDD0716
+:2007E00008C9CCD0FE6848C9FFD0FE28A50CC902D0FEA9FD850CA90048A933289F0C061FDA
+:200800000C064C02084C050808C933D0FE6848C930D0FE28A9FF48A9CC289F0C061F0C0637
+:200820004C20084C230808C9CCD0FE6848C9FFD0FE28A50CC9FDD0FEA904850CA90048A9D7
+:2008400033282F0C06AF0C064C48084C4B0808C933D0FE6848C930D0FE28A9FF48A9CC2802
+:200860002F0C06AF0C064C66084C690808C9CCD0FE6848C9FFD0FE28A50CC904D0FEA9FB36
+:20088000850CA90048A93328AF0C062F0C064C8E084C910808C933D0FE6848C930D0FE2898
+:2008A000A9FF48A9CC28AF0C062F0C064CAC084CAF0808C9CCD0FE6848C9FFD0FE28A50C1C
+:2008C000C9FBD0FEA908850CA90048A933283F0C06BF0C064CD4084CD70808C933D0FE68A0
+:2008E00048C930D0FE28A9FF48A9CC283F0C06BF0C064CF2084CF50808C9CCD0FE6848C99F
+:20090000FFD0FE28A50CC908D0FEA9F7850CA90048A93328BF0C063F0C064C1A094C1D0969
+:2009200008C933D0FE6848C930D0FE28A9FF48A9CC28BF0C063F0C064C38094C3B0908C9A9
+:20094000CCD0FE6848C9FFD0FE28A50CC9F7D0FEA910850CA90048A933284F0C06CF0C06CF
+:200960004C60094C630908C933D0FE6848C930D0FE28A9FF48A9CC284F0C06CF0C064C7E00
+:20098000094C810908C9CCD0FE6848C9FFD0FE28A50CC910D0FEA9EF850CA90048A9332829
+:2009A000CF0C064F0C064CA6094CA90908C933D0FE6848C930D0FE28A9FF48A9CC28CF0C23
+:2009C000064F0C064CC4094CC70908C9CCD0FE6848C9FFD0FE28A50CC9EFD0FEA920850C11
+:2009E000A90048A933285F0C06DF0C064CEC094CEF0908C933D0FE6848C930D0FE28A9FF02
+:200A000048A9CC285F0C06DF0C064C0A0A4C0D0A08C9CCD0FE6848C9FFD0FE28A50CC92059
+:200A2000D0FEA9DF850CA90048A93328DF0C065F0C064C320A4C350A08C933D0FE6848C91A
+:200A400030D0FE28A9FF48A9CC28DF0C065F0C064C500A4C530A08C9CCD0FE6848C9FFD07F
+:200A6000FE28A50CC9DFD0FEA940850CA90048A933286F0C06EF0C064C780A4C7B0A08C9C8
+:200A800033D0FE6848C930D0FE28A9FF48A9CC286F0C06EF0C064C960A4C990A08C9CCD05F
+:200AA000FE6848C9FFD0FE28A50CC940D0FEA9BF850CA90048A93328EF0C066F0C064CBEC8
+:200AC0000A4CC10A08C933D0FE6848C930D0FE28A9FF48A9CC28EF0C066F0C064CDC0A4CF7
+:200AE000DF0A08C9CCD0FE6848C9FFD0FE28A50CC9BFD0FEA980850CA90048A933287F0CF3
+:200B000006FF0C064C040B4C070B08C933D0FE6848C930D0FE28A9FF48A9CC287F0C06FF77
+:200B20000C064C220B4C250B08C9CCD0FE6848C9FFD0FE28A50CC980D0FEA97F850CA900AB
+:200B400048A93328FF0C067F0C064C4A0B4C4D0B08C933D0FE6848C930D0FE28A9FF48A958
+:200B6000CC28FF0C067F0C064C680B4C6B0B08C9CCD0FE6848C9FFD0FE28A50CC97FD0FEBE
+:200B8000E011D0FEC022D0FEAD0202C906D0FEA9078D0202A900850CA9000F0C0249011FEE
+:200BA0000C0249022F0C0249043F0C0249084F0C0249105F0C0249206F0C0249407F0C0295
+:200BC0004980450CD0FEA9FF8F0C0249019F0C024902AF0C024904BF0C024908CF0C024958
+:200BE00010DF0C024920EF0C024940FF0C024980450CD0FEE60CD0A0AD0202C907D0FEA9BA
+:200C0000088D0202A042A20202C8CACAD0FEA90048A9FD2802EAEA08C9FDD0FE6848C930AF
+:200C2000D0FE28A9FF48A9A82802EAEA08C9A8D0FE6848C9FFD0FE28C042D0FEE000D0FE4C
+:200C4000A042A20222C8CACAD0FEA90048A9DD2822EAEA08C9DDD0FE6848C930D0FE28A969
+:200C6000FF48A9882822EAEA08C988D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20245
+:200C800042C8CACAD0FEA90048A9BD2842EAEA08C9BDD0FE6848C930D0FE28A9FF48A96857
+:200CA0002842EAEA08C968D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20262C8CACABF
+:200CC000D0FEA90048A99D2862EAEA08C99DD0FE6848C930D0FE28A9FF48A9482862EAEA97
+:200CE00008C948D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20282C8CACAD0FEA90046
+:200D000048A97D2882EAEA08C97DD0FE6848C930D0FE28A9FF48A9282882EAEA08C928D024
+:200D2000FE6848C9FFD0FE28C042D0FEE000D0FEA042A202C2C8CACAD0FEA90048A93D2858
+:200D4000C2EAEA08C93DD0FE6848C930D0FE28A9FF48A9E828C2EAEA08C9E8D0FE6848C943
+:200D6000FFD0FE28C042D0FEE000D0FEA042A202E2C8CACAD0FEA90048A91D28E2EAEA08D1
+:200D8000C91DD0FE6848C930D0FE28A9FF48A9C828E2EAEA08C9C8D0FE6848C9FFD0FE28EC
+:200DA000C042D0FEE000D0FEA042A20244C8CACAD0FEA90048A9BB2844EAEA08C9BBD0FED2
+:200DC0006848C930D0FE28A9FF48A9662844EAEA08C966D0FE6848C9FFD0FE28C042D0FEF2
+:200DE000E000D0FEA042A20254C8CACAD0FEA90048A9AB2854EAEA08C9ABD0FE6848C930B9
+:200E0000D0FE28A9FF48A9562854EAEA08C956D0FE6848C9FFD0FE28C042D0FEE000D0FEBC
+:200E2000A042A202D4C8CACAD0FEA90048A92B28D4EAEA08C92BD0FE6848C930D0FE28A987
+:200E4000FF48A9D628D4EAEA08C9D6D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20215
+:200E6000F4C8CACAD0FEA90048A90B28F4EAEA08C90BD0FE6848C930D0FE28A9FF48A9B627
+:200E800028F4EAEA08C9B6D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A2015CC8C8CAE6
+:200EA000D0FEA90048A9A3285CEAEA08C9A3D0FE6848C930D0FE28A9FF48A94E285CEAEAAF
+:200EC00008C94ED0FE6848C9FFD0FE28C042D0FEE000D0FEA042A201DCC8C8CAD0FEA90007
+:200EE00048A92328DCEAEA08C923D0FE6848C930D0FE28A9FF48A9CE28DCEAEA08C9CED0F7
+:200F0000FE6848C9FFD0FE28C042D0FEE000D0FEA042A201FCC8C8CAD0FEA90048A9032879
+:200F2000FCEAEA08C903D0FE6848C930D0FE28A9FF48A9AE28FCEAEA08C9AED0FE6848C99B
+:200F4000FFD0FE28C042D0FEE000D0FEA042A20303CACACAD0FEA90048A9FC2803EAEA08CB
+:200F6000C9FCD0FE6848C930D0FE28A9FF48A9A72803EAEA08C9A7D0FE6848C9FFD0FE284C
+:200F8000C042D0FEE000D0FEA042A20313CACACAD0FEA90048A9EC2813EAEA08C9ECD0FEED
+:200FA0006848C930D0FE28A9FF48A9972813EAEA08C997D0FE6848C9FFD0FE28C042D0FEDF
+:200FC000E000D0FEA042A20323CACACAD0FEA90048A9DC2823EAEA08C9DCD0FE6848C930D4
+:200FE000D0FE28A9FF48A9872823EAEA08C987D0FE6848C9FFD0FE28C042D0FEE000D0FEAA
+:20100000A042A20333CACACAD0FEA90048A9CC2833EAEA08C9CCD0FE6848C930D0FE28A9A2
+:20102000FF48A9772833EAEA08C977D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20391
+:2010400043CACACAD0FEA90048A9BC2843EAEA08C9BCD0FE6848C930D0FE28A9FF48A96792
+:201060002843EAEA08C967D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20353CACACA07
+:20108000D0FEA90048A9AC2853EAEA08C9ACD0FE6848C930D0FE28A9FF48A9572853EAEAC4
+:2010A00008C957D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20363CACACAD0FEA9008F
+:2010C00048A99C2863EAEA08C99CD0FE6848C930D0FE28A9FF48A9472863EAEA08C947D023
+:2010E000FE6848C9FFD0FE28C042D0FEE000D0FEA042A20373CACACAD0FEA90048A98C2892
+:2011000073EAEA08C98CD0FE6848C930D0FE28A9FF48A9372873EAEA08C937D0FE6848C930
+:20112000FFD0FE28C042D0FEE000D0FEA042A20383CACACAD0FEA90048A97C2883EAEA0869
+:20114000C97CD0FE6848C930D0FE28A9FF48A9272883EAEA08C927D0FE6848C9FFD0FE286A
+:20116000C042D0FEE000D0FEA042A20393CACACAD0FEA90048A96C2893EAEA08C96CD0FE0B
+:201180006848C930D0FE28A9FF48A9172893EAEA08C917D0FE6848C9FFD0FE28C042D0FE7D
+:2011A000E000D0FEA042A203A3CACACAD0FEA90048A95C28A3EAEA08C95CD0FE6848C930F2
+:2011C000D0FE28A9FF48A90728A3EAEA08C907D0FE6848C9FFD0FE28C042D0FEE000D0FE48
+:2011E000A042A203B3CACACAD0FEA90048A94C28B3EAEA08C94CD0FE6848C930D0FE28A9C1
+:20120000FF48A9F728B3EAEA08C9F7D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A2032F
+:20122000C3CACACAD0FEA90048A93C28C3EAEA08C93CD0FE6848C930D0FE28A9FF48A9E730
+:2012400028C3EAEA08C9E7D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A203D3CACACAA5
+:20126000D0FEA90048A92C28D3EAEA08C92CD0FE6848C930D0FE28A9FF48A9D728D3EAEA62
+:2012800008C9D7D0FE6848C9FFD0FE28C042D0FEE000D0FEA042A203E3CACACAD0FEA900AD
+:2012A00048A91C28E3EAEA08C91CD0FE6848C930D0FE28A9FF48A9C728E3EAEA08C9C7D041
+:2012C000FE6848C9FFD0FE28C042D0FEE000D0FEA042A203F3CACACAD0FEA90048A90C28B0
+:2012E000F3EAEA08C90CD0FE6848C930D0FE28A9FF48A9B728F3EAEA08C9B7D0FE6848C9CF
+:20130000FFD0FE28C042D0FEE000D0FEA042A2030BCACACAD0FEA90048A9F4280BEAEA08FF
+:20132000C9F4D0FE6848C930D0FE28A9FF48A99F280BEAEA08C99FD0FE6848C9FFD0FE2898
+:20134000C042D0FEE000D0FEA042A2031BCACACAD0FEA90048A9E4281BEAEA08C9E4D0FE29
+:201360006848C930D0FE28A9FF48A98F281BEAEA08C98FD0FE6848C9FFD0FE28C042D0FE23
+:20138000E000D0FEA042A2032BCACACAD0FEA90048A9D4282BEAEA08C9D4D0FE6848C93010
+:2013A000D0FE28A9FF48A97F282BEAEA08C97FD0FE6848C9FFD0FE28C042D0FEE000D0FEEE
+:2013C000A042A2033BCACACAD0FEA90048A9C4283BEAEA08C9C4D0FE6848C930D0FE28A9DF
+:2013E000FF48A96F283BEAEA08C96FD0FE6848C9FFD0FE28C042D0FEE000D0FEA042A203D6
+:201400004BCACACAD0FEA90048A9B4284BEAEA08C9B4D0FE6848C930D0FE28A9FF48A95FD6
+:20142000284BEAEA08C95FD0FE6848C9FFD0FE28C042D0FEE000D0FEA042A2035BCACACA3B
+:20144000D0FEA90048A9A4285BEAEA08C9A4D0FE6848C930D0FE28A9FF48A94F285BEAEA08
+:2014600008C94FD0FE6848C9FFD0FE28C042D0FEE000D0FEA042A2036BCACACAD0FEA900CB
+:2014800048A994286BEAEA08C994D0FE6848C930D0FE28A9FF48A93F286BEAEA08C93FD06F
+:2014A000FE6848C9FFD0FE28C042D0FEE000D0FEA042A2037BCACACAD0FEA90048A98428CE
+:2014C0007BEAEA08C984D0FE6848C930D0FE28A9FF48A92F287BEAEA08C92FD0FE6848C975
+:2014E000FFD0FE28C042D0FEE000D0FEA042A2038BCACACAD0FEA90048A974288BEAEA089E
+:20150000C974D0FE6848C930D0FE28A9FF48A91F288BEAEA08C91FD0FE6848C9FFD0FE28B6
+:20152000C042D0FEE000D0FEA042A2039BCACACAD0FEA90048A964289BEAEA08C964D0FE47
+:201540006848C930D0FE28A9FF48A90F289BEAEA08C90FD0FE6848C9FFD0FE28C042D0FEC1
+:20156000E000D0FEA042A203ABCACACAD0FEA90048A95428ABEAEA08C954D0FE6848C9302E
+:20158000D0FE28A9FF48A9FF28ABEAEA08C9FFD0FE6848C9FFD0FE28C042D0FEE000D0FE8C
+:2015A000A042A203BBCACACAD0FEA90048A94428BBEAEA08C944D0FE6848C930D0FE28A9FD
+:2015C000FF48A9EF28BBEAEA08C9EFD0FE6848C9FFD0FE28C042D0FEE000D0FEA042A20374
+:2015E000EBCACACAD0FEA90048A91428EBEAEA08C914D0FE6848C930D0FE28A9FF48A9BF95
+:2016000028EBEAEA08C9BFD0FE6848C9FFD0FE28C042D0FEE000D0FEA042A203FBCACACAB9
+:20162000D0FEA90048A90428FBEAEA08C904D0FE6848C930D0FE28A9FF48A9AF28FBEAEAC6
+:2016400008C9AFD0FE6848C9FFD0FE28C042D0FEE000D0FEAD0202C908D0FEA9098D0202BD
+:20166000A203BD8B269DFD02CA10F7A9288D0002A9004828A949A24EA0446CFD02EAD0FE88
+:2016800088880888888828F0FE10FE90FE50FEC9E3D0FEE04FD0FEC03ED0FEBAE0FFD0FEF0
+:2016A000AD0202C909D0FEA90A8D0202A20BBDC7269DF902CA10F7A9278D0002A90048285D
+:2016C000A958A204A0497CF902EAD0FE88880888888828F0FE10FE90FE50FEC9F2D0FEE032
+:2016E00006D0FEC043D0FEBAE0FFD0FEA9088D0003A9178D0103A9058D0002A9178D0102BF
+:20170000A2FF7C01024C0517AD0202C90AD0FEA90B8D0202A90048A942A252A04B2800883F
+:2017200008888888C9E8D0FEE053D0FEC045D0FE68C930D0FEBAE0FFD0FEA9FF48A9BDA228
+:20174000ADA0B428008808888888C917D0FEE0AED0FEC0AED0FE68C9FFD0FEBAE0FFD0FE8D
+:20176000AD0202C90BD0FEA90C8D0202A2ACA0DCA9FF48A9FE281A4808C9FFD0FE6848C9CE
+:20178000FDD0FE28681A4808C900D0FE6848C97FD0FE28681A4808C901D0FE6848C97DD0CF
+:2017A000FE28683A4808C900D0FE6848C97FD0FE28683A4808C9FFD0FE6848C9FDD0FE2898
+:2017C000683AA90048A9FE281A4808C9FFD0FE6848C9B0D0FE28681A4808C900D0FE68486F
+:2017E000C932D0FE28681A4808C901D0FE6848C930D0FE28683A4808C900D0FE6848C932BB
+:20180000D0FE28683A4808C9FFD0FE6848C9B0D0FE2868E0ACD0FEC0DCD0FEBAE0FFD0FE98
+:20182000AD0202C90CD0FEA90D8D0202A299A066A9004828B2240849C32892300849C3C902
+:20184000C3D0FE684930CD1502D0FEA9004828B2260849C32892320849C3C982D0FE684995
+:2018600030CD1602D0FEA9004828B2280849C32892340849C3C941D0FE684930CD1702D00D
+:20188000FEA9004828B22A0849C32892360849C3C900D0FE684930CD1802D0FEE099D0FEC9
+:2018A000C066D0FEA003A200B9050249C3D91002D0FE8A9905028810EFA299A066A9FF4888
+:2018C00028B2240849C32892300849C3C9C3D0FE68497DCD1502D0FEA9FF4828B22608497D
+:2018E000C32892320849C3C982D0FE68497DCD1602D0FEA9FF4828B2280849C3289234082F
+:2019000049C3C941D0FE68497DCD1702D0FEA9FF4828B22A0849C32892360849C3C900D05C
+:20192000FE68497DCD1802D0FEE099D0FEC066D0FEA003A200B9050249C3D91002D0FE8A37
+:201940009905028810EFBAE0FFD0FEAD0202C90DD0FEA90E8D0202A07BA204A907950C0A40
+:20196000CA10FAA204A9FF48A95528640C640D640E640F641008C955D0FE6848C9FFD0FE63
+:2019800028B50CD0FECA10F9A204A907950C0ACA10FAA204A90048A9AA28640C640D640E83
+:2019A000640F641008C9AAD0FE6848C930D0FE28B50CD0FECA10F9A204A9079D05020ACA28
+:2019C00010F9A204A9FF48A955289C05029C06029C07029C08029C090208C955D0FE684865
+:2019E000C9FFD0FE28BD0502D0FECA10F8A204A9079D05020ACA10F9A204A90048A9AA28DC
+:201A00009C05029C06029C07029C08029C090208C9AAD0FE6848C930D0FE28BD0502D0FE13
+:201A2000CA10F8A204A907950C0ACA10FAA204A9FF48A95528740C08C955D0FE6848C9FF57
+:201A4000D0FE28CA10E9A204B50CD0FECA10F9A204A907950C0ACA10FAA204A90048A9AA06
+:201A600028740C08C9AAD0FE6848C930D0FE28CA10E9A204B50CD0FECA10F9A204A9079D18
+:201A800005020ACA10F9A204A9FF48A955289E050208C955D0FE6848C9FFD0FE28CA10E8DD
+:201AA000A204BD0502D0FECA10F8A204A9079D05020ACA10F9A204A90048A9AA289E05028E
+:201AC00008C9AAD0FE6848C930D0FE28CA10E8A204BD0502D0FECA10F8C07BD0FEBAE0FFB0
+:201AE000D0FEAD0202C90ED0FEA90F8D0202A042A203A90048A9FF28341308C9FFD0FE68E4
+:201B000048C932D0FE28CAA90048A90128341308C901D0FE6848C970D0FE28CAA90048A9D5
+:201B20000128341308C901D0FE6848C9B2D0FE28CAA90048A90128341308C901D0FE684850
+:201B4000C9F0D0FE28A9FF48A90128341308C901D0FE6848C9FDD0FE28E8A9FF48A9012817
+:201B6000341308C901D0FE6848C9BFD0FE28E8A9FF48A90128341308C901D0FE6848C97DC9
+:201B8000D0FE28E8A9FF48A9FF28341308C9FFD0FE6848C93FD0FE28A90048A9FF283C1007
+:201BA0000208C9FFD0FE6848C932D0FE28CAA90048A901283C100208C901D0FE6848C97080
+:201BC000D0FE28CAA90048A901283C100208C901D0FE6848C9B2D0FE28CAA90048A90128E6
+:201BE0003C100208C901D0FE6848C9F0D0FE28A9FF48A901283C100208C901D0FE6848C96F
+:201C0000FDD0FE28E8A9FF48A901283C100208C901D0FE6848C9BFD0FE28E8A9FF48A90189
+:201C2000283C100208C901D0FE6848C97DD0FE28E8A9FF48A9FF283C100208C9FFD0FE68A6
+:201C400048C93FD0FE28A90048A9FF28890008C9FFD0FE6848C932D0FE28CAA90048A90150
+:201C600028894108C901D0FE6848C930D0FE28CAA90048A90128898208C901D0FE6848C982
+:201C800032D0FE28CAA90048A9012889C308C901D0FE6848C930D0FE28A9FF48A9012889B9
+:201CA000C308C901D0FE6848C9FDD0FE28E8A9FF48A90128898208C901D0FE6848C9FFD0B8
+:201CC000FE28E8A9FF48A90128894108C901D0FE6848C9FDD0FE28E8A9FF48A9FF2889002D
+:201CE00008C9FFD0FE6848C9FFD0FE28E003D0FEC042D0FEBAE0FFD0FEAD0202C90FD0FE99
+:201D0000A9108D0202A2C0A000640D98250D08682902850E9849FF050D49FF850F98050D96
+:201D20008510840CA9FF48A50D28140C08C50DD0FE68480902C9FFD0FE682902C50ED0FE67
+:201D4000A50FC50CD0FE8C0502A9FF48A50D281C050208C50DD0FE68480902C9FFD0FE684F
+:201D60002902C50ED0FEA50FC50CD0FE840CA90048A50D28140C08C50DD0FE68480902C99D
+:201D800032D0FE682902C50ED0FEA50FC50CD0FE8C0502A90048A50D281C050208C50DD091
+:201DA000FE68480902C932D0FE682902C50ED0FEA50FC50CD0FE840CA9FF48A50D28040CB0
+:201DC00008C50DD0FE68480902C9FFD0FE682902C50ED0FEA510C50CD0FE8C0502A9FF48FF
+:201DE000A50D280C050208C50DD0FE68480902C9FFD0FE682902C50ED0FEA510C50CD0FE75
+:201E0000840CA90048A50D28040C08C50DD0FE68480902C932D0FE682902C50ED0FEA51042
+:201E2000C50CD0FE8C0502A90048A50D280C050208C50DD0FE68480902C932D0FE682902D3
+:201E4000C50ED0FEA510C50CD0FEC8D004E60DF0034C0B1DE0C0D0FEBAE0FFD0FEAD020211
+:201E6000C910D0FEA9118D0202A2BAA0D0A9FF850CA90048A9A528070C08C9A5D0FE6848FD
+:201E8000C930D0FE28A50CC9FED0FEA901850CA9FF48A95A28070C08C95AD0FE6848C9FF33
+:201EA000D0FE28A50CD0FEA9FF850CA90048A9A528170C08C9A5D0FE6848C930D0FE28A562
+:201EC0000CC9FDD0FEA902850CA9FF48A95A28170C08C95AD0FE6848C9FFD0FE28A50CD000
+:201EE000FEA9FF850CA90048A9A528270C08C9A5D0FE6848C930D0FE28A50CC9FBD0FEA942
+:201F000004850CA9FF48A95A28270C08C95AD0FE6848C9FFD0FE28A50CD0FEA9FF850CA916
+:201F20000048A9A528370C08C9A5D0FE6848C930D0FE28A50CC9F7D0FEA908850CA9FF484C
+:201F4000A95A28370C08C95AD0FE6848C9FFD0FE28A50CD0FEA9FF850CA90048A9A5284746
+:201F60000C08C9A5D0FE6848C930D0FE28A50CC9EFD0FEA910850CA9FF48A95A28470C087B
+:201F8000C95AD0FE6848C9FFD0FE28A50CD0FEA9FF850CA90048A9A528570C08C9A5D0FE1C
+:201FA0006848C930D0FE28A50CC9DFD0FEA920850CA9FF48A95A28570C08C95AD0FE6848DA
+:201FC000C9FFD0FE28A50CD0FEA9FF850CA90048A9A528670C08C9A5D0FE6848C930D0FEF6
+:201FE00028A50CC9BFD0FEA940850CA9FF48A95A28670C08C95AD0FE6848C9FFD0FE28A59E
+:202000000CD0FEA9FF850CA90048A9A528770C08C9A5D0FE6848C930D0FE28A50CC97FD017
+:20202000FEA980850CA9FF48A95A28770C08C95AD0FE6848C9FFD0FE28A50CD0FEA9FE8538
+:202040000CA90048A9A528870C08C9A5D0FE6848C930D0FE28A50CC9FFD0FEA900850CA96D
+:20206000FF48A95A28870C08C95AD0FE6848C9FFD0FE28A50CC901D0FEA9FD850CA9004883
+:20208000A9A528970C08C9A5D0FE6848C930D0FE28A50CC9FFD0FEA900850CA9FF48A95AD0
+:2020A00028970C08C95AD0FE6848C9FFD0FE28A50CC902D0FEA9FB850CA90048A9A528A761
+:2020C0000C08C9A5D0FE6848C930D0FE28A50CC9FFD0FEA900850CA9FF48A95A28A70C08BA
+:2020E000C95AD0FE6848C9FFD0FE28A50CC904D0FEA9F7850CA90048A9A528B70C08C9A564
+:20210000D0FE6848C930D0FE28A50CC9FFD0FEA900850CA9FF48A95A28B70C08C95AD0FEFA
+:202120006848C9FFD0FE28A50CC908D0FEA9EF850CA90048A9A528C70C08C9A5D0FE68488A
+:20214000C930D0FE28A50CC9FFD0FEA900850CA9FF48A95A28C70C08C95AD0FE6848C9FFB0
+:20216000D0FE28A50CC910D0FEA9DF850CA90048A9A528D70C08C9A5D0FE6848C930D0FEF3
+:2021800028A50CC9FFD0FEA900850CA9FF48A95A28D70C08C95AD0FE6848C9FFD0FE28A58C
+:2021A0000CC920D0FEA9BF850CA90048A9A528E70C08C9A5D0FE6848C930D0FE28A50CC9AC
+:2021C000FFD0FEA900850CA9FF48A95A28E70C08C95AD0FE6848C9FFD0FE28A50CC940D0F9
+:2021E000FEA97F850CA90048A9A528F70C08C9A5D0FE6848C930D0FE28A50CC9FFD0FEA9EB
+:2022000000850CA9FF48A95A28F70C08C95AD0FE6848C9FFD0FE28A50CC980D0FEE0BAD076
+:20222000FEC0D0D0FEBAE0FFD0FEAD0202C911D0FEA9128D0202A2DEA0ADA90048A9802827
+:20224000D22C08C980D0FE6848C931D0FE28A90048A97F28D22C08C97FD0FE6848C933D0E8
+:20226000FE28A90048A97E28D22C08C97ED0FE6848C9B0D0FE28A9FF48A98028D22C08C9AE
+:2022800080D0FE6848C97DD0FE28A9FF48A97F28D22C08C97FD0FE6848C97FD0FE28A9FF12
+:2022A00048A97E28D22C08C97ED0FE6848C9FCD0FE28E0DED0FEC0ADD0FEBAE0FFD0FEAD26
+:2022C0000202C912D0FEA9138D0202A242A000A53A850CA53B850DA90048B9530228320C39
+:2022E00008D95B02D0FE684930D95F02D0FEE60CC8C004D0E288C60CA9FF48B95302283207
+:202300000C08D95B02D0FE68497DD95F02D0FEC60C8810E4A000A542850CA543850DA900E6
+:2023200048B9570228520C08D95B02D0FE684930D95F02D0FEE60CC8C004D0E288C60CA995
+:20234000FF48B9570228520C08D95B02D0FE68497DD95F02D0FEC60C8810E4A000A54A85FA
+:202360000CA54B850DA90048B94F0228120C08D95B02D0FE684930D95F02D0FEE60CC8C01F
+:2023800004D0E288C60CA9FF48B94F0228120C08D95B02D0FE68497DD95F02D0FEC60C8851
+:2023A00010E4E042D0FEBAE0FFD0FEAD0202C913D0FEA9148D020258D8A20EA0FFA900857C
+:2023C0000C850D850E8D0502850F8510A9FF85128D0602A902851118204E26E60CE60F085F
+:2023E0000868298228D002E6100510851138204E26C60CE60DD0E0A9008510EE0502E60EBF
+:20240000086829828511C612CE0602A50E850FD0C6E00ED0FEC0FFD0FEBAE0FFD0FEAD0221
+:2024200002C914D0FEA9158D0202F8A20EA0FFA999850D850E8D0502850FA901850C8510FA
+:20244000A9818511A90085128D06023820F724C60CA50FD008C610A999850FD012290FD080
+:202460000CC60FC60FC60FC60FC60FC60FC60F08682982051085111820F724E60CA50DF0D0
+:2024800015290FD00CC60DC60DC60DC60DC60DC60DC60D4C4B24A999850DA50EF039290FAB
+:2024A000D018C60EC60EC60EC60EC60EC60EE612E612E612E612E612E612C60EE612A512E9
+:2024C0008D0602A50E8D0502850F0868298209018511E6104C4B24E00ED0FEC0FFD0FEBA1D
+:2024E000E0FFD0FED8AD0202C915D0FEA9F08D02024CF1244C000408A50D650E08C50FD046
+:20250000FE682983C511D0FE2808A50DE51208C50FD0FE682983C511D0FE2808A50D6D0576
+:202520000208C50FD0FE682983C511D0FE2808A50DED060208C50FD0FE682983C511D0FEFE
+:202540002808A50E8D0B02A50D200A0208C50FD0FE682983C511D0FE2808A5128D0E02A595
+:202560000D200D0208C50FD0FE682983C511D0FE2808A50D750008C50FD0FE682983C511D2
+:20258000D0FE2808A50DF50408C50FD0FE682983C511D0FE2808A50D7DF70108C50FD0FE2F
+:2025A000682983C511D0FE2808A50DFDF80108C50FD0FE682983C511D0FE2808A50D7906C8
+:2025C0000108C50FD0FE682983C511D0FE2808A50DF9070108C50FD0FE682983C511D0FE53
+:2025E0002808A50D614408C50FD0FE682983C511D0FE2808A50DE14608C50FD0FE6829832B
+:20260000C511D0FE2808A50D715608C50FD0FE682983C511D0FE2808A50DF15808C50FD034
+:20262000FE682983C511D0FE2808A50D725208C50FD0FE682983C511D0FE2808A50DF254B4
+:2026400008C50FD0FE682983C511D0FE2860A511298348A50D450E300AA50D450F10046825
+:2026600009404868851108A50D725208C50FD0FE6829C3C511D0FE2808A50DF25408C50FA7
+:20268000D0FE6829C3C511D0FE28609126821688880888888828B0FE70FE30FEF0FEC9497B
+:2026A000D0FEE04ED0FEC041D0FE488A48BAE0FDD0FE68AAA9FF482868E849AA6CFF02EA3E
+:2026C000EA4CC1264C00040E270E27D526CE160E270E2788880888888828B0FE70FE30FEB8
+:2026E000F0FEC958D0FEE004D0FEC046D0FE488A48BAE0FDD0FE68AAA9FF482868E8E8494D
+:20270000AA7CF902EAEA4C06274C0004EAEAEAEA4C10274C00044C16274C00044C1C274CCC
+:202720000004888808888888C9BDF042C942D0FEE052D0FEC048D0FE850A860BBABD0201E4
+:20274000C930D0FE68C934D0FEBAE0FCD0FEADFF01C917D0FEADFE01C920D0FEA9FF48A6C7
+:202760000BE8A50A49AA28404C68274C0004E0ADD0FEC0B1D0FE850A860BBABD0201C9FF35
+:20278000D0FE68C9F7D0FEBAE0FCD0FEADFF01C917D0FEADFE01C946D0FEA90448A60BE89F
+:2027A000A50A49AA28404CA6274C00040000000000000000000000000000000000000000A6
+:2027C000000000000000000000000000EAEAEAEA4CD027000000000000000000000000000E
+:2027E0000000000000000000000000000000000000000000000000000000000000000000D9
+:202800000000000000000000000000000000000000000000000000000000000000000000B8
+:20282000000000000000000000000000000000000000000000000000000000000000000098
+:20284000000000000000000000000000000000000000000000000000000000000000000078
+:20286000000000000000000000000000000000000000000000000000000000000000000058
+:07288000EAEAEAEA4C8428B1
+:06FFFA0016271C27242736
+:00040001FB
diff --git a/tests/65C02_extended_opcodes_test.lst b/tests/65C02_extended_opcodes_test.lst
new file mode 100644
index 0000000..38f758c
--- /dev/null
+++ b/tests/65C02_extended_opcodes_test.lst
@@ -0,0 +1,11504 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+------------------------------------------------ 65C02_extended_opcodes_test.a65c ------------------------------------------------
+
+2882 lines read, no errors in pass 1.
+ ;
+ ; 6 5 C 0 2 E X T E N D E D O P C O D E S T E S T
+ ;
+ ; Copyright (C) 2013-2017 Klaus Dormann
+ ;
+ ; This program is free software: you can redistribute it and/or modify
+ ; it under the terms of the GNU General Public License as published by
+ ; the Free Software Foundation, either version 3 of the License, or
+ ; (at your option) any later version.
+ ;
+ ; This program is distributed in the hope that it will be useful,
+ ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ ; GNU General Public License for more details.
+ ;
+ ; You should have received a copy of the GNU General Public License
+ ; along with this program. If not, see .
+
+
+ ; This program is designed to test all additional 65C02 opcodes, addressing
+ ; modes and functionality not available in the NMOS version of the 6502.
+ ; The 6502_functional_test is a prerequisite to this test.
+ ; NMI, IRQ, STP & WAI are covered in the 6502_interrupt_test.
+ ;
+ ; version 04-dec-2017
+ ; contact info at http://2m5.de or email K@2m5.de
+ ;
+ ; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
+ ; command line switches: -l -m -s2 -w -x -h0
+ ; | | | | | no page headers in listing
+ ; | | | | 65C02 extensions
+ ; | | | wide listing (133 char/col)
+ ; | | write intel hex file instead of binary
+ ; | expand macros in listing
+ ; generate pass2 listing
+ ;
+ ; No IO - should be run from a monitor with access to registers.
+ ; To run load intel hex image with a load command, than alter PC to 400 hex
+ ; (code_segment) and enter a go command.
+ ; Loop on program counter determines error or successful completion of test.
+ ; Check listing for relevant traps (jump/branch *).
+ ; Please note that in early tests some instructions will have to be used before
+ ; they are actually tested!
+ ;
+ ; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
+ ; Tests documented behavior of the original 65C02 only!
+ ; Decimal ops will only be tested with valid BCD operands and the V flag will
+ ; be ignored as it is absolutely useless in decimal mode.
+ ;
+ ; Debugging hints:
+ ; Most of the code is written sequentially. if you hit a trap, check the
+ ; immediately preceeding code for the instruction to be tested. Results are
+ ; tested first, flags are checked second by pushing them onto the stack and
+ ; pulling them to the accumulator after the result was checked. The "real"
+ ; flags are no longer valid for the tested instruction at this time!
+ ; If the tested instruction was indexed, the relevant index (X or Y) must
+ ; also be checked. Opposed to the flags, X and Y registers are still valid.
+ ;
+ ; versions:
+ ; 19-jul-2013 1st version distributed for testing
+ ; 23-jul-2013 fixed BRA out of range due to larger trap macros
+ ; added RAM integrity check
+ ; 16-aug-2013 added error report to standard output option
+ ; 23-aug-2015 change revoked
+ ; 24-aug-2015 all self modifying immediate opcodes now execute in data RAM
+ ; 28-aug-2015 fixed decimal adc/sbc immediate only testing carry
+ ; 09-feb-2017 fixed RMB/SMB tested when they shouldn't be tested
+ ; 04-dec-2017 fixed BRK not tested for actually going through the IRQ vector
+ ; added option to skip the remainder of a failing test
+ ; in report.i65
+ ; added skip override to undefined opcode as NOP test
+
+
+ ; C O N F I G U R A T I O N
+
+ ;ROM_vectors writable (0=no, 1=yes)
+ ;if ROM vectors can not be used interrupts will not be trapped
+ ;as a consequence BRK can not be tested but will be emulated to test RTI
+0001 = ROM_vectors = 1
+
+ ;load_data_direct (0=move from code segment, 1=load directly)
+ ;loading directly is preferred but may not be supported by your platform
+ ;0 produces only consecutive object code, 1 is not suitable for a binary image
+0001 = load_data_direct = 1
+
+ ;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
+ ;change) 2 requires extra code and is not recommended.
+0003 = I_flag = 3
+
+ ;configure memory - try to stay away from memory used by the system
+ ;zero_page memory start address, $4e (78) consecutive Bytes required
+ ; add 2 if I_flag = 2
+000a = zero_page = $a
+
+ ;data_segment memory start address, $63 (99) consecutive Bytes required
+ ; + 12 Bytes at data_segment + $f9 (JMP indirect page cross test)
+0200 = data_segment = $200
+ if (data_segment & $ff) != 0
+ ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
+ endif
+
+ ;code_segment memory start address, 10kB of consecutive space required
+ ; add 1 kB if I_flag = 2
+0400 = code_segment = $400
+
+ ;added WDC only opcodes WAI & STP (0=test as NOPs, >0=no test)
+0001 = wdc_op = 1
+
+ ;added Rockwell & WDC opcodes BBR, BBS, RMB & SMB
+ ;(0=test as NOPs, 1=full test, >1=no test)
+0001 = rkwl_wdc_op = 1
+
+ ;skip testing all undefined opcodes override
+ ;0=test as NOP, >0=skip
+0000 = skip_nop = 0
+
+ ;report errors through I/O channel (0=use standard self trap loops, 1=include
+ ;report.i65 as I/O channel, add 3 kB)
+0000 = report = 0
+
+ ;RAM integrity test option. Checks for undesired RAM writes.
+ ;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
+ ;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
+ffff = ram_top = -1
+
+ noopt ;do not take shortcuts
+
+ ;macros for error & success traps to allow user modification
+ ;example:
+ ;trap macro
+ ; jsr my_error_handler
+ ; endm
+ ;trap_eq macro
+ ; bne skip\?
+ ; trap ;failed equal (zero)
+ ;skip\?
+ ; endm
+ ;
+ ; my_error_handler should pop the calling address from the stack and report it.
+ ; putting larger portions of code (more than 3 bytes) inside the trap macro
+ ; may lead to branch range problems for some tests.
+ if report = 0
+ trap macro
+ jmp * ;failed anyway
+ endm
+ trap_eq macro
+ beq * ;failed equal (zero)
+ endm
+ trap_ne macro
+ bne * ;failed not equal (non zero)
+ endm
+ trap_cs macro
+ bcs * ;failed carry set
+ endm
+ trap_cc macro
+ bcc * ;failed carry clear
+ endm
+ trap_mi macro
+ bmi * ;failed minus (bit 7 set)
+ endm
+ trap_pl macro
+ bpl * ;failed plus (bit 7 clear)
+ endm
+ trap_vs macro
+ bvs * ;failed overflow set
+ endm
+ trap_vc macro
+ bvc * ;failed overflow clear
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jmp * ;test passed, no errors
+ endm
+ endif
+ if report = 1
+ trap macro
+ jsr report_error
+ endm
+ trap_eq macro
+ bne skip\?
+ trap ;failed equal (zero)
+ skip\?
+ endm
+ trap_ne macro
+ beq skip\?
+ trap ;failed not equal (non zero)
+ skip\?
+ endm
+ trap_cs macro
+ bcc skip\?
+ trap ;failed carry set
+ skip\?
+ endm
+ trap_cc macro
+ bcs skip\?
+ trap ;failed carry clear
+ skip\?
+ endm
+ trap_mi macro
+ bpl skip\?
+ trap ;failed minus (bit 7 set)
+ skip\?
+ endm
+ trap_pl macro
+ bmi skip\?
+ trap ;failed plus (bit 7 clear)
+ skip\?
+ endm
+ trap_vs macro
+ bvc skip\?
+ trap ;failed overflow set
+ skip\?
+ endm
+ trap_vc macro
+ bvs skip\?
+ trap ;failed overflow clear
+ skip\?
+ endm
+ ; please observe that during the test the stack gets invalidated
+ ; therefore a RTS inside the success macro is not possible
+ success macro
+ jsr report_success
+ endm
+ endif
+
+
+0001 = carry equ %00000001 ;flag bits in status
+0002 = zero equ %00000010
+0004 = intdis equ %00000100
+0008 = decmode equ %00001000
+0010 = break equ %00010000
+0020 = reserv equ %00100000
+0040 = overfl equ %01000000
+0080 = minus equ %10000000
+
+0001 = fc equ carry
+0002 = fz equ zero
+0003 = fzc equ carry+zero
+0040 = fv equ overfl
+0042 = fvz equ overfl+zero
+0080 = fn equ minus
+0081 = fnc equ minus+carry
+0082 = fnz equ minus+zero
+0083 = fnzc equ minus+zero+carry
+00c0 = fnv equ minus+overfl
+
+0030 = fao equ break+reserv ;bits always on after PHP, BRK
+0034 = fai equ fao+intdis ;+ forced interrupt disable
+00ff = m8 equ $ff ;8 bit mask
+00fb = m8i equ $ff&~intdis ;8 bit mask - interrupt disable
+
+ ;macros to allow masking of status bits.
+ ;masking of interrupt enable/disable on load and compare
+ ;masking of always on bits after PHP or BRK (unused & break) on compare
+ if I_flag = 0
+ load_flag macro
+ lda #\1&m8i ;force enable interrupts (mask I)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8i ;I_flag is always enabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 1
+ load_flag macro
+ lda #\1|intdis ;force disable interrupts
+ endm
+ cmp_flag macro
+ cmp #(\1|fai)&m8 ;I_flag is always disabled + always on bits
+ endm
+ eor_flag macro
+ eor #(\1|fai) ;invert expected flags + always on bits + I
+ endm
+ endif
+ if I_flag = 2
+ load_flag macro
+ lda #\1
+ ora flag_I_on ;restore I-flag
+ and flag_I_off
+ endm
+ cmp_flag macro
+ eor flag_I_on ;I_flag is never changed
+ cmp #(\1|fao)&m8i ;expected flags + always on bits, mask I
+ endm
+ eor_flag macro
+ eor flag_I_on ;I_flag is never changed
+ eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
+ endm
+ endif
+ if I_flag = 3
+ load_flag macro
+ lda #\1 ;allow test to change I-flag (no mask)
+ endm
+ cmp_flag macro
+ cmp #(\1|fao)&m8 ;expected flags + always on bits
+ endm
+ eor_flag macro
+ eor #\1|fao ;invert expected flags + always on bits
+ endm
+ endif
+
+ ;macros to set (register|memory|zeropage) & status
+ set_stat macro ;setting flags in the processor status register
+ load_flag \1
+ pha ;use stack to load status
+ plp
+ endm
+
+ set_a macro ;precharging accu & status
+ load_flag \2
+ pha ;use stack to load status
+ lda #\1 ;precharge accu
+ plp
+ endm
+
+ set_x macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldx #\1 ;precharge index x
+ plp
+ endm
+
+ set_y macro ;precharging index & status
+ load_flag \2
+ pha ;use stack to load status
+ ldy #\1 ;precharge index y
+ plp
+ endm
+
+ set_ax macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;precharge accu
+ plp
+ endm
+
+ set_ay macro ;precharging indexed accu & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,y ;precharge accu
+ plp
+ endm
+
+ set_z macro ;precharging indexed zp & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to zeropage
+ sta zpt
+ plp
+ endm
+
+ set_zx macro ;precharging zp,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed zeropage
+ sta zpt,x
+ plp
+ endm
+
+ set_abs macro ;precharging indexed memory & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to memory
+ sta abst
+ plp
+ endm
+
+ set_absx macro ;precharging abs,x & immediate status
+ load_flag \2
+ pha ;use stack to load status
+ lda \1,x ;load to indexed memory
+ sta abst,x
+ plp
+ endm
+
+ ;macros to test (register|memory|zeropage) & status & (mask)
+ tst_stat macro ;testing flags in the processor status register
+ php ;save status
+ pla ;use stack to retrieve status
+ pha
+ cmp_flag \1
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_a macro ;testing result in accu & flags
+ php ;save flags
+ cmp #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_as macro ;testing result in accu & flags, save accu
+ pha
+ php ;save flags
+ cmp #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ pla
+ endm
+
+ tst_x macro ;testing result in x index & flags
+ php ;save flags
+ cpx #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_y macro ;testing result in y index & flags
+ php ;save flags
+ cpy #\1 ;test result
+ trap_ne
+ pla ;load status
+ pha
+ cmp_flag \2
+ trap_ne
+ plp ;restore status
+ endm
+
+ tst_ax macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne ;
+ endm
+
+ tst_ay macro ;indexed testing result in accu & flags
+ php ;save flags
+ cmp \1,y ;test result
+ trap_ne ;
+ pla ;load status
+ eor_flag \3
+ cmp \2,y ;test flags
+ trap_ne
+ endm
+
+ tst_z macro ;indexed testing result in zp & flags
+ php ;save flags
+ lda zpt
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_zx macro ;testing result in zp,x & flags
+ php ;save flags
+ lda zpt,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_abs macro ;indexed testing result in memory & flags
+ php ;save flags
+ lda abst
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ tst_absx macro ;testing result in abs,x & flags
+ php ;save flags
+ lda abst,x
+ cmp \1,x ;test result
+ trap_ne
+ pla ;load status
+ eor_flag \3
+ cmp \2,x ;test flags
+ trap_ne
+ endm
+
+ ; RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ ; uses zpt word as indirect pointer, zpt+2 word as checksum
+ if ram_top > -1
+ check_ram macro
+ cld
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta zpt+3 ;checksum high byte
+ ldx #11 ;reset modifiable RAM
+ ccs1\? sta jxi_tab,x ;JMP indirect page cross area
+ dex
+ bpl ccs1\?
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ ccs3\? adc zero_page,x
+ bcc ccs2\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs2\? inx
+ bne ccs3\?
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ ccs5\? adc (zpt),y
+ bcc ccs4\?
+ inc zpt+3 ;carry to high byte
+ clc
+ ccs4\? iny
+ bne ccs5\?
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne ccs5\?
+ sta zpt+2 ;checksum low is
+ cmp ram_chksm ;checksum low expected
+ trap_ne ;checksum mismatch
+ lda zpt+3 ;checksum high is
+ cmp ram_chksm+1 ;checksum high expected
+ trap_ne ;checksum mismatch
+ endm
+ else
+ check_ram macro
+ ;RAM check disabled - RAM size not set
+ endm
+ endif
+
+ next_test macro ;make sure, tests don't jump the fence
+ lda test_case ;previous test
+ cmp #test_num
+ trap_ne ;test is out of sequence
+ test_num = test_num + 1
+ lda #test_num ;*** next tests' number
+ sta test_case
+ ;check_ram ;uncomment to find altered RAM after each test
+ endm
+
+ if load_data_direct = 1
+ data
+ else
+ bss ;uninitialized segment, copy of data at end of code!
+ endif
+000a = org zero_page
+ ;break test interrupt save
+000a : 00 irq_a ds 1 ;a register
+000b : 00 irq_x ds 1 ;x register
+ if I_flag = 2
+ ;masking for I bit in status
+ flag_I_on ds 1 ;or mask to load flags
+ flag_I_off ds 1 ;and mask to load flags
+ endif
+000c : zpt ;5 bytes store/modify test area
+ ;add/subtract operand generation and result/flag prediction
+000c : 00 adfc ds 1 ;carry flag before op
+000d : 00 ad1 ds 1 ;operand 1 - accumulator
+000e : 00 ad2 ds 1 ;operand 2 - memory / immediate
+000f : 00 adrl ds 1 ;expected result bits 0-7
+0010 : 00 adrh ds 1 ;expected result bit 8 (carry)
+0011 : 00 adrf ds 1 ;expected flags NV0000ZC (-V in decimal mode)
+0012 : 00 sb2 ds 1 ;operand 2 complemented for subtract
+0013 : zp_bss
+0013 : c3824100 zp1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+0017 : 7f zp7f db $7f ;test pattern for compare
+ ;logical zeropage operands
+0018 : 001f7180 zpOR db 0,$1f,$71,$80 ;test pattern for OR
+001c : 0fff7f80 zpAN db $0f,$ff,$7f,$80 ;test pattern for AND
+0020 : ff0f8f8f zpEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+0024 : 1002 ind1 dw abs1 ;indirect pointer to pattern in absolute memory
+0026 : 1102 dw abs1+1
+0028 : 1202 dw abs1+2
+002a : 1302 dw abs1+3
+002c : 1402 dw abs7f
+002e : 1801 inw1 dw abs1-$f8 ;indirect pointer for wrap-test pattern
+0030 : 0502 indt dw abst ;indirect pointer to store area in absolute memory
+0032 : 0602 dw abst+1
+0034 : 0702 dw abst+2
+0036 : 0802 dw abst+3
+0038 : 0d01 inwt dw abst-$f8 ;indirect pointer for wrap-test store
+003a : 4702 indAN dw absAN ;indirect pointer to AND pattern in absolute memory
+003c : 4802 dw absAN+1
+003e : 4902 dw absAN+2
+0040 : 4a02 dw absAN+3
+0042 : 4b02 indEO dw absEO ;indirect pointer to EOR pattern in absolute memory
+0044 : 4c02 dw absEO+1
+0046 : 4d02 dw absEO+2
+0048 : 4e02 dw absEO+3
+004a : 4302 indOR dw absOR ;indirect pointer to OR pattern in absolute memory
+004c : 4402 dw absOR+1
+004e : 4502 dw absOR+2
+0050 : 4602 dw absOR+3
+ ;add/subtract indirect pointers
+0052 : 0502 adi2 dw ada2 ;indirect pointer to operand 2 in absolute memory
+0054 : 0602 sbi2 dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+0056 : 0601 adiy2 dw ada2-$ff ;with offset for indirect indexed
+0058 : 0701 sbiy2 dw sba2-$ff
+005a : zp_bss_end
+
+0200 = org data_segment
+0200 : 0000 pg_x ds 2 ;high JMP indirect address for page cross bug
+0202 : 00 test_case ds 1 ;current test number
+0203 : 0000 ram_chksm ds 2 ;checksum for RAM integrity test
+ ;add/subtract operand copy - abs tests write area
+0205 : abst ;5 bytes store/modify test area
+0205 : 00 ada2 ds 1 ;operand 2
+0206 : 00 sba2 ds 1 ;operand 2 complemented for subtract
+0207 : 000000 ds 3 ;fill remaining bytes
+020a : data_bss
+ if load_data_direct = 1
+020a : 6900 ex_adci adc #0 ;execute immediate opcodes
+020c : 60 rts
+020d : e900 ex_sbci sbc #0 ;execute immediate opcodes
+020f : 60 rts
+ else
+ ex_adci ds 3
+ ex_sbci ds 3
+ endif
+0210 : c3824100 abs1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+0214 : 7f abs7f db $7f ;test pattern for compare
+ ;loads
+0215 : 80800002 fLDx db fn,fn,0,fz ;expected flags for load
+ ;shifts
+0219 : rASL ;expected result ASL & ROL -carry
+0219 : 86048200 rROL db $86,$04,$82,0 ; "
+021d : 87058301 rROLc db $87,$05,$83,1 ;expected result ROL +carry
+0221 : rLSR ;expected result LSR & ROR -carry
+0221 : 61412000 rROR db $61,$41,$20,0 ; "
+0225 : e1c1a080 rRORc db $e1,$c1,$a0,$80 ;expected result ROR +carry
+0229 : fASL ;expected flags for shifts
+0229 : 81018002 fROL db fnc,fc,fn,fz ;no carry in
+022d : 81018000 fROLc db fnc,fc,fn,0 ;carry in
+0231 : fLSR
+0231 : 01000102 fROR db fc,0,fc,fz ;no carry in
+0235 : 81808180 fRORc db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+0239 : 7f80ff0001 rINC db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+023e : 0080800200 fINC db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+0243 : 001f7180 absOR db 0,$1f,$71,$80 ;test pattern for OR
+0247 : 0fff7f80 absAN db $0f,$ff,$7f,$80 ;test pattern for AND
+024b : ff0f8f8f absEO db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+024f : 00f11f00 absORa db 0,$f1,$1f,0 ;test pattern for OR
+0253 : f0ffffff absANa db $f0,$ff,$ff,$ff ;test pattern for AND
+0257 : fff0f00f absEOa db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+025b : 00ff7f80 absrlo db 0,$ff,$7f,$80
+025f : 02800080 absflo db fz,fn,0,fn
+0263 : data_bss_end
+ ;define area for page crossing JMP (abs) & JMP (abs,x) test
+02f9 = jxi_tab equ data_segment + $100 - 7 ;JMP (jxi_tab,x) x=6
+02fd = ji_tab equ data_segment + $100 - 3 ;JMP (ji_tab+2)
+0300 = jxp_tab equ data_segment + $100 ;JMP (jxp_tab-255) x=255
+
+
+ code
+0400 = org code_segment
+0400 : d8 start cld
+0401 : a2ff ldx #$ff
+0403 : 9a txs
+0404 : a900 lda #0 ;*** test 0 = initialize
+0406 : 8d0202 sta test_case
+0000 = test_num = 0
+
+ ;stop interrupts before initializing BSS
+ if I_flag = 1
+ sei
+ endif
+
+ ;initialize I/O for report channel
+ if report = 1
+ jsr report_init
+ endif
+
+ ;initialize BSS segment
+ if load_data_direct != 1
+ ldx #zp_end-zp_init-1
+ ld_zp lda zp_init,x
+ sta zp_bss,x
+ dex
+ bpl ld_zp
+ ldx #data_end-data_init-1
+ ld_data lda data_init,x
+ sta data_bss,x
+ dex
+ bpl ld_data
+ if ROM_vectors = 1
+ ldx #5
+ ld_vect lda vec_init,x
+ sta vec_bss,x
+ dex
+ bpl ld_vect
+ endif
+ endif
+
+ ;retain status of interrupt flag
+ if I_flag = 2
+ php
+ pla
+ and #4 ;isolate flag
+ sta flag_I_on ;or mask
+ eor #lo(~4) ;reverse
+ sta flag_I_off ;and mask
+ endif
+
+ ;generate checksum for RAM integrity test
+ if ram_top > -1
+ lda #0
+ sta zpt ;set low byte of indirect pointer
+ sta ram_chksm+1 ;checksum high byte
+ ldx #11 ;reset modifiable RAM
+ gcs1 sta jxi_tab,x ;JMP indirect page cross area
+ dex
+ bpl gcs1
+ clc
+ ldx #zp_bss-zero_page ;zeropage - write test area
+ gcs3 adc zero_page,x
+ bcc gcs2
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs2 inx
+ bne gcs3
+ ldx #hi(abs1) ;set high byte of indirect pointer
+ stx zpt+1
+ ldy #lo(abs1) ;data after write & execute test area
+ gcs5 adc (zpt),y
+ bcc gcs4
+ inc ram_chksm+1 ;carry to high byte
+ clc
+ gcs4 iny
+ bne gcs5
+ inx ;advance RAM high address
+ stx zpt+1
+ cpx #ram_top
+ bne gcs5
+ sta ram_chksm ;checksum complete
+ endif
+ next_test
+0409 : ad0202 > lda test_case ;previous test
+040c : c900 > cmp #test_num
+ > trap_ne ;test is out of sequence
+040e : d0fe > bne * ;failed not equal (non zero)
+ >
+0001 = >test_num = test_num + 1
+0410 : a901 > lda #test_num ;*** next tests' number
+0412 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ;testing stack operations PHX PHY PLX PLY
+0415 : a999 lda #$99 ;protect a
+0417 : a2ff ldx #$ff ;initialize stack
+0419 : 9a txs
+041a : a255 ldx #$55
+041c : da phx
+041d : a2aa ldx #$aa
+041f : da phx
+0420 : ecfe01 cpx $1fe ;on stack ?
+ trap_ne
+0423 : d0fe > bne * ;failed not equal (non zero)
+
+0425 : ba tsx
+0426 : e0fd cpx #$fd ;sp decremented?
+ trap_ne
+0428 : d0fe > bne * ;failed not equal (non zero)
+
+042a : 7a ply
+042b : c0aa cpy #$aa ;successful retreived from stack?
+ trap_ne
+042d : d0fe > bne * ;failed not equal (non zero)
+
+042f : 7a ply
+0430 : c055 cpy #$55
+ trap_ne
+0432 : d0fe > bne * ;failed not equal (non zero)
+
+0434 : ccff01 cpy $1ff ;remains on stack?
+ trap_ne
+0437 : d0fe > bne * ;failed not equal (non zero)
+
+0439 : ba tsx
+043a : e0ff cpx #$ff ;sp incremented?
+ trap_ne
+043c : d0fe > bne * ;failed not equal (non zero)
+
+
+043e : a0a5 ldy #$a5
+0440 : 5a phy
+0441 : a05a ldy #$5a
+0443 : 5a phy
+0444 : ccfe01 cpy $1fe ;on stack ?
+ trap_ne
+0447 : d0fe > bne * ;failed not equal (non zero)
+
+0449 : ba tsx
+044a : e0fd cpx #$fd ;sp decremented?
+ trap_ne
+044c : d0fe > bne * ;failed not equal (non zero)
+
+044e : fa plx
+044f : e05a cpx #$5a ;successful retreived from stack?
+ trap_ne
+0451 : d0fe > bne * ;failed not equal (non zero)
+
+0453 : fa plx
+0454 : e0a5 cpx #$a5
+ trap_ne
+0456 : d0fe > bne * ;failed not equal (non zero)
+
+0458 : ecff01 cpx $1ff ;remains on stack?
+ trap_ne
+045b : d0fe > bne * ;failed not equal (non zero)
+
+045d : ba tsx
+045e : e0ff cpx #$ff ;sp incremented?
+ trap_ne
+0460 : d0fe > bne * ;failed not equal (non zero)
+
+0462 : c999 cmp #$99 ;unchanged?
+ trap_ne
+0464 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0466 : ad0202 > lda test_case ;previous test
+0469 : c901 > cmp #test_num
+ > trap_ne ;test is out of sequence
+046b : d0fe > bne * ;failed not equal (non zero)
+ >
+0002 = >test_num = test_num + 1
+046d : a902 > lda #test_num ;*** next tests' number
+046f : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test PHX does not alter flags or X but PLX does
+0472 : a0aa ldy #$aa ;protect y
+ set_x 1,$ff ;push
+ > load_flag $ff
+0474 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0476 : 48 > pha ;use stack to load status
+0477 : a201 > ldx #1 ;precharge index x
+0479 : 28 > plp
+
+047a : da phx
+ tst_x 1,$ff
+047b : 08 > php ;save flags
+047c : e001 > cpx #1 ;test result
+ > trap_ne
+047e : d0fe > bne * ;failed not equal (non zero)
+ >
+0480 : 68 > pla ;load status
+0481 : 48 > pha
+ > cmp_flag $ff
+0482 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0484 : d0fe > bne * ;failed not equal (non zero)
+ >
+0486 : 28 > plp ;restore status
+
+ set_x 0,0
+ > load_flag 0
+0487 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0489 : 48 > pha ;use stack to load status
+048a : a200 > ldx #0 ;precharge index x
+048c : 28 > plp
+
+048d : da phx
+ tst_x 0,0
+048e : 08 > php ;save flags
+048f : e000 > cpx #0 ;test result
+ > trap_ne
+0491 : d0fe > bne * ;failed not equal (non zero)
+ >
+0493 : 68 > pla ;load status
+0494 : 48 > pha
+ > cmp_flag 0
+0495 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0497 : d0fe > bne * ;failed not equal (non zero)
+ >
+0499 : 28 > plp ;restore status
+
+ set_x $ff,$ff
+ > load_flag $ff
+049a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+049c : 48 > pha ;use stack to load status
+049d : a2ff > ldx #$ff ;precharge index x
+049f : 28 > plp
+
+04a0 : da phx
+ tst_x $ff,$ff
+04a1 : 08 > php ;save flags
+04a2 : e0ff > cpx #$ff ;test result
+ > trap_ne
+04a4 : d0fe > bne * ;failed not equal (non zero)
+ >
+04a6 : 68 > pla ;load status
+04a7 : 48 > pha
+ > cmp_flag $ff
+04a8 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+04aa : d0fe > bne * ;failed not equal (non zero)
+ >
+04ac : 28 > plp ;restore status
+
+ set_x 1,0
+ > load_flag 0
+04ad : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+04af : 48 > pha ;use stack to load status
+04b0 : a201 > ldx #1 ;precharge index x
+04b2 : 28 > plp
+
+04b3 : da phx
+ tst_x 1,0
+04b4 : 08 > php ;save flags
+04b5 : e001 > cpx #1 ;test result
+ > trap_ne
+04b7 : d0fe > bne * ;failed not equal (non zero)
+ >
+04b9 : 68 > pla ;load status
+04ba : 48 > pha
+ > cmp_flag 0
+04bb : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+04bd : d0fe > bne * ;failed not equal (non zero)
+ >
+04bf : 28 > plp ;restore status
+
+ set_x 0,$ff
+ > load_flag $ff
+04c0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+04c2 : 48 > pha ;use stack to load status
+04c3 : a200 > ldx #0 ;precharge index x
+04c5 : 28 > plp
+
+04c6 : da phx
+ tst_x 0,$ff
+04c7 : 08 > php ;save flags
+04c8 : e000 > cpx #0 ;test result
+ > trap_ne
+04ca : d0fe > bne * ;failed not equal (non zero)
+ >
+04cc : 68 > pla ;load status
+04cd : 48 > pha
+ > cmp_flag $ff
+04ce : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+04d0 : d0fe > bne * ;failed not equal (non zero)
+ >
+04d2 : 28 > plp ;restore status
+
+ set_x $ff,0
+ > load_flag 0
+04d3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+04d5 : 48 > pha ;use stack to load status
+04d6 : a2ff > ldx #$ff ;precharge index x
+04d8 : 28 > plp
+
+04d9 : da phx
+ tst_x $ff,0
+04da : 08 > php ;save flags
+04db : e0ff > cpx #$ff ;test result
+ > trap_ne
+04dd : d0fe > bne * ;failed not equal (non zero)
+ >
+04df : 68 > pla ;load status
+04e0 : 48 > pha
+ > cmp_flag 0
+04e1 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+04e3 : d0fe > bne * ;failed not equal (non zero)
+ >
+04e5 : 28 > plp ;restore status
+
+ set_x 0,$ff ;pull
+ > load_flag $ff
+04e6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+04e8 : 48 > pha ;use stack to load status
+04e9 : a200 > ldx #0 ;precharge index x
+04eb : 28 > plp
+
+04ec : fa plx
+ tst_x $ff,$ff-zero
+04ed : 08 > php ;save flags
+04ee : e0ff > cpx #$ff ;test result
+ > trap_ne
+04f0 : d0fe > bne * ;failed not equal (non zero)
+ >
+04f2 : 68 > pla ;load status
+04f3 : 48 > pha
+ > cmp_flag $ff-zero
+04f4 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+04f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+04f8 : 28 > plp ;restore status
+
+ set_x $ff,0
+ > load_flag 0
+04f9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+04fb : 48 > pha ;use stack to load status
+04fc : a2ff > ldx #$ff ;precharge index x
+04fe : 28 > plp
+
+04ff : fa plx
+ tst_x 0,zero
+0500 : 08 > php ;save flags
+0501 : e000 > cpx #0 ;test result
+ > trap_ne
+0503 : d0fe > bne * ;failed not equal (non zero)
+ >
+0505 : 68 > pla ;load status
+0506 : 48 > pha
+ > cmp_flag zero
+0507 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0509 : d0fe > bne * ;failed not equal (non zero)
+ >
+050b : 28 > plp ;restore status
+
+ set_x $fe,$ff
+ > load_flag $ff
+050c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+050e : 48 > pha ;use stack to load status
+050f : a2fe > ldx #$fe ;precharge index x
+0511 : 28 > plp
+
+0512 : fa plx
+ tst_x 1,$ff-zero-minus
+0513 : 08 > php ;save flags
+0514 : e001 > cpx #1 ;test result
+ > trap_ne
+0516 : d0fe > bne * ;failed not equal (non zero)
+ >
+0518 : 68 > pla ;load status
+0519 : 48 > pha
+ > cmp_flag $ff-zero-minus
+051a : c97d > cmp #($ff-zero-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+051c : d0fe > bne * ;failed not equal (non zero)
+ >
+051e : 28 > plp ;restore status
+
+ set_x 0,0
+ > load_flag 0
+051f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0521 : 48 > pha ;use stack to load status
+0522 : a200 > ldx #0 ;precharge index x
+0524 : 28 > plp
+
+0525 : fa plx
+ tst_x $ff,minus
+0526 : 08 > php ;save flags
+0527 : e0ff > cpx #$ff ;test result
+ > trap_ne
+0529 : d0fe > bne * ;failed not equal (non zero)
+ >
+052b : 68 > pla ;load status
+052c : 48 > pha
+ > cmp_flag minus
+052d : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+052f : d0fe > bne * ;failed not equal (non zero)
+ >
+0531 : 28 > plp ;restore status
+
+ set_x $ff,$ff
+ > load_flag $ff
+0532 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0534 : 48 > pha ;use stack to load status
+0535 : a2ff > ldx #$ff ;precharge index x
+0537 : 28 > plp
+
+0538 : fa plx
+ tst_x 0,$ff-minus
+0539 : 08 > php ;save flags
+053a : e000 > cpx #0 ;test result
+ > trap_ne
+053c : d0fe > bne * ;failed not equal (non zero)
+ >
+053e : 68 > pla ;load status
+053f : 48 > pha
+ > cmp_flag $ff-minus
+0540 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0542 : d0fe > bne * ;failed not equal (non zero)
+ >
+0544 : 28 > plp ;restore status
+
+ set_x $fe,0
+ > load_flag 0
+0545 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0547 : 48 > pha ;use stack to load status
+0548 : a2fe > ldx #$fe ;precharge index x
+054a : 28 > plp
+
+054b : fa plx
+ tst_x 1,0
+054c : 08 > php ;save flags
+054d : e001 > cpx #1 ;test result
+ > trap_ne
+054f : d0fe > bne * ;failed not equal (non zero)
+ >
+0551 : 68 > pla ;load status
+0552 : 48 > pha
+ > cmp_flag 0
+0553 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0555 : d0fe > bne * ;failed not equal (non zero)
+ >
+0557 : 28 > plp ;restore status
+
+0558 : c0aa cpy #$aa ;Y unchanged
+ trap_ne
+055a : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+055c : ad0202 > lda test_case ;previous test
+055f : c902 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0561 : d0fe > bne * ;failed not equal (non zero)
+ >
+0003 = >test_num = test_num + 1
+0563 : a903 > lda #test_num ;*** next tests' number
+0565 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; test PHY does not alter flags or Y but PLY does
+0568 : a255 ldx #$55 ;x & a protected
+ set_y 1,$ff ;push
+ > load_flag $ff
+056a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+056c : 48 > pha ;use stack to load status
+056d : a001 > ldy #1 ;precharge index y
+056f : 28 > plp
+
+0570 : 5a phy
+ tst_y 1,$ff
+0571 : 08 > php ;save flags
+0572 : c001 > cpy #1 ;test result
+ > trap_ne
+0574 : d0fe > bne * ;failed not equal (non zero)
+ >
+0576 : 68 > pla ;load status
+0577 : 48 > pha
+ > cmp_flag $ff
+0578 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+057a : d0fe > bne * ;failed not equal (non zero)
+ >
+057c : 28 > plp ;restore status
+
+ set_y 0,0
+ > load_flag 0
+057d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+057f : 48 > pha ;use stack to load status
+0580 : a000 > ldy #0 ;precharge index y
+0582 : 28 > plp
+
+0583 : 5a phy
+ tst_y 0,0
+0584 : 08 > php ;save flags
+0585 : c000 > cpy #0 ;test result
+ > trap_ne
+0587 : d0fe > bne * ;failed not equal (non zero)
+ >
+0589 : 68 > pla ;load status
+058a : 48 > pha
+ > cmp_flag 0
+058b : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+058d : d0fe > bne * ;failed not equal (non zero)
+ >
+058f : 28 > plp ;restore status
+
+ set_y $ff,$ff
+ > load_flag $ff
+0590 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0592 : 48 > pha ;use stack to load status
+0593 : a0ff > ldy #$ff ;precharge index y
+0595 : 28 > plp
+
+0596 : 5a phy
+ tst_y $ff,$ff
+0597 : 08 > php ;save flags
+0598 : c0ff > cpy #$ff ;test result
+ > trap_ne
+059a : d0fe > bne * ;failed not equal (non zero)
+ >
+059c : 68 > pla ;load status
+059d : 48 > pha
+ > cmp_flag $ff
+059e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05a0 : d0fe > bne * ;failed not equal (non zero)
+ >
+05a2 : 28 > plp ;restore status
+
+ set_y 1,0
+ > load_flag 0
+05a3 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+05a5 : 48 > pha ;use stack to load status
+05a6 : a001 > ldy #1 ;precharge index y
+05a8 : 28 > plp
+
+05a9 : 5a phy
+ tst_y 1,0
+05aa : 08 > php ;save flags
+05ab : c001 > cpy #1 ;test result
+ > trap_ne
+05ad : d0fe > bne * ;failed not equal (non zero)
+ >
+05af : 68 > pla ;load status
+05b0 : 48 > pha
+ > cmp_flag 0
+05b1 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05b3 : d0fe > bne * ;failed not equal (non zero)
+ >
+05b5 : 28 > plp ;restore status
+
+ set_y 0,$ff
+ > load_flag $ff
+05b6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+05b8 : 48 > pha ;use stack to load status
+05b9 : a000 > ldy #0 ;precharge index y
+05bb : 28 > plp
+
+05bc : 5a phy
+ tst_y 0,$ff
+05bd : 08 > php ;save flags
+05be : c000 > cpy #0 ;test result
+ > trap_ne
+05c0 : d0fe > bne * ;failed not equal (non zero)
+ >
+05c2 : 68 > pla ;load status
+05c3 : 48 > pha
+ > cmp_flag $ff
+05c4 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05c6 : d0fe > bne * ;failed not equal (non zero)
+ >
+05c8 : 28 > plp ;restore status
+
+ set_y $ff,0
+ > load_flag 0
+05c9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+05cb : 48 > pha ;use stack to load status
+05cc : a0ff > ldy #$ff ;precharge index y
+05ce : 28 > plp
+
+05cf : 5a phy
+ tst_y $ff,0
+05d0 : 08 > php ;save flags
+05d1 : c0ff > cpy #$ff ;test result
+ > trap_ne
+05d3 : d0fe > bne * ;failed not equal (non zero)
+ >
+05d5 : 68 > pla ;load status
+05d6 : 48 > pha
+ > cmp_flag 0
+05d7 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05d9 : d0fe > bne * ;failed not equal (non zero)
+ >
+05db : 28 > plp ;restore status
+
+ set_y 0,$ff ;pull
+ > load_flag $ff
+05dc : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+05de : 48 > pha ;use stack to load status
+05df : a000 > ldy #0 ;precharge index y
+05e1 : 28 > plp
+
+05e2 : 7a ply
+ tst_y $ff,$ff-zero
+05e3 : 08 > php ;save flags
+05e4 : c0ff > cpy #$ff ;test result
+ > trap_ne
+05e6 : d0fe > bne * ;failed not equal (non zero)
+ >
+05e8 : 68 > pla ;load status
+05e9 : 48 > pha
+ > cmp_flag $ff-zero
+05ea : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05ec : d0fe > bne * ;failed not equal (non zero)
+ >
+05ee : 28 > plp ;restore status
+
+ set_y $ff,0
+ > load_flag 0
+05ef : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+05f1 : 48 > pha ;use stack to load status
+05f2 : a0ff > ldy #$ff ;precharge index y
+05f4 : 28 > plp
+
+05f5 : 7a ply
+ tst_y 0,zero
+05f6 : 08 > php ;save flags
+05f7 : c000 > cpy #0 ;test result
+ > trap_ne
+05f9 : d0fe > bne * ;failed not equal (non zero)
+ >
+05fb : 68 > pla ;load status
+05fc : 48 > pha
+ > cmp_flag zero
+05fd : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+05ff : d0fe > bne * ;failed not equal (non zero)
+ >
+0601 : 28 > plp ;restore status
+
+ set_y $fe,$ff
+ > load_flag $ff
+0602 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0604 : 48 > pha ;use stack to load status
+0605 : a0fe > ldy #$fe ;precharge index y
+0607 : 28 > plp
+
+0608 : 7a ply
+ tst_y 1,$ff-zero-minus
+0609 : 08 > php ;save flags
+060a : c001 > cpy #1 ;test result
+ > trap_ne
+060c : d0fe > bne * ;failed not equal (non zero)
+ >
+060e : 68 > pla ;load status
+060f : 48 > pha
+ > cmp_flag $ff-zero-minus
+0610 : c97d > cmp #($ff-zero-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0612 : d0fe > bne * ;failed not equal (non zero)
+ >
+0614 : 28 > plp ;restore status
+
+ set_y 0,0
+ > load_flag 0
+0615 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0617 : 48 > pha ;use stack to load status
+0618 : a000 > ldy #0 ;precharge index y
+061a : 28 > plp
+
+061b : 7a ply
+ tst_y $ff,minus
+061c : 08 > php ;save flags
+061d : c0ff > cpy #$ff ;test result
+ > trap_ne
+061f : d0fe > bne * ;failed not equal (non zero)
+ >
+0621 : 68 > pla ;load status
+0622 : 48 > pha
+ > cmp_flag minus
+0623 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0625 : d0fe > bne * ;failed not equal (non zero)
+ >
+0627 : 28 > plp ;restore status
+
+ set_y $ff,$ff
+ > load_flag $ff
+0628 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+062a : 48 > pha ;use stack to load status
+062b : a0ff > ldy #$ff ;precharge index y
+062d : 28 > plp
+
+062e : 7a ply
+ tst_y 0,$ff-minus
+062f : 08 > php ;save flags
+0630 : c000 > cpy #0 ;test result
+ > trap_ne
+0632 : d0fe > bne * ;failed not equal (non zero)
+ >
+0634 : 68 > pla ;load status
+0635 : 48 > pha
+ > cmp_flag $ff-minus
+0636 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0638 : d0fe > bne * ;failed not equal (non zero)
+ >
+063a : 28 > plp ;restore status
+
+ set_y $fe,0
+ > load_flag 0
+063b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+063d : 48 > pha ;use stack to load status
+063e : a0fe > ldy #$fe ;precharge index y
+0640 : 28 > plp
+
+0641 : 7a ply
+ tst_y 1,0
+0642 : 08 > php ;save flags
+0643 : c001 > cpy #1 ;test result
+ > trap_ne
+0645 : d0fe > bne * ;failed not equal (non zero)
+ >
+0647 : 68 > pla ;load status
+0648 : 48 > pha
+ > cmp_flag 0
+0649 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+064b : d0fe > bne * ;failed not equal (non zero)
+ >
+064d : 28 > plp ;restore status
+
+064e : e055 cpx #$55 ;x unchanged?
+ trap_ne
+0650 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0652 : ad0202 > lda test_case ;previous test
+0655 : c903 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0657 : d0fe > bne * ;failed not equal (non zero)
+ >
+0004 = >test_num = test_num + 1
+0659 : a904 > lda #test_num ;*** next tests' number
+065b : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; PC modifying instructions (BRA, BBR, BBS, 1, 2, 3 byte NOPs, JMP(abs,x))
+ ; testing unconditional branch BRA
+
+065e : a281 ldx #$81 ;protect unused registers
+0660 : a07e ldy #$7e
+ set_a 0,$ff
+ > load_flag $ff
+0662 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0664 : 48 > pha ;use stack to load status
+0665 : a900 > lda #0 ;precharge accu
+0667 : 28 > plp
+
+0668 : 8003 bra br1 ;branch should always be taken
+ trap
+066a : 4c6a06 > jmp * ;failed anyway
+
+066d : br1
+ tst_a 0,$ff
+066d : 08 > php ;save flags
+066e : c900 > cmp #0 ;test result
+ > trap_ne
+0670 : d0fe > bne * ;failed not equal (non zero)
+ >
+0672 : 68 > pla ;load status
+0673 : 48 > pha
+ > cmp_flag $ff
+0674 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0676 : d0fe > bne * ;failed not equal (non zero)
+ >
+0678 : 28 > plp ;restore status
+
+ set_a $ff,0
+ > load_flag 0
+0679 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+067b : 48 > pha ;use stack to load status
+067c : a9ff > lda #$ff ;precharge accu
+067e : 28 > plp
+
+067f : 8003 bra br2 ;branch should always be taken
+ trap
+0681 : 4c8106 > jmp * ;failed anyway
+
+0684 : br2
+ tst_a $ff,0
+0684 : 08 > php ;save flags
+0685 : c9ff > cmp #$ff ;test result
+ > trap_ne
+0687 : d0fe > bne * ;failed not equal (non zero)
+ >
+0689 : 68 > pla ;load status
+068a : 48 > pha
+ > cmp_flag 0
+068b : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+068d : d0fe > bne * ;failed not equal (non zero)
+ >
+068f : 28 > plp ;restore status
+
+0690 : e081 cpx #$81
+ trap_ne
+0692 : d0fe > bne * ;failed not equal (non zero)
+
+0694 : c07e cpy #$7e
+ trap_ne
+0696 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0698 : ad0202 > lda test_case ;previous test
+069b : c904 > cmp #test_num
+ > trap_ne ;test is out of sequence
+069d : d0fe > bne * ;failed not equal (non zero)
+ >
+0005 = >test_num = test_num + 1
+069f : a905 > lda #test_num ;*** next tests' number
+06a1 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+06a4 : a000 ldy #0 ;branch range test
+06a6 : 8061 bra bra0
+
+06a8 : c001 bra1 cpy #1
+ trap_ne ;long range backward
+06aa : d0fe > bne * ;failed not equal (non zero)
+
+06ac : c8 iny
+06ad : 8053 bra bra2
+
+06af : c003 bra3 cpy #3
+ trap_ne ;long range backward
+06b1 : d0fe > bne * ;failed not equal (non zero)
+
+06b3 : c8 iny
+06b4 : 8045 bra bra4
+
+06b6 : c005 bra5 cpy #5
+ trap_ne ;long range backward
+06b8 : d0fe > bne * ;failed not equal (non zero)
+
+06ba : c8 iny
+06bb : a000 ldy #0
+06bd : 8004 bra brf0
+
+06bf : c8 iny
+06c0 : c8 iny
+06c1 : c8 iny
+06c2 : c8 iny
+06c3 : 8003 brf0 bra brf1
+
+06c5 : c8 iny
+06c6 : c8 iny
+06c7 : c8 iny
+06c8 : c8 brf1 iny
+06c9 : 8002 bra brf2
+
+06cb : c8 iny
+06cc : c8 iny
+06cd : c8 brf2 iny
+06ce : c8 iny
+06cf : 8001 bra brf3
+
+06d1 : c8 iny
+06d2 : c8 brf3 iny
+06d3 : c8 iny
+06d4 : c8 iny
+06d5 : 8000 bra brf4
+
+06d7 : c8 brf4 iny
+06d8 : c8 iny
+06d9 : c8 iny
+06da : c8 iny
+06db : c00a cpy #10
+ trap_ne ;short range forward
+06dd : d0fe > bne * ;failed not equal (non zero)
+
+06df : 8012 bra brb0
+
+06e1 : 88 brb4 dey
+06e2 : 88 dey
+06e3 : 88 dey
+06e4 : 88 dey
+06e5 : 800e bra brb5
+
+06e7 : 88 brb3 dey
+06e8 : 88 dey
+06e9 : 88 dey
+06ea : 80f5 bra brb4
+
+06ec : 88 brb2 dey
+06ed : 88 dey
+06ee : 80f7 bra brb3
+
+06f0 : 88 brb1 dey
+06f1 : 80f9 bra brb2
+
+06f3 : 80fb brb0 bra brb1
+
+06f5 : c000 brb5 cpy #0
+ trap_ne ;short range backward
+06f7 : d0fe > bne * ;failed not equal (non zero)
+
+06f9 : 8015 bra bra6
+
+06fb : c004 bra4 cpy #4
+ trap_ne ;long range forward
+06fd : d0fe > bne * ;failed not equal (non zero)
+
+06ff : c8 iny
+0700 : 80b4 bra bra5
+
+0702 : c002 bra2 cpy #2
+ trap_ne ;long range forward
+0704 : d0fe > bne * ;failed not equal (non zero)
+
+0706 : c8 iny
+0707 : 80a6 bra bra3
+
+0709 : c000 bra0 cpy #0
+ trap_ne ;long range forward
+070b : d0fe > bne * ;failed not equal (non zero)
+
+070d : c8 iny
+070e : 8098 bra bra1
+
+0710 : bra6
+ next_test
+0710 : ad0202 > lda test_case ;previous test
+0713 : c905 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0715 : d0fe > bne * ;failed not equal (non zero)
+ >
+0006 = >test_num = test_num + 1
+0717 : a906 > lda #test_num ;*** next tests' number
+0719 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if rkwl_wdc_op = 1
+ ; testing BBR & BBS
+
+ bbt macro ;\1 = bitnum
+ lda #(1<<\1) ;testing 1 bit on
+ sta zpt
+ set_a $33,0 ;with flags off
+ bbr \1,zpt,fail1\?
+ bbs \1,zpt,ok1\?
+ trap ;bbs branch not taken
+ fail1\?
+ trap ;bbr branch taken
+ ok1\?
+ tst_a $33,0
+ set_a $cc,$ff ;with flags on
+ bbr \1,zpt,fail2\?
+ bbs \1,zpt,ok2\?
+ trap ;bbs branch not taken
+ fail2\?
+ trap ;bbr branch taken
+ ok2\?
+ tst_a $cc,$ff
+ lda zpt
+ cmp #(1<<\1)
+ trap_ne ;zp altered
+ lda #$ff-(1<<\1) ;testing 1 bit off
+ sta zpt
+ set_a $33,0 ;with flags off
+ bbs \1,zpt,fail3\?
+ bbr \1,zpt,ok3\?
+ trap ;bbr branch not taken
+ fail3\?
+ trap ;bbs branch taken
+ ok3\?
+ tst_a $33,0
+ set_a $cc,$ff ;with flags on
+ bbs \1,zpt,fail4\?
+ bbr \1,zpt,ok4\?
+ trap ;bbr branch not taken
+ fail4\?
+ trap ;bbs branch taken
+ ok4\?
+ tst_a $cc,$ff
+ lda zpt
+ cmp #$ff-(1<<\1)
+ trap_ne ;zp altered
+ endm
+
+071c : a211 ldx #$11 ;test bbr/bbs integrity
+071e : a022 ldy #$22
+ bbt 0
+0720 : a901 > lda #(1<<0) ;testing 1 bit on
+0722 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0724 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0726 : 48 > pha ;use stack to load status
+0727 : a933 > lda #$33 ;precharge accu
+0729 : 28 > plp
+ >
+072a : 0f0c06 > bbr 0,zpt,fail10196
+072d : 8f0c06 > bbs 0,zpt,ok10196
+ > trap ;bbs branch not taken
+0730 : 4c3007 > jmp * ;failed anyway
+ >
+0733 : >fail10196
+ > trap ;bbr branch taken
+0733 : 4c3307 > jmp * ;failed anyway
+ >
+0736 : >ok10196
+ > tst_a $33,0
+0736 : 08 > php ;save flags
+0737 : c933 > cmp #$33 ;test result
+ > trap_ne
+0739 : d0fe > bne * ;failed not equal (non zero)
+ >
+073b : 68 > pla ;load status
+073c : 48 > pha
+ > cmp_flag 0
+073d : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+073f : d0fe > bne * ;failed not equal (non zero)
+ >
+0741 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0742 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0744 : 48 > pha ;use stack to load status
+0745 : a9cc > lda #$cc ;precharge accu
+0747 : 28 > plp
+ >
+0748 : 0f0c06 > bbr 0,zpt,fail20196
+074b : 8f0c06 > bbs 0,zpt,ok20196
+ > trap ;bbs branch not taken
+074e : 4c4e07 > jmp * ;failed anyway
+ >
+0751 : >fail20196
+ > trap ;bbr branch taken
+0751 : 4c5107 > jmp * ;failed anyway
+ >
+0754 : >ok20196
+ > tst_a $cc,$ff
+0754 : 08 > php ;save flags
+0755 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0757 : d0fe > bne * ;failed not equal (non zero)
+ >
+0759 : 68 > pla ;load status
+075a : 48 > pha
+ > cmp_flag $ff
+075b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+075d : d0fe > bne * ;failed not equal (non zero)
+ >
+075f : 28 > plp ;restore status
+ >
+0760 : a50c > lda zpt
+0762 : c901 > cmp #(1<<0)
+ > trap_ne ;zp altered
+0764 : d0fe > bne * ;failed not equal (non zero)
+ >
+0766 : a9fe > lda #$ff-(1<<0) ;testing 1 bit off
+0768 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+076a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+076c : 48 > pha ;use stack to load status
+076d : a933 > lda #$33 ;precharge accu
+076f : 28 > plp
+ >
+0770 : 8f0c06 > bbs 0,zpt,fail30196
+0773 : 0f0c06 > bbr 0,zpt,ok30196
+ > trap ;bbr branch not taken
+0776 : 4c7607 > jmp * ;failed anyway
+ >
+0779 : >fail30196
+ > trap ;bbs branch taken
+0779 : 4c7907 > jmp * ;failed anyway
+ >
+077c : >ok30196
+ > tst_a $33,0
+077c : 08 > php ;save flags
+077d : c933 > cmp #$33 ;test result
+ > trap_ne
+077f : d0fe > bne * ;failed not equal (non zero)
+ >
+0781 : 68 > pla ;load status
+0782 : 48 > pha
+ > cmp_flag 0
+0783 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0785 : d0fe > bne * ;failed not equal (non zero)
+ >
+0787 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0788 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+078a : 48 > pha ;use stack to load status
+078b : a9cc > lda #$cc ;precharge accu
+078d : 28 > plp
+ >
+078e : 8f0c06 > bbs 0,zpt,fail40196
+0791 : 0f0c06 > bbr 0,zpt,ok40196
+ > trap ;bbr branch not taken
+0794 : 4c9407 > jmp * ;failed anyway
+ >
+0797 : >fail40196
+ > trap ;bbs branch taken
+0797 : 4c9707 > jmp * ;failed anyway
+ >
+079a : >ok40196
+ > tst_a $cc,$ff
+079a : 08 > php ;save flags
+079b : c9cc > cmp #$cc ;test result
+ > trap_ne
+079d : d0fe > bne * ;failed not equal (non zero)
+ >
+079f : 68 > pla ;load status
+07a0 : 48 > pha
+ > cmp_flag $ff
+07a1 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07a3 : d0fe > bne * ;failed not equal (non zero)
+ >
+07a5 : 28 > plp ;restore status
+ >
+07a6 : a50c > lda zpt
+07a8 : c9fe > cmp #$ff-(1<<0)
+ > trap_ne ;zp altered
+07aa : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 1
+07ac : a902 > lda #(1<<1) ;testing 1 bit on
+07ae : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+07b0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+07b2 : 48 > pha ;use stack to load status
+07b3 : a933 > lda #$33 ;precharge accu
+07b5 : 28 > plp
+ >
+07b6 : 1f0c06 > bbr 1,zpt,fail10231
+07b9 : 9f0c06 > bbs 1,zpt,ok10231
+ > trap ;bbs branch not taken
+07bc : 4cbc07 > jmp * ;failed anyway
+ >
+07bf : >fail10231
+ > trap ;bbr branch taken
+07bf : 4cbf07 > jmp * ;failed anyway
+ >
+07c2 : >ok10231
+ > tst_a $33,0
+07c2 : 08 > php ;save flags
+07c3 : c933 > cmp #$33 ;test result
+ > trap_ne
+07c5 : d0fe > bne * ;failed not equal (non zero)
+ >
+07c7 : 68 > pla ;load status
+07c8 : 48 > pha
+ > cmp_flag 0
+07c9 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07cb : d0fe > bne * ;failed not equal (non zero)
+ >
+07cd : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+07ce : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+07d0 : 48 > pha ;use stack to load status
+07d1 : a9cc > lda #$cc ;precharge accu
+07d3 : 28 > plp
+ >
+07d4 : 1f0c06 > bbr 1,zpt,fail20231
+07d7 : 9f0c06 > bbs 1,zpt,ok20231
+ > trap ;bbs branch not taken
+07da : 4cda07 > jmp * ;failed anyway
+ >
+07dd : >fail20231
+ > trap ;bbr branch taken
+07dd : 4cdd07 > jmp * ;failed anyway
+ >
+07e0 : >ok20231
+ > tst_a $cc,$ff
+07e0 : 08 > php ;save flags
+07e1 : c9cc > cmp #$cc ;test result
+ > trap_ne
+07e3 : d0fe > bne * ;failed not equal (non zero)
+ >
+07e5 : 68 > pla ;load status
+07e6 : 48 > pha
+ > cmp_flag $ff
+07e7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+07e9 : d0fe > bne * ;failed not equal (non zero)
+ >
+07eb : 28 > plp ;restore status
+ >
+07ec : a50c > lda zpt
+07ee : c902 > cmp #(1<<1)
+ > trap_ne ;zp altered
+07f0 : d0fe > bne * ;failed not equal (non zero)
+ >
+07f2 : a9fd > lda #$ff-(1<<1) ;testing 1 bit off
+07f4 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+07f6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+07f8 : 48 > pha ;use stack to load status
+07f9 : a933 > lda #$33 ;precharge accu
+07fb : 28 > plp
+ >
+07fc : 9f0c06 > bbs 1,zpt,fail30231
+07ff : 1f0c06 > bbr 1,zpt,ok30231
+ > trap ;bbr branch not taken
+0802 : 4c0208 > jmp * ;failed anyway
+ >
+0805 : >fail30231
+ > trap ;bbs branch taken
+0805 : 4c0508 > jmp * ;failed anyway
+ >
+0808 : >ok30231
+ > tst_a $33,0
+0808 : 08 > php ;save flags
+0809 : c933 > cmp #$33 ;test result
+ > trap_ne
+080b : d0fe > bne * ;failed not equal (non zero)
+ >
+080d : 68 > pla ;load status
+080e : 48 > pha
+ > cmp_flag 0
+080f : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0811 : d0fe > bne * ;failed not equal (non zero)
+ >
+0813 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0814 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0816 : 48 > pha ;use stack to load status
+0817 : a9cc > lda #$cc ;precharge accu
+0819 : 28 > plp
+ >
+081a : 9f0c06 > bbs 1,zpt,fail40231
+081d : 1f0c06 > bbr 1,zpt,ok40231
+ > trap ;bbr branch not taken
+0820 : 4c2008 > jmp * ;failed anyway
+ >
+0823 : >fail40231
+ > trap ;bbs branch taken
+0823 : 4c2308 > jmp * ;failed anyway
+ >
+0826 : >ok40231
+ > tst_a $cc,$ff
+0826 : 08 > php ;save flags
+0827 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0829 : d0fe > bne * ;failed not equal (non zero)
+ >
+082b : 68 > pla ;load status
+082c : 48 > pha
+ > cmp_flag $ff
+082d : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+082f : d0fe > bne * ;failed not equal (non zero)
+ >
+0831 : 28 > plp ;restore status
+ >
+0832 : a50c > lda zpt
+0834 : c9fd > cmp #$ff-(1<<1)
+ > trap_ne ;zp altered
+0836 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 2
+0838 : a904 > lda #(1<<2) ;testing 1 bit on
+083a : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+083c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+083e : 48 > pha ;use stack to load status
+083f : a933 > lda #$33 ;precharge accu
+0841 : 28 > plp
+ >
+0842 : 2f0c06 > bbr 2,zpt,fail10266
+0845 : af0c06 > bbs 2,zpt,ok10266
+ > trap ;bbs branch not taken
+0848 : 4c4808 > jmp * ;failed anyway
+ >
+084b : >fail10266
+ > trap ;bbr branch taken
+084b : 4c4b08 > jmp * ;failed anyway
+ >
+084e : >ok10266
+ > tst_a $33,0
+084e : 08 > php ;save flags
+084f : c933 > cmp #$33 ;test result
+ > trap_ne
+0851 : d0fe > bne * ;failed not equal (non zero)
+ >
+0853 : 68 > pla ;load status
+0854 : 48 > pha
+ > cmp_flag 0
+0855 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0857 : d0fe > bne * ;failed not equal (non zero)
+ >
+0859 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+085a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+085c : 48 > pha ;use stack to load status
+085d : a9cc > lda #$cc ;precharge accu
+085f : 28 > plp
+ >
+0860 : 2f0c06 > bbr 2,zpt,fail20266
+0863 : af0c06 > bbs 2,zpt,ok20266
+ > trap ;bbs branch not taken
+0866 : 4c6608 > jmp * ;failed anyway
+ >
+0869 : >fail20266
+ > trap ;bbr branch taken
+0869 : 4c6908 > jmp * ;failed anyway
+ >
+086c : >ok20266
+ > tst_a $cc,$ff
+086c : 08 > php ;save flags
+086d : c9cc > cmp #$cc ;test result
+ > trap_ne
+086f : d0fe > bne * ;failed not equal (non zero)
+ >
+0871 : 68 > pla ;load status
+0872 : 48 > pha
+ > cmp_flag $ff
+0873 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0875 : d0fe > bne * ;failed not equal (non zero)
+ >
+0877 : 28 > plp ;restore status
+ >
+0878 : a50c > lda zpt
+087a : c904 > cmp #(1<<2)
+ > trap_ne ;zp altered
+087c : d0fe > bne * ;failed not equal (non zero)
+ >
+087e : a9fb > lda #$ff-(1<<2) ;testing 1 bit off
+0880 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0882 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0884 : 48 > pha ;use stack to load status
+0885 : a933 > lda #$33 ;precharge accu
+0887 : 28 > plp
+ >
+0888 : af0c06 > bbs 2,zpt,fail30266
+088b : 2f0c06 > bbr 2,zpt,ok30266
+ > trap ;bbr branch not taken
+088e : 4c8e08 > jmp * ;failed anyway
+ >
+0891 : >fail30266
+ > trap ;bbs branch taken
+0891 : 4c9108 > jmp * ;failed anyway
+ >
+0894 : >ok30266
+ > tst_a $33,0
+0894 : 08 > php ;save flags
+0895 : c933 > cmp #$33 ;test result
+ > trap_ne
+0897 : d0fe > bne * ;failed not equal (non zero)
+ >
+0899 : 68 > pla ;load status
+089a : 48 > pha
+ > cmp_flag 0
+089b : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+089d : d0fe > bne * ;failed not equal (non zero)
+ >
+089f : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+08a0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+08a2 : 48 > pha ;use stack to load status
+08a3 : a9cc > lda #$cc ;precharge accu
+08a5 : 28 > plp
+ >
+08a6 : af0c06 > bbs 2,zpt,fail40266
+08a9 : 2f0c06 > bbr 2,zpt,ok40266
+ > trap ;bbr branch not taken
+08ac : 4cac08 > jmp * ;failed anyway
+ >
+08af : >fail40266
+ > trap ;bbs branch taken
+08af : 4caf08 > jmp * ;failed anyway
+ >
+08b2 : >ok40266
+ > tst_a $cc,$ff
+08b2 : 08 > php ;save flags
+08b3 : c9cc > cmp #$cc ;test result
+ > trap_ne
+08b5 : d0fe > bne * ;failed not equal (non zero)
+ >
+08b7 : 68 > pla ;load status
+08b8 : 48 > pha
+ > cmp_flag $ff
+08b9 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08bb : d0fe > bne * ;failed not equal (non zero)
+ >
+08bd : 28 > plp ;restore status
+ >
+08be : a50c > lda zpt
+08c0 : c9fb > cmp #$ff-(1<<2)
+ > trap_ne ;zp altered
+08c2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 3
+08c4 : a908 > lda #(1<<3) ;testing 1 bit on
+08c6 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+08c8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+08ca : 48 > pha ;use stack to load status
+08cb : a933 > lda #$33 ;precharge accu
+08cd : 28 > plp
+ >
+08ce : 3f0c06 > bbr 3,zpt,fail10301
+08d1 : bf0c06 > bbs 3,zpt,ok10301
+ > trap ;bbs branch not taken
+08d4 : 4cd408 > jmp * ;failed anyway
+ >
+08d7 : >fail10301
+ > trap ;bbr branch taken
+08d7 : 4cd708 > jmp * ;failed anyway
+ >
+08da : >ok10301
+ > tst_a $33,0
+08da : 08 > php ;save flags
+08db : c933 > cmp #$33 ;test result
+ > trap_ne
+08dd : d0fe > bne * ;failed not equal (non zero)
+ >
+08df : 68 > pla ;load status
+08e0 : 48 > pha
+ > cmp_flag 0
+08e1 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+08e3 : d0fe > bne * ;failed not equal (non zero)
+ >
+08e5 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+08e6 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+08e8 : 48 > pha ;use stack to load status
+08e9 : a9cc > lda #$cc ;precharge accu
+08eb : 28 > plp
+ >
+08ec : 3f0c06 > bbr 3,zpt,fail20301
+08ef : bf0c06 > bbs 3,zpt,ok20301
+ > trap ;bbs branch not taken
+08f2 : 4cf208 > jmp * ;failed anyway
+ >
+08f5 : >fail20301
+ > trap ;bbr branch taken
+08f5 : 4cf508 > jmp * ;failed anyway
+ >
+08f8 : >ok20301
+ > tst_a $cc,$ff
+08f8 : 08 > php ;save flags
+08f9 : c9cc > cmp #$cc ;test result
+ > trap_ne
+08fb : d0fe > bne * ;failed not equal (non zero)
+ >
+08fd : 68 > pla ;load status
+08fe : 48 > pha
+ > cmp_flag $ff
+08ff : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0901 : d0fe > bne * ;failed not equal (non zero)
+ >
+0903 : 28 > plp ;restore status
+ >
+0904 : a50c > lda zpt
+0906 : c908 > cmp #(1<<3)
+ > trap_ne ;zp altered
+0908 : d0fe > bne * ;failed not equal (non zero)
+ >
+090a : a9f7 > lda #$ff-(1<<3) ;testing 1 bit off
+090c : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+090e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0910 : 48 > pha ;use stack to load status
+0911 : a933 > lda #$33 ;precharge accu
+0913 : 28 > plp
+ >
+0914 : bf0c06 > bbs 3,zpt,fail30301
+0917 : 3f0c06 > bbr 3,zpt,ok30301
+ > trap ;bbr branch not taken
+091a : 4c1a09 > jmp * ;failed anyway
+ >
+091d : >fail30301
+ > trap ;bbs branch taken
+091d : 4c1d09 > jmp * ;failed anyway
+ >
+0920 : >ok30301
+ > tst_a $33,0
+0920 : 08 > php ;save flags
+0921 : c933 > cmp #$33 ;test result
+ > trap_ne
+0923 : d0fe > bne * ;failed not equal (non zero)
+ >
+0925 : 68 > pla ;load status
+0926 : 48 > pha
+ > cmp_flag 0
+0927 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0929 : d0fe > bne * ;failed not equal (non zero)
+ >
+092b : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+092c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+092e : 48 > pha ;use stack to load status
+092f : a9cc > lda #$cc ;precharge accu
+0931 : 28 > plp
+ >
+0932 : bf0c06 > bbs 3,zpt,fail40301
+0935 : 3f0c06 > bbr 3,zpt,ok40301
+ > trap ;bbr branch not taken
+0938 : 4c3809 > jmp * ;failed anyway
+ >
+093b : >fail40301
+ > trap ;bbs branch taken
+093b : 4c3b09 > jmp * ;failed anyway
+ >
+093e : >ok40301
+ > tst_a $cc,$ff
+093e : 08 > php ;save flags
+093f : c9cc > cmp #$cc ;test result
+ > trap_ne
+0941 : d0fe > bne * ;failed not equal (non zero)
+ >
+0943 : 68 > pla ;load status
+0944 : 48 > pha
+ > cmp_flag $ff
+0945 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0947 : d0fe > bne * ;failed not equal (non zero)
+ >
+0949 : 28 > plp ;restore status
+ >
+094a : a50c > lda zpt
+094c : c9f7 > cmp #$ff-(1<<3)
+ > trap_ne ;zp altered
+094e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 4
+0950 : a910 > lda #(1<<4) ;testing 1 bit on
+0952 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0954 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0956 : 48 > pha ;use stack to load status
+0957 : a933 > lda #$33 ;precharge accu
+0959 : 28 > plp
+ >
+095a : 4f0c06 > bbr 4,zpt,fail10336
+095d : cf0c06 > bbs 4,zpt,ok10336
+ > trap ;bbs branch not taken
+0960 : 4c6009 > jmp * ;failed anyway
+ >
+0963 : >fail10336
+ > trap ;bbr branch taken
+0963 : 4c6309 > jmp * ;failed anyway
+ >
+0966 : >ok10336
+ > tst_a $33,0
+0966 : 08 > php ;save flags
+0967 : c933 > cmp #$33 ;test result
+ > trap_ne
+0969 : d0fe > bne * ;failed not equal (non zero)
+ >
+096b : 68 > pla ;load status
+096c : 48 > pha
+ > cmp_flag 0
+096d : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+096f : d0fe > bne * ;failed not equal (non zero)
+ >
+0971 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0972 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0974 : 48 > pha ;use stack to load status
+0975 : a9cc > lda #$cc ;precharge accu
+0977 : 28 > plp
+ >
+0978 : 4f0c06 > bbr 4,zpt,fail20336
+097b : cf0c06 > bbs 4,zpt,ok20336
+ > trap ;bbs branch not taken
+097e : 4c7e09 > jmp * ;failed anyway
+ >
+0981 : >fail20336
+ > trap ;bbr branch taken
+0981 : 4c8109 > jmp * ;failed anyway
+ >
+0984 : >ok20336
+ > tst_a $cc,$ff
+0984 : 08 > php ;save flags
+0985 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0987 : d0fe > bne * ;failed not equal (non zero)
+ >
+0989 : 68 > pla ;load status
+098a : 48 > pha
+ > cmp_flag $ff
+098b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+098d : d0fe > bne * ;failed not equal (non zero)
+ >
+098f : 28 > plp ;restore status
+ >
+0990 : a50c > lda zpt
+0992 : c910 > cmp #(1<<4)
+ > trap_ne ;zp altered
+0994 : d0fe > bne * ;failed not equal (non zero)
+ >
+0996 : a9ef > lda #$ff-(1<<4) ;testing 1 bit off
+0998 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+099a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+099c : 48 > pha ;use stack to load status
+099d : a933 > lda #$33 ;precharge accu
+099f : 28 > plp
+ >
+09a0 : cf0c06 > bbs 4,zpt,fail30336
+09a3 : 4f0c06 > bbr 4,zpt,ok30336
+ > trap ;bbr branch not taken
+09a6 : 4ca609 > jmp * ;failed anyway
+ >
+09a9 : >fail30336
+ > trap ;bbs branch taken
+09a9 : 4ca909 > jmp * ;failed anyway
+ >
+09ac : >ok30336
+ > tst_a $33,0
+09ac : 08 > php ;save flags
+09ad : c933 > cmp #$33 ;test result
+ > trap_ne
+09af : d0fe > bne * ;failed not equal (non zero)
+ >
+09b1 : 68 > pla ;load status
+09b2 : 48 > pha
+ > cmp_flag 0
+09b3 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+09b5 : d0fe > bne * ;failed not equal (non zero)
+ >
+09b7 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+09b8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+09ba : 48 > pha ;use stack to load status
+09bb : a9cc > lda #$cc ;precharge accu
+09bd : 28 > plp
+ >
+09be : cf0c06 > bbs 4,zpt,fail40336
+09c1 : 4f0c06 > bbr 4,zpt,ok40336
+ > trap ;bbr branch not taken
+09c4 : 4cc409 > jmp * ;failed anyway
+ >
+09c7 : >fail40336
+ > trap ;bbs branch taken
+09c7 : 4cc709 > jmp * ;failed anyway
+ >
+09ca : >ok40336
+ > tst_a $cc,$ff
+09ca : 08 > php ;save flags
+09cb : c9cc > cmp #$cc ;test result
+ > trap_ne
+09cd : d0fe > bne * ;failed not equal (non zero)
+ >
+09cf : 68 > pla ;load status
+09d0 : 48 > pha
+ > cmp_flag $ff
+09d1 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+09d3 : d0fe > bne * ;failed not equal (non zero)
+ >
+09d5 : 28 > plp ;restore status
+ >
+09d6 : a50c > lda zpt
+09d8 : c9ef > cmp #$ff-(1<<4)
+ > trap_ne ;zp altered
+09da : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 5
+09dc : a920 > lda #(1<<5) ;testing 1 bit on
+09de : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+09e0 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+09e2 : 48 > pha ;use stack to load status
+09e3 : a933 > lda #$33 ;precharge accu
+09e5 : 28 > plp
+ >
+09e6 : 5f0c06 > bbr 5,zpt,fail10371
+09e9 : df0c06 > bbs 5,zpt,ok10371
+ > trap ;bbs branch not taken
+09ec : 4cec09 > jmp * ;failed anyway
+ >
+09ef : >fail10371
+ > trap ;bbr branch taken
+09ef : 4cef09 > jmp * ;failed anyway
+ >
+09f2 : >ok10371
+ > tst_a $33,0
+09f2 : 08 > php ;save flags
+09f3 : c933 > cmp #$33 ;test result
+ > trap_ne
+09f5 : d0fe > bne * ;failed not equal (non zero)
+ >
+09f7 : 68 > pla ;load status
+09f8 : 48 > pha
+ > cmp_flag 0
+09f9 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+09fb : d0fe > bne * ;failed not equal (non zero)
+ >
+09fd : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+09fe : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0a00 : 48 > pha ;use stack to load status
+0a01 : a9cc > lda #$cc ;precharge accu
+0a03 : 28 > plp
+ >
+0a04 : 5f0c06 > bbr 5,zpt,fail20371
+0a07 : df0c06 > bbs 5,zpt,ok20371
+ > trap ;bbs branch not taken
+0a0a : 4c0a0a > jmp * ;failed anyway
+ >
+0a0d : >fail20371
+ > trap ;bbr branch taken
+0a0d : 4c0d0a > jmp * ;failed anyway
+ >
+0a10 : >ok20371
+ > tst_a $cc,$ff
+0a10 : 08 > php ;save flags
+0a11 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0a13 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a15 : 68 > pla ;load status
+0a16 : 48 > pha
+ > cmp_flag $ff
+0a17 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a19 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a1b : 28 > plp ;restore status
+ >
+0a1c : a50c > lda zpt
+0a1e : c920 > cmp #(1<<5)
+ > trap_ne ;zp altered
+0a20 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a22 : a9df > lda #$ff-(1<<5) ;testing 1 bit off
+0a24 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0a26 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0a28 : 48 > pha ;use stack to load status
+0a29 : a933 > lda #$33 ;precharge accu
+0a2b : 28 > plp
+ >
+0a2c : df0c06 > bbs 5,zpt,fail30371
+0a2f : 5f0c06 > bbr 5,zpt,ok30371
+ > trap ;bbr branch not taken
+0a32 : 4c320a > jmp * ;failed anyway
+ >
+0a35 : >fail30371
+ > trap ;bbs branch taken
+0a35 : 4c350a > jmp * ;failed anyway
+ >
+0a38 : >ok30371
+ > tst_a $33,0
+0a38 : 08 > php ;save flags
+0a39 : c933 > cmp #$33 ;test result
+ > trap_ne
+0a3b : d0fe > bne * ;failed not equal (non zero)
+ >
+0a3d : 68 > pla ;load status
+0a3e : 48 > pha
+ > cmp_flag 0
+0a3f : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a41 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a43 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0a44 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0a46 : 48 > pha ;use stack to load status
+0a47 : a9cc > lda #$cc ;precharge accu
+0a49 : 28 > plp
+ >
+0a4a : df0c06 > bbs 5,zpt,fail40371
+0a4d : 5f0c06 > bbr 5,zpt,ok40371
+ > trap ;bbr branch not taken
+0a50 : 4c500a > jmp * ;failed anyway
+ >
+0a53 : >fail40371
+ > trap ;bbs branch taken
+0a53 : 4c530a > jmp * ;failed anyway
+ >
+0a56 : >ok40371
+ > tst_a $cc,$ff
+0a56 : 08 > php ;save flags
+0a57 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0a59 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a5b : 68 > pla ;load status
+0a5c : 48 > pha
+ > cmp_flag $ff
+0a5d : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a5f : d0fe > bne * ;failed not equal (non zero)
+ >
+0a61 : 28 > plp ;restore status
+ >
+0a62 : a50c > lda zpt
+0a64 : c9df > cmp #$ff-(1<<5)
+ > trap_ne ;zp altered
+0a66 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 6
+0a68 : a940 > lda #(1<<6) ;testing 1 bit on
+0a6a : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0a6c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0a6e : 48 > pha ;use stack to load status
+0a6f : a933 > lda #$33 ;precharge accu
+0a71 : 28 > plp
+ >
+0a72 : 6f0c06 > bbr 6,zpt,fail10406
+0a75 : ef0c06 > bbs 6,zpt,ok10406
+ > trap ;bbs branch not taken
+0a78 : 4c780a > jmp * ;failed anyway
+ >
+0a7b : >fail10406
+ > trap ;bbr branch taken
+0a7b : 4c7b0a > jmp * ;failed anyway
+ >
+0a7e : >ok10406
+ > tst_a $33,0
+0a7e : 08 > php ;save flags
+0a7f : c933 > cmp #$33 ;test result
+ > trap_ne
+0a81 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a83 : 68 > pla ;load status
+0a84 : 48 > pha
+ > cmp_flag 0
+0a85 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0a87 : d0fe > bne * ;failed not equal (non zero)
+ >
+0a89 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0a8a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0a8c : 48 > pha ;use stack to load status
+0a8d : a9cc > lda #$cc ;precharge accu
+0a8f : 28 > plp
+ >
+0a90 : 6f0c06 > bbr 6,zpt,fail20406
+0a93 : ef0c06 > bbs 6,zpt,ok20406
+ > trap ;bbs branch not taken
+0a96 : 4c960a > jmp * ;failed anyway
+ >
+0a99 : >fail20406
+ > trap ;bbr branch taken
+0a99 : 4c990a > jmp * ;failed anyway
+ >
+0a9c : >ok20406
+ > tst_a $cc,$ff
+0a9c : 08 > php ;save flags
+0a9d : c9cc > cmp #$cc ;test result
+ > trap_ne
+0a9f : d0fe > bne * ;failed not equal (non zero)
+ >
+0aa1 : 68 > pla ;load status
+0aa2 : 48 > pha
+ > cmp_flag $ff
+0aa3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0aa5 : d0fe > bne * ;failed not equal (non zero)
+ >
+0aa7 : 28 > plp ;restore status
+ >
+0aa8 : a50c > lda zpt
+0aaa : c940 > cmp #(1<<6)
+ > trap_ne ;zp altered
+0aac : d0fe > bne * ;failed not equal (non zero)
+ >
+0aae : a9bf > lda #$ff-(1<<6) ;testing 1 bit off
+0ab0 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0ab2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ab4 : 48 > pha ;use stack to load status
+0ab5 : a933 > lda #$33 ;precharge accu
+0ab7 : 28 > plp
+ >
+0ab8 : ef0c06 > bbs 6,zpt,fail30406
+0abb : 6f0c06 > bbr 6,zpt,ok30406
+ > trap ;bbr branch not taken
+0abe : 4cbe0a > jmp * ;failed anyway
+ >
+0ac1 : >fail30406
+ > trap ;bbs branch taken
+0ac1 : 4cc10a > jmp * ;failed anyway
+ >
+0ac4 : >ok30406
+ > tst_a $33,0
+0ac4 : 08 > php ;save flags
+0ac5 : c933 > cmp #$33 ;test result
+ > trap_ne
+0ac7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ac9 : 68 > pla ;load status
+0aca : 48 > pha
+ > cmp_flag 0
+0acb : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0acd : d0fe > bne * ;failed not equal (non zero)
+ >
+0acf : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0ad0 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0ad2 : 48 > pha ;use stack to load status
+0ad3 : a9cc > lda #$cc ;precharge accu
+0ad5 : 28 > plp
+ >
+0ad6 : ef0c06 > bbs 6,zpt,fail40406
+0ad9 : 6f0c06 > bbr 6,zpt,ok40406
+ > trap ;bbr branch not taken
+0adc : 4cdc0a > jmp * ;failed anyway
+ >
+0adf : >fail40406
+ > trap ;bbs branch taken
+0adf : 4cdf0a > jmp * ;failed anyway
+ >
+0ae2 : >ok40406
+ > tst_a $cc,$ff
+0ae2 : 08 > php ;save flags
+0ae3 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0ae5 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ae7 : 68 > pla ;load status
+0ae8 : 48 > pha
+ > cmp_flag $ff
+0ae9 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0aeb : d0fe > bne * ;failed not equal (non zero)
+ >
+0aed : 28 > plp ;restore status
+ >
+0aee : a50c > lda zpt
+0af0 : c9bf > cmp #$ff-(1<<6)
+ > trap_ne ;zp altered
+0af2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ bbt 7
+0af4 : a980 > lda #(1<<7) ;testing 1 bit on
+0af6 : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0af8 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0afa : 48 > pha ;use stack to load status
+0afb : a933 > lda #$33 ;precharge accu
+0afd : 28 > plp
+ >
+0afe : 7f0c06 > bbr 7,zpt,fail10441
+0b01 : ff0c06 > bbs 7,zpt,ok10441
+ > trap ;bbs branch not taken
+0b04 : 4c040b > jmp * ;failed anyway
+ >
+0b07 : >fail10441
+ > trap ;bbr branch taken
+0b07 : 4c070b > jmp * ;failed anyway
+ >
+0b0a : >ok10441
+ > tst_a $33,0
+0b0a : 08 > php ;save flags
+0b0b : c933 > cmp #$33 ;test result
+ > trap_ne
+0b0d : d0fe > bne * ;failed not equal (non zero)
+ >
+0b0f : 68 > pla ;load status
+0b10 : 48 > pha
+ > cmp_flag 0
+0b11 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b13 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b15 : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0b16 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0b18 : 48 > pha ;use stack to load status
+0b19 : a9cc > lda #$cc ;precharge accu
+0b1b : 28 > plp
+ >
+0b1c : 7f0c06 > bbr 7,zpt,fail20441
+0b1f : ff0c06 > bbs 7,zpt,ok20441
+ > trap ;bbs branch not taken
+0b22 : 4c220b > jmp * ;failed anyway
+ >
+0b25 : >fail20441
+ > trap ;bbr branch taken
+0b25 : 4c250b > jmp * ;failed anyway
+ >
+0b28 : >ok20441
+ > tst_a $cc,$ff
+0b28 : 08 > php ;save flags
+0b29 : c9cc > cmp #$cc ;test result
+ > trap_ne
+0b2b : d0fe > bne * ;failed not equal (non zero)
+ >
+0b2d : 68 > pla ;load status
+0b2e : 48 > pha
+ > cmp_flag $ff
+0b2f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b31 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b33 : 28 > plp ;restore status
+ >
+0b34 : a50c > lda zpt
+0b36 : c980 > cmp #(1<<7)
+ > trap_ne ;zp altered
+0b38 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b3a : a97f > lda #$ff-(1<<7) ;testing 1 bit off
+0b3c : 850c > sta zpt
+ > set_a $33,0 ;with flags off
+ > load_flag 0
+0b3e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0b40 : 48 > pha ;use stack to load status
+0b41 : a933 > lda #$33 ;precharge accu
+0b43 : 28 > plp
+ >
+0b44 : ff0c06 > bbs 7,zpt,fail30441
+0b47 : 7f0c06 > bbr 7,zpt,ok30441
+ > trap ;bbr branch not taken
+0b4a : 4c4a0b > jmp * ;failed anyway
+ >
+0b4d : >fail30441
+ > trap ;bbs branch taken
+0b4d : 4c4d0b > jmp * ;failed anyway
+ >
+0b50 : >ok30441
+ > tst_a $33,0
+0b50 : 08 > php ;save flags
+0b51 : c933 > cmp #$33 ;test result
+ > trap_ne
+0b53 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b55 : 68 > pla ;load status
+0b56 : 48 > pha
+ > cmp_flag 0
+0b57 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b59 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b5b : 28 > plp ;restore status
+ >
+ > set_a $cc,$ff ;with flags on
+ > load_flag $ff
+0b5c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0b5e : 48 > pha ;use stack to load status
+0b5f : a9cc > lda #$cc ;precharge accu
+0b61 : 28 > plp
+ >
+0b62 : ff0c06 > bbs 7,zpt,fail40441
+0b65 : 7f0c06 > bbr 7,zpt,ok40441
+ > trap ;bbr branch not taken
+0b68 : 4c680b > jmp * ;failed anyway
+ >
+0b6b : >fail40441
+ > trap ;bbs branch taken
+0b6b : 4c6b0b > jmp * ;failed anyway
+ >
+0b6e : >ok40441
+ > tst_a $cc,$ff
+0b6e : 08 > php ;save flags
+0b6f : c9cc > cmp #$cc ;test result
+ > trap_ne
+0b71 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b73 : 68 > pla ;load status
+0b74 : 48 > pha
+ > cmp_flag $ff
+0b75 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0b77 : d0fe > bne * ;failed not equal (non zero)
+ >
+0b79 : 28 > plp ;restore status
+ >
+0b7a : a50c > lda zpt
+0b7c : c97f > cmp #$ff-(1<<7)
+ > trap_ne ;zp altered
+0b7e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+0b80 : e011 cpx #$11
+ trap_ne ;x overwritten
+0b82 : d0fe > bne * ;failed not equal (non zero)
+
+0b84 : c022 cpy #$22
+ trap_ne ;y overwritten
+0b86 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+0b88 : ad0202 > lda test_case ;previous test
+0b8b : c906 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0b8d : d0fe > bne * ;failed not equal (non zero)
+ >
+0007 = >test_num = test_num + 1
+0b8f : a907 > lda #test_num ;*** next tests' number
+0b91 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ bbrc macro ;\1 = bitnum
+ bbr \1,zpt,skip\?
+ eor #(1<<\1)
+ skip\?
+ endm
+ bbsc macro ;\1 = bitnum
+ bbs \1,zpt,skip\?
+ eor #(1<<\1)
+ skip\?
+ endm
+
+0b94 : a900 lda #0 ;combined bit test
+0b96 : 850c sta zpt
+0b98 : a900 bbcl lda #0
+ bbrc 0
+0b9a : 0f0c02 > bbr 0,zpt,skip0480
+0b9d : 4901 > eor #(1<<0)
+0b9f : >skip0480
+
+ bbrc 1
+0b9f : 1f0c02 > bbr 1,zpt,skip0481
+0ba2 : 4902 > eor #(1<<1)
+0ba4 : >skip0481
+
+ bbrc 2
+0ba4 : 2f0c02 > bbr 2,zpt,skip0482
+0ba7 : 4904 > eor #(1<<2)
+0ba9 : >skip0482
+
+ bbrc 3
+0ba9 : 3f0c02 > bbr 3,zpt,skip0483
+0bac : 4908 > eor #(1<<3)
+0bae : >skip0483
+
+ bbrc 4
+0bae : 4f0c02 > bbr 4,zpt,skip0484
+0bb1 : 4910 > eor #(1<<4)
+0bb3 : >skip0484
+
+ bbrc 5
+0bb3 : 5f0c02 > bbr 5,zpt,skip0485
+0bb6 : 4920 > eor #(1<<5)
+0bb8 : >skip0485
+
+ bbrc 6
+0bb8 : 6f0c02 > bbr 6,zpt,skip0486
+0bbb : 4940 > eor #(1<<6)
+0bbd : >skip0486
+
+ bbrc 7
+0bbd : 7f0c02 > bbr 7,zpt,skip0487
+0bc0 : 4980 > eor #(1<<7)
+0bc2 : >skip0487
+
+0bc2 : 450c eor zpt
+ trap_ne ;failed bbr bitnum in accu
+0bc4 : d0fe > bne * ;failed not equal (non zero)
+
+0bc6 : a9ff lda #$ff
+ bbsc 0
+0bc8 : 8f0c02 > bbs 0,zpt,skip0489
+0bcb : 4901 > eor #(1<<0)
+0bcd : >skip0489
+
+ bbsc 1
+0bcd : 9f0c02 > bbs 1,zpt,skip0490
+0bd0 : 4902 > eor #(1<<1)
+0bd2 : >skip0490
+
+ bbsc 2
+0bd2 : af0c02 > bbs 2,zpt,skip0491
+0bd5 : 4904 > eor #(1<<2)
+0bd7 : >skip0491
+
+ bbsc 3
+0bd7 : bf0c02 > bbs 3,zpt,skip0492
+0bda : 4908 > eor #(1<<3)
+0bdc : >skip0492
+
+ bbsc 4
+0bdc : cf0c02 > bbs 4,zpt,skip0493
+0bdf : 4910 > eor #(1<<4)
+0be1 : >skip0493
+
+ bbsc 5
+0be1 : df0c02 > bbs 5,zpt,skip0494
+0be4 : 4920 > eor #(1<<5)
+0be6 : >skip0494
+
+ bbsc 6
+0be6 : ef0c02 > bbs 6,zpt,skip0495
+0be9 : 4940 > eor #(1<<6)
+0beb : >skip0495
+
+ bbsc 7
+0beb : ff0c02 > bbs 7,zpt,skip0496
+0bee : 4980 > eor #(1<<7)
+0bf0 : >skip0496
+
+0bf0 : 450c eor zpt
+ trap_ne ;failed bbs bitnum in accu
+0bf2 : d0fe > bne * ;failed not equal (non zero)
+
+0bf4 : e60c inc zpt
+0bf6 : d0a0 bne bbcl
+ next_test
+0bf8 : ad0202 > lda test_case ;previous test
+0bfb : c907 > cmp #test_num
+ > trap_ne ;test is out of sequence
+0bfd : d0fe > bne * ;failed not equal (non zero)
+ >
+0008 = >test_num = test_num + 1
+0bff : a908 > lda #test_num ;*** next tests' number
+0c01 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ endif
+
+ ; testing NOP
+
+ nop_test macro ;\1 = opcode, \2 = # of bytes
+ ldy #$42
+ ldx #4-\2
+ db \1 ;test nop length
+ if \2 = 1
+ dex
+ dex
+ endif
+ if \2 = 2
+ iny
+ dex
+ endif
+ if \2 = 3
+ iny
+ iny
+ endif
+ dex
+ trap_ne ;wrong number of bytes
+ set_a $ff-\1,0
+ db \1 ;test nop integrity - flags off
+ nop
+ nop
+ tst_a $ff-\1,0
+ set_a $aa-\1,$ff
+ db \1 ;test nop integrity - flags on
+ nop
+ nop
+ tst_a $aa-\1,$ff
+ cpy #$42
+ trap_ne ;y changed
+ cpx #0
+ trap_ne ;x changed
+ endm
+
+ if skip_nop = 0
+ nop_test $02,2
+0c04 : a042 > ldy #$42
+0c06 : a202 > ldx #4-2
+0c08 : 02 > db $02 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0c09 : c8 > iny
+0c0a : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0c0b : ca > dex
+ > trap_ne ;wrong number of bytes
+0c0c : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$02,0
+ > load_flag 0
+0c0e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0c10 : 48 > pha ;use stack to load status
+0c11 : a9fd > lda #$ff-$02 ;precharge accu
+0c13 : 28 > plp
+ >
+0c14 : 02 > db $02 ;test nop integrity - flags off
+0c15 : ea > nop
+0c16 : ea > nop
+ > tst_a $ff-$02,0
+0c17 : 08 > php ;save flags
+0c18 : c9fd > cmp #$ff-$02 ;test result
+ > trap_ne
+0c1a : d0fe > bne * ;failed not equal (non zero)
+ >
+0c1c : 68 > pla ;load status
+0c1d : 48 > pha
+ > cmp_flag 0
+0c1e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c20 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c22 : 28 > plp ;restore status
+ >
+ > set_a $aa-$02,$ff
+ > load_flag $ff
+0c23 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0c25 : 48 > pha ;use stack to load status
+0c26 : a9a8 > lda #$aa-$02 ;precharge accu
+0c28 : 28 > plp
+ >
+0c29 : 02 > db $02 ;test nop integrity - flags on
+0c2a : ea > nop
+0c2b : ea > nop
+ > tst_a $aa-$02,$ff
+0c2c : 08 > php ;save flags
+0c2d : c9a8 > cmp #$aa-$02 ;test result
+ > trap_ne
+0c2f : d0fe > bne * ;failed not equal (non zero)
+ >
+0c31 : 68 > pla ;load status
+0c32 : 48 > pha
+ > cmp_flag $ff
+0c33 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c35 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c37 : 28 > plp ;restore status
+ >
+0c38 : c042 > cpy #$42
+ > trap_ne ;y changed
+0c3a : d0fe > bne * ;failed not equal (non zero)
+ >
+0c3c : e000 > cpx #0
+ > trap_ne ;x changed
+0c3e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $22,2
+0c40 : a042 > ldy #$42
+0c42 : a202 > ldx #4-2
+0c44 : 22 > db $22 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0c45 : c8 > iny
+0c46 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0c47 : ca > dex
+ > trap_ne ;wrong number of bytes
+0c48 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$22,0
+ > load_flag 0
+0c4a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0c4c : 48 > pha ;use stack to load status
+0c4d : a9dd > lda #$ff-$22 ;precharge accu
+0c4f : 28 > plp
+ >
+0c50 : 22 > db $22 ;test nop integrity - flags off
+0c51 : ea > nop
+0c52 : ea > nop
+ > tst_a $ff-$22,0
+0c53 : 08 > php ;save flags
+0c54 : c9dd > cmp #$ff-$22 ;test result
+ > trap_ne
+0c56 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c58 : 68 > pla ;load status
+0c59 : 48 > pha
+ > cmp_flag 0
+0c5a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c5c : d0fe > bne * ;failed not equal (non zero)
+ >
+0c5e : 28 > plp ;restore status
+ >
+ > set_a $aa-$22,$ff
+ > load_flag $ff
+0c5f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0c61 : 48 > pha ;use stack to load status
+0c62 : a988 > lda #$aa-$22 ;precharge accu
+0c64 : 28 > plp
+ >
+0c65 : 22 > db $22 ;test nop integrity - flags on
+0c66 : ea > nop
+0c67 : ea > nop
+ > tst_a $aa-$22,$ff
+0c68 : 08 > php ;save flags
+0c69 : c988 > cmp #$aa-$22 ;test result
+ > trap_ne
+0c6b : d0fe > bne * ;failed not equal (non zero)
+ >
+0c6d : 68 > pla ;load status
+0c6e : 48 > pha
+ > cmp_flag $ff
+0c6f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c71 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c73 : 28 > plp ;restore status
+ >
+0c74 : c042 > cpy #$42
+ > trap_ne ;y changed
+0c76 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c78 : e000 > cpx #0
+ > trap_ne ;x changed
+0c7a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $42,2
+0c7c : a042 > ldy #$42
+0c7e : a202 > ldx #4-2
+0c80 : 42 > db $42 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0c81 : c8 > iny
+0c82 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0c83 : ca > dex
+ > trap_ne ;wrong number of bytes
+0c84 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$42,0
+ > load_flag 0
+0c86 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0c88 : 48 > pha ;use stack to load status
+0c89 : a9bd > lda #$ff-$42 ;precharge accu
+0c8b : 28 > plp
+ >
+0c8c : 42 > db $42 ;test nop integrity - flags off
+0c8d : ea > nop
+0c8e : ea > nop
+ > tst_a $ff-$42,0
+0c8f : 08 > php ;save flags
+0c90 : c9bd > cmp #$ff-$42 ;test result
+ > trap_ne
+0c92 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c94 : 68 > pla ;load status
+0c95 : 48 > pha
+ > cmp_flag 0
+0c96 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0c98 : d0fe > bne * ;failed not equal (non zero)
+ >
+0c9a : 28 > plp ;restore status
+ >
+ > set_a $aa-$42,$ff
+ > load_flag $ff
+0c9b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0c9d : 48 > pha ;use stack to load status
+0c9e : a968 > lda #$aa-$42 ;precharge accu
+0ca0 : 28 > plp
+ >
+0ca1 : 42 > db $42 ;test nop integrity - flags on
+0ca2 : ea > nop
+0ca3 : ea > nop
+ > tst_a $aa-$42,$ff
+0ca4 : 08 > php ;save flags
+0ca5 : c968 > cmp #$aa-$42 ;test result
+ > trap_ne
+0ca7 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ca9 : 68 > pla ;load status
+0caa : 48 > pha
+ > cmp_flag $ff
+0cab : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cad : d0fe > bne * ;failed not equal (non zero)
+ >
+0caf : 28 > plp ;restore status
+ >
+0cb0 : c042 > cpy #$42
+ > trap_ne ;y changed
+0cb2 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cb4 : e000 > cpx #0
+ > trap_ne ;x changed
+0cb6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $62,2
+0cb8 : a042 > ldy #$42
+0cba : a202 > ldx #4-2
+0cbc : 62 > db $62 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0cbd : c8 > iny
+0cbe : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0cbf : ca > dex
+ > trap_ne ;wrong number of bytes
+0cc0 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$62,0
+ > load_flag 0
+0cc2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0cc4 : 48 > pha ;use stack to load status
+0cc5 : a99d > lda #$ff-$62 ;precharge accu
+0cc7 : 28 > plp
+ >
+0cc8 : 62 > db $62 ;test nop integrity - flags off
+0cc9 : ea > nop
+0cca : ea > nop
+ > tst_a $ff-$62,0
+0ccb : 08 > php ;save flags
+0ccc : c99d > cmp #$ff-$62 ;test result
+ > trap_ne
+0cce : d0fe > bne * ;failed not equal (non zero)
+ >
+0cd0 : 68 > pla ;load status
+0cd1 : 48 > pha
+ > cmp_flag 0
+0cd2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0cd4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0cd6 : 28 > plp ;restore status
+ >
+ > set_a $aa-$62,$ff
+ > load_flag $ff
+0cd7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0cd9 : 48 > pha ;use stack to load status
+0cda : a948 > lda #$aa-$62 ;precharge accu
+0cdc : 28 > plp
+ >
+0cdd : 62 > db $62 ;test nop integrity - flags on
+0cde : ea > nop
+0cdf : ea > nop
+ > tst_a $aa-$62,$ff
+0ce0 : 08 > php ;save flags
+0ce1 : c948 > cmp #$aa-$62 ;test result
+ > trap_ne
+0ce3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ce5 : 68 > pla ;load status
+0ce6 : 48 > pha
+ > cmp_flag $ff
+0ce7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ce9 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ceb : 28 > plp ;restore status
+ >
+0cec : c042 > cpy #$42
+ > trap_ne ;y changed
+0cee : d0fe > bne * ;failed not equal (non zero)
+ >
+0cf0 : e000 > cpx #0
+ > trap_ne ;x changed
+0cf2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $82,2
+0cf4 : a042 > ldy #$42
+0cf6 : a202 > ldx #4-2
+0cf8 : 82 > db $82 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0cf9 : c8 > iny
+0cfa : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0cfb : ca > dex
+ > trap_ne ;wrong number of bytes
+0cfc : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$82,0
+ > load_flag 0
+0cfe : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0d00 : 48 > pha ;use stack to load status
+0d01 : a97d > lda #$ff-$82 ;precharge accu
+0d03 : 28 > plp
+ >
+0d04 : 82 > db $82 ;test nop integrity - flags off
+0d05 : ea > nop
+0d06 : ea > nop
+ > tst_a $ff-$82,0
+0d07 : 08 > php ;save flags
+0d08 : c97d > cmp #$ff-$82 ;test result
+ > trap_ne
+0d0a : d0fe > bne * ;failed not equal (non zero)
+ >
+0d0c : 68 > pla ;load status
+0d0d : 48 > pha
+ > cmp_flag 0
+0d0e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d10 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d12 : 28 > plp ;restore status
+ >
+ > set_a $aa-$82,$ff
+ > load_flag $ff
+0d13 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0d15 : 48 > pha ;use stack to load status
+0d16 : a928 > lda #$aa-$82 ;precharge accu
+0d18 : 28 > plp
+ >
+0d19 : 82 > db $82 ;test nop integrity - flags on
+0d1a : ea > nop
+0d1b : ea > nop
+ > tst_a $aa-$82,$ff
+0d1c : 08 > php ;save flags
+0d1d : c928 > cmp #$aa-$82 ;test result
+ > trap_ne
+0d1f : d0fe > bne * ;failed not equal (non zero)
+ >
+0d21 : 68 > pla ;load status
+0d22 : 48 > pha
+ > cmp_flag $ff
+0d23 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d25 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d27 : 28 > plp ;restore status
+ >
+0d28 : c042 > cpy #$42
+ > trap_ne ;y changed
+0d2a : d0fe > bne * ;failed not equal (non zero)
+ >
+0d2c : e000 > cpx #0
+ > trap_ne ;x changed
+0d2e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $c2,2
+0d30 : a042 > ldy #$42
+0d32 : a202 > ldx #4-2
+0d34 : c2 > db $c2 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0d35 : c8 > iny
+0d36 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0d37 : ca > dex
+ > trap_ne ;wrong number of bytes
+0d38 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$c2,0
+ > load_flag 0
+0d3a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0d3c : 48 > pha ;use stack to load status
+0d3d : a93d > lda #$ff-$c2 ;precharge accu
+0d3f : 28 > plp
+ >
+0d40 : c2 > db $c2 ;test nop integrity - flags off
+0d41 : ea > nop
+0d42 : ea > nop
+ > tst_a $ff-$c2,0
+0d43 : 08 > php ;save flags
+0d44 : c93d > cmp #$ff-$c2 ;test result
+ > trap_ne
+0d46 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d48 : 68 > pla ;load status
+0d49 : 48 > pha
+ > cmp_flag 0
+0d4a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d4c : d0fe > bne * ;failed not equal (non zero)
+ >
+0d4e : 28 > plp ;restore status
+ >
+ > set_a $aa-$c2,$ff
+ > load_flag $ff
+0d4f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0d51 : 48 > pha ;use stack to load status
+0d52 : a9e8 > lda #$aa-$c2 ;precharge accu
+0d54 : 28 > plp
+ >
+0d55 : c2 > db $c2 ;test nop integrity - flags on
+0d56 : ea > nop
+0d57 : ea > nop
+ > tst_a $aa-$c2,$ff
+0d58 : 08 > php ;save flags
+0d59 : c9e8 > cmp #$aa-$c2 ;test result
+ > trap_ne
+0d5b : d0fe > bne * ;failed not equal (non zero)
+ >
+0d5d : 68 > pla ;load status
+0d5e : 48 > pha
+ > cmp_flag $ff
+0d5f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d61 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d63 : 28 > plp ;restore status
+ >
+0d64 : c042 > cpy #$42
+ > trap_ne ;y changed
+0d66 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d68 : e000 > cpx #0
+ > trap_ne ;x changed
+0d6a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $e2,2
+0d6c : a042 > ldy #$42
+0d6e : a202 > ldx #4-2
+0d70 : e2 > db $e2 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0d71 : c8 > iny
+0d72 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0d73 : ca > dex
+ > trap_ne ;wrong number of bytes
+0d74 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$e2,0
+ > load_flag 0
+0d76 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0d78 : 48 > pha ;use stack to load status
+0d79 : a91d > lda #$ff-$e2 ;precharge accu
+0d7b : 28 > plp
+ >
+0d7c : e2 > db $e2 ;test nop integrity - flags off
+0d7d : ea > nop
+0d7e : ea > nop
+ > tst_a $ff-$e2,0
+0d7f : 08 > php ;save flags
+0d80 : c91d > cmp #$ff-$e2 ;test result
+ > trap_ne
+0d82 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d84 : 68 > pla ;load status
+0d85 : 48 > pha
+ > cmp_flag 0
+0d86 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d88 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d8a : 28 > plp ;restore status
+ >
+ > set_a $aa-$e2,$ff
+ > load_flag $ff
+0d8b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0d8d : 48 > pha ;use stack to load status
+0d8e : a9c8 > lda #$aa-$e2 ;precharge accu
+0d90 : 28 > plp
+ >
+0d91 : e2 > db $e2 ;test nop integrity - flags on
+0d92 : ea > nop
+0d93 : ea > nop
+ > tst_a $aa-$e2,$ff
+0d94 : 08 > php ;save flags
+0d95 : c9c8 > cmp #$aa-$e2 ;test result
+ > trap_ne
+0d97 : d0fe > bne * ;failed not equal (non zero)
+ >
+0d99 : 68 > pla ;load status
+0d9a : 48 > pha
+ > cmp_flag $ff
+0d9b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0d9d : d0fe > bne * ;failed not equal (non zero)
+ >
+0d9f : 28 > plp ;restore status
+ >
+0da0 : c042 > cpy #$42
+ > trap_ne ;y changed
+0da2 : d0fe > bne * ;failed not equal (non zero)
+ >
+0da4 : e000 > cpx #0
+ > trap_ne ;x changed
+0da6 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $44,2
+0da8 : a042 > ldy #$42
+0daa : a202 > ldx #4-2
+0dac : 44 > db $44 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0dad : c8 > iny
+0dae : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0daf : ca > dex
+ > trap_ne ;wrong number of bytes
+0db0 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$44,0
+ > load_flag 0
+0db2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0db4 : 48 > pha ;use stack to load status
+0db5 : a9bb > lda #$ff-$44 ;precharge accu
+0db7 : 28 > plp
+ >
+0db8 : 44 > db $44 ;test nop integrity - flags off
+0db9 : ea > nop
+0dba : ea > nop
+ > tst_a $ff-$44,0
+0dbb : 08 > php ;save flags
+0dbc : c9bb > cmp #$ff-$44 ;test result
+ > trap_ne
+0dbe : d0fe > bne * ;failed not equal (non zero)
+ >
+0dc0 : 68 > pla ;load status
+0dc1 : 48 > pha
+ > cmp_flag 0
+0dc2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0dc4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0dc6 : 28 > plp ;restore status
+ >
+ > set_a $aa-$44,$ff
+ > load_flag $ff
+0dc7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0dc9 : 48 > pha ;use stack to load status
+0dca : a966 > lda #$aa-$44 ;precharge accu
+0dcc : 28 > plp
+ >
+0dcd : 44 > db $44 ;test nop integrity - flags on
+0dce : ea > nop
+0dcf : ea > nop
+ > tst_a $aa-$44,$ff
+0dd0 : 08 > php ;save flags
+0dd1 : c966 > cmp #$aa-$44 ;test result
+ > trap_ne
+0dd3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0dd5 : 68 > pla ;load status
+0dd6 : 48 > pha
+ > cmp_flag $ff
+0dd7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0dd9 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ddb : 28 > plp ;restore status
+ >
+0ddc : c042 > cpy #$42
+ > trap_ne ;y changed
+0dde : d0fe > bne * ;failed not equal (non zero)
+ >
+0de0 : e000 > cpx #0
+ > trap_ne ;x changed
+0de2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $54,2
+0de4 : a042 > ldy #$42
+0de6 : a202 > ldx #4-2
+0de8 : 54 > db $54 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0de9 : c8 > iny
+0dea : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0deb : ca > dex
+ > trap_ne ;wrong number of bytes
+0dec : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$54,0
+ > load_flag 0
+0dee : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0df0 : 48 > pha ;use stack to load status
+0df1 : a9ab > lda #$ff-$54 ;precharge accu
+0df3 : 28 > plp
+ >
+0df4 : 54 > db $54 ;test nop integrity - flags off
+0df5 : ea > nop
+0df6 : ea > nop
+ > tst_a $ff-$54,0
+0df7 : 08 > php ;save flags
+0df8 : c9ab > cmp #$ff-$54 ;test result
+ > trap_ne
+0dfa : d0fe > bne * ;failed not equal (non zero)
+ >
+0dfc : 68 > pla ;load status
+0dfd : 48 > pha
+ > cmp_flag 0
+0dfe : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e00 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e02 : 28 > plp ;restore status
+ >
+ > set_a $aa-$54,$ff
+ > load_flag $ff
+0e03 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e05 : 48 > pha ;use stack to load status
+0e06 : a956 > lda #$aa-$54 ;precharge accu
+0e08 : 28 > plp
+ >
+0e09 : 54 > db $54 ;test nop integrity - flags on
+0e0a : ea > nop
+0e0b : ea > nop
+ > tst_a $aa-$54,$ff
+0e0c : 08 > php ;save flags
+0e0d : c956 > cmp #$aa-$54 ;test result
+ > trap_ne
+0e0f : d0fe > bne * ;failed not equal (non zero)
+ >
+0e11 : 68 > pla ;load status
+0e12 : 48 > pha
+ > cmp_flag $ff
+0e13 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e15 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e17 : 28 > plp ;restore status
+ >
+0e18 : c042 > cpy #$42
+ > trap_ne ;y changed
+0e1a : d0fe > bne * ;failed not equal (non zero)
+ >
+0e1c : e000 > cpx #0
+ > trap_ne ;x changed
+0e1e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $d4,2
+0e20 : a042 > ldy #$42
+0e22 : a202 > ldx #4-2
+0e24 : d4 > db $d4 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0e25 : c8 > iny
+0e26 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0e27 : ca > dex
+ > trap_ne ;wrong number of bytes
+0e28 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$d4,0
+ > load_flag 0
+0e2a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e2c : 48 > pha ;use stack to load status
+0e2d : a92b > lda #$ff-$d4 ;precharge accu
+0e2f : 28 > plp
+ >
+0e30 : d4 > db $d4 ;test nop integrity - flags off
+0e31 : ea > nop
+0e32 : ea > nop
+ > tst_a $ff-$d4,0
+0e33 : 08 > php ;save flags
+0e34 : c92b > cmp #$ff-$d4 ;test result
+ > trap_ne
+0e36 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e38 : 68 > pla ;load status
+0e39 : 48 > pha
+ > cmp_flag 0
+0e3a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e3c : d0fe > bne * ;failed not equal (non zero)
+ >
+0e3e : 28 > plp ;restore status
+ >
+ > set_a $aa-$d4,$ff
+ > load_flag $ff
+0e3f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e41 : 48 > pha ;use stack to load status
+0e42 : a9d6 > lda #$aa-$d4 ;precharge accu
+0e44 : 28 > plp
+ >
+0e45 : d4 > db $d4 ;test nop integrity - flags on
+0e46 : ea > nop
+0e47 : ea > nop
+ > tst_a $aa-$d4,$ff
+0e48 : 08 > php ;save flags
+0e49 : c9d6 > cmp #$aa-$d4 ;test result
+ > trap_ne
+0e4b : d0fe > bne * ;failed not equal (non zero)
+ >
+0e4d : 68 > pla ;load status
+0e4e : 48 > pha
+ > cmp_flag $ff
+0e4f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e51 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e53 : 28 > plp ;restore status
+ >
+0e54 : c042 > cpy #$42
+ > trap_ne ;y changed
+0e56 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e58 : e000 > cpx #0
+ > trap_ne ;x changed
+0e5a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $f4,2
+0e5c : a042 > ldy #$42
+0e5e : a202 > ldx #4-2
+0e60 : f4 > db $f4 ;test nop length
+ > if 2 = 1
+ > dex
+ > dex
+ > endif
+ > if 2 = 2
+0e61 : c8 > iny
+0e62 : ca > dex
+ > endif
+ > if 2 = 3
+ > iny
+ > iny
+ > endif
+0e63 : ca > dex
+ > trap_ne ;wrong number of bytes
+0e64 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$f4,0
+ > load_flag 0
+0e66 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0e68 : 48 > pha ;use stack to load status
+0e69 : a90b > lda #$ff-$f4 ;precharge accu
+0e6b : 28 > plp
+ >
+0e6c : f4 > db $f4 ;test nop integrity - flags off
+0e6d : ea > nop
+0e6e : ea > nop
+ > tst_a $ff-$f4,0
+0e6f : 08 > php ;save flags
+0e70 : c90b > cmp #$ff-$f4 ;test result
+ > trap_ne
+0e72 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e74 : 68 > pla ;load status
+0e75 : 48 > pha
+ > cmp_flag 0
+0e76 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e78 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e7a : 28 > plp ;restore status
+ >
+ > set_a $aa-$f4,$ff
+ > load_flag $ff
+0e7b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0e7d : 48 > pha ;use stack to load status
+0e7e : a9b6 > lda #$aa-$f4 ;precharge accu
+0e80 : 28 > plp
+ >
+0e81 : f4 > db $f4 ;test nop integrity - flags on
+0e82 : ea > nop
+0e83 : ea > nop
+ > tst_a $aa-$f4,$ff
+0e84 : 08 > php ;save flags
+0e85 : c9b6 > cmp #$aa-$f4 ;test result
+ > trap_ne
+0e87 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e89 : 68 > pla ;load status
+0e8a : 48 > pha
+ > cmp_flag $ff
+0e8b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0e8d : d0fe > bne * ;failed not equal (non zero)
+ >
+0e8f : 28 > plp ;restore status
+ >
+0e90 : c042 > cpy #$42
+ > trap_ne ;y changed
+0e92 : d0fe > bne * ;failed not equal (non zero)
+ >
+0e94 : e000 > cpx #0
+ > trap_ne ;x changed
+0e96 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $5c,3
+0e98 : a042 > ldy #$42
+0e9a : a201 > ldx #4-3
+0e9c : 5c > db $5c ;test nop length
+ > if 3 = 1
+ > dex
+ > dex
+ > endif
+ > if 3 = 2
+ > iny
+ > dex
+ > endif
+ > if 3 = 3
+0e9d : c8 > iny
+0e9e : c8 > iny
+ > endif
+0e9f : ca > dex
+ > trap_ne ;wrong number of bytes
+0ea0 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$5c,0
+ > load_flag 0
+0ea2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ea4 : 48 > pha ;use stack to load status
+0ea5 : a9a3 > lda #$ff-$5c ;precharge accu
+0ea7 : 28 > plp
+ >
+0ea8 : 5c > db $5c ;test nop integrity - flags off
+0ea9 : ea > nop
+0eaa : ea > nop
+ > tst_a $ff-$5c,0
+0eab : 08 > php ;save flags
+0eac : c9a3 > cmp #$ff-$5c ;test result
+ > trap_ne
+0eae : d0fe > bne * ;failed not equal (non zero)
+ >
+0eb0 : 68 > pla ;load status
+0eb1 : 48 > pha
+ > cmp_flag 0
+0eb2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0eb4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0eb6 : 28 > plp ;restore status
+ >
+ > set_a $aa-$5c,$ff
+ > load_flag $ff
+0eb7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0eb9 : 48 > pha ;use stack to load status
+0eba : a94e > lda #$aa-$5c ;precharge accu
+0ebc : 28 > plp
+ >
+0ebd : 5c > db $5c ;test nop integrity - flags on
+0ebe : ea > nop
+0ebf : ea > nop
+ > tst_a $aa-$5c,$ff
+0ec0 : 08 > php ;save flags
+0ec1 : c94e > cmp #$aa-$5c ;test result
+ > trap_ne
+0ec3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ec5 : 68 > pla ;load status
+0ec6 : 48 > pha
+ > cmp_flag $ff
+0ec7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ec9 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ecb : 28 > plp ;restore status
+ >
+0ecc : c042 > cpy #$42
+ > trap_ne ;y changed
+0ece : d0fe > bne * ;failed not equal (non zero)
+ >
+0ed0 : e000 > cpx #0
+ > trap_ne ;x changed
+0ed2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $dc,3
+0ed4 : a042 > ldy #$42
+0ed6 : a201 > ldx #4-3
+0ed8 : dc > db $dc ;test nop length
+ > if 3 = 1
+ > dex
+ > dex
+ > endif
+ > if 3 = 2
+ > iny
+ > dex
+ > endif
+ > if 3 = 3
+0ed9 : c8 > iny
+0eda : c8 > iny
+ > endif
+0edb : ca > dex
+ > trap_ne ;wrong number of bytes
+0edc : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$dc,0
+ > load_flag 0
+0ede : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0ee0 : 48 > pha ;use stack to load status
+0ee1 : a923 > lda #$ff-$dc ;precharge accu
+0ee3 : 28 > plp
+ >
+0ee4 : dc > db $dc ;test nop integrity - flags off
+0ee5 : ea > nop
+0ee6 : ea > nop
+ > tst_a $ff-$dc,0
+0ee7 : 08 > php ;save flags
+0ee8 : c923 > cmp #$ff-$dc ;test result
+ > trap_ne
+0eea : d0fe > bne * ;failed not equal (non zero)
+ >
+0eec : 68 > pla ;load status
+0eed : 48 > pha
+ > cmp_flag 0
+0eee : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ef0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ef2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$dc,$ff
+ > load_flag $ff
+0ef3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0ef5 : 48 > pha ;use stack to load status
+0ef6 : a9ce > lda #$aa-$dc ;precharge accu
+0ef8 : 28 > plp
+ >
+0ef9 : dc > db $dc ;test nop integrity - flags on
+0efa : ea > nop
+0efb : ea > nop
+ > tst_a $aa-$dc,$ff
+0efc : 08 > php ;save flags
+0efd : c9ce > cmp #$aa-$dc ;test result
+ > trap_ne
+0eff : d0fe > bne * ;failed not equal (non zero)
+ >
+0f01 : 68 > pla ;load status
+0f02 : 48 > pha
+ > cmp_flag $ff
+0f03 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f05 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f07 : 28 > plp ;restore status
+ >
+0f08 : c042 > cpy #$42
+ > trap_ne ;y changed
+0f0a : d0fe > bne * ;failed not equal (non zero)
+ >
+0f0c : e000 > cpx #0
+ > trap_ne ;x changed
+0f0e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $fc,3
+0f10 : a042 > ldy #$42
+0f12 : a201 > ldx #4-3
+0f14 : fc > db $fc ;test nop length
+ > if 3 = 1
+ > dex
+ > dex
+ > endif
+ > if 3 = 2
+ > iny
+ > dex
+ > endif
+ > if 3 = 3
+0f15 : c8 > iny
+0f16 : c8 > iny
+ > endif
+0f17 : ca > dex
+ > trap_ne ;wrong number of bytes
+0f18 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$fc,0
+ > load_flag 0
+0f1a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0f1c : 48 > pha ;use stack to load status
+0f1d : a903 > lda #$ff-$fc ;precharge accu
+0f1f : 28 > plp
+ >
+0f20 : fc > db $fc ;test nop integrity - flags off
+0f21 : ea > nop
+0f22 : ea > nop
+ > tst_a $ff-$fc,0
+0f23 : 08 > php ;save flags
+0f24 : c903 > cmp #$ff-$fc ;test result
+ > trap_ne
+0f26 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f28 : 68 > pla ;load status
+0f29 : 48 > pha
+ > cmp_flag 0
+0f2a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f2c : d0fe > bne * ;failed not equal (non zero)
+ >
+0f2e : 28 > plp ;restore status
+ >
+ > set_a $aa-$fc,$ff
+ > load_flag $ff
+0f2f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0f31 : 48 > pha ;use stack to load status
+0f32 : a9ae > lda #$aa-$fc ;precharge accu
+0f34 : 28 > plp
+ >
+0f35 : fc > db $fc ;test nop integrity - flags on
+0f36 : ea > nop
+0f37 : ea > nop
+ > tst_a $aa-$fc,$ff
+0f38 : 08 > php ;save flags
+0f39 : c9ae > cmp #$aa-$fc ;test result
+ > trap_ne
+0f3b : d0fe > bne * ;failed not equal (non zero)
+ >
+0f3d : 68 > pla ;load status
+0f3e : 48 > pha
+ > cmp_flag $ff
+0f3f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f41 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f43 : 28 > plp ;restore status
+ >
+0f44 : c042 > cpy #$42
+ > trap_ne ;y changed
+0f46 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f48 : e000 > cpx #0
+ > trap_ne ;x changed
+0f4a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $03,1
+0f4c : a042 > ldy #$42
+0f4e : a203 > ldx #4-1
+0f50 : 03 > db $03 ;test nop length
+ > if 1 = 1
+0f51 : ca > dex
+0f52 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+0f53 : ca > dex
+ > trap_ne ;wrong number of bytes
+0f54 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$03,0
+ > load_flag 0
+0f56 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0f58 : 48 > pha ;use stack to load status
+0f59 : a9fc > lda #$ff-$03 ;precharge accu
+0f5b : 28 > plp
+ >
+0f5c : 03 > db $03 ;test nop integrity - flags off
+0f5d : ea > nop
+0f5e : ea > nop
+ > tst_a $ff-$03,0
+0f5f : 08 > php ;save flags
+0f60 : c9fc > cmp #$ff-$03 ;test result
+ > trap_ne
+0f62 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f64 : 68 > pla ;load status
+0f65 : 48 > pha
+ > cmp_flag 0
+0f66 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f68 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f6a : 28 > plp ;restore status
+ >
+ > set_a $aa-$03,$ff
+ > load_flag $ff
+0f6b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0f6d : 48 > pha ;use stack to load status
+0f6e : a9a7 > lda #$aa-$03 ;precharge accu
+0f70 : 28 > plp
+ >
+0f71 : 03 > db $03 ;test nop integrity - flags on
+0f72 : ea > nop
+0f73 : ea > nop
+ > tst_a $aa-$03,$ff
+0f74 : 08 > php ;save flags
+0f75 : c9a7 > cmp #$aa-$03 ;test result
+ > trap_ne
+0f77 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f79 : 68 > pla ;load status
+0f7a : 48 > pha
+ > cmp_flag $ff
+0f7b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0f7d : d0fe > bne * ;failed not equal (non zero)
+ >
+0f7f : 28 > plp ;restore status
+ >
+0f80 : c042 > cpy #$42
+ > trap_ne ;y changed
+0f82 : d0fe > bne * ;failed not equal (non zero)
+ >
+0f84 : e000 > cpx #0
+ > trap_ne ;x changed
+0f86 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $13,1
+0f88 : a042 > ldy #$42
+0f8a : a203 > ldx #4-1
+0f8c : 13 > db $13 ;test nop length
+ > if 1 = 1
+0f8d : ca > dex
+0f8e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+0f8f : ca > dex
+ > trap_ne ;wrong number of bytes
+0f90 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$13,0
+ > load_flag 0
+0f92 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0f94 : 48 > pha ;use stack to load status
+0f95 : a9ec > lda #$ff-$13 ;precharge accu
+0f97 : 28 > plp
+ >
+0f98 : 13 > db $13 ;test nop integrity - flags off
+0f99 : ea > nop
+0f9a : ea > nop
+ > tst_a $ff-$13,0
+0f9b : 08 > php ;save flags
+0f9c : c9ec > cmp #$ff-$13 ;test result
+ > trap_ne
+0f9e : d0fe > bne * ;failed not equal (non zero)
+ >
+0fa0 : 68 > pla ;load status
+0fa1 : 48 > pha
+ > cmp_flag 0
+0fa2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0fa4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0fa6 : 28 > plp ;restore status
+ >
+ > set_a $aa-$13,$ff
+ > load_flag $ff
+0fa7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0fa9 : 48 > pha ;use stack to load status
+0faa : a997 > lda #$aa-$13 ;precharge accu
+0fac : 28 > plp
+ >
+0fad : 13 > db $13 ;test nop integrity - flags on
+0fae : ea > nop
+0faf : ea > nop
+ > tst_a $aa-$13,$ff
+0fb0 : 08 > php ;save flags
+0fb1 : c997 > cmp #$aa-$13 ;test result
+ > trap_ne
+0fb3 : d0fe > bne * ;failed not equal (non zero)
+ >
+0fb5 : 68 > pla ;load status
+0fb6 : 48 > pha
+ > cmp_flag $ff
+0fb7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0fb9 : d0fe > bne * ;failed not equal (non zero)
+ >
+0fbb : 28 > plp ;restore status
+ >
+0fbc : c042 > cpy #$42
+ > trap_ne ;y changed
+0fbe : d0fe > bne * ;failed not equal (non zero)
+ >
+0fc0 : e000 > cpx #0
+ > trap_ne ;x changed
+0fc2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $23,1
+0fc4 : a042 > ldy #$42
+0fc6 : a203 > ldx #4-1
+0fc8 : 23 > db $23 ;test nop length
+ > if 1 = 1
+0fc9 : ca > dex
+0fca : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+0fcb : ca > dex
+ > trap_ne ;wrong number of bytes
+0fcc : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$23,0
+ > load_flag 0
+0fce : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+0fd0 : 48 > pha ;use stack to load status
+0fd1 : a9dc > lda #$ff-$23 ;precharge accu
+0fd3 : 28 > plp
+ >
+0fd4 : 23 > db $23 ;test nop integrity - flags off
+0fd5 : ea > nop
+0fd6 : ea > nop
+ > tst_a $ff-$23,0
+0fd7 : 08 > php ;save flags
+0fd8 : c9dc > cmp #$ff-$23 ;test result
+ > trap_ne
+0fda : d0fe > bne * ;failed not equal (non zero)
+ >
+0fdc : 68 > pla ;load status
+0fdd : 48 > pha
+ > cmp_flag 0
+0fde : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0fe0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0fe2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$23,$ff
+ > load_flag $ff
+0fe3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+0fe5 : 48 > pha ;use stack to load status
+0fe6 : a987 > lda #$aa-$23 ;precharge accu
+0fe8 : 28 > plp
+ >
+0fe9 : 23 > db $23 ;test nop integrity - flags on
+0fea : ea > nop
+0feb : ea > nop
+ > tst_a $aa-$23,$ff
+0fec : 08 > php ;save flags
+0fed : c987 > cmp #$aa-$23 ;test result
+ > trap_ne
+0fef : d0fe > bne * ;failed not equal (non zero)
+ >
+0ff1 : 68 > pla ;load status
+0ff2 : 48 > pha
+ > cmp_flag $ff
+0ff3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+0ff5 : d0fe > bne * ;failed not equal (non zero)
+ >
+0ff7 : 28 > plp ;restore status
+ >
+0ff8 : c042 > cpy #$42
+ > trap_ne ;y changed
+0ffa : d0fe > bne * ;failed not equal (non zero)
+ >
+0ffc : e000 > cpx #0
+ > trap_ne ;x changed
+0ffe : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $33,1
+1000 : a042 > ldy #$42
+1002 : a203 > ldx #4-1
+1004 : 33 > db $33 ;test nop length
+ > if 1 = 1
+1005 : ca > dex
+1006 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1007 : ca > dex
+ > trap_ne ;wrong number of bytes
+1008 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$33,0
+ > load_flag 0
+100a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+100c : 48 > pha ;use stack to load status
+100d : a9cc > lda #$ff-$33 ;precharge accu
+100f : 28 > plp
+ >
+1010 : 33 > db $33 ;test nop integrity - flags off
+1011 : ea > nop
+1012 : ea > nop
+ > tst_a $ff-$33,0
+1013 : 08 > php ;save flags
+1014 : c9cc > cmp #$ff-$33 ;test result
+ > trap_ne
+1016 : d0fe > bne * ;failed not equal (non zero)
+ >
+1018 : 68 > pla ;load status
+1019 : 48 > pha
+ > cmp_flag 0
+101a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+101c : d0fe > bne * ;failed not equal (non zero)
+ >
+101e : 28 > plp ;restore status
+ >
+ > set_a $aa-$33,$ff
+ > load_flag $ff
+101f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1021 : 48 > pha ;use stack to load status
+1022 : a977 > lda #$aa-$33 ;precharge accu
+1024 : 28 > plp
+ >
+1025 : 33 > db $33 ;test nop integrity - flags on
+1026 : ea > nop
+1027 : ea > nop
+ > tst_a $aa-$33,$ff
+1028 : 08 > php ;save flags
+1029 : c977 > cmp #$aa-$33 ;test result
+ > trap_ne
+102b : d0fe > bne * ;failed not equal (non zero)
+ >
+102d : 68 > pla ;load status
+102e : 48 > pha
+ > cmp_flag $ff
+102f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1031 : d0fe > bne * ;failed not equal (non zero)
+ >
+1033 : 28 > plp ;restore status
+ >
+1034 : c042 > cpy #$42
+ > trap_ne ;y changed
+1036 : d0fe > bne * ;failed not equal (non zero)
+ >
+1038 : e000 > cpx #0
+ > trap_ne ;x changed
+103a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $43,1
+103c : a042 > ldy #$42
+103e : a203 > ldx #4-1
+1040 : 43 > db $43 ;test nop length
+ > if 1 = 1
+1041 : ca > dex
+1042 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1043 : ca > dex
+ > trap_ne ;wrong number of bytes
+1044 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$43,0
+ > load_flag 0
+1046 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1048 : 48 > pha ;use stack to load status
+1049 : a9bc > lda #$ff-$43 ;precharge accu
+104b : 28 > plp
+ >
+104c : 43 > db $43 ;test nop integrity - flags off
+104d : ea > nop
+104e : ea > nop
+ > tst_a $ff-$43,0
+104f : 08 > php ;save flags
+1050 : c9bc > cmp #$ff-$43 ;test result
+ > trap_ne
+1052 : d0fe > bne * ;failed not equal (non zero)
+ >
+1054 : 68 > pla ;load status
+1055 : 48 > pha
+ > cmp_flag 0
+1056 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1058 : d0fe > bne * ;failed not equal (non zero)
+ >
+105a : 28 > plp ;restore status
+ >
+ > set_a $aa-$43,$ff
+ > load_flag $ff
+105b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+105d : 48 > pha ;use stack to load status
+105e : a967 > lda #$aa-$43 ;precharge accu
+1060 : 28 > plp
+ >
+1061 : 43 > db $43 ;test nop integrity - flags on
+1062 : ea > nop
+1063 : ea > nop
+ > tst_a $aa-$43,$ff
+1064 : 08 > php ;save flags
+1065 : c967 > cmp #$aa-$43 ;test result
+ > trap_ne
+1067 : d0fe > bne * ;failed not equal (non zero)
+ >
+1069 : 68 > pla ;load status
+106a : 48 > pha
+ > cmp_flag $ff
+106b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+106d : d0fe > bne * ;failed not equal (non zero)
+ >
+106f : 28 > plp ;restore status
+ >
+1070 : c042 > cpy #$42
+ > trap_ne ;y changed
+1072 : d0fe > bne * ;failed not equal (non zero)
+ >
+1074 : e000 > cpx #0
+ > trap_ne ;x changed
+1076 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $53,1
+1078 : a042 > ldy #$42
+107a : a203 > ldx #4-1
+107c : 53 > db $53 ;test nop length
+ > if 1 = 1
+107d : ca > dex
+107e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+107f : ca > dex
+ > trap_ne ;wrong number of bytes
+1080 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$53,0
+ > load_flag 0
+1082 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1084 : 48 > pha ;use stack to load status
+1085 : a9ac > lda #$ff-$53 ;precharge accu
+1087 : 28 > plp
+ >
+1088 : 53 > db $53 ;test nop integrity - flags off
+1089 : ea > nop
+108a : ea > nop
+ > tst_a $ff-$53,0
+108b : 08 > php ;save flags
+108c : c9ac > cmp #$ff-$53 ;test result
+ > trap_ne
+108e : d0fe > bne * ;failed not equal (non zero)
+ >
+1090 : 68 > pla ;load status
+1091 : 48 > pha
+ > cmp_flag 0
+1092 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1094 : d0fe > bne * ;failed not equal (non zero)
+ >
+1096 : 28 > plp ;restore status
+ >
+ > set_a $aa-$53,$ff
+ > load_flag $ff
+1097 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1099 : 48 > pha ;use stack to load status
+109a : a957 > lda #$aa-$53 ;precharge accu
+109c : 28 > plp
+ >
+109d : 53 > db $53 ;test nop integrity - flags on
+109e : ea > nop
+109f : ea > nop
+ > tst_a $aa-$53,$ff
+10a0 : 08 > php ;save flags
+10a1 : c957 > cmp #$aa-$53 ;test result
+ > trap_ne
+10a3 : d0fe > bne * ;failed not equal (non zero)
+ >
+10a5 : 68 > pla ;load status
+10a6 : 48 > pha
+ > cmp_flag $ff
+10a7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+10a9 : d0fe > bne * ;failed not equal (non zero)
+ >
+10ab : 28 > plp ;restore status
+ >
+10ac : c042 > cpy #$42
+ > trap_ne ;y changed
+10ae : d0fe > bne * ;failed not equal (non zero)
+ >
+10b0 : e000 > cpx #0
+ > trap_ne ;x changed
+10b2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $63,1
+10b4 : a042 > ldy #$42
+10b6 : a203 > ldx #4-1
+10b8 : 63 > db $63 ;test nop length
+ > if 1 = 1
+10b9 : ca > dex
+10ba : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+10bb : ca > dex
+ > trap_ne ;wrong number of bytes
+10bc : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$63,0
+ > load_flag 0
+10be : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+10c0 : 48 > pha ;use stack to load status
+10c1 : a99c > lda #$ff-$63 ;precharge accu
+10c3 : 28 > plp
+ >
+10c4 : 63 > db $63 ;test nop integrity - flags off
+10c5 : ea > nop
+10c6 : ea > nop
+ > tst_a $ff-$63,0
+10c7 : 08 > php ;save flags
+10c8 : c99c > cmp #$ff-$63 ;test result
+ > trap_ne
+10ca : d0fe > bne * ;failed not equal (non zero)
+ >
+10cc : 68 > pla ;load status
+10cd : 48 > pha
+ > cmp_flag 0
+10ce : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+10d0 : d0fe > bne * ;failed not equal (non zero)
+ >
+10d2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$63,$ff
+ > load_flag $ff
+10d3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+10d5 : 48 > pha ;use stack to load status
+10d6 : a947 > lda #$aa-$63 ;precharge accu
+10d8 : 28 > plp
+ >
+10d9 : 63 > db $63 ;test nop integrity - flags on
+10da : ea > nop
+10db : ea > nop
+ > tst_a $aa-$63,$ff
+10dc : 08 > php ;save flags
+10dd : c947 > cmp #$aa-$63 ;test result
+ > trap_ne
+10df : d0fe > bne * ;failed not equal (non zero)
+ >
+10e1 : 68 > pla ;load status
+10e2 : 48 > pha
+ > cmp_flag $ff
+10e3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+10e5 : d0fe > bne * ;failed not equal (non zero)
+ >
+10e7 : 28 > plp ;restore status
+ >
+10e8 : c042 > cpy #$42
+ > trap_ne ;y changed
+10ea : d0fe > bne * ;failed not equal (non zero)
+ >
+10ec : e000 > cpx #0
+ > trap_ne ;x changed
+10ee : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $73,1
+10f0 : a042 > ldy #$42
+10f2 : a203 > ldx #4-1
+10f4 : 73 > db $73 ;test nop length
+ > if 1 = 1
+10f5 : ca > dex
+10f6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+10f7 : ca > dex
+ > trap_ne ;wrong number of bytes
+10f8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$73,0
+ > load_flag 0
+10fa : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+10fc : 48 > pha ;use stack to load status
+10fd : a98c > lda #$ff-$73 ;precharge accu
+10ff : 28 > plp
+ >
+1100 : 73 > db $73 ;test nop integrity - flags off
+1101 : ea > nop
+1102 : ea > nop
+ > tst_a $ff-$73,0
+1103 : 08 > php ;save flags
+1104 : c98c > cmp #$ff-$73 ;test result
+ > trap_ne
+1106 : d0fe > bne * ;failed not equal (non zero)
+ >
+1108 : 68 > pla ;load status
+1109 : 48 > pha
+ > cmp_flag 0
+110a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+110c : d0fe > bne * ;failed not equal (non zero)
+ >
+110e : 28 > plp ;restore status
+ >
+ > set_a $aa-$73,$ff
+ > load_flag $ff
+110f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1111 : 48 > pha ;use stack to load status
+1112 : a937 > lda #$aa-$73 ;precharge accu
+1114 : 28 > plp
+ >
+1115 : 73 > db $73 ;test nop integrity - flags on
+1116 : ea > nop
+1117 : ea > nop
+ > tst_a $aa-$73,$ff
+1118 : 08 > php ;save flags
+1119 : c937 > cmp #$aa-$73 ;test result
+ > trap_ne
+111b : d0fe > bne * ;failed not equal (non zero)
+ >
+111d : 68 > pla ;load status
+111e : 48 > pha
+ > cmp_flag $ff
+111f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1121 : d0fe > bne * ;failed not equal (non zero)
+ >
+1123 : 28 > plp ;restore status
+ >
+1124 : c042 > cpy #$42
+ > trap_ne ;y changed
+1126 : d0fe > bne * ;failed not equal (non zero)
+ >
+1128 : e000 > cpx #0
+ > trap_ne ;x changed
+112a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $83,1
+112c : a042 > ldy #$42
+112e : a203 > ldx #4-1
+1130 : 83 > db $83 ;test nop length
+ > if 1 = 1
+1131 : ca > dex
+1132 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1133 : ca > dex
+ > trap_ne ;wrong number of bytes
+1134 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$83,0
+ > load_flag 0
+1136 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1138 : 48 > pha ;use stack to load status
+1139 : a97c > lda #$ff-$83 ;precharge accu
+113b : 28 > plp
+ >
+113c : 83 > db $83 ;test nop integrity - flags off
+113d : ea > nop
+113e : ea > nop
+ > tst_a $ff-$83,0
+113f : 08 > php ;save flags
+1140 : c97c > cmp #$ff-$83 ;test result
+ > trap_ne
+1142 : d0fe > bne * ;failed not equal (non zero)
+ >
+1144 : 68 > pla ;load status
+1145 : 48 > pha
+ > cmp_flag 0
+1146 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1148 : d0fe > bne * ;failed not equal (non zero)
+ >
+114a : 28 > plp ;restore status
+ >
+ > set_a $aa-$83,$ff
+ > load_flag $ff
+114b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+114d : 48 > pha ;use stack to load status
+114e : a927 > lda #$aa-$83 ;precharge accu
+1150 : 28 > plp
+ >
+1151 : 83 > db $83 ;test nop integrity - flags on
+1152 : ea > nop
+1153 : ea > nop
+ > tst_a $aa-$83,$ff
+1154 : 08 > php ;save flags
+1155 : c927 > cmp #$aa-$83 ;test result
+ > trap_ne
+1157 : d0fe > bne * ;failed not equal (non zero)
+ >
+1159 : 68 > pla ;load status
+115a : 48 > pha
+ > cmp_flag $ff
+115b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+115d : d0fe > bne * ;failed not equal (non zero)
+ >
+115f : 28 > plp ;restore status
+ >
+1160 : c042 > cpy #$42
+ > trap_ne ;y changed
+1162 : d0fe > bne * ;failed not equal (non zero)
+ >
+1164 : e000 > cpx #0
+ > trap_ne ;x changed
+1166 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $93,1
+1168 : a042 > ldy #$42
+116a : a203 > ldx #4-1
+116c : 93 > db $93 ;test nop length
+ > if 1 = 1
+116d : ca > dex
+116e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+116f : ca > dex
+ > trap_ne ;wrong number of bytes
+1170 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$93,0
+ > load_flag 0
+1172 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1174 : 48 > pha ;use stack to load status
+1175 : a96c > lda #$ff-$93 ;precharge accu
+1177 : 28 > plp
+ >
+1178 : 93 > db $93 ;test nop integrity - flags off
+1179 : ea > nop
+117a : ea > nop
+ > tst_a $ff-$93,0
+117b : 08 > php ;save flags
+117c : c96c > cmp #$ff-$93 ;test result
+ > trap_ne
+117e : d0fe > bne * ;failed not equal (non zero)
+ >
+1180 : 68 > pla ;load status
+1181 : 48 > pha
+ > cmp_flag 0
+1182 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1184 : d0fe > bne * ;failed not equal (non zero)
+ >
+1186 : 28 > plp ;restore status
+ >
+ > set_a $aa-$93,$ff
+ > load_flag $ff
+1187 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1189 : 48 > pha ;use stack to load status
+118a : a917 > lda #$aa-$93 ;precharge accu
+118c : 28 > plp
+ >
+118d : 93 > db $93 ;test nop integrity - flags on
+118e : ea > nop
+118f : ea > nop
+ > tst_a $aa-$93,$ff
+1190 : 08 > php ;save flags
+1191 : c917 > cmp #$aa-$93 ;test result
+ > trap_ne
+1193 : d0fe > bne * ;failed not equal (non zero)
+ >
+1195 : 68 > pla ;load status
+1196 : 48 > pha
+ > cmp_flag $ff
+1197 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1199 : d0fe > bne * ;failed not equal (non zero)
+ >
+119b : 28 > plp ;restore status
+ >
+119c : c042 > cpy #$42
+ > trap_ne ;y changed
+119e : d0fe > bne * ;failed not equal (non zero)
+ >
+11a0 : e000 > cpx #0
+ > trap_ne ;x changed
+11a2 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $a3,1
+11a4 : a042 > ldy #$42
+11a6 : a203 > ldx #4-1
+11a8 : a3 > db $a3 ;test nop length
+ > if 1 = 1
+11a9 : ca > dex
+11aa : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+11ab : ca > dex
+ > trap_ne ;wrong number of bytes
+11ac : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$a3,0
+ > load_flag 0
+11ae : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+11b0 : 48 > pha ;use stack to load status
+11b1 : a95c > lda #$ff-$a3 ;precharge accu
+11b3 : 28 > plp
+ >
+11b4 : a3 > db $a3 ;test nop integrity - flags off
+11b5 : ea > nop
+11b6 : ea > nop
+ > tst_a $ff-$a3,0
+11b7 : 08 > php ;save flags
+11b8 : c95c > cmp #$ff-$a3 ;test result
+ > trap_ne
+11ba : d0fe > bne * ;failed not equal (non zero)
+ >
+11bc : 68 > pla ;load status
+11bd : 48 > pha
+ > cmp_flag 0
+11be : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+11c0 : d0fe > bne * ;failed not equal (non zero)
+ >
+11c2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$a3,$ff
+ > load_flag $ff
+11c3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+11c5 : 48 > pha ;use stack to load status
+11c6 : a907 > lda #$aa-$a3 ;precharge accu
+11c8 : 28 > plp
+ >
+11c9 : a3 > db $a3 ;test nop integrity - flags on
+11ca : ea > nop
+11cb : ea > nop
+ > tst_a $aa-$a3,$ff
+11cc : 08 > php ;save flags
+11cd : c907 > cmp #$aa-$a3 ;test result
+ > trap_ne
+11cf : d0fe > bne * ;failed not equal (non zero)
+ >
+11d1 : 68 > pla ;load status
+11d2 : 48 > pha
+ > cmp_flag $ff
+11d3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+11d5 : d0fe > bne * ;failed not equal (non zero)
+ >
+11d7 : 28 > plp ;restore status
+ >
+11d8 : c042 > cpy #$42
+ > trap_ne ;y changed
+11da : d0fe > bne * ;failed not equal (non zero)
+ >
+11dc : e000 > cpx #0
+ > trap_ne ;x changed
+11de : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $b3,1
+11e0 : a042 > ldy #$42
+11e2 : a203 > ldx #4-1
+11e4 : b3 > db $b3 ;test nop length
+ > if 1 = 1
+11e5 : ca > dex
+11e6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+11e7 : ca > dex
+ > trap_ne ;wrong number of bytes
+11e8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$b3,0
+ > load_flag 0
+11ea : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+11ec : 48 > pha ;use stack to load status
+11ed : a94c > lda #$ff-$b3 ;precharge accu
+11ef : 28 > plp
+ >
+11f0 : b3 > db $b3 ;test nop integrity - flags off
+11f1 : ea > nop
+11f2 : ea > nop
+ > tst_a $ff-$b3,0
+11f3 : 08 > php ;save flags
+11f4 : c94c > cmp #$ff-$b3 ;test result
+ > trap_ne
+11f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+11f8 : 68 > pla ;load status
+11f9 : 48 > pha
+ > cmp_flag 0
+11fa : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+11fc : d0fe > bne * ;failed not equal (non zero)
+ >
+11fe : 28 > plp ;restore status
+ >
+ > set_a $aa-$b3,$ff
+ > load_flag $ff
+11ff : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1201 : 48 > pha ;use stack to load status
+1202 : a9f7 > lda #$aa-$b3 ;precharge accu
+1204 : 28 > plp
+ >
+1205 : b3 > db $b3 ;test nop integrity - flags on
+1206 : ea > nop
+1207 : ea > nop
+ > tst_a $aa-$b3,$ff
+1208 : 08 > php ;save flags
+1209 : c9f7 > cmp #$aa-$b3 ;test result
+ > trap_ne
+120b : d0fe > bne * ;failed not equal (non zero)
+ >
+120d : 68 > pla ;load status
+120e : 48 > pha
+ > cmp_flag $ff
+120f : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1211 : d0fe > bne * ;failed not equal (non zero)
+ >
+1213 : 28 > plp ;restore status
+ >
+1214 : c042 > cpy #$42
+ > trap_ne ;y changed
+1216 : d0fe > bne * ;failed not equal (non zero)
+ >
+1218 : e000 > cpx #0
+ > trap_ne ;x changed
+121a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $c3,1
+121c : a042 > ldy #$42
+121e : a203 > ldx #4-1
+1220 : c3 > db $c3 ;test nop length
+ > if 1 = 1
+1221 : ca > dex
+1222 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1223 : ca > dex
+ > trap_ne ;wrong number of bytes
+1224 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$c3,0
+ > load_flag 0
+1226 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1228 : 48 > pha ;use stack to load status
+1229 : a93c > lda #$ff-$c3 ;precharge accu
+122b : 28 > plp
+ >
+122c : c3 > db $c3 ;test nop integrity - flags off
+122d : ea > nop
+122e : ea > nop
+ > tst_a $ff-$c3,0
+122f : 08 > php ;save flags
+1230 : c93c > cmp #$ff-$c3 ;test result
+ > trap_ne
+1232 : d0fe > bne * ;failed not equal (non zero)
+ >
+1234 : 68 > pla ;load status
+1235 : 48 > pha
+ > cmp_flag 0
+1236 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1238 : d0fe > bne * ;failed not equal (non zero)
+ >
+123a : 28 > plp ;restore status
+ >
+ > set_a $aa-$c3,$ff
+ > load_flag $ff
+123b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+123d : 48 > pha ;use stack to load status
+123e : a9e7 > lda #$aa-$c3 ;precharge accu
+1240 : 28 > plp
+ >
+1241 : c3 > db $c3 ;test nop integrity - flags on
+1242 : ea > nop
+1243 : ea > nop
+ > tst_a $aa-$c3,$ff
+1244 : 08 > php ;save flags
+1245 : c9e7 > cmp #$aa-$c3 ;test result
+ > trap_ne
+1247 : d0fe > bne * ;failed not equal (non zero)
+ >
+1249 : 68 > pla ;load status
+124a : 48 > pha
+ > cmp_flag $ff
+124b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+124d : d0fe > bne * ;failed not equal (non zero)
+ >
+124f : 28 > plp ;restore status
+ >
+1250 : c042 > cpy #$42
+ > trap_ne ;y changed
+1252 : d0fe > bne * ;failed not equal (non zero)
+ >
+1254 : e000 > cpx #0
+ > trap_ne ;x changed
+1256 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $d3,1
+1258 : a042 > ldy #$42
+125a : a203 > ldx #4-1
+125c : d3 > db $d3 ;test nop length
+ > if 1 = 1
+125d : ca > dex
+125e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+125f : ca > dex
+ > trap_ne ;wrong number of bytes
+1260 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$d3,0
+ > load_flag 0
+1262 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1264 : 48 > pha ;use stack to load status
+1265 : a92c > lda #$ff-$d3 ;precharge accu
+1267 : 28 > plp
+ >
+1268 : d3 > db $d3 ;test nop integrity - flags off
+1269 : ea > nop
+126a : ea > nop
+ > tst_a $ff-$d3,0
+126b : 08 > php ;save flags
+126c : c92c > cmp #$ff-$d3 ;test result
+ > trap_ne
+126e : d0fe > bne * ;failed not equal (non zero)
+ >
+1270 : 68 > pla ;load status
+1271 : 48 > pha
+ > cmp_flag 0
+1272 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1274 : d0fe > bne * ;failed not equal (non zero)
+ >
+1276 : 28 > plp ;restore status
+ >
+ > set_a $aa-$d3,$ff
+ > load_flag $ff
+1277 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1279 : 48 > pha ;use stack to load status
+127a : a9d7 > lda #$aa-$d3 ;precharge accu
+127c : 28 > plp
+ >
+127d : d3 > db $d3 ;test nop integrity - flags on
+127e : ea > nop
+127f : ea > nop
+ > tst_a $aa-$d3,$ff
+1280 : 08 > php ;save flags
+1281 : c9d7 > cmp #$aa-$d3 ;test result
+ > trap_ne
+1283 : d0fe > bne * ;failed not equal (non zero)
+ >
+1285 : 68 > pla ;load status
+1286 : 48 > pha
+ > cmp_flag $ff
+1287 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1289 : d0fe > bne * ;failed not equal (non zero)
+ >
+128b : 28 > plp ;restore status
+ >
+128c : c042 > cpy #$42
+ > trap_ne ;y changed
+128e : d0fe > bne * ;failed not equal (non zero)
+ >
+1290 : e000 > cpx #0
+ > trap_ne ;x changed
+1292 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $e3,1
+1294 : a042 > ldy #$42
+1296 : a203 > ldx #4-1
+1298 : e3 > db $e3 ;test nop length
+ > if 1 = 1
+1299 : ca > dex
+129a : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+129b : ca > dex
+ > trap_ne ;wrong number of bytes
+129c : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$e3,0
+ > load_flag 0
+129e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+12a0 : 48 > pha ;use stack to load status
+12a1 : a91c > lda #$ff-$e3 ;precharge accu
+12a3 : 28 > plp
+ >
+12a4 : e3 > db $e3 ;test nop integrity - flags off
+12a5 : ea > nop
+12a6 : ea > nop
+ > tst_a $ff-$e3,0
+12a7 : 08 > php ;save flags
+12a8 : c91c > cmp #$ff-$e3 ;test result
+ > trap_ne
+12aa : d0fe > bne * ;failed not equal (non zero)
+ >
+12ac : 68 > pla ;load status
+12ad : 48 > pha
+ > cmp_flag 0
+12ae : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+12b0 : d0fe > bne * ;failed not equal (non zero)
+ >
+12b2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$e3,$ff
+ > load_flag $ff
+12b3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+12b5 : 48 > pha ;use stack to load status
+12b6 : a9c7 > lda #$aa-$e3 ;precharge accu
+12b8 : 28 > plp
+ >
+12b9 : e3 > db $e3 ;test nop integrity - flags on
+12ba : ea > nop
+12bb : ea > nop
+ > tst_a $aa-$e3,$ff
+12bc : 08 > php ;save flags
+12bd : c9c7 > cmp #$aa-$e3 ;test result
+ > trap_ne
+12bf : d0fe > bne * ;failed not equal (non zero)
+ >
+12c1 : 68 > pla ;load status
+12c2 : 48 > pha
+ > cmp_flag $ff
+12c3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+12c5 : d0fe > bne * ;failed not equal (non zero)
+ >
+12c7 : 28 > plp ;restore status
+ >
+12c8 : c042 > cpy #$42
+ > trap_ne ;y changed
+12ca : d0fe > bne * ;failed not equal (non zero)
+ >
+12cc : e000 > cpx #0
+ > trap_ne ;x changed
+12ce : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $f3,1
+12d0 : a042 > ldy #$42
+12d2 : a203 > ldx #4-1
+12d4 : f3 > db $f3 ;test nop length
+ > if 1 = 1
+12d5 : ca > dex
+12d6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+12d7 : ca > dex
+ > trap_ne ;wrong number of bytes
+12d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$f3,0
+ > load_flag 0
+12da : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+12dc : 48 > pha ;use stack to load status
+12dd : a90c > lda #$ff-$f3 ;precharge accu
+12df : 28 > plp
+ >
+12e0 : f3 > db $f3 ;test nop integrity - flags off
+12e1 : ea > nop
+12e2 : ea > nop
+ > tst_a $ff-$f3,0
+12e3 : 08 > php ;save flags
+12e4 : c90c > cmp #$ff-$f3 ;test result
+ > trap_ne
+12e6 : d0fe > bne * ;failed not equal (non zero)
+ >
+12e8 : 68 > pla ;load status
+12e9 : 48 > pha
+ > cmp_flag 0
+12ea : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+12ec : d0fe > bne * ;failed not equal (non zero)
+ >
+12ee : 28 > plp ;restore status
+ >
+ > set_a $aa-$f3,$ff
+ > load_flag $ff
+12ef : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+12f1 : 48 > pha ;use stack to load status
+12f2 : a9b7 > lda #$aa-$f3 ;precharge accu
+12f4 : 28 > plp
+ >
+12f5 : f3 > db $f3 ;test nop integrity - flags on
+12f6 : ea > nop
+12f7 : ea > nop
+ > tst_a $aa-$f3,$ff
+12f8 : 08 > php ;save flags
+12f9 : c9b7 > cmp #$aa-$f3 ;test result
+ > trap_ne
+12fb : d0fe > bne * ;failed not equal (non zero)
+ >
+12fd : 68 > pla ;load status
+12fe : 48 > pha
+ > cmp_flag $ff
+12ff : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1301 : d0fe > bne * ;failed not equal (non zero)
+ >
+1303 : 28 > plp ;restore status
+ >
+1304 : c042 > cpy #$42
+ > trap_ne ;y changed
+1306 : d0fe > bne * ;failed not equal (non zero)
+ >
+1308 : e000 > cpx #0
+ > trap_ne ;x changed
+130a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $0b,1
+130c : a042 > ldy #$42
+130e : a203 > ldx #4-1
+1310 : 0b > db $0b ;test nop length
+ > if 1 = 1
+1311 : ca > dex
+1312 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1313 : ca > dex
+ > trap_ne ;wrong number of bytes
+1314 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$0b,0
+ > load_flag 0
+1316 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1318 : 48 > pha ;use stack to load status
+1319 : a9f4 > lda #$ff-$0b ;precharge accu
+131b : 28 > plp
+ >
+131c : 0b > db $0b ;test nop integrity - flags off
+131d : ea > nop
+131e : ea > nop
+ > tst_a $ff-$0b,0
+131f : 08 > php ;save flags
+1320 : c9f4 > cmp #$ff-$0b ;test result
+ > trap_ne
+1322 : d0fe > bne * ;failed not equal (non zero)
+ >
+1324 : 68 > pla ;load status
+1325 : 48 > pha
+ > cmp_flag 0
+1326 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1328 : d0fe > bne * ;failed not equal (non zero)
+ >
+132a : 28 > plp ;restore status
+ >
+ > set_a $aa-$0b,$ff
+ > load_flag $ff
+132b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+132d : 48 > pha ;use stack to load status
+132e : a99f > lda #$aa-$0b ;precharge accu
+1330 : 28 > plp
+ >
+1331 : 0b > db $0b ;test nop integrity - flags on
+1332 : ea > nop
+1333 : ea > nop
+ > tst_a $aa-$0b,$ff
+1334 : 08 > php ;save flags
+1335 : c99f > cmp #$aa-$0b ;test result
+ > trap_ne
+1337 : d0fe > bne * ;failed not equal (non zero)
+ >
+1339 : 68 > pla ;load status
+133a : 48 > pha
+ > cmp_flag $ff
+133b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+133d : d0fe > bne * ;failed not equal (non zero)
+ >
+133f : 28 > plp ;restore status
+ >
+1340 : c042 > cpy #$42
+ > trap_ne ;y changed
+1342 : d0fe > bne * ;failed not equal (non zero)
+ >
+1344 : e000 > cpx #0
+ > trap_ne ;x changed
+1346 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $1b,1
+1348 : a042 > ldy #$42
+134a : a203 > ldx #4-1
+134c : 1b > db $1b ;test nop length
+ > if 1 = 1
+134d : ca > dex
+134e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+134f : ca > dex
+ > trap_ne ;wrong number of bytes
+1350 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$1b,0
+ > load_flag 0
+1352 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1354 : 48 > pha ;use stack to load status
+1355 : a9e4 > lda #$ff-$1b ;precharge accu
+1357 : 28 > plp
+ >
+1358 : 1b > db $1b ;test nop integrity - flags off
+1359 : ea > nop
+135a : ea > nop
+ > tst_a $ff-$1b,0
+135b : 08 > php ;save flags
+135c : c9e4 > cmp #$ff-$1b ;test result
+ > trap_ne
+135e : d0fe > bne * ;failed not equal (non zero)
+ >
+1360 : 68 > pla ;load status
+1361 : 48 > pha
+ > cmp_flag 0
+1362 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1364 : d0fe > bne * ;failed not equal (non zero)
+ >
+1366 : 28 > plp ;restore status
+ >
+ > set_a $aa-$1b,$ff
+ > load_flag $ff
+1367 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1369 : 48 > pha ;use stack to load status
+136a : a98f > lda #$aa-$1b ;precharge accu
+136c : 28 > plp
+ >
+136d : 1b > db $1b ;test nop integrity - flags on
+136e : ea > nop
+136f : ea > nop
+ > tst_a $aa-$1b,$ff
+1370 : 08 > php ;save flags
+1371 : c98f > cmp #$aa-$1b ;test result
+ > trap_ne
+1373 : d0fe > bne * ;failed not equal (non zero)
+ >
+1375 : 68 > pla ;load status
+1376 : 48 > pha
+ > cmp_flag $ff
+1377 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1379 : d0fe > bne * ;failed not equal (non zero)
+ >
+137b : 28 > plp ;restore status
+ >
+137c : c042 > cpy #$42
+ > trap_ne ;y changed
+137e : d0fe > bne * ;failed not equal (non zero)
+ >
+1380 : e000 > cpx #0
+ > trap_ne ;x changed
+1382 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $2b,1
+1384 : a042 > ldy #$42
+1386 : a203 > ldx #4-1
+1388 : 2b > db $2b ;test nop length
+ > if 1 = 1
+1389 : ca > dex
+138a : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+138b : ca > dex
+ > trap_ne ;wrong number of bytes
+138c : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$2b,0
+ > load_flag 0
+138e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1390 : 48 > pha ;use stack to load status
+1391 : a9d4 > lda #$ff-$2b ;precharge accu
+1393 : 28 > plp
+ >
+1394 : 2b > db $2b ;test nop integrity - flags off
+1395 : ea > nop
+1396 : ea > nop
+ > tst_a $ff-$2b,0
+1397 : 08 > php ;save flags
+1398 : c9d4 > cmp #$ff-$2b ;test result
+ > trap_ne
+139a : d0fe > bne * ;failed not equal (non zero)
+ >
+139c : 68 > pla ;load status
+139d : 48 > pha
+ > cmp_flag 0
+139e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+13a0 : d0fe > bne * ;failed not equal (non zero)
+ >
+13a2 : 28 > plp ;restore status
+ >
+ > set_a $aa-$2b,$ff
+ > load_flag $ff
+13a3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+13a5 : 48 > pha ;use stack to load status
+13a6 : a97f > lda #$aa-$2b ;precharge accu
+13a8 : 28 > plp
+ >
+13a9 : 2b > db $2b ;test nop integrity - flags on
+13aa : ea > nop
+13ab : ea > nop
+ > tst_a $aa-$2b,$ff
+13ac : 08 > php ;save flags
+13ad : c97f > cmp #$aa-$2b ;test result
+ > trap_ne
+13af : d0fe > bne * ;failed not equal (non zero)
+ >
+13b1 : 68 > pla ;load status
+13b2 : 48 > pha
+ > cmp_flag $ff
+13b3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+13b5 : d0fe > bne * ;failed not equal (non zero)
+ >
+13b7 : 28 > plp ;restore status
+ >
+13b8 : c042 > cpy #$42
+ > trap_ne ;y changed
+13ba : d0fe > bne * ;failed not equal (non zero)
+ >
+13bc : e000 > cpx #0
+ > trap_ne ;x changed
+13be : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $3b,1
+13c0 : a042 > ldy #$42
+13c2 : a203 > ldx #4-1
+13c4 : 3b > db $3b ;test nop length
+ > if 1 = 1
+13c5 : ca > dex
+13c6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+13c7 : ca > dex
+ > trap_ne ;wrong number of bytes
+13c8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$3b,0
+ > load_flag 0
+13ca : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+13cc : 48 > pha ;use stack to load status
+13cd : a9c4 > lda #$ff-$3b ;precharge accu
+13cf : 28 > plp
+ >
+13d0 : 3b > db $3b ;test nop integrity - flags off
+13d1 : ea > nop
+13d2 : ea > nop
+ > tst_a $ff-$3b,0
+13d3 : 08 > php ;save flags
+13d4 : c9c4 > cmp #$ff-$3b ;test result
+ > trap_ne
+13d6 : d0fe > bne * ;failed not equal (non zero)
+ >
+13d8 : 68 > pla ;load status
+13d9 : 48 > pha
+ > cmp_flag 0
+13da : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+13dc : d0fe > bne * ;failed not equal (non zero)
+ >
+13de : 28 > plp ;restore status
+ >
+ > set_a $aa-$3b,$ff
+ > load_flag $ff
+13df : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+13e1 : 48 > pha ;use stack to load status
+13e2 : a96f > lda #$aa-$3b ;precharge accu
+13e4 : 28 > plp
+ >
+13e5 : 3b > db $3b ;test nop integrity - flags on
+13e6 : ea > nop
+13e7 : ea > nop
+ > tst_a $aa-$3b,$ff
+13e8 : 08 > php ;save flags
+13e9 : c96f > cmp #$aa-$3b ;test result
+ > trap_ne
+13eb : d0fe > bne * ;failed not equal (non zero)
+ >
+13ed : 68 > pla ;load status
+13ee : 48 > pha
+ > cmp_flag $ff
+13ef : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+13f1 : d0fe > bne * ;failed not equal (non zero)
+ >
+13f3 : 28 > plp ;restore status
+ >
+13f4 : c042 > cpy #$42
+ > trap_ne ;y changed
+13f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+13f8 : e000 > cpx #0
+ > trap_ne ;x changed
+13fa : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $4b,1
+13fc : a042 > ldy #$42
+13fe : a203 > ldx #4-1
+1400 : 4b > db $4b ;test nop length
+ > if 1 = 1
+1401 : ca > dex
+1402 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+1403 : ca > dex
+ > trap_ne ;wrong number of bytes
+1404 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$4b,0
+ > load_flag 0
+1406 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1408 : 48 > pha ;use stack to load status
+1409 : a9b4 > lda #$ff-$4b ;precharge accu
+140b : 28 > plp
+ >
+140c : 4b > db $4b ;test nop integrity - flags off
+140d : ea > nop
+140e : ea > nop
+ > tst_a $ff-$4b,0
+140f : 08 > php ;save flags
+1410 : c9b4 > cmp #$ff-$4b ;test result
+ > trap_ne
+1412 : d0fe > bne * ;failed not equal (non zero)
+ >
+1414 : 68 > pla ;load status
+1415 : 48 > pha
+ > cmp_flag 0
+1416 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1418 : d0fe > bne * ;failed not equal (non zero)
+ >
+141a : 28 > plp ;restore status
+ >
+ > set_a $aa-$4b,$ff
+ > load_flag $ff
+141b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+141d : 48 > pha ;use stack to load status
+141e : a95f > lda #$aa-$4b ;precharge accu
+1420 : 28 > plp
+ >
+1421 : 4b > db $4b ;test nop integrity - flags on
+1422 : ea > nop
+1423 : ea > nop
+ > tst_a $aa-$4b,$ff
+1424 : 08 > php ;save flags
+1425 : c95f > cmp #$aa-$4b ;test result
+ > trap_ne
+1427 : d0fe > bne * ;failed not equal (non zero)
+ >
+1429 : 68 > pla ;load status
+142a : 48 > pha
+ > cmp_flag $ff
+142b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+142d : d0fe > bne * ;failed not equal (non zero)
+ >
+142f : 28 > plp ;restore status
+ >
+1430 : c042 > cpy #$42
+ > trap_ne ;y changed
+1432 : d0fe > bne * ;failed not equal (non zero)
+ >
+1434 : e000 > cpx #0
+ > trap_ne ;x changed
+1436 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $5b,1
+1438 : a042 > ldy #$42
+143a : a203 > ldx #4-1
+143c : 5b > db $5b ;test nop length
+ > if 1 = 1
+143d : ca > dex
+143e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+143f : ca > dex
+ > trap_ne ;wrong number of bytes
+1440 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$5b,0
+ > load_flag 0
+1442 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1444 : 48 > pha ;use stack to load status
+1445 : a9a4 > lda #$ff-$5b ;precharge accu
+1447 : 28 > plp
+ >
+1448 : 5b > db $5b ;test nop integrity - flags off
+1449 : ea > nop
+144a : ea > nop
+ > tst_a $ff-$5b,0
+144b : 08 > php ;save flags
+144c : c9a4 > cmp #$ff-$5b ;test result
+ > trap_ne
+144e : d0fe > bne * ;failed not equal (non zero)
+ >
+1450 : 68 > pla ;load status
+1451 : 48 > pha
+ > cmp_flag 0
+1452 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1454 : d0fe > bne * ;failed not equal (non zero)
+ >
+1456 : 28 > plp ;restore status
+ >
+ > set_a $aa-$5b,$ff
+ > load_flag $ff
+1457 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1459 : 48 > pha ;use stack to load status
+145a : a94f > lda #$aa-$5b ;precharge accu
+145c : 28 > plp
+ >
+145d : 5b > db $5b ;test nop integrity - flags on
+145e : ea > nop
+145f : ea > nop
+ > tst_a $aa-$5b,$ff
+1460 : 08 > php ;save flags
+1461 : c94f > cmp #$aa-$5b ;test result
+ > trap_ne
+1463 : d0fe > bne * ;failed not equal (non zero)
+ >
+1465 : 68 > pla ;load status
+1466 : 48 > pha
+ > cmp_flag $ff
+1467 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1469 : d0fe > bne * ;failed not equal (non zero)
+ >
+146b : 28 > plp ;restore status
+ >
+146c : c042 > cpy #$42
+ > trap_ne ;y changed
+146e : d0fe > bne * ;failed not equal (non zero)
+ >
+1470 : e000 > cpx #0
+ > trap_ne ;x changed
+1472 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $6b,1
+1474 : a042 > ldy #$42
+1476 : a203 > ldx #4-1
+1478 : 6b > db $6b ;test nop length
+ > if 1 = 1
+1479 : ca > dex
+147a : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+147b : ca > dex
+ > trap_ne ;wrong number of bytes
+147c : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$6b,0
+ > load_flag 0
+147e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1480 : 48 > pha ;use stack to load status
+1481 : a994 > lda #$ff-$6b ;precharge accu
+1483 : 28 > plp
+ >
+1484 : 6b > db $6b ;test nop integrity - flags off
+1485 : ea > nop
+1486 : ea > nop
+ > tst_a $ff-$6b,0
+1487 : 08 > php ;save flags
+1488 : c994 > cmp #$ff-$6b ;test result
+ > trap_ne
+148a : d0fe > bne * ;failed not equal (non zero)
+ >
+148c : 68 > pla ;load status
+148d : 48 > pha
+ > cmp_flag 0
+148e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1490 : d0fe > bne * ;failed not equal (non zero)
+ >
+1492 : 28 > plp ;restore status
+ >
+ > set_a $aa-$6b,$ff
+ > load_flag $ff
+1493 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1495 : 48 > pha ;use stack to load status
+1496 : a93f > lda #$aa-$6b ;precharge accu
+1498 : 28 > plp
+ >
+1499 : 6b > db $6b ;test nop integrity - flags on
+149a : ea > nop
+149b : ea > nop
+ > tst_a $aa-$6b,$ff
+149c : 08 > php ;save flags
+149d : c93f > cmp #$aa-$6b ;test result
+ > trap_ne
+149f : d0fe > bne * ;failed not equal (non zero)
+ >
+14a1 : 68 > pla ;load status
+14a2 : 48 > pha
+ > cmp_flag $ff
+14a3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+14a5 : d0fe > bne * ;failed not equal (non zero)
+ >
+14a7 : 28 > plp ;restore status
+ >
+14a8 : c042 > cpy #$42
+ > trap_ne ;y changed
+14aa : d0fe > bne * ;failed not equal (non zero)
+ >
+14ac : e000 > cpx #0
+ > trap_ne ;x changed
+14ae : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $7b,1
+14b0 : a042 > ldy #$42
+14b2 : a203 > ldx #4-1
+14b4 : 7b > db $7b ;test nop length
+ > if 1 = 1
+14b5 : ca > dex
+14b6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+14b7 : ca > dex
+ > trap_ne ;wrong number of bytes
+14b8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$7b,0
+ > load_flag 0
+14ba : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+14bc : 48 > pha ;use stack to load status
+14bd : a984 > lda #$ff-$7b ;precharge accu
+14bf : 28 > plp
+ >
+14c0 : 7b > db $7b ;test nop integrity - flags off
+14c1 : ea > nop
+14c2 : ea > nop
+ > tst_a $ff-$7b,0
+14c3 : 08 > php ;save flags
+14c4 : c984 > cmp #$ff-$7b ;test result
+ > trap_ne
+14c6 : d0fe > bne * ;failed not equal (non zero)
+ >
+14c8 : 68 > pla ;load status
+14c9 : 48 > pha
+ > cmp_flag 0
+14ca : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+14cc : d0fe > bne * ;failed not equal (non zero)
+ >
+14ce : 28 > plp ;restore status
+ >
+ > set_a $aa-$7b,$ff
+ > load_flag $ff
+14cf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+14d1 : 48 > pha ;use stack to load status
+14d2 : a92f > lda #$aa-$7b ;precharge accu
+14d4 : 28 > plp
+ >
+14d5 : 7b > db $7b ;test nop integrity - flags on
+14d6 : ea > nop
+14d7 : ea > nop
+ > tst_a $aa-$7b,$ff
+14d8 : 08 > php ;save flags
+14d9 : c92f > cmp #$aa-$7b ;test result
+ > trap_ne
+14db : d0fe > bne * ;failed not equal (non zero)
+ >
+14dd : 68 > pla ;load status
+14de : 48 > pha
+ > cmp_flag $ff
+14df : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+14e1 : d0fe > bne * ;failed not equal (non zero)
+ >
+14e3 : 28 > plp ;restore status
+ >
+14e4 : c042 > cpy #$42
+ > trap_ne ;y changed
+14e6 : d0fe > bne * ;failed not equal (non zero)
+ >
+14e8 : e000 > cpx #0
+ > trap_ne ;x changed
+14ea : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $8b,1
+14ec : a042 > ldy #$42
+14ee : a203 > ldx #4-1
+14f0 : 8b > db $8b ;test nop length
+ > if 1 = 1
+14f1 : ca > dex
+14f2 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+14f3 : ca > dex
+ > trap_ne ;wrong number of bytes
+14f4 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$8b,0
+ > load_flag 0
+14f6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+14f8 : 48 > pha ;use stack to load status
+14f9 : a974 > lda #$ff-$8b ;precharge accu
+14fb : 28 > plp
+ >
+14fc : 8b > db $8b ;test nop integrity - flags off
+14fd : ea > nop
+14fe : ea > nop
+ > tst_a $ff-$8b,0
+14ff : 08 > php ;save flags
+1500 : c974 > cmp #$ff-$8b ;test result
+ > trap_ne
+1502 : d0fe > bne * ;failed not equal (non zero)
+ >
+1504 : 68 > pla ;load status
+1505 : 48 > pha
+ > cmp_flag 0
+1506 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1508 : d0fe > bne * ;failed not equal (non zero)
+ >
+150a : 28 > plp ;restore status
+ >
+ > set_a $aa-$8b,$ff
+ > load_flag $ff
+150b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+150d : 48 > pha ;use stack to load status
+150e : a91f > lda #$aa-$8b ;precharge accu
+1510 : 28 > plp
+ >
+1511 : 8b > db $8b ;test nop integrity - flags on
+1512 : ea > nop
+1513 : ea > nop
+ > tst_a $aa-$8b,$ff
+1514 : 08 > php ;save flags
+1515 : c91f > cmp #$aa-$8b ;test result
+ > trap_ne
+1517 : d0fe > bne * ;failed not equal (non zero)
+ >
+1519 : 68 > pla ;load status
+151a : 48 > pha
+ > cmp_flag $ff
+151b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+151d : d0fe > bne * ;failed not equal (non zero)
+ >
+151f : 28 > plp ;restore status
+ >
+1520 : c042 > cpy #$42
+ > trap_ne ;y changed
+1522 : d0fe > bne * ;failed not equal (non zero)
+ >
+1524 : e000 > cpx #0
+ > trap_ne ;x changed
+1526 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $9b,1
+1528 : a042 > ldy #$42
+152a : a203 > ldx #4-1
+152c : 9b > db $9b ;test nop length
+ > if 1 = 1
+152d : ca > dex
+152e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+152f : ca > dex
+ > trap_ne ;wrong number of bytes
+1530 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$9b,0
+ > load_flag 0
+1532 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1534 : 48 > pha ;use stack to load status
+1535 : a964 > lda #$ff-$9b ;precharge accu
+1537 : 28 > plp
+ >
+1538 : 9b > db $9b ;test nop integrity - flags off
+1539 : ea > nop
+153a : ea > nop
+ > tst_a $ff-$9b,0
+153b : 08 > php ;save flags
+153c : c964 > cmp #$ff-$9b ;test result
+ > trap_ne
+153e : d0fe > bne * ;failed not equal (non zero)
+ >
+1540 : 68 > pla ;load status
+1541 : 48 > pha
+ > cmp_flag 0
+1542 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1544 : d0fe > bne * ;failed not equal (non zero)
+ >
+1546 : 28 > plp ;restore status
+ >
+ > set_a $aa-$9b,$ff
+ > load_flag $ff
+1547 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1549 : 48 > pha ;use stack to load status
+154a : a90f > lda #$aa-$9b ;precharge accu
+154c : 28 > plp
+ >
+154d : 9b > db $9b ;test nop integrity - flags on
+154e : ea > nop
+154f : ea > nop
+ > tst_a $aa-$9b,$ff
+1550 : 08 > php ;save flags
+1551 : c90f > cmp #$aa-$9b ;test result
+ > trap_ne
+1553 : d0fe > bne * ;failed not equal (non zero)
+ >
+1555 : 68 > pla ;load status
+1556 : 48 > pha
+ > cmp_flag $ff
+1557 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1559 : d0fe > bne * ;failed not equal (non zero)
+ >
+155b : 28 > plp ;restore status
+ >
+155c : c042 > cpy #$42
+ > trap_ne ;y changed
+155e : d0fe > bne * ;failed not equal (non zero)
+ >
+1560 : e000 > cpx #0
+ > trap_ne ;x changed
+1562 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $ab,1
+1564 : a042 > ldy #$42
+1566 : a203 > ldx #4-1
+1568 : ab > db $ab ;test nop length
+ > if 1 = 1
+1569 : ca > dex
+156a : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+156b : ca > dex
+ > trap_ne ;wrong number of bytes
+156c : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$ab,0
+ > load_flag 0
+156e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1570 : 48 > pha ;use stack to load status
+1571 : a954 > lda #$ff-$ab ;precharge accu
+1573 : 28 > plp
+ >
+1574 : ab > db $ab ;test nop integrity - flags off
+1575 : ea > nop
+1576 : ea > nop
+ > tst_a $ff-$ab,0
+1577 : 08 > php ;save flags
+1578 : c954 > cmp #$ff-$ab ;test result
+ > trap_ne
+157a : d0fe > bne * ;failed not equal (non zero)
+ >
+157c : 68 > pla ;load status
+157d : 48 > pha
+ > cmp_flag 0
+157e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1580 : d0fe > bne * ;failed not equal (non zero)
+ >
+1582 : 28 > plp ;restore status
+ >
+ > set_a $aa-$ab,$ff
+ > load_flag $ff
+1583 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1585 : 48 > pha ;use stack to load status
+1586 : a9ff > lda #$aa-$ab ;precharge accu
+1588 : 28 > plp
+ >
+1589 : ab > db $ab ;test nop integrity - flags on
+158a : ea > nop
+158b : ea > nop
+ > tst_a $aa-$ab,$ff
+158c : 08 > php ;save flags
+158d : c9ff > cmp #$aa-$ab ;test result
+ > trap_ne
+158f : d0fe > bne * ;failed not equal (non zero)
+ >
+1591 : 68 > pla ;load status
+1592 : 48 > pha
+ > cmp_flag $ff
+1593 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1595 : d0fe > bne * ;failed not equal (non zero)
+ >
+1597 : 28 > plp ;restore status
+ >
+1598 : c042 > cpy #$42
+ > trap_ne ;y changed
+159a : d0fe > bne * ;failed not equal (non zero)
+ >
+159c : e000 > cpx #0
+ > trap_ne ;x changed
+159e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $bb,1
+15a0 : a042 > ldy #$42
+15a2 : a203 > ldx #4-1
+15a4 : bb > db $bb ;test nop length
+ > if 1 = 1
+15a5 : ca > dex
+15a6 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+15a7 : ca > dex
+ > trap_ne ;wrong number of bytes
+15a8 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$bb,0
+ > load_flag 0
+15aa : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+15ac : 48 > pha ;use stack to load status
+15ad : a944 > lda #$ff-$bb ;precharge accu
+15af : 28 > plp
+ >
+15b0 : bb > db $bb ;test nop integrity - flags off
+15b1 : ea > nop
+15b2 : ea > nop
+ > tst_a $ff-$bb,0
+15b3 : 08 > php ;save flags
+15b4 : c944 > cmp #$ff-$bb ;test result
+ > trap_ne
+15b6 : d0fe > bne * ;failed not equal (non zero)
+ >
+15b8 : 68 > pla ;load status
+15b9 : 48 > pha
+ > cmp_flag 0
+15ba : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+15bc : d0fe > bne * ;failed not equal (non zero)
+ >
+15be : 28 > plp ;restore status
+ >
+ > set_a $aa-$bb,$ff
+ > load_flag $ff
+15bf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+15c1 : 48 > pha ;use stack to load status
+15c2 : a9ef > lda #$aa-$bb ;precharge accu
+15c4 : 28 > plp
+ >
+15c5 : bb > db $bb ;test nop integrity - flags on
+15c6 : ea > nop
+15c7 : ea > nop
+ > tst_a $aa-$bb,$ff
+15c8 : 08 > php ;save flags
+15c9 : c9ef > cmp #$aa-$bb ;test result
+ > trap_ne
+15cb : d0fe > bne * ;failed not equal (non zero)
+ >
+15cd : 68 > pla ;load status
+15ce : 48 > pha
+ > cmp_flag $ff
+15cf : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+15d1 : d0fe > bne * ;failed not equal (non zero)
+ >
+15d3 : 28 > plp ;restore status
+ >
+15d4 : c042 > cpy #$42
+ > trap_ne ;y changed
+15d6 : d0fe > bne * ;failed not equal (non zero)
+ >
+15d8 : e000 > cpx #0
+ > trap_ne ;x changed
+15da : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $eb,1
+15dc : a042 > ldy #$42
+15de : a203 > ldx #4-1
+15e0 : eb > db $eb ;test nop length
+ > if 1 = 1
+15e1 : ca > dex
+15e2 : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+15e3 : ca > dex
+ > trap_ne ;wrong number of bytes
+15e4 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$eb,0
+ > load_flag 0
+15e6 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+15e8 : 48 > pha ;use stack to load status
+15e9 : a914 > lda #$ff-$eb ;precharge accu
+15eb : 28 > plp
+ >
+15ec : eb > db $eb ;test nop integrity - flags off
+15ed : ea > nop
+15ee : ea > nop
+ > tst_a $ff-$eb,0
+15ef : 08 > php ;save flags
+15f0 : c914 > cmp #$ff-$eb ;test result
+ > trap_ne
+15f2 : d0fe > bne * ;failed not equal (non zero)
+ >
+15f4 : 68 > pla ;load status
+15f5 : 48 > pha
+ > cmp_flag 0
+15f6 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+15f8 : d0fe > bne * ;failed not equal (non zero)
+ >
+15fa : 28 > plp ;restore status
+ >
+ > set_a $aa-$eb,$ff
+ > load_flag $ff
+15fb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+15fd : 48 > pha ;use stack to load status
+15fe : a9bf > lda #$aa-$eb ;precharge accu
+1600 : 28 > plp
+ >
+1601 : eb > db $eb ;test nop integrity - flags on
+1602 : ea > nop
+1603 : ea > nop
+ > tst_a $aa-$eb,$ff
+1604 : 08 > php ;save flags
+1605 : c9bf > cmp #$aa-$eb ;test result
+ > trap_ne
+1607 : d0fe > bne * ;failed not equal (non zero)
+ >
+1609 : 68 > pla ;load status
+160a : 48 > pha
+ > cmp_flag $ff
+160b : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+160d : d0fe > bne * ;failed not equal (non zero)
+ >
+160f : 28 > plp ;restore status
+ >
+1610 : c042 > cpy #$42
+ > trap_ne ;y changed
+1612 : d0fe > bne * ;failed not equal (non zero)
+ >
+1614 : e000 > cpx #0
+ > trap_ne ;x changed
+1616 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ nop_test $fb,1
+1618 : a042 > ldy #$42
+161a : a203 > ldx #4-1
+161c : fb > db $fb ;test nop length
+ > if 1 = 1
+161d : ca > dex
+161e : ca > dex
+ > endif
+ > if 1 = 2
+ > iny
+ > dex
+ > endif
+ > if 1 = 3
+ > iny
+ > iny
+ > endif
+161f : ca > dex
+ > trap_ne ;wrong number of bytes
+1620 : d0fe > bne * ;failed not equal (non zero)
+ >
+ > set_a $ff-$fb,0
+ > load_flag 0
+1622 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1624 : 48 > pha ;use stack to load status
+1625 : a904 > lda #$ff-$fb ;precharge accu
+1627 : 28 > plp
+ >
+1628 : fb > db $fb ;test nop integrity - flags off
+1629 : ea > nop
+162a : ea > nop
+ > tst_a $ff-$fb,0
+162b : 08 > php ;save flags
+162c : c904 > cmp #$ff-$fb ;test result
+ > trap_ne
+162e : d0fe > bne * ;failed not equal (non zero)
+ >
+1630 : 68 > pla ;load status
+1631 : 48 > pha
+ > cmp_flag 0
+1632 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1634 : d0fe > bne * ;failed not equal (non zero)
+ >
+1636 : 28 > plp ;restore status
+ >
+ > set_a $aa-$fb,$ff
+ > load_flag $ff
+1637 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1639 : 48 > pha ;use stack to load status
+163a : a9af > lda #$aa-$fb ;precharge accu
+163c : 28 > plp
+ >
+163d : fb > db $fb ;test nop integrity - flags on
+163e : ea > nop
+163f : ea > nop
+ > tst_a $aa-$fb,$ff
+1640 : 08 > php ;save flags
+1641 : c9af > cmp #$aa-$fb ;test result
+ > trap_ne
+1643 : d0fe > bne * ;failed not equal (non zero)
+ >
+1645 : 68 > pla ;load status
+1646 : 48 > pha
+ > cmp_flag $ff
+1647 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1649 : d0fe > bne * ;failed not equal (non zero)
+ >
+164b : 28 > plp ;restore status
+ >
+164c : c042 > cpy #$42
+ > trap_ne ;y changed
+164e : d0fe > bne * ;failed not equal (non zero)
+ >
+1650 : e000 > cpx #0
+ > trap_ne ;x changed
+1652 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ if rkwl_wdc_op = 0 ;NOPs not available on Rockwell & WDC 65C02
+ nop_test $07,1
+ nop_test $17,1
+ nop_test $27,1
+ nop_test $37,1
+ nop_test $47,1
+ nop_test $57,1
+ nop_test $67,1
+ nop_test $77,1
+ nop_test $87,1
+ nop_test $97,1
+ nop_test $a7,1
+ nop_test $b7,1
+ nop_test $c7,1
+ nop_test $d7,1
+ nop_test $e7,1
+ nop_test $f7,1
+ nop_test $0f,1
+ nop_test $1f,1
+ nop_test $2f,1
+ nop_test $3f,1
+ nop_test $4f,1
+ nop_test $5f,1
+ nop_test $6f,1
+ nop_test $7f,1
+ nop_test $8f,1
+ nop_test $9f,1
+ nop_test $af,1
+ nop_test $bf,1
+ nop_test $cf,1
+ nop_test $df,1
+ nop_test $ef,1
+ nop_test $ff,1
+ endif
+ if wdc_op = 0 ;NOPs not available on WDC 65C02 (WAI, STP)
+ nop_test $cb,1
+ nop_test $db,1
+ endif
+ next_test
+1654 : ad0202 > lda test_case ;previous test
+1657 : c908 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1659 : d0fe > bne * ;failed not equal (non zero)
+ >
+0009 = >test_num = test_num + 1
+165b : a909 > lda #test_num ;*** next tests' number
+165d : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ endif
+
+ ; jump indirect (test page cross bug is fixed)
+1660 : a203 ldx #3 ;prepare table
+1662 : bd8b26 ji1 lda ji_adr,x
+1665 : 9dfd02 sta ji_tab,x
+1668 : ca dex
+1669 : 10f7 bpl ji1
+166b : a928 lda #hi(ji_px) ;high address if page cross bug
+166d : 8d0002 sta pg_x
+ set_stat 0
+ > load_flag 0
+1670 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1672 : 48 > pha ;use stack to load status
+1673 : 28 > plp
+
+1674 : a949 lda #'I'
+1676 : a24e ldx #'N'
+1678 : a044 ldy #'D' ;N=0, V=0, Z=0, C=0
+167a : 6cfd02 jmp (ji_tab)
+167d : ea nop
+ trap_ne ;runover protection
+167e : d0fe > bne * ;failed not equal (non zero)
+
+
+1680 : 88 dey
+1681 : 88 dey
+1682 : 08 ji_ret php ;either SP or Y count will fail, if we do not hit
+1683 : 88 dey
+1684 : 88 dey
+1685 : 88 dey
+1686 : 28 plp
+ trap_eq ;returned flags OK?
+1687 : f0fe > beq * ;failed equal (zero)
+
+ trap_pl
+1689 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ trap_cc
+168b : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+168d : 50fe > bvc * ;failed overflow clear
+
+168f : c9e3 cmp #('I'^$aa) ;returned registers OK?
+ trap_ne
+1691 : d0fe > bne * ;failed not equal (non zero)
+
+1693 : e04f cpx #('N'+1)
+ trap_ne
+1695 : d0fe > bne * ;failed not equal (non zero)
+
+1697 : c03e cpy #('D'-6)
+ trap_ne
+1699 : d0fe > bne * ;failed not equal (non zero)
+
+169b : ba tsx ;SP check
+169c : e0ff cpx #$ff
+ trap_ne
+169e : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+16a0 : ad0202 > lda test_case ;previous test
+16a3 : c909 > cmp #test_num
+ > trap_ne ;test is out of sequence
+16a5 : d0fe > bne * ;failed not equal (non zero)
+ >
+000a = >test_num = test_num + 1
+16a7 : a90a > lda #test_num ;*** next tests' number
+16a9 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; jump indexed indirect
+16ac : a20b ldx #11 ;prepare table
+16ae : bdc726 jxi1 lda jxi_adr,x
+16b1 : 9df902 sta jxi_tab,x
+16b4 : ca dex
+16b5 : 10f7 bpl jxi1
+16b7 : a927 lda #hi(jxi_px) ;high address if page cross bug
+16b9 : 8d0002 sta pg_x
+ set_stat 0
+ > load_flag 0
+16bc : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+16be : 48 > pha ;use stack to load status
+16bf : 28 > plp
+
+16c0 : a958 lda #'X'
+16c2 : a204 ldx #4
+16c4 : a049 ldy #'I' ;N=0, V=0, Z=0, C=0
+16c6 : 7cf902 jmp (jxi_tab,x)
+16c9 : ea nop
+ trap_ne ;runover protection
+16ca : d0fe > bne * ;failed not equal (non zero)
+
+
+16cc : 88 dey
+16cd : 88 dey
+16ce : 08 jxi_ret php ;either SP or Y count will fail, if we do not hit
+16cf : 88 dey
+16d0 : 88 dey
+16d1 : 88 dey
+16d2 : 28 plp
+ trap_eq ;returned flags OK?
+16d3 : f0fe > beq * ;failed equal (zero)
+
+ trap_pl
+16d5 : 10fe > bpl * ;failed plus (bit 7 clear)
+
+ trap_cc
+16d7 : 90fe > bcc * ;failed carry clear
+
+ trap_vc
+16d9 : 50fe > bvc * ;failed overflow clear
+
+16db : c9f2 cmp #('X'^$aa) ;returned registers OK?
+ trap_ne
+16dd : d0fe > bne * ;failed not equal (non zero)
+
+16df : e006 cpx #6
+ trap_ne
+16e1 : d0fe > bne * ;failed not equal (non zero)
+
+16e3 : c043 cpy #('I'-6)
+ trap_ne
+16e5 : d0fe > bne * ;failed not equal (non zero)
+
+16e7 : ba tsx ;SP check
+16e8 : e0ff cpx #$ff
+ trap_ne
+16ea : d0fe > bne * ;failed not equal (non zero)
+
+
+16ec : a908 lda #lo(jxp_ok) ;test with index causing a page cross
+16ee : 8d0003 sta jxp_tab
+16f1 : a917 lda #hi(jxp_ok)
+16f3 : 8d0103 sta jxp_tab+1
+16f6 : a905 lda #lo(jxp_px)
+16f8 : 8d0002 sta pg_x
+16fb : a917 lda #hi(jxp_px)
+16fd : 8d0102 sta pg_x+1
+1700 : a2ff ldx #$ff
+1702 : 7c0102 jmp (jxp_tab-$ff,x)
+
+1705 : jxp_px
+ trap ;page cross by index to wrong page
+1705 : 4c0517 > jmp * ;failed anyway
+
+
+1708 : jxp_ok
+ next_test
+1708 : ad0202 > lda test_case ;previous test
+170b : c90a > cmp #test_num
+ > trap_ne ;test is out of sequence
+170d : d0fe > bne * ;failed not equal (non zero)
+ >
+000b = >test_num = test_num + 1
+170f : a90b > lda #test_num ;*** next tests' number
+1711 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if ROM_vectors = 1
+ ; test BRK clears decimal mode
+ load_flag 0 ;with interrupts enabled if allowed!
+1714 : a900 > lda #0 ;allow test to change I-flag (no mask)
+
+1716 : 48 pha
+1717 : a942 lda #'B'
+1719 : a252 ldx #'R'
+171b : a04b ldy #'K'
+171d : 28 plp ;N=0, V=0, Z=0, C=0
+171e : 00 brk
+171f : 88 dey ;should not be executed
+1720 : brk_ret0 ;address of break return
+1720 : 08 php ;either SP or Y count will fail, if we do not hit
+1721 : 88 dey
+1722 : 88 dey
+1723 : 88 dey
+1724 : c9e8 cmp #'B'^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+1726 : d0fe > bne * ;failed not equal (non zero)
+
+1728 : e053 cpx #'R'+1
+ trap_ne
+172a : d0fe > bne * ;failed not equal (non zero)
+
+172c : c045 cpy #'K'-6
+ trap_ne
+172e : d0fe > bne * ;failed not equal (non zero)
+
+1730 : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag 0
+1731 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1733 : d0fe > bne * ;failed not equal (non zero)
+
+1735 : ba tsx ;sp?
+1736 : e0ff cpx #$ff
+ trap_ne
+1738 : d0fe > bne * ;failed not equal (non zero)
+
+ ;pass 2
+ load_flag $ff ;with interrupts disabled if allowed!
+173a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+173c : 48 pha
+173d : a9bd lda #$ff-'B'
+173f : a2ad ldx #$ff-'R'
+1741 : a0b4 ldy #$ff-'K'
+1743 : 28 plp ;N=1, V=1, Z=1, C=1
+1744 : 00 brk
+1745 : 88 dey ;should not be executed
+1746 : brk_ret1 ;address of break return
+1746 : 08 php ;either SP or Y count will fail, if we do not hit
+1747 : 88 dey
+1748 : 88 dey
+1749 : 88 dey
+174a : c917 cmp #($ff-'B')^$aa ;returned registers OK?
+ ;the IRQ vector was never executed if A & X stay unmodified
+ trap_ne
+174c : d0fe > bne * ;failed not equal (non zero)
+
+174e : e0ae cpx #$ff-'R'+1
+ trap_ne
+1750 : d0fe > bne * ;failed not equal (non zero)
+
+1752 : c0ae cpy #$ff-'K'-6
+ trap_ne
+1754 : d0fe > bne * ;failed not equal (non zero)
+
+1756 : 68 pla ;returned flags OK (unchanged)?
+ cmp_flag $ff
+1757 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+1759 : d0fe > bne * ;failed not equal (non zero)
+
+175b : ba tsx ;sp?
+175c : e0ff cpx #$ff
+ trap_ne
+175e : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+1760 : ad0202 > lda test_case ;previous test
+1763 : c90b > cmp #test_num
+ > trap_ne ;test is out of sequence
+1765 : d0fe > bne * ;failed not equal (non zero)
+ >
+000c = >test_num = test_num + 1
+1767 : a90c > lda #test_num ;*** next tests' number
+1769 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ endif
+
+ ; testing accumulator increment/decrement INC A & DEC A
+176c : a2ac ldx #$ac ;protect x & y
+176e : a0dc ldy #$dc
+ set_a $fe,$ff
+ > load_flag $ff
+1770 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1772 : 48 > pha ;use stack to load status
+1773 : a9fe > lda #$fe ;precharge accu
+1775 : 28 > plp
+
+1776 : 1a inc a ;ff
+ tst_as $ff,$ff-zero
+1777 : 48 > pha
+1778 : 08 > php ;save flags
+1779 : c9ff > cmp #$ff ;test result
+ > trap_ne
+177b : d0fe > bne * ;failed not equal (non zero)
+ >
+177d : 68 > pla ;load status
+177e : 48 > pha
+ > cmp_flag $ff-zero
+177f : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1781 : d0fe > bne * ;failed not equal (non zero)
+ >
+1783 : 28 > plp ;restore status
+1784 : 68 > pla
+
+1785 : 1a inc a ;00
+ tst_as 0,$ff-minus
+1786 : 48 > pha
+1787 : 08 > php ;save flags
+1788 : c900 > cmp #0 ;test result
+ > trap_ne
+178a : d0fe > bne * ;failed not equal (non zero)
+ >
+178c : 68 > pla ;load status
+178d : 48 > pha
+ > cmp_flag $ff-minus
+178e : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1790 : d0fe > bne * ;failed not equal (non zero)
+ >
+1792 : 28 > plp ;restore status
+1793 : 68 > pla
+
+1794 : 1a inc a ;01
+ tst_as 1,$ff-minus-zero
+1795 : 48 > pha
+1796 : 08 > php ;save flags
+1797 : c901 > cmp #1 ;test result
+ > trap_ne
+1799 : d0fe > bne * ;failed not equal (non zero)
+ >
+179b : 68 > pla ;load status
+179c : 48 > pha
+ > cmp_flag $ff-minus-zero
+179d : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+179f : d0fe > bne * ;failed not equal (non zero)
+ >
+17a1 : 28 > plp ;restore status
+17a2 : 68 > pla
+
+17a3 : 3a dec a ;00
+ tst_as 0,$ff-minus
+17a4 : 48 > pha
+17a5 : 08 > php ;save flags
+17a6 : c900 > cmp #0 ;test result
+ > trap_ne
+17a8 : d0fe > bne * ;failed not equal (non zero)
+ >
+17aa : 68 > pla ;load status
+17ab : 48 > pha
+ > cmp_flag $ff-minus
+17ac : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+17ae : d0fe > bne * ;failed not equal (non zero)
+ >
+17b0 : 28 > plp ;restore status
+17b1 : 68 > pla
+
+17b2 : 3a dec a ;ff
+ tst_as $ff,$ff-zero
+17b3 : 48 > pha
+17b4 : 08 > php ;save flags
+17b5 : c9ff > cmp #$ff ;test result
+ > trap_ne
+17b7 : d0fe > bne * ;failed not equal (non zero)
+ >
+17b9 : 68 > pla ;load status
+17ba : 48 > pha
+ > cmp_flag $ff-zero
+17bb : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+17bd : d0fe > bne * ;failed not equal (non zero)
+ >
+17bf : 28 > plp ;restore status
+17c0 : 68 > pla
+
+17c1 : 3a dec a ;fe
+ set_a $fe,0
+ > load_flag 0
+17c2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+17c4 : 48 > pha ;use stack to load status
+17c5 : a9fe > lda #$fe ;precharge accu
+17c7 : 28 > plp
+
+17c8 : 1a inc a ;ff
+ tst_as $ff,minus
+17c9 : 48 > pha
+17ca : 08 > php ;save flags
+17cb : c9ff > cmp #$ff ;test result
+ > trap_ne
+17cd : d0fe > bne * ;failed not equal (non zero)
+ >
+17cf : 68 > pla ;load status
+17d0 : 48 > pha
+ > cmp_flag minus
+17d1 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+17d3 : d0fe > bne * ;failed not equal (non zero)
+ >
+17d5 : 28 > plp ;restore status
+17d6 : 68 > pla
+
+17d7 : 1a inc a ;00
+ tst_as 0,zero
+17d8 : 48 > pha
+17d9 : 08 > php ;save flags
+17da : c900 > cmp #0 ;test result
+ > trap_ne
+17dc : d0fe > bne * ;failed not equal (non zero)
+ >
+17de : 68 > pla ;load status
+17df : 48 > pha
+ > cmp_flag zero
+17e0 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+17e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+17e4 : 28 > plp ;restore status
+17e5 : 68 > pla
+
+17e6 : 1a inc a ;01
+ tst_as 1,0
+17e7 : 48 > pha
+17e8 : 08 > php ;save flags
+17e9 : c901 > cmp #1 ;test result
+ > trap_ne
+17eb : d0fe > bne * ;failed not equal (non zero)
+ >
+17ed : 68 > pla ;load status
+17ee : 48 > pha
+ > cmp_flag 0
+17ef : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+17f1 : d0fe > bne * ;failed not equal (non zero)
+ >
+17f3 : 28 > plp ;restore status
+17f4 : 68 > pla
+
+17f5 : 3a dec a ;00
+ tst_as 0,zero
+17f6 : 48 > pha
+17f7 : 08 > php ;save flags
+17f8 : c900 > cmp #0 ;test result
+ > trap_ne
+17fa : d0fe > bne * ;failed not equal (non zero)
+ >
+17fc : 68 > pla ;load status
+17fd : 48 > pha
+ > cmp_flag zero
+17fe : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1800 : d0fe > bne * ;failed not equal (non zero)
+ >
+1802 : 28 > plp ;restore status
+1803 : 68 > pla
+
+1804 : 3a dec a ;ff
+ tst_as $ff,minus
+1805 : 48 > pha
+1806 : 08 > php ;save flags
+1807 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1809 : d0fe > bne * ;failed not equal (non zero)
+ >
+180b : 68 > pla ;load status
+180c : 48 > pha
+ > cmp_flag minus
+180d : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+180f : d0fe > bne * ;failed not equal (non zero)
+ >
+1811 : 28 > plp ;restore status
+1812 : 68 > pla
+
+1813 : e0ac cpx #$ac
+ trap_ne ;x altered during test
+1815 : d0fe > bne * ;failed not equal (non zero)
+
+1817 : c0dc cpy #$dc
+ trap_ne ;y altered during test
+1819 : d0fe > bne * ;failed not equal (non zero)
+
+181b : ba tsx
+181c : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+181e : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+1820 : ad0202 > lda test_case ;previous test
+1823 : c90c > cmp #test_num
+ > trap_ne ;test is out of sequence
+1825 : d0fe > bne * ;failed not equal (non zero)
+ >
+000d = >test_num = test_num + 1
+1827 : a90d > lda #test_num ;*** next tests' number
+1829 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing load / store accumulator LDA / STA (zp)
+182c : a299 ldx #$99 ;protect x & y
+182e : a066 ldy #$66
+ set_stat 0
+ > load_flag 0
+1830 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1832 : 48 > pha ;use stack to load status
+1833 : 28 > plp
+
+1834 : b224 lda (ind1)
+1836 : 08 php ;test stores do not alter flags
+1837 : 49c3 eor #$c3
+1839 : 28 plp
+183a : 9230 sta (indt)
+183c : 08 php ;flags after load/store sequence
+183d : 49c3 eor #$c3
+183f : c9c3 cmp #$c3 ;test result
+ trap_ne
+1841 : d0fe > bne * ;failed not equal (non zero)
+
+1843 : 68 pla ;load status
+ eor_flag 0
+1844 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1846 : cd1502 cmp fLDx ;test flags
+ trap_ne
+1849 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+184b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+184d : 48 > pha ;use stack to load status
+184e : 28 > plp
+
+184f : b226 lda (ind1+2)
+1851 : 08 php ;test stores do not alter flags
+1852 : 49c3 eor #$c3
+1854 : 28 plp
+1855 : 9232 sta (indt+2)
+1857 : 08 php ;flags after load/store sequence
+1858 : 49c3 eor #$c3
+185a : c982 cmp #$82 ;test result
+ trap_ne
+185c : d0fe > bne * ;failed not equal (non zero)
+
+185e : 68 pla ;load status
+ eor_flag 0
+185f : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1861 : cd1602 cmp fLDx+1 ;test flags
+ trap_ne
+1864 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1866 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1868 : 48 > pha ;use stack to load status
+1869 : 28 > plp
+
+186a : b228 lda (ind1+4)
+186c : 08 php ;test stores do not alter flags
+186d : 49c3 eor #$c3
+186f : 28 plp
+1870 : 9234 sta (indt+4)
+1872 : 08 php ;flags after load/store sequence
+1873 : 49c3 eor #$c3
+1875 : c941 cmp #$41 ;test result
+ trap_ne
+1877 : d0fe > bne * ;failed not equal (non zero)
+
+1879 : 68 pla ;load status
+ eor_flag 0
+187a : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+187c : cd1702 cmp fLDx+2 ;test flags
+ trap_ne
+187f : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat 0
+ > load_flag 0
+1881 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1883 : 48 > pha ;use stack to load status
+1884 : 28 > plp
+
+1885 : b22a lda (ind1+6)
+1887 : 08 php ;test stores do not alter flags
+1888 : 49c3 eor #$c3
+188a : 28 plp
+188b : 9236 sta (indt+6)
+188d : 08 php ;flags after load/store sequence
+188e : 49c3 eor #$c3
+1890 : c900 cmp #0 ;test result
+ trap_ne
+1892 : d0fe > bne * ;failed not equal (non zero)
+
+1894 : 68 pla ;load status
+ eor_flag 0
+1895 : 4930 > eor #0|fao ;invert expected flags + always on bits
+
+1897 : cd1802 cmp fLDx+3 ;test flags
+ trap_ne
+189a : d0fe > bne * ;failed not equal (non zero)
+
+189c : e099 cpx #$99
+ trap_ne ;x altered during test
+189e : d0fe > bne * ;failed not equal (non zero)
+
+18a0 : c066 cpy #$66
+ trap_ne ;y altered during test
+18a2 : d0fe > bne * ;failed not equal (non zero)
+
+
+18a4 : a003 ldy #3 ;testing store result
+18a6 : a200 ldx #0
+18a8 : b90502 tstai1 lda abst,y
+18ab : 49c3 eor #$c3
+18ad : d91002 cmp abs1,y
+ trap_ne ;store to indirect data
+18b0 : d0fe > bne * ;failed not equal (non zero)
+
+18b2 : 8a txa
+18b3 : 990502 sta abst,y ;clear
+18b6 : 88 dey
+18b7 : 10ef bpl tstai1
+
+18b9 : a299 ldx #$99 ;protect x & y
+18bb : a066 ldy #$66
+ set_stat $ff
+ > load_flag $ff
+18bd : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+18bf : 48 > pha ;use stack to load status
+18c0 : 28 > plp
+
+18c1 : b224 lda (ind1)
+18c3 : 08 php ;test stores do not alter flags
+18c4 : 49c3 eor #$c3
+18c6 : 28 plp
+18c7 : 9230 sta (indt)
+18c9 : 08 php ;flags after load/store sequence
+18ca : 49c3 eor #$c3
+18cc : c9c3 cmp #$c3 ;test result
+ trap_ne
+18ce : d0fe > bne * ;failed not equal (non zero)
+
+18d0 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+18d1 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+18d3 : cd1502 cmp fLDx ;test flags
+ trap_ne
+18d6 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+18d8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+18da : 48 > pha ;use stack to load status
+18db : 28 > plp
+
+18dc : b226 lda (ind1+2)
+18de : 08 php ;test stores do not alter flags
+18df : 49c3 eor #$c3
+18e1 : 28 plp
+18e2 : 9232 sta (indt+2)
+18e4 : 08 php ;flags after load/store sequence
+18e5 : 49c3 eor #$c3
+18e7 : c982 cmp #$82 ;test result
+ trap_ne
+18e9 : d0fe > bne * ;failed not equal (non zero)
+
+18eb : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+18ec : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+18ee : cd1602 cmp fLDx+1 ;test flags
+ trap_ne
+18f1 : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+18f3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+18f5 : 48 > pha ;use stack to load status
+18f6 : 28 > plp
+
+18f7 : b228 lda (ind1+4)
+18f9 : 08 php ;test stores do not alter flags
+18fa : 49c3 eor #$c3
+18fc : 28 plp
+18fd : 9234 sta (indt+4)
+18ff : 08 php ;flags after load/store sequence
+1900 : 49c3 eor #$c3
+1902 : c941 cmp #$41 ;test result
+ trap_ne
+1904 : d0fe > bne * ;failed not equal (non zero)
+
+1906 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1907 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1909 : cd1702 cmp fLDx+2 ;test flags
+ trap_ne
+190c : d0fe > bne * ;failed not equal (non zero)
+
+ set_stat $ff
+ > load_flag $ff
+190e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1910 : 48 > pha ;use stack to load status
+1911 : 28 > plp
+
+1912 : b22a lda (ind1+6)
+1914 : 08 php ;test stores do not alter flags
+1915 : 49c3 eor #$c3
+1917 : 28 plp
+1918 : 9236 sta (indt+6)
+191a : 08 php ;flags after load/store sequence
+191b : 49c3 eor #$c3
+191d : c900 cmp #0 ;test result
+ trap_ne
+191f : d0fe > bne * ;failed not equal (non zero)
+
+1921 : 68 pla ;load status
+ eor_flag lo~fnz ;mask bits not altered
+1922 : 497d > eor #lo~fnz |fao ;invert expected flags + always on bits
+
+1924 : cd1802 cmp fLDx+3 ;test flags
+ trap_ne
+1927 : d0fe > bne * ;failed not equal (non zero)
+
+1929 : e099 cpx #$99
+ trap_ne ;x altered during test
+192b : d0fe > bne * ;failed not equal (non zero)
+
+192d : c066 cpy #$66
+ trap_ne ;y altered during test
+192f : d0fe > bne * ;failed not equal (non zero)
+
+
+1931 : a003 ldy #3 ;testing store result
+1933 : a200 ldx #0
+1935 : b90502 tstai2 lda abst,y
+1938 : 49c3 eor #$c3
+193a : d91002 cmp abs1,y
+ trap_ne ;store to indirect data
+193d : d0fe > bne * ;failed not equal (non zero)
+
+193f : 8a txa
+1940 : 990502 sta abst,y ;clear
+1943 : 88 dey
+1944 : 10ef bpl tstai2
+1946 : ba tsx
+1947 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+1949 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+194b : ad0202 > lda test_case ;previous test
+194e : c90d > cmp #test_num
+ > trap_ne ;test is out of sequence
+1950 : d0fe > bne * ;failed not equal (non zero)
+ >
+000e = >test_num = test_num + 1
+1952 : a90e > lda #test_num ;*** next tests' number
+1954 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing STZ - zp / abs / zp,x / abs,x
+1957 : a07b ldy #123 ;protect y
+1959 : a204 ldx #4 ;precharge test area
+195b : a907 lda #7
+195d : 950c tstz1 sta zpt,x
+195f : 0a asl a
+1960 : ca dex
+1961 : 10fa bpl tstz1
+1963 : a204 ldx #4
+ set_a $55,$ff
+ > load_flag $ff
+1965 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1967 : 48 > pha ;use stack to load status
+1968 : a955 > lda #$55 ;precharge accu
+196a : 28 > plp
+
+196b : 640c stz zpt
+196d : 640d stz zpt+1
+196f : 640e stz zpt+2
+1971 : 640f stz zpt+3
+1973 : 6410 stz zpt+4
+ tst_a $55,$ff
+1975 : 08 > php ;save flags
+1976 : c955 > cmp #$55 ;test result
+ > trap_ne
+1978 : d0fe > bne * ;failed not equal (non zero)
+ >
+197a : 68 > pla ;load status
+197b : 48 > pha
+ > cmp_flag $ff
+197c : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+197e : d0fe > bne * ;failed not equal (non zero)
+ >
+1980 : 28 > plp ;restore status
+
+1981 : b50c tstz2 lda zpt,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+1983 : d0fe > bne * ;failed not equal (non zero)
+
+1985 : ca dex
+1986 : 10f9 bpl tstz2
+1988 : a204 ldx #4 ;precharge test area
+198a : a907 lda #7
+198c : 950c tstz3 sta zpt,x
+198e : 0a asl a
+198f : ca dex
+1990 : 10fa bpl tstz3
+1992 : a204 ldx #4
+ set_a $aa,0
+ > load_flag 0
+1994 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1996 : 48 > pha ;use stack to load status
+1997 : a9aa > lda #$aa ;precharge accu
+1999 : 28 > plp
+
+199a : 640c stz zpt
+199c : 640d stz zpt+1
+199e : 640e stz zpt+2
+19a0 : 640f stz zpt+3
+19a2 : 6410 stz zpt+4
+ tst_a $aa,0
+19a4 : 08 > php ;save flags
+19a5 : c9aa > cmp #$aa ;test result
+ > trap_ne
+19a7 : d0fe > bne * ;failed not equal (non zero)
+ >
+19a9 : 68 > pla ;load status
+19aa : 48 > pha
+ > cmp_flag 0
+19ab : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+19ad : d0fe > bne * ;failed not equal (non zero)
+ >
+19af : 28 > plp ;restore status
+
+19b0 : b50c tstz4 lda zpt,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+19b2 : d0fe > bne * ;failed not equal (non zero)
+
+19b4 : ca dex
+19b5 : 10f9 bpl tstz4
+
+19b7 : a204 ldx #4 ;precharge test area
+19b9 : a907 lda #7
+19bb : 9d0502 tstz5 sta abst,x
+19be : 0a asl a
+19bf : ca dex
+19c0 : 10f9 bpl tstz5
+19c2 : a204 ldx #4
+ set_a $55,$ff
+ > load_flag $ff
+19c4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+19c6 : 48 > pha ;use stack to load status
+19c7 : a955 > lda #$55 ;precharge accu
+19c9 : 28 > plp
+
+19ca : 9c0502 stz abst
+19cd : 9c0602 stz abst+1
+19d0 : 9c0702 stz abst+2
+19d3 : 9c0802 stz abst+3
+19d6 : 9c0902 stz abst+4
+ tst_a $55,$ff
+19d9 : 08 > php ;save flags
+19da : c955 > cmp #$55 ;test result
+ > trap_ne
+19dc : d0fe > bne * ;failed not equal (non zero)
+ >
+19de : 68 > pla ;load status
+19df : 48 > pha
+ > cmp_flag $ff
+19e0 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+19e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+19e4 : 28 > plp ;restore status
+
+19e5 : bd0502 tstz6 lda abst,x ;verify zeros stored
+ trap_ne ;non zero after STZ abs
+19e8 : d0fe > bne * ;failed not equal (non zero)
+
+19ea : ca dex
+19eb : 10f8 bpl tstz6
+19ed : a204 ldx #4 ;precharge test area
+19ef : a907 lda #7
+19f1 : 9d0502 tstz7 sta abst,x
+19f4 : 0a asl a
+19f5 : ca dex
+19f6 : 10f9 bpl tstz7
+19f8 : a204 ldx #4
+ set_a $aa,0
+ > load_flag 0
+19fa : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+19fc : 48 > pha ;use stack to load status
+19fd : a9aa > lda #$aa ;precharge accu
+19ff : 28 > plp
+
+1a00 : 9c0502 stz abst
+1a03 : 9c0602 stz abst+1
+1a06 : 9c0702 stz abst+2
+1a09 : 9c0802 stz abst+3
+1a0c : 9c0902 stz abst+4
+ tst_a $aa,0
+1a0f : 08 > php ;save flags
+1a10 : c9aa > cmp #$aa ;test result
+ > trap_ne
+1a12 : d0fe > bne * ;failed not equal (non zero)
+ >
+1a14 : 68 > pla ;load status
+1a15 : 48 > pha
+ > cmp_flag 0
+1a16 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1a18 : d0fe > bne * ;failed not equal (non zero)
+ >
+1a1a : 28 > plp ;restore status
+
+1a1b : bd0502 tstz8 lda abst,x ;verify zeros stored
+ trap_ne ;non zero after STZ abs
+1a1e : d0fe > bne * ;failed not equal (non zero)
+
+1a20 : ca dex
+1a21 : 10f8 bpl tstz8
+
+1a23 : a204 ldx #4 ;precharge test area
+1a25 : a907 lda #7
+1a27 : 950c tstz11 sta zpt,x
+1a29 : 0a asl a
+1a2a : ca dex
+1a2b : 10fa bpl tstz11
+1a2d : a204 ldx #4
+1a2f : tstz15
+ set_a $55,$ff
+ > load_flag $ff
+1a2f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a31 : 48 > pha ;use stack to load status
+1a32 : a955 > lda #$55 ;precharge accu
+1a34 : 28 > plp
+
+1a35 : 740c stz zpt,x
+ tst_a $55,$ff
+1a37 : 08 > php ;save flags
+1a38 : c955 > cmp #$55 ;test result
+ > trap_ne
+1a3a : d0fe > bne * ;failed not equal (non zero)
+ >
+1a3c : 68 > pla ;load status
+1a3d : 48 > pha
+ > cmp_flag $ff
+1a3e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1a40 : d0fe > bne * ;failed not equal (non zero)
+ >
+1a42 : 28 > plp ;restore status
+
+1a43 : ca dex
+1a44 : 10e9 bpl tstz15
+1a46 : a204 ldx #4
+1a48 : b50c tstz12 lda zpt,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+1a4a : d0fe > bne * ;failed not equal (non zero)
+
+1a4c : ca dex
+1a4d : 10f9 bpl tstz12
+1a4f : a204 ldx #4 ;precharge test area
+1a51 : a907 lda #7
+1a53 : 950c tstz13 sta zpt,x
+1a55 : 0a asl a
+1a56 : ca dex
+1a57 : 10fa bpl tstz13
+1a59 : a204 ldx #4
+1a5b : tstz16
+ set_a $aa,0
+ > load_flag 0
+1a5b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1a5d : 48 > pha ;use stack to load status
+1a5e : a9aa > lda #$aa ;precharge accu
+1a60 : 28 > plp
+
+1a61 : 740c stz zpt,x
+ tst_a $aa,0
+1a63 : 08 > php ;save flags
+1a64 : c9aa > cmp #$aa ;test result
+ > trap_ne
+1a66 : d0fe > bne * ;failed not equal (non zero)
+ >
+1a68 : 68 > pla ;load status
+1a69 : 48 > pha
+ > cmp_flag 0
+1a6a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1a6c : d0fe > bne * ;failed not equal (non zero)
+ >
+1a6e : 28 > plp ;restore status
+
+1a6f : ca dex
+1a70 : 10e9 bpl tstz16
+1a72 : a204 ldx #4
+1a74 : b50c tstz14 lda zpt,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+1a76 : d0fe > bne * ;failed not equal (non zero)
+
+1a78 : ca dex
+1a79 : 10f9 bpl tstz14
+
+1a7b : a204 ldx #4 ;precharge test area
+1a7d : a907 lda #7
+1a7f : 9d0502 tstz21 sta abst,x
+1a82 : 0a asl a
+1a83 : ca dex
+1a84 : 10f9 bpl tstz21
+1a86 : a204 ldx #4
+1a88 : tstz25
+ set_a $55,$ff
+ > load_flag $ff
+1a88 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1a8a : 48 > pha ;use stack to load status
+1a8b : a955 > lda #$55 ;precharge accu
+1a8d : 28 > plp
+
+1a8e : 9e0502 stz abst,x
+ tst_a $55,$ff
+1a91 : 08 > php ;save flags
+1a92 : c955 > cmp #$55 ;test result
+ > trap_ne
+1a94 : d0fe > bne * ;failed not equal (non zero)
+ >
+1a96 : 68 > pla ;load status
+1a97 : 48 > pha
+ > cmp_flag $ff
+1a98 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1a9a : d0fe > bne * ;failed not equal (non zero)
+ >
+1a9c : 28 > plp ;restore status
+
+1a9d : ca dex
+1a9e : 10e8 bpl tstz25
+1aa0 : a204 ldx #4
+1aa2 : bd0502 tstz22 lda abst,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+1aa5 : d0fe > bne * ;failed not equal (non zero)
+
+1aa7 : ca dex
+1aa8 : 10f8 bpl tstz22
+1aaa : a204 ldx #4 ;precharge test area
+1aac : a907 lda #7
+1aae : 9d0502 tstz23 sta abst,x
+1ab1 : 0a asl a
+1ab2 : ca dex
+1ab3 : 10f9 bpl tstz23
+1ab5 : a204 ldx #4
+1ab7 : tstz26
+ set_a $aa,0
+ > load_flag 0
+1ab7 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ab9 : 48 > pha ;use stack to load status
+1aba : a9aa > lda #$aa ;precharge accu
+1abc : 28 > plp
+
+1abd : 9e0502 stz abst,x
+ tst_a $aa,0
+1ac0 : 08 > php ;save flags
+1ac1 : c9aa > cmp #$aa ;test result
+ > trap_ne
+1ac3 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ac5 : 68 > pla ;load status
+1ac6 : 48 > pha
+ > cmp_flag 0
+1ac7 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ac9 : d0fe > bne * ;failed not equal (non zero)
+ >
+1acb : 28 > plp ;restore status
+
+1acc : ca dex
+1acd : 10e8 bpl tstz26
+1acf : a204 ldx #4
+1ad1 : bd0502 tstz24 lda abst,x ;verify zeros stored
+ trap_ne ;non zero after STZ zp
+1ad4 : d0fe > bne * ;failed not equal (non zero)
+
+1ad6 : ca dex
+1ad7 : 10f8 bpl tstz24
+
+1ad9 : c07b cpy #123
+ trap_ne ;y altered during test
+1adb : d0fe > bne * ;failed not equal (non zero)
+
+1add : ba tsx
+1ade : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+1ae0 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+1ae2 : ad0202 > lda test_case ;previous test
+1ae5 : c90e > cmp #test_num
+ > trap_ne ;test is out of sequence
+1ae7 : d0fe > bne * ;failed not equal (non zero)
+ >
+000f = >test_num = test_num + 1
+1ae9 : a90f > lda #test_num ;*** next tests' number
+1aeb : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing BIT - zp,x / abs,x / #
+1aee : a042 ldy #$42
+1af0 : a203 ldx #3
+ set_a $ff,0
+ > load_flag 0
+1af2 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1af4 : 48 > pha ;use stack to load status
+1af5 : a9ff > lda #$ff ;precharge accu
+1af7 : 28 > plp
+
+1af8 : 3413 bit zp1,x ;00 - should set Z / clear NV
+ tst_a $ff,fz
+1afa : 08 > php ;save flags
+1afb : c9ff > cmp #$ff ;test result
+ > trap_ne
+1afd : d0fe > bne * ;failed not equal (non zero)
+ >
+1aff : 68 > pla ;load status
+1b00 : 48 > pha
+ > cmp_flag fz
+1b01 : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b03 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b05 : 28 > plp ;restore status
+
+1b06 : ca dex
+ set_a 1,0
+ > load_flag 0
+1b07 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b09 : 48 > pha ;use stack to load status
+1b0a : a901 > lda #1 ;precharge accu
+1b0c : 28 > plp
+
+1b0d : 3413 bit zp1,x ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+1b0f : 08 > php ;save flags
+1b10 : c901 > cmp #1 ;test result
+ > trap_ne
+1b12 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b14 : 68 > pla ;load status
+1b15 : 48 > pha
+ > cmp_flag fv
+1b16 : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b18 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b1a : 28 > plp ;restore status
+
+1b1b : ca dex
+ set_a 1,0
+ > load_flag 0
+1b1c : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b1e : 48 > pha ;use stack to load status
+1b1f : a901 > lda #1 ;precharge accu
+1b21 : 28 > plp
+
+1b22 : 3413 bit zp1,x ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+1b24 : 08 > php ;save flags
+1b25 : c901 > cmp #1 ;test result
+ > trap_ne
+1b27 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b29 : 68 > pla ;load status
+1b2a : 48 > pha
+ > cmp_flag fnz
+1b2b : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b2d : d0fe > bne * ;failed not equal (non zero)
+ >
+1b2f : 28 > plp ;restore status
+
+1b30 : ca dex
+ set_a 1,0
+ > load_flag 0
+1b31 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b33 : 48 > pha ;use stack to load status
+1b34 : a901 > lda #1 ;precharge accu
+1b36 : 28 > plp
+
+1b37 : 3413 bit zp1,x ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+1b39 : 08 > php ;save flags
+1b3a : c901 > cmp #1 ;test result
+ > trap_ne
+1b3c : d0fe > bne * ;failed not equal (non zero)
+ >
+1b3e : 68 > pla ;load status
+1b3f : 48 > pha
+ > cmp_flag fnv
+1b40 : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b42 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b44 : 28 > plp ;restore status
+
+
+ set_a 1,$ff
+ > load_flag $ff
+1b45 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1b47 : 48 > pha ;use stack to load status
+1b48 : a901 > lda #1 ;precharge accu
+1b4a : 28 > plp
+
+1b4b : 3413 bit zp1,x ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+1b4d : 08 > php ;save flags
+1b4e : c901 > cmp #1 ;test result
+ > trap_ne
+1b50 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b52 : 68 > pla ;load status
+1b53 : 48 > pha
+ > cmp_flag ~fz
+1b54 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b56 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b58 : 28 > plp ;restore status
+
+1b59 : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1b5a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1b5c : 48 > pha ;use stack to load status
+1b5d : a901 > lda #1 ;precharge accu
+1b5f : 28 > plp
+
+1b60 : 3413 bit zp1,x ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+1b62 : 08 > php ;save flags
+1b63 : c901 > cmp #1 ;test result
+ > trap_ne
+1b65 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b67 : 68 > pla ;load status
+1b68 : 48 > pha
+ > cmp_flag ~fv
+1b69 : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b6b : d0fe > bne * ;failed not equal (non zero)
+ >
+1b6d : 28 > plp ;restore status
+
+1b6e : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1b6f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1b71 : 48 > pha ;use stack to load status
+1b72 : a901 > lda #1 ;precharge accu
+1b74 : 28 > plp
+
+1b75 : 3413 bit zp1,x ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+1b77 : 08 > php ;save flags
+1b78 : c901 > cmp #1 ;test result
+ > trap_ne
+1b7a : d0fe > bne * ;failed not equal (non zero)
+ >
+1b7c : 68 > pla ;load status
+1b7d : 48 > pha
+ > cmp_flag ~fnz
+1b7e : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b80 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b82 : 28 > plp ;restore status
+
+1b83 : e8 inx
+ set_a $ff,$ff
+ > load_flag $ff
+1b84 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1b86 : 48 > pha ;use stack to load status
+1b87 : a9ff > lda #$ff ;precharge accu
+1b89 : 28 > plp
+
+1b8a : 3413 bit zp1,x ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+1b8c : 08 > php ;save flags
+1b8d : c9ff > cmp #$ff ;test result
+ > trap_ne
+1b8f : d0fe > bne * ;failed not equal (non zero)
+ >
+1b91 : 68 > pla ;load status
+1b92 : 48 > pha
+ > cmp_flag ~fnv
+1b93 : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1b95 : d0fe > bne * ;failed not equal (non zero)
+ >
+1b97 : 28 > plp ;restore status
+
+
+ set_a $ff,0
+ > load_flag 0
+1b98 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1b9a : 48 > pha ;use stack to load status
+1b9b : a9ff > lda #$ff ;precharge accu
+1b9d : 28 > plp
+
+1b9e : 3c1002 bit abs1,x ;00 - should set Z / clear NV
+ tst_a $ff,fz
+1ba1 : 08 > php ;save flags
+1ba2 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1ba4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ba6 : 68 > pla ;load status
+1ba7 : 48 > pha
+ > cmp_flag fz
+1ba8 : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1baa : d0fe > bne * ;failed not equal (non zero)
+ >
+1bac : 28 > plp ;restore status
+
+1bad : ca dex
+ set_a 1,0
+ > load_flag 0
+1bae : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1bb0 : 48 > pha ;use stack to load status
+1bb1 : a901 > lda #1 ;precharge accu
+1bb3 : 28 > plp
+
+1bb4 : 3c1002 bit abs1,x ;41 - should set V (M6) / clear NZ
+ tst_a 1,fv
+1bb7 : 08 > php ;save flags
+1bb8 : c901 > cmp #1 ;test result
+ > trap_ne
+1bba : d0fe > bne * ;failed not equal (non zero)
+ >
+1bbc : 68 > pla ;load status
+1bbd : 48 > pha
+ > cmp_flag fv
+1bbe : c970 > cmp #(fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bc0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bc2 : 28 > plp ;restore status
+
+1bc3 : ca dex
+ set_a 1,0
+ > load_flag 0
+1bc4 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1bc6 : 48 > pha ;use stack to load status
+1bc7 : a901 > lda #1 ;precharge accu
+1bc9 : 28 > plp
+
+1bca : 3c1002 bit abs1,x ;82 - should set N (M7) & Z / clear V
+ tst_a 1,fnz
+1bcd : 08 > php ;save flags
+1bce : c901 > cmp #1 ;test result
+ > trap_ne
+1bd0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bd2 : 68 > pla ;load status
+1bd3 : 48 > pha
+ > cmp_flag fnz
+1bd4 : c9b2 > cmp #(fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bd6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1bd8 : 28 > plp ;restore status
+
+1bd9 : ca dex
+ set_a 1,0
+ > load_flag 0
+1bda : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1bdc : 48 > pha ;use stack to load status
+1bdd : a901 > lda #1 ;precharge accu
+1bdf : 28 > plp
+
+1be0 : 3c1002 bit abs1,x ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,fnv
+1be3 : 08 > php ;save flags
+1be4 : c901 > cmp #1 ;test result
+ > trap_ne
+1be6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1be8 : 68 > pla ;load status
+1be9 : 48 > pha
+ > cmp_flag fnv
+1bea : c9f0 > cmp #(fnv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1bec : d0fe > bne * ;failed not equal (non zero)
+ >
+1bee : 28 > plp ;restore status
+
+
+ set_a 1,$ff
+ > load_flag $ff
+1bef : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1bf1 : 48 > pha ;use stack to load status
+1bf2 : a901 > lda #1 ;precharge accu
+1bf4 : 28 > plp
+
+1bf5 : 3c1002 bit abs1,x ;c3 - should set N (M7) & V (M6) / clear Z
+ tst_a 1,~fz
+1bf8 : 08 > php ;save flags
+1bf9 : c901 > cmp #1 ;test result
+ > trap_ne
+1bfb : d0fe > bne * ;failed not equal (non zero)
+ >
+1bfd : 68 > pla ;load status
+1bfe : 48 > pha
+ > cmp_flag ~fz
+1bff : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c01 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c03 : 28 > plp ;restore status
+
+1c04 : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1c05 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c07 : 48 > pha ;use stack to load status
+1c08 : a901 > lda #1 ;precharge accu
+1c0a : 28 > plp
+
+1c0b : 3c1002 bit abs1,x ;82 - should set N (M7) & Z / clear V
+ tst_a 1,~fv
+1c0e : 08 > php ;save flags
+1c0f : c901 > cmp #1 ;test result
+ > trap_ne
+1c11 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c13 : 68 > pla ;load status
+1c14 : 48 > pha
+ > cmp_flag ~fv
+1c15 : c9bf > cmp #(~fv|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c17 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c19 : 28 > plp ;restore status
+
+1c1a : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1c1b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c1d : 48 > pha ;use stack to load status
+1c1e : a901 > lda #1 ;precharge accu
+1c20 : 28 > plp
+
+1c21 : 3c1002 bit abs1,x ;41 - should set V (M6) / clear NZ
+ tst_a 1,~fnz
+1c24 : 08 > php ;save flags
+1c25 : c901 > cmp #1 ;test result
+ > trap_ne
+1c27 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c29 : 68 > pla ;load status
+1c2a : 48 > pha
+ > cmp_flag ~fnz
+1c2b : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c2d : d0fe > bne * ;failed not equal (non zero)
+ >
+1c2f : 28 > plp ;restore status
+
+1c30 : e8 inx
+ set_a $ff,$ff
+ > load_flag $ff
+1c31 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c33 : 48 > pha ;use stack to load status
+1c34 : a9ff > lda #$ff ;precharge accu
+1c36 : 28 > plp
+
+1c37 : 3c1002 bit abs1,x ;00 - should set Z / clear NV
+ tst_a $ff,~fnv
+1c3a : 08 > php ;save flags
+1c3b : c9ff > cmp #$ff ;test result
+ > trap_ne
+1c3d : d0fe > bne * ;failed not equal (non zero)
+ >
+1c3f : 68 > pla ;load status
+1c40 : 48 > pha
+ > cmp_flag ~fnv
+1c41 : c93f > cmp #(~fnv |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c43 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c45 : 28 > plp ;restore status
+
+
+ set_a $ff,0
+ > load_flag 0
+1c46 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c48 : 48 > pha ;use stack to load status
+1c49 : a9ff > lda #$ff ;precharge accu
+1c4b : 28 > plp
+
+1c4c : 8900 bit #$00 ;00 - should set Z
+ tst_a $ff,fz
+1c4e : 08 > php ;save flags
+1c4f : c9ff > cmp #$ff ;test result
+ > trap_ne
+1c51 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c53 : 68 > pla ;load status
+1c54 : 48 > pha
+ > cmp_flag fz
+1c55 : c932 > cmp #(fz |fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c57 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c59 : 28 > plp ;restore status
+
+1c5a : ca dex
+ set_a 1,0
+ > load_flag 0
+1c5b : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c5d : 48 > pha ;use stack to load status
+1c5e : a901 > lda #1 ;precharge accu
+1c60 : 28 > plp
+
+1c61 : 8941 bit #$41 ;41 - should clear Z
+ tst_a 1,0
+1c63 : 08 > php ;save flags
+1c64 : c901 > cmp #1 ;test result
+ > trap_ne
+1c66 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c68 : 68 > pla ;load status
+1c69 : 48 > pha
+ > cmp_flag 0
+1c6a : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c6c : d0fe > bne * ;failed not equal (non zero)
+ >
+1c6e : 28 > plp ;restore status
+
+ ; *** DEBUG INFO ***
+ ; if it fails the previous test and your BIT # has set the V flag
+ ; see http://forum.6502.org/viewtopic.php?f=2&t=2241&p=27243#p27239
+ ; why it shouldn't alter N or V flags on a BIT #
+1c6f : ca dex
+ set_a 1,0
+ > load_flag 0
+1c70 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c72 : 48 > pha ;use stack to load status
+1c73 : a901 > lda #1 ;precharge accu
+1c75 : 28 > plp
+
+1c76 : 8982 bit #$82 ;82 - should set Z
+ tst_a 1,fz
+1c78 : 08 > php ;save flags
+1c79 : c901 > cmp #1 ;test result
+ > trap_ne
+1c7b : d0fe > bne * ;failed not equal (non zero)
+ >
+1c7d : 68 > pla ;load status
+1c7e : 48 > pha
+ > cmp_flag fz
+1c7f : c932 > cmp #(fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c81 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c83 : 28 > plp ;restore status
+
+1c84 : ca dex
+ set_a 1,0
+ > load_flag 0
+1c85 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1c87 : 48 > pha ;use stack to load status
+1c88 : a901 > lda #1 ;precharge accu
+1c8a : 28 > plp
+
+1c8b : 89c3 bit #$c3 ;c3 - should clear Z
+ tst_a 1,0
+1c8d : 08 > php ;save flags
+1c8e : c901 > cmp #1 ;test result
+ > trap_ne
+1c90 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c92 : 68 > pla ;load status
+1c93 : 48 > pha
+ > cmp_flag 0
+1c94 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1c96 : d0fe > bne * ;failed not equal (non zero)
+ >
+1c98 : 28 > plp ;restore status
+
+
+ set_a 1,$ff
+ > load_flag $ff
+1c99 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1c9b : 48 > pha ;use stack to load status
+1c9c : a901 > lda #1 ;precharge accu
+1c9e : 28 > plp
+
+1c9f : 89c3 bit #$c3 ;c3 - clear Z
+ tst_a 1,~fz
+1ca1 : 08 > php ;save flags
+1ca2 : c901 > cmp #1 ;test result
+ > trap_ne
+1ca4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ca6 : 68 > pla ;load status
+1ca7 : 48 > pha
+ > cmp_flag ~fz
+1ca8 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1caa : d0fe > bne * ;failed not equal (non zero)
+ >
+1cac : 28 > plp ;restore status
+
+1cad : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1cae : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1cb0 : 48 > pha ;use stack to load status
+1cb1 : a901 > lda #1 ;precharge accu
+1cb3 : 28 > plp
+
+1cb4 : 8982 bit #$82 ;82 - should set Z
+ tst_a 1,$ff
+1cb6 : 08 > php ;save flags
+1cb7 : c901 > cmp #1 ;test result
+ > trap_ne
+1cb9 : d0fe > bne * ;failed not equal (non zero)
+ >
+1cbb : 68 > pla ;load status
+1cbc : 48 > pha
+ > cmp_flag $ff
+1cbd : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cbf : d0fe > bne * ;failed not equal (non zero)
+ >
+1cc1 : 28 > plp ;restore status
+
+1cc2 : e8 inx
+ set_a 1,$ff
+ > load_flag $ff
+1cc3 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1cc5 : 48 > pha ;use stack to load status
+1cc6 : a901 > lda #1 ;precharge accu
+1cc8 : 28 > plp
+
+1cc9 : 8941 bit #$41 ;41 - should clear Z
+ tst_a 1,~fz
+1ccb : 08 > php ;save flags
+1ccc : c901 > cmp #1 ;test result
+ > trap_ne
+1cce : d0fe > bne * ;failed not equal (non zero)
+ >
+1cd0 : 68 > pla ;load status
+1cd1 : 48 > pha
+ > cmp_flag ~fz
+1cd2 : c9fd > cmp #(~fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1cd4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1cd6 : 28 > plp ;restore status
+
+1cd7 : e8 inx
+ set_a $ff,$ff
+ > load_flag $ff
+1cd8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1cda : 48 > pha ;use stack to load status
+1cdb : a9ff > lda #$ff ;precharge accu
+1cdd : 28 > plp
+
+1cde : 8900 bit #$00 ;00 - should set Z
+ tst_a $ff,$ff
+1ce0 : 08 > php ;save flags
+1ce1 : c9ff > cmp #$ff ;test result
+ > trap_ne
+1ce3 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ce5 : 68 > pla ;load status
+1ce6 : 48 > pha
+ > cmp_flag $ff
+1ce7 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ce9 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ceb : 28 > plp ;restore status
+
+
+1cec : e003 cpx #3
+ trap_ne ;x altered during test
+1cee : d0fe > bne * ;failed not equal (non zero)
+
+1cf0 : c042 cpy #$42
+ trap_ne ;y altered during test
+1cf2 : d0fe > bne * ;failed not equal (non zero)
+
+1cf4 : ba tsx
+1cf5 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+1cf7 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+1cf9 : ad0202 > lda test_case ;previous test
+1cfc : c90f > cmp #test_num
+ > trap_ne ;test is out of sequence
+1cfe : d0fe > bne * ;failed not equal (non zero)
+ >
+0010 = >test_num = test_num + 1
+1d00 : a910 > lda #test_num ;*** next tests' number
+1d02 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing TRB, TSB - zp / abs
+
+ trbt macro ;\1 = memory, \2 = flags
+ sty \1
+ load_flag \2
+ pha
+ lda zpt+1
+ plp
+ trb \1
+ php
+ cmp zpt+1
+ trap_ne ;accu was changed
+ pla
+ pha
+ ora #fz ;mask Z
+ cmp_flag \2|fz
+ trap_ne ;flags changed except Z
+ pla
+ and #fz
+ cmp zpt+2
+ trap_ne ;Z flag invalid
+ lda zpt+3
+ cmp zpt
+ trap_ne ;altered bits in memory wrong
+ endm
+
+ tsbt macro ;\1 = memory, \2 = flags
+ sty \1
+ load_flag \2
+ pha
+ lda zpt+1
+ plp
+ tsb \1
+ php
+ cmp zpt+1
+ trap_ne ;accu was changed
+ pla
+ pha
+ ora #fz ;mask Z
+ cmp_flag \2|fz
+ trap_ne ;flags changed except Z
+ pla
+ and #fz
+ cmp zpt+2
+ trap_ne ;Z flag invalid
+ lda zpt+4
+ cmp zpt
+ trap_ne ;altered bits in memory wrong
+ endm
+
+1d05 : a2c0 ldx #$c0
+1d07 : a000 ldy #0 ;op1 - memory save
+ ; zpt ;op1 - memory modifiable
+1d09 : 640d stz zpt+1 ;op2 - accu
+ ; zpt+2 ;and flags
+ ; zpt+3 ;memory after reset
+ ; zpt+4 ;memory after set
+
+1d0b : 98 tbt1 tya
+1d0c : 250d and zpt+1 ;set Z by anding the 2 operands
+1d0e : 08 php
+1d0f : 68 pla
+1d10 : 2902 and #fz ;mask Z
+1d12 : 850e sta zpt+2
+1d14 : 98 tya ;reset op1 bits by op2
+1d15 : 49ff eor #$ff
+1d17 : 050d ora zpt+1
+1d19 : 49ff eor #$ff
+1d1b : 850f sta zpt+3
+1d1d : 98 tya ;set op1 bits by op2
+1d1e : 050d ora zpt+1
+1d20 : 8510 sta zpt+4
+
+ trbt zpt,$ff
+1d22 : 840c > sty zpt
+ > load_flag $ff
+1d24 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1d26 : 48 > pha
+1d27 : a50d > lda zpt+1
+1d29 : 28 > plp
+1d2a : 140c > trb zpt
+1d2c : 08 > php
+1d2d : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1d2f : d0fe > bne * ;failed not equal (non zero)
+ >
+1d31 : 68 > pla
+1d32 : 48 > pha
+1d33 : 0902 > ora #fz ;mask Z
+ > cmp_flag $ff|fz
+1d35 : c9ff > cmp #($ff|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1d37 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d39 : 68 > pla
+1d3a : 2902 > and #fz
+1d3c : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1d3e : d0fe > bne * ;failed not equal (non zero)
+ >
+1d40 : a50f > lda zpt+3
+1d42 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1d44 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ trbt abst,$ff
+1d46 : 8c0502 > sty abst
+ > load_flag $ff
+1d49 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1d4b : 48 > pha
+1d4c : a50d > lda zpt+1
+1d4e : 28 > plp
+1d4f : 1c0502 > trb abst
+1d52 : 08 > php
+1d53 : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1d55 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d57 : 68 > pla
+1d58 : 48 > pha
+1d59 : 0902 > ora #fz ;mask Z
+ > cmp_flag $ff|fz
+1d5b : c9ff > cmp #($ff|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1d5d : d0fe > bne * ;failed not equal (non zero)
+ >
+1d5f : 68 > pla
+1d60 : 2902 > and #fz
+1d62 : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1d64 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d66 : a50f > lda zpt+3
+1d68 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1d6a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ trbt zpt,0
+1d6c : 840c > sty zpt
+ > load_flag 0
+1d6e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1d70 : 48 > pha
+1d71 : a50d > lda zpt+1
+1d73 : 28 > plp
+1d74 : 140c > trb zpt
+1d76 : 08 > php
+1d77 : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1d79 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d7b : 68 > pla
+1d7c : 48 > pha
+1d7d : 0902 > ora #fz ;mask Z
+ > cmp_flag 0|fz
+1d7f : c932 > cmp #(0|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1d81 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d83 : 68 > pla
+1d84 : 2902 > and #fz
+1d86 : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1d88 : d0fe > bne * ;failed not equal (non zero)
+ >
+1d8a : a50f > lda zpt+3
+1d8c : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1d8e : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ trbt abst,0
+1d90 : 8c0502 > sty abst
+ > load_flag 0
+1d93 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1d95 : 48 > pha
+1d96 : a50d > lda zpt+1
+1d98 : 28 > plp
+1d99 : 1c0502 > trb abst
+1d9c : 08 > php
+1d9d : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1d9f : d0fe > bne * ;failed not equal (non zero)
+ >
+1da1 : 68 > pla
+1da2 : 48 > pha
+1da3 : 0902 > ora #fz ;mask Z
+ > cmp_flag 0|fz
+1da5 : c932 > cmp #(0|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1da7 : d0fe > bne * ;failed not equal (non zero)
+ >
+1da9 : 68 > pla
+1daa : 2902 > and #fz
+1dac : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1dae : d0fe > bne * ;failed not equal (non zero)
+ >
+1db0 : a50f > lda zpt+3
+1db2 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1db4 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ tsbt zpt,$ff
+1db6 : 840c > sty zpt
+ > load_flag $ff
+1db8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1dba : 48 > pha
+1dbb : a50d > lda zpt+1
+1dbd : 28 > plp
+1dbe : 040c > tsb zpt
+1dc0 : 08 > php
+1dc1 : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1dc3 : d0fe > bne * ;failed not equal (non zero)
+ >
+1dc5 : 68 > pla
+1dc6 : 48 > pha
+1dc7 : 0902 > ora #fz ;mask Z
+ > cmp_flag $ff|fz
+1dc9 : c9ff > cmp #($ff|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1dcb : d0fe > bne * ;failed not equal (non zero)
+ >
+1dcd : 68 > pla
+1dce : 2902 > and #fz
+1dd0 : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1dd2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1dd4 : a510 > lda zpt+4
+1dd6 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1dd8 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ tsbt abst,$ff
+1dda : 8c0502 > sty abst
+ > load_flag $ff
+1ddd : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1ddf : 48 > pha
+1de0 : a50d > lda zpt+1
+1de2 : 28 > plp
+1de3 : 0c0502 > tsb abst
+1de6 : 08 > php
+1de7 : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1de9 : d0fe > bne * ;failed not equal (non zero)
+ >
+1deb : 68 > pla
+1dec : 48 > pha
+1ded : 0902 > ora #fz ;mask Z
+ > cmp_flag $ff|fz
+1def : c9ff > cmp #($ff|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1df1 : d0fe > bne * ;failed not equal (non zero)
+ >
+1df3 : 68 > pla
+1df4 : 2902 > and #fz
+1df6 : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1df8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1dfa : a510 > lda zpt+4
+1dfc : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1dfe : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ tsbt zpt,0
+1e00 : 840c > sty zpt
+ > load_flag 0
+1e02 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1e04 : 48 > pha
+1e05 : a50d > lda zpt+1
+1e07 : 28 > plp
+1e08 : 040c > tsb zpt
+1e0a : 08 > php
+1e0b : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1e0d : d0fe > bne * ;failed not equal (non zero)
+ >
+1e0f : 68 > pla
+1e10 : 48 > pha
+1e11 : 0902 > ora #fz ;mask Z
+ > cmp_flag 0|fz
+1e13 : c932 > cmp #(0|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1e15 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e17 : 68 > pla
+1e18 : 2902 > and #fz
+1e1a : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1e1c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e1e : a510 > lda zpt+4
+1e20 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1e22 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ tsbt abst,0
+1e24 : 8c0502 > sty abst
+ > load_flag 0
+1e27 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1e29 : 48 > pha
+1e2a : a50d > lda zpt+1
+1e2c : 28 > plp
+1e2d : 0c0502 > tsb abst
+1e30 : 08 > php
+1e31 : c50d > cmp zpt+1
+ > trap_ne ;accu was changed
+1e33 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e35 : 68 > pla
+1e36 : 48 > pha
+1e37 : 0902 > ora #fz ;mask Z
+ > cmp_flag 0|fz
+1e39 : c932 > cmp #(0|fz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne ;flags changed except Z
+1e3b : d0fe > bne * ;failed not equal (non zero)
+ >
+1e3d : 68 > pla
+1e3e : 2902 > and #fz
+1e40 : c50e > cmp zpt+2
+ > trap_ne ;Z flag invalid
+1e42 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e44 : a510 > lda zpt+4
+1e46 : c50c > cmp zpt
+ > trap_ne ;altered bits in memory wrong
+1e48 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+
+1e4a : c8 iny ;iterate op1
+1e4b : d004 bne tbt3
+1e4d : e60d inc zpt+1 ;iterate op2
+1e4f : f003 beq tbt2
+1e51 : 4c0b1d tbt3 jmp tbt1
+1e54 : tbt2
+1e54 : e0c0 cpx #$c0
+ trap_ne ;x altered during test
+1e56 : d0fe > bne * ;failed not equal (non zero)
+
+1e58 : ba tsx
+1e59 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+1e5b : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+1e5d : ad0202 > lda test_case ;previous test
+1e60 : c910 > cmp #test_num
+ > trap_ne ;test is out of sequence
+1e62 : d0fe > bne * ;failed not equal (non zero)
+ >
+0011 = >test_num = test_num + 1
+1e64 : a911 > lda #test_num ;*** next tests' number
+1e66 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if rkwl_wdc_op = 1
+ ; testing RMB, SMB - zp
+ rmbt macro ;\1 = bitnum
+ lda #$ff
+ sta zpt
+ set_a $a5,0
+ rmb \1,zpt
+ tst_a $a5,0
+ lda zpt
+ cmp #$ff-(1<<\1)
+ trap_ne ;wrong bits set or cleared
+ lda #1<<\1
+ sta zpt
+ set_a $5a,$ff
+ rmb \1,zpt
+ tst_a $5a,$ff
+ lda zpt
+ trap_ne ;wrong bits set or cleared
+ endm
+ smbt macro ;\1 = bitnum
+ lda #$ff-(1<<\1)
+ sta zpt
+ set_a $a5,0
+ smb \1,zpt
+ tst_a $a5,0
+ lda zpt
+ cmp #$ff
+ trap_ne ;wrong bits set or cleared
+ lda #0
+ sta zpt
+ set_a $5a,$ff
+ smb \1,zpt
+ tst_a $5a,$ff
+ lda zpt
+ cmp #1<<\1
+ trap_ne ;wrong bits set or cleared
+ endm
+
+1e69 : a2ba ldx #$ba ;protect x & y
+1e6b : a0d0 ldy #$d0
+ rmbt 0
+1e6d : a9ff > lda #$ff
+1e6f : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1e71 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1e73 : 48 > pha ;use stack to load status
+1e74 : a9a5 > lda #$a5 ;precharge accu
+1e76 : 28 > plp
+ >
+1e77 : 070c > rmb 0,zpt
+ > tst_a $a5,0
+1e79 : 08 > php ;save flags
+1e7a : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1e7c : d0fe > bne * ;failed not equal (non zero)
+ >
+1e7e : 68 > pla ;load status
+1e7f : 48 > pha
+ > cmp_flag 0
+1e80 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1e82 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e84 : 28 > plp ;restore status
+ >
+1e85 : a50c > lda zpt
+1e87 : c9fe > cmp #$ff-(1<<0)
+ > trap_ne ;wrong bits set or cleared
+1e89 : d0fe > bne * ;failed not equal (non zero)
+ >
+1e8b : a901 > lda #1<<0
+1e8d : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1e8f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1e91 : 48 > pha ;use stack to load status
+1e92 : a95a > lda #$5a ;precharge accu
+1e94 : 28 > plp
+ >
+1e95 : 070c > rmb 0,zpt
+ > tst_a $5a,$ff
+1e97 : 08 > php ;save flags
+1e98 : c95a > cmp #$5a ;test result
+ > trap_ne
+1e9a : d0fe > bne * ;failed not equal (non zero)
+ >
+1e9c : 68 > pla ;load status
+1e9d : 48 > pha
+ > cmp_flag $ff
+1e9e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ea0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ea2 : 28 > plp ;restore status
+ >
+1ea3 : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1ea5 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 1
+1ea7 : a9ff > lda #$ff
+1ea9 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1eab : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ead : 48 > pha ;use stack to load status
+1eae : a9a5 > lda #$a5 ;precharge accu
+1eb0 : 28 > plp
+ >
+1eb1 : 170c > rmb 1,zpt
+ > tst_a $a5,0
+1eb3 : 08 > php ;save flags
+1eb4 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1eb6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1eb8 : 68 > pla ;load status
+1eb9 : 48 > pha
+ > cmp_flag 0
+1eba : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ebc : d0fe > bne * ;failed not equal (non zero)
+ >
+1ebe : 28 > plp ;restore status
+ >
+1ebf : a50c > lda zpt
+1ec1 : c9fd > cmp #$ff-(1<<1)
+ > trap_ne ;wrong bits set or cleared
+1ec3 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ec5 : a902 > lda #1<<1
+1ec7 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1ec9 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1ecb : 48 > pha ;use stack to load status
+1ecc : a95a > lda #$5a ;precharge accu
+1ece : 28 > plp
+ >
+1ecf : 170c > rmb 1,zpt
+ > tst_a $5a,$ff
+1ed1 : 08 > php ;save flags
+1ed2 : c95a > cmp #$5a ;test result
+ > trap_ne
+1ed4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ed6 : 68 > pla ;load status
+1ed7 : 48 > pha
+ > cmp_flag $ff
+1ed8 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1eda : d0fe > bne * ;failed not equal (non zero)
+ >
+1edc : 28 > plp ;restore status
+ >
+1edd : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1edf : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 2
+1ee1 : a9ff > lda #$ff
+1ee3 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1ee5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1ee7 : 48 > pha ;use stack to load status
+1ee8 : a9a5 > lda #$a5 ;precharge accu
+1eea : 28 > plp
+ >
+1eeb : 270c > rmb 2,zpt
+ > tst_a $a5,0
+1eed : 08 > php ;save flags
+1eee : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1ef0 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ef2 : 68 > pla ;load status
+1ef3 : 48 > pha
+ > cmp_flag 0
+1ef4 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ef6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ef8 : 28 > plp ;restore status
+ >
+1ef9 : a50c > lda zpt
+1efb : c9fb > cmp #$ff-(1<<2)
+ > trap_ne ;wrong bits set or cleared
+1efd : d0fe > bne * ;failed not equal (non zero)
+ >
+1eff : a904 > lda #1<<2
+1f01 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1f03 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f05 : 48 > pha ;use stack to load status
+1f06 : a95a > lda #$5a ;precharge accu
+1f08 : 28 > plp
+ >
+1f09 : 270c > rmb 2,zpt
+ > tst_a $5a,$ff
+1f0b : 08 > php ;save flags
+1f0c : c95a > cmp #$5a ;test result
+ > trap_ne
+1f0e : d0fe > bne * ;failed not equal (non zero)
+ >
+1f10 : 68 > pla ;load status
+1f11 : 48 > pha
+ > cmp_flag $ff
+1f12 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f14 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f16 : 28 > plp ;restore status
+ >
+1f17 : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1f19 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 3
+1f1b : a9ff > lda #$ff
+1f1d : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1f1f : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f21 : 48 > pha ;use stack to load status
+1f22 : a9a5 > lda #$a5 ;precharge accu
+1f24 : 28 > plp
+ >
+1f25 : 370c > rmb 3,zpt
+ > tst_a $a5,0
+1f27 : 08 > php ;save flags
+1f28 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1f2a : d0fe > bne * ;failed not equal (non zero)
+ >
+1f2c : 68 > pla ;load status
+1f2d : 48 > pha
+ > cmp_flag 0
+1f2e : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f30 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f32 : 28 > plp ;restore status
+ >
+1f33 : a50c > lda zpt
+1f35 : c9f7 > cmp #$ff-(1<<3)
+ > trap_ne ;wrong bits set or cleared
+1f37 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f39 : a908 > lda #1<<3
+1f3b : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1f3d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f3f : 48 > pha ;use stack to load status
+1f40 : a95a > lda #$5a ;precharge accu
+1f42 : 28 > plp
+ >
+1f43 : 370c > rmb 3,zpt
+ > tst_a $5a,$ff
+1f45 : 08 > php ;save flags
+1f46 : c95a > cmp #$5a ;test result
+ > trap_ne
+1f48 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f4a : 68 > pla ;load status
+1f4b : 48 > pha
+ > cmp_flag $ff
+1f4c : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f4e : d0fe > bne * ;failed not equal (non zero)
+ >
+1f50 : 28 > plp ;restore status
+ >
+1f51 : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1f53 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 4
+1f55 : a9ff > lda #$ff
+1f57 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1f59 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f5b : 48 > pha ;use stack to load status
+1f5c : a9a5 > lda #$a5 ;precharge accu
+1f5e : 28 > plp
+ >
+1f5f : 470c > rmb 4,zpt
+ > tst_a $a5,0
+1f61 : 08 > php ;save flags
+1f62 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1f64 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f66 : 68 > pla ;load status
+1f67 : 48 > pha
+ > cmp_flag 0
+1f68 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f6a : d0fe > bne * ;failed not equal (non zero)
+ >
+1f6c : 28 > plp ;restore status
+ >
+1f6d : a50c > lda zpt
+1f6f : c9ef > cmp #$ff-(1<<4)
+ > trap_ne ;wrong bits set or cleared
+1f71 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f73 : a910 > lda #1<<4
+1f75 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1f77 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1f79 : 48 > pha ;use stack to load status
+1f7a : a95a > lda #$5a ;precharge accu
+1f7c : 28 > plp
+ >
+1f7d : 470c > rmb 4,zpt
+ > tst_a $5a,$ff
+1f7f : 08 > php ;save flags
+1f80 : c95a > cmp #$5a ;test result
+ > trap_ne
+1f82 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f84 : 68 > pla ;load status
+1f85 : 48 > pha
+ > cmp_flag $ff
+1f86 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1f88 : d0fe > bne * ;failed not equal (non zero)
+ >
+1f8a : 28 > plp ;restore status
+ >
+1f8b : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1f8d : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 5
+1f8f : a9ff > lda #$ff
+1f91 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1f93 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1f95 : 48 > pha ;use stack to load status
+1f96 : a9a5 > lda #$a5 ;precharge accu
+1f98 : 28 > plp
+ >
+1f99 : 570c > rmb 5,zpt
+ > tst_a $a5,0
+1f9b : 08 > php ;save flags
+1f9c : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1f9e : d0fe > bne * ;failed not equal (non zero)
+ >
+1fa0 : 68 > pla ;load status
+1fa1 : 48 > pha
+ > cmp_flag 0
+1fa2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fa4 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fa6 : 28 > plp ;restore status
+ >
+1fa7 : a50c > lda zpt
+1fa9 : c9df > cmp #$ff-(1<<5)
+ > trap_ne ;wrong bits set or cleared
+1fab : d0fe > bne * ;failed not equal (non zero)
+ >
+1fad : a920 > lda #1<<5
+1faf : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1fb1 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1fb3 : 48 > pha ;use stack to load status
+1fb4 : a95a > lda #$5a ;precharge accu
+1fb6 : 28 > plp
+ >
+1fb7 : 570c > rmb 5,zpt
+ > tst_a $5a,$ff
+1fb9 : 08 > php ;save flags
+1fba : c95a > cmp #$5a ;test result
+ > trap_ne
+1fbc : d0fe > bne * ;failed not equal (non zero)
+ >
+1fbe : 68 > pla ;load status
+1fbf : 48 > pha
+ > cmp_flag $ff
+1fc0 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fc2 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fc4 : 28 > plp ;restore status
+ >
+1fc5 : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+1fc7 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 6
+1fc9 : a9ff > lda #$ff
+1fcb : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+1fcd : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+1fcf : 48 > pha ;use stack to load status
+1fd0 : a9a5 > lda #$a5 ;precharge accu
+1fd2 : 28 > plp
+ >
+1fd3 : 670c > rmb 6,zpt
+ > tst_a $a5,0
+1fd5 : 08 > php ;save flags
+1fd6 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+1fd8 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fda : 68 > pla ;load status
+1fdb : 48 > pha
+ > cmp_flag 0
+1fdc : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1fde : d0fe > bne * ;failed not equal (non zero)
+ >
+1fe0 : 28 > plp ;restore status
+ >
+1fe1 : a50c > lda zpt
+1fe3 : c9bf > cmp #$ff-(1<<6)
+ > trap_ne ;wrong bits set or cleared
+1fe5 : d0fe > bne * ;failed not equal (non zero)
+ >
+1fe7 : a940 > lda #1<<6
+1fe9 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+1feb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+1fed : 48 > pha ;use stack to load status
+1fee : a95a > lda #$5a ;precharge accu
+1ff0 : 28 > plp
+ >
+1ff1 : 670c > rmb 6,zpt
+ > tst_a $5a,$ff
+1ff3 : 08 > php ;save flags
+1ff4 : c95a > cmp #$5a ;test result
+ > trap_ne
+1ff6 : d0fe > bne * ;failed not equal (non zero)
+ >
+1ff8 : 68 > pla ;load status
+1ff9 : 48 > pha
+ > cmp_flag $ff
+1ffa : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+1ffc : d0fe > bne * ;failed not equal (non zero)
+ >
+1ffe : 28 > plp ;restore status
+ >
+1fff : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+2001 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ rmbt 7
+2003 : a9ff > lda #$ff
+2005 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+2007 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2009 : 48 > pha ;use stack to load status
+200a : a9a5 > lda #$a5 ;precharge accu
+200c : 28 > plp
+ >
+200d : 770c > rmb 7,zpt
+ > tst_a $a5,0
+200f : 08 > php ;save flags
+2010 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+2012 : d0fe > bne * ;failed not equal (non zero)
+ >
+2014 : 68 > pla ;load status
+2015 : 48 > pha
+ > cmp_flag 0
+2016 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2018 : d0fe > bne * ;failed not equal (non zero)
+ >
+201a : 28 > plp ;restore status
+ >
+201b : a50c > lda zpt
+201d : c97f > cmp #$ff-(1<<7)
+ > trap_ne ;wrong bits set or cleared
+201f : d0fe > bne * ;failed not equal (non zero)
+ >
+2021 : a980 > lda #1<<7
+2023 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+2025 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2027 : 48 > pha ;use stack to load status
+2028 : a95a > lda #$5a ;precharge accu
+202a : 28 > plp
+ >
+202b : 770c > rmb 7,zpt
+ > tst_a $5a,$ff
+202d : 08 > php ;save flags
+202e : c95a > cmp #$5a ;test result
+ > trap_ne
+2030 : d0fe > bne * ;failed not equal (non zero)
+ >
+2032 : 68 > pla ;load status
+2033 : 48 > pha
+ > cmp_flag $ff
+2034 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2036 : d0fe > bne * ;failed not equal (non zero)
+ >
+2038 : 28 > plp ;restore status
+ >
+2039 : a50c > lda zpt
+ > trap_ne ;wrong bits set or cleared
+203b : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 0
+203d : a9fe > lda #$ff-(1<<0)
+203f : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+2041 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2043 : 48 > pha ;use stack to load status
+2044 : a9a5 > lda #$a5 ;precharge accu
+2046 : 28 > plp
+ >
+2047 : 870c > smb 0,zpt
+ > tst_a $a5,0
+2049 : 08 > php ;save flags
+204a : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+204c : d0fe > bne * ;failed not equal (non zero)
+ >
+204e : 68 > pla ;load status
+204f : 48 > pha
+ > cmp_flag 0
+2050 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2052 : d0fe > bne * ;failed not equal (non zero)
+ >
+2054 : 28 > plp ;restore status
+ >
+2055 : a50c > lda zpt
+2057 : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+2059 : d0fe > bne * ;failed not equal (non zero)
+ >
+205b : a900 > lda #0
+205d : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+205f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2061 : 48 > pha ;use stack to load status
+2062 : a95a > lda #$5a ;precharge accu
+2064 : 28 > plp
+ >
+2065 : 870c > smb 0,zpt
+ > tst_a $5a,$ff
+2067 : 08 > php ;save flags
+2068 : c95a > cmp #$5a ;test result
+ > trap_ne
+206a : d0fe > bne * ;failed not equal (non zero)
+ >
+206c : 68 > pla ;load status
+206d : 48 > pha
+ > cmp_flag $ff
+206e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2070 : d0fe > bne * ;failed not equal (non zero)
+ >
+2072 : 28 > plp ;restore status
+ >
+2073 : a50c > lda zpt
+2075 : c901 > cmp #1<<0
+ > trap_ne ;wrong bits set or cleared
+2077 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 1
+2079 : a9fd > lda #$ff-(1<<1)
+207b : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+207d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+207f : 48 > pha ;use stack to load status
+2080 : a9a5 > lda #$a5 ;precharge accu
+2082 : 28 > plp
+ >
+2083 : 970c > smb 1,zpt
+ > tst_a $a5,0
+2085 : 08 > php ;save flags
+2086 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+2088 : d0fe > bne * ;failed not equal (non zero)
+ >
+208a : 68 > pla ;load status
+208b : 48 > pha
+ > cmp_flag 0
+208c : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+208e : d0fe > bne * ;failed not equal (non zero)
+ >
+2090 : 28 > plp ;restore status
+ >
+2091 : a50c > lda zpt
+2093 : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+2095 : d0fe > bne * ;failed not equal (non zero)
+ >
+2097 : a900 > lda #0
+2099 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+209b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+209d : 48 > pha ;use stack to load status
+209e : a95a > lda #$5a ;precharge accu
+20a0 : 28 > plp
+ >
+20a1 : 970c > smb 1,zpt
+ > tst_a $5a,$ff
+20a3 : 08 > php ;save flags
+20a4 : c95a > cmp #$5a ;test result
+ > trap_ne
+20a6 : d0fe > bne * ;failed not equal (non zero)
+ >
+20a8 : 68 > pla ;load status
+20a9 : 48 > pha
+ > cmp_flag $ff
+20aa : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20ac : d0fe > bne * ;failed not equal (non zero)
+ >
+20ae : 28 > plp ;restore status
+ >
+20af : a50c > lda zpt
+20b1 : c902 > cmp #1<<1
+ > trap_ne ;wrong bits set or cleared
+20b3 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 2
+20b5 : a9fb > lda #$ff-(1<<2)
+20b7 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+20b9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+20bb : 48 > pha ;use stack to load status
+20bc : a9a5 > lda #$a5 ;precharge accu
+20be : 28 > plp
+ >
+20bf : a70c > smb 2,zpt
+ > tst_a $a5,0
+20c1 : 08 > php ;save flags
+20c2 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+20c4 : d0fe > bne * ;failed not equal (non zero)
+ >
+20c6 : 68 > pla ;load status
+20c7 : 48 > pha
+ > cmp_flag 0
+20c8 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20ca : d0fe > bne * ;failed not equal (non zero)
+ >
+20cc : 28 > plp ;restore status
+ >
+20cd : a50c > lda zpt
+20cf : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+20d1 : d0fe > bne * ;failed not equal (non zero)
+ >
+20d3 : a900 > lda #0
+20d5 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+20d7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+20d9 : 48 > pha ;use stack to load status
+20da : a95a > lda #$5a ;precharge accu
+20dc : 28 > plp
+ >
+20dd : a70c > smb 2,zpt
+ > tst_a $5a,$ff
+20df : 08 > php ;save flags
+20e0 : c95a > cmp #$5a ;test result
+ > trap_ne
+20e2 : d0fe > bne * ;failed not equal (non zero)
+ >
+20e4 : 68 > pla ;load status
+20e5 : 48 > pha
+ > cmp_flag $ff
+20e6 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+20e8 : d0fe > bne * ;failed not equal (non zero)
+ >
+20ea : 28 > plp ;restore status
+ >
+20eb : a50c > lda zpt
+20ed : c904 > cmp #1<<2
+ > trap_ne ;wrong bits set or cleared
+20ef : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 3
+20f1 : a9f7 > lda #$ff-(1<<3)
+20f3 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+20f5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+20f7 : 48 > pha ;use stack to load status
+20f8 : a9a5 > lda #$a5 ;precharge accu
+20fa : 28 > plp
+ >
+20fb : b70c > smb 3,zpt
+ > tst_a $a5,0
+20fd : 08 > php ;save flags
+20fe : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+2100 : d0fe > bne * ;failed not equal (non zero)
+ >
+2102 : 68 > pla ;load status
+2103 : 48 > pha
+ > cmp_flag 0
+2104 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2106 : d0fe > bne * ;failed not equal (non zero)
+ >
+2108 : 28 > plp ;restore status
+ >
+2109 : a50c > lda zpt
+210b : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+210d : d0fe > bne * ;failed not equal (non zero)
+ >
+210f : a900 > lda #0
+2111 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+2113 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2115 : 48 > pha ;use stack to load status
+2116 : a95a > lda #$5a ;precharge accu
+2118 : 28 > plp
+ >
+2119 : b70c > smb 3,zpt
+ > tst_a $5a,$ff
+211b : 08 > php ;save flags
+211c : c95a > cmp #$5a ;test result
+ > trap_ne
+211e : d0fe > bne * ;failed not equal (non zero)
+ >
+2120 : 68 > pla ;load status
+2121 : 48 > pha
+ > cmp_flag $ff
+2122 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2124 : d0fe > bne * ;failed not equal (non zero)
+ >
+2126 : 28 > plp ;restore status
+ >
+2127 : a50c > lda zpt
+2129 : c908 > cmp #1<<3
+ > trap_ne ;wrong bits set or cleared
+212b : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 4
+212d : a9ef > lda #$ff-(1<<4)
+212f : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+2131 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2133 : 48 > pha ;use stack to load status
+2134 : a9a5 > lda #$a5 ;precharge accu
+2136 : 28 > plp
+ >
+2137 : c70c > smb 4,zpt
+ > tst_a $a5,0
+2139 : 08 > php ;save flags
+213a : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+213c : d0fe > bne * ;failed not equal (non zero)
+ >
+213e : 68 > pla ;load status
+213f : 48 > pha
+ > cmp_flag 0
+2140 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2142 : d0fe > bne * ;failed not equal (non zero)
+ >
+2144 : 28 > plp ;restore status
+ >
+2145 : a50c > lda zpt
+2147 : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+2149 : d0fe > bne * ;failed not equal (non zero)
+ >
+214b : a900 > lda #0
+214d : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+214f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2151 : 48 > pha ;use stack to load status
+2152 : a95a > lda #$5a ;precharge accu
+2154 : 28 > plp
+ >
+2155 : c70c > smb 4,zpt
+ > tst_a $5a,$ff
+2157 : 08 > php ;save flags
+2158 : c95a > cmp #$5a ;test result
+ > trap_ne
+215a : d0fe > bne * ;failed not equal (non zero)
+ >
+215c : 68 > pla ;load status
+215d : 48 > pha
+ > cmp_flag $ff
+215e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2160 : d0fe > bne * ;failed not equal (non zero)
+ >
+2162 : 28 > plp ;restore status
+ >
+2163 : a50c > lda zpt
+2165 : c910 > cmp #1<<4
+ > trap_ne ;wrong bits set or cleared
+2167 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 5
+2169 : a9df > lda #$ff-(1<<5)
+216b : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+216d : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+216f : 48 > pha ;use stack to load status
+2170 : a9a5 > lda #$a5 ;precharge accu
+2172 : 28 > plp
+ >
+2173 : d70c > smb 5,zpt
+ > tst_a $a5,0
+2175 : 08 > php ;save flags
+2176 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+2178 : d0fe > bne * ;failed not equal (non zero)
+ >
+217a : 68 > pla ;load status
+217b : 48 > pha
+ > cmp_flag 0
+217c : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+217e : d0fe > bne * ;failed not equal (non zero)
+ >
+2180 : 28 > plp ;restore status
+ >
+2181 : a50c > lda zpt
+2183 : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+2185 : d0fe > bne * ;failed not equal (non zero)
+ >
+2187 : a900 > lda #0
+2189 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+218b : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+218d : 48 > pha ;use stack to load status
+218e : a95a > lda #$5a ;precharge accu
+2190 : 28 > plp
+ >
+2191 : d70c > smb 5,zpt
+ > tst_a $5a,$ff
+2193 : 08 > php ;save flags
+2194 : c95a > cmp #$5a ;test result
+ > trap_ne
+2196 : d0fe > bne * ;failed not equal (non zero)
+ >
+2198 : 68 > pla ;load status
+2199 : 48 > pha
+ > cmp_flag $ff
+219a : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+219c : d0fe > bne * ;failed not equal (non zero)
+ >
+219e : 28 > plp ;restore status
+ >
+219f : a50c > lda zpt
+21a1 : c920 > cmp #1<<5
+ > trap_ne ;wrong bits set or cleared
+21a3 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 6
+21a5 : a9bf > lda #$ff-(1<<6)
+21a7 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+21a9 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21ab : 48 > pha ;use stack to load status
+21ac : a9a5 > lda #$a5 ;precharge accu
+21ae : 28 > plp
+ >
+21af : e70c > smb 6,zpt
+ > tst_a $a5,0
+21b1 : 08 > php ;save flags
+21b2 : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+21b4 : d0fe > bne * ;failed not equal (non zero)
+ >
+21b6 : 68 > pla ;load status
+21b7 : 48 > pha
+ > cmp_flag 0
+21b8 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21ba : d0fe > bne * ;failed not equal (non zero)
+ >
+21bc : 28 > plp ;restore status
+ >
+21bd : a50c > lda zpt
+21bf : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+21c1 : d0fe > bne * ;failed not equal (non zero)
+ >
+21c3 : a900 > lda #0
+21c5 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+21c7 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+21c9 : 48 > pha ;use stack to load status
+21ca : a95a > lda #$5a ;precharge accu
+21cc : 28 > plp
+ >
+21cd : e70c > smb 6,zpt
+ > tst_a $5a,$ff
+21cf : 08 > php ;save flags
+21d0 : c95a > cmp #$5a ;test result
+ > trap_ne
+21d2 : d0fe > bne * ;failed not equal (non zero)
+ >
+21d4 : 68 > pla ;load status
+21d5 : 48 > pha
+ > cmp_flag $ff
+21d6 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21d8 : d0fe > bne * ;failed not equal (non zero)
+ >
+21da : 28 > plp ;restore status
+ >
+21db : a50c > lda zpt
+21dd : c940 > cmp #1<<6
+ > trap_ne ;wrong bits set or cleared
+21df : d0fe > bne * ;failed not equal (non zero)
+ >
+
+ smbt 7
+21e1 : a97f > lda #$ff-(1<<7)
+21e3 : 850c > sta zpt
+ > set_a $a5,0
+ > load_flag 0
+21e5 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+21e7 : 48 > pha ;use stack to load status
+21e8 : a9a5 > lda #$a5 ;precharge accu
+21ea : 28 > plp
+ >
+21eb : f70c > smb 7,zpt
+ > tst_a $a5,0
+21ed : 08 > php ;save flags
+21ee : c9a5 > cmp #$a5 ;test result
+ > trap_ne
+21f0 : d0fe > bne * ;failed not equal (non zero)
+ >
+21f2 : 68 > pla ;load status
+21f3 : 48 > pha
+ > cmp_flag 0
+21f4 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+21f6 : d0fe > bne * ;failed not equal (non zero)
+ >
+21f8 : 28 > plp ;restore status
+ >
+21f9 : a50c > lda zpt
+21fb : c9ff > cmp #$ff
+ > trap_ne ;wrong bits set or cleared
+21fd : d0fe > bne * ;failed not equal (non zero)
+ >
+21ff : a900 > lda #0
+2201 : 850c > sta zpt
+ > set_a $5a,$ff
+ > load_flag $ff
+2203 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2205 : 48 > pha ;use stack to load status
+2206 : a95a > lda #$5a ;precharge accu
+2208 : 28 > plp
+ >
+2209 : f70c > smb 7,zpt
+ > tst_a $5a,$ff
+220b : 08 > php ;save flags
+220c : c95a > cmp #$5a ;test result
+ > trap_ne
+220e : d0fe > bne * ;failed not equal (non zero)
+ >
+2210 : 68 > pla ;load status
+2211 : 48 > pha
+ > cmp_flag $ff
+2212 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2214 : d0fe > bne * ;failed not equal (non zero)
+ >
+2216 : 28 > plp ;restore status
+ >
+2217 : a50c > lda zpt
+2219 : c980 > cmp #1<<7
+ > trap_ne ;wrong bits set or cleared
+221b : d0fe > bne * ;failed not equal (non zero)
+ >
+
+221d : e0ba cpx #$ba
+ trap_ne ;x altered during test
+221f : d0fe > bne * ;failed not equal (non zero)
+
+2221 : c0d0 cpy #$d0
+ trap_ne ;y altered during test
+2223 : d0fe > bne * ;failed not equal (non zero)
+
+2225 : ba tsx
+2226 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+2228 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+222a : ad0202 > lda test_case ;previous test
+222d : c911 > cmp #test_num
+ > trap_ne ;test is out of sequence
+222f : d0fe > bne * ;failed not equal (non zero)
+ >
+0012 = >test_num = test_num + 1
+2231 : a912 > lda #test_num ;*** next tests' number
+2233 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+ endif
+
+ ; testing CMP - (zp)
+2236 : a2de ldx #$de ;protect x & y
+2238 : a0ad ldy #$ad
+ set_a $80,0
+ > load_flag 0
+223a : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+223c : 48 > pha ;use stack to load status
+223d : a980 > lda #$80 ;precharge accu
+223f : 28 > plp
+
+2240 : d22c cmp (ind1+8)
+ tst_a $80,fc
+2242 : 08 > php ;save flags
+2243 : c980 > cmp #$80 ;test result
+ > trap_ne
+2245 : d0fe > bne * ;failed not equal (non zero)
+ >
+2247 : 68 > pla ;load status
+2248 : 48 > pha
+ > cmp_flag fc
+2249 : c931 > cmp #(fc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+224b : d0fe > bne * ;failed not equal (non zero)
+ >
+224d : 28 > plp ;restore status
+
+ set_a $7f,0
+ > load_flag 0
+224e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2250 : 48 > pha ;use stack to load status
+2251 : a97f > lda #$7f ;precharge accu
+2253 : 28 > plp
+
+2254 : d22c cmp (ind1+8)
+ tst_a $7f,fzc
+2256 : 08 > php ;save flags
+2257 : c97f > cmp #$7f ;test result
+ > trap_ne
+2259 : d0fe > bne * ;failed not equal (non zero)
+ >
+225b : 68 > pla ;load status
+225c : 48 > pha
+ > cmp_flag fzc
+225d : c933 > cmp #(fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+225f : d0fe > bne * ;failed not equal (non zero)
+ >
+2261 : 28 > plp ;restore status
+
+ set_a $7e,0
+ > load_flag 0
+2262 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2264 : 48 > pha ;use stack to load status
+2265 : a97e > lda #$7e ;precharge accu
+2267 : 28 > plp
+
+2268 : d22c cmp (ind1+8)
+ tst_a $7e,fn
+226a : 08 > php ;save flags
+226b : c97e > cmp #$7e ;test result
+ > trap_ne
+226d : d0fe > bne * ;failed not equal (non zero)
+ >
+226f : 68 > pla ;load status
+2270 : 48 > pha
+ > cmp_flag fn
+2271 : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2273 : d0fe > bne * ;failed not equal (non zero)
+ >
+2275 : 28 > plp ;restore status
+
+ set_a $80,$ff
+ > load_flag $ff
+2276 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2278 : 48 > pha ;use stack to load status
+2279 : a980 > lda #$80 ;precharge accu
+227b : 28 > plp
+
+227c : d22c cmp (ind1+8)
+ tst_a $80,~fnz
+227e : 08 > php ;save flags
+227f : c980 > cmp #$80 ;test result
+ > trap_ne
+2281 : d0fe > bne * ;failed not equal (non zero)
+ >
+2283 : 68 > pla ;load status
+2284 : 48 > pha
+ > cmp_flag ~fnz
+2285 : c97d > cmp #(~fnz|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+2287 : d0fe > bne * ;failed not equal (non zero)
+ >
+2289 : 28 > plp ;restore status
+
+ set_a $7f,$ff
+ > load_flag $ff
+228a : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+228c : 48 > pha ;use stack to load status
+228d : a97f > lda #$7f ;precharge accu
+228f : 28 > plp
+
+2290 : d22c cmp (ind1+8)
+ tst_a $7f,~fn
+2292 : 08 > php ;save flags
+2293 : c97f > cmp #$7f ;test result
+ > trap_ne
+2295 : d0fe > bne * ;failed not equal (non zero)
+ >
+2297 : 68 > pla ;load status
+2298 : 48 > pha
+ > cmp_flag ~fn
+2299 : c97f > cmp #(~fn|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+229b : d0fe > bne * ;failed not equal (non zero)
+ >
+229d : 28 > plp ;restore status
+
+ set_a $7e,$ff
+ > load_flag $ff
+229e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+22a0 : 48 > pha ;use stack to load status
+22a1 : a97e > lda #$7e ;precharge accu
+22a3 : 28 > plp
+
+22a4 : d22c cmp (ind1+8)
+ tst_a $7e,~fzc
+22a6 : 08 > php ;save flags
+22a7 : c97e > cmp #$7e ;test result
+ > trap_ne
+22a9 : d0fe > bne * ;failed not equal (non zero)
+ >
+22ab : 68 > pla ;load status
+22ac : 48 > pha
+ > cmp_flag ~fzc
+22ad : c9fc > cmp #(~fzc|fao)&m8 ;expected flags + always on bits
+ >
+ > trap_ne
+22af : d0fe > bne * ;failed not equal (non zero)
+ >
+22b1 : 28 > plp ;restore status
+
+22b2 : e0de cpx #$de
+ trap_ne ;x altered during test
+22b4 : d0fe > bne * ;failed not equal (non zero)
+
+22b6 : c0ad cpy #$ad
+ trap_ne ;y altered during test
+22b8 : d0fe > bne * ;failed not equal (non zero)
+
+22ba : ba tsx
+22bb : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+22bd : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+22bf : ad0202 > lda test_case ;previous test
+22c2 : c912 > cmp #test_num
+ > trap_ne ;test is out of sequence
+22c4 : d0fe > bne * ;failed not equal (non zero)
+ >
+0013 = >test_num = test_num + 1
+22c6 : a913 > lda #test_num ;*** next tests' number
+22c8 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; testing logical instructions - AND EOR ORA (zp)
+22cb : a242 ldx #$42 ;protect x & y
+
+22cd : a000 ldy #0 ;AND
+22cf : a53a lda indAN ;set indirect address
+22d1 : 850c sta zpt
+22d3 : a53b lda indAN+1
+22d5 : 850d sta zpt+1
+22d7 : tand1
+ set_ay absANa,0
+ > load_flag 0
+22d7 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+22d9 : 48 > pha ;use stack to load status
+22da : b95302 > lda absANa,y ;precharge accu
+22dd : 28 > plp
+
+22de : 320c and (zpt)
+ tst_ay absrlo,absflo,0
+22e0 : 08 > php ;save flags
+22e1 : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+22e4 : d0fe > bne * ;failed not equal (non zero)
+ >
+22e6 : 68 > pla ;load status
+ > eor_flag 0
+22e7 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+22e9 : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+22ec : d0fe > bne * ;failed not equal (non zero)
+ >
+
+22ee : e60c inc zpt
+22f0 : c8 iny
+22f1 : c004 cpy #4
+22f3 : d0e2 bne tand1
+22f5 : 88 dey
+22f6 : c60c dec zpt
+22f8 : tand2
+ set_ay absANa,$ff
+ > load_flag $ff
+22f8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+22fa : 48 > pha ;use stack to load status
+22fb : b95302 > lda absANa,y ;precharge accu
+22fe : 28 > plp
+
+22ff : 320c and (zpt)
+ tst_ay absrlo,absflo,$ff-fnz
+2301 : 08 > php ;save flags
+2302 : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+2305 : d0fe > bne * ;failed not equal (non zero)
+ >
+2307 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2308 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+230a : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+230d : d0fe > bne * ;failed not equal (non zero)
+ >
+
+230f : c60c dec zpt
+2311 : 88 dey
+2312 : 10e4 bpl tand2
+
+2314 : a000 ldy #0 ;EOR
+2316 : a542 lda indEO ;set indirect address
+2318 : 850c sta zpt
+231a : a543 lda indEO+1
+231c : 850d sta zpt+1
+231e : teor1
+ set_ay absEOa,0
+ > load_flag 0
+231e : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2320 : 48 > pha ;use stack to load status
+2321 : b95702 > lda absEOa,y ;precharge accu
+2324 : 28 > plp
+
+2325 : 520c eor (zpt)
+ tst_ay absrlo,absflo,0
+2327 : 08 > php ;save flags
+2328 : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+232b : d0fe > bne * ;failed not equal (non zero)
+ >
+232d : 68 > pla ;load status
+ > eor_flag 0
+232e : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2330 : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+2333 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2335 : e60c inc zpt
+2337 : c8 iny
+2338 : c004 cpy #4
+233a : d0e2 bne teor1
+233c : 88 dey
+233d : c60c dec zpt
+233f : teor2
+ set_ay absEOa,$ff
+ > load_flag $ff
+233f : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2341 : 48 > pha ;use stack to load status
+2342 : b95702 > lda absEOa,y ;precharge accu
+2345 : 28 > plp
+
+2346 : 520c eor (zpt)
+ tst_ay absrlo,absflo,$ff-fnz
+2348 : 08 > php ;save flags
+2349 : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+234c : d0fe > bne * ;failed not equal (non zero)
+ >
+234e : 68 > pla ;load status
+ > eor_flag $ff-fnz
+234f : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2351 : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+2354 : d0fe > bne * ;failed not equal (non zero)
+ >
+
+2356 : c60c dec zpt
+2358 : 88 dey
+2359 : 10e4 bpl teor2
+
+235b : a000 ldy #0 ;ORA
+235d : a54a lda indOR ;set indirect address
+235f : 850c sta zpt
+2361 : a54b lda indOR+1
+2363 : 850d sta zpt+1
+2365 : tora1
+ set_ay absORa,0
+ > load_flag 0
+2365 : a900 > lda #0 ;allow test to change I-flag (no mask)
+ >
+2367 : 48 > pha ;use stack to load status
+2368 : b94f02 > lda absORa,y ;precharge accu
+236b : 28 > plp
+
+236c : 120c ora (zpt)
+ tst_ay absrlo,absflo,0
+236e : 08 > php ;save flags
+236f : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+2372 : d0fe > bne * ;failed not equal (non zero)
+ >
+2374 : 68 > pla ;load status
+ > eor_flag 0
+2375 : 4930 > eor #0|fao ;invert expected flags + always on bits
+ >
+2377 : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+237a : d0fe > bne * ;failed not equal (non zero)
+ >
+
+237c : e60c inc zpt
+237e : c8 iny
+237f : c004 cpy #4
+2381 : d0e2 bne tora1
+2383 : 88 dey
+2384 : c60c dec zpt
+2386 : tora2
+ set_ay absORa,$ff
+ > load_flag $ff
+2386 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+2388 : 48 > pha ;use stack to load status
+2389 : b94f02 > lda absORa,y ;precharge accu
+238c : 28 > plp
+
+238d : 120c ora (zpt)
+ tst_ay absrlo,absflo,$ff-fnz
+238f : 08 > php ;save flags
+2390 : d95b02 > cmp absrlo,y ;test result
+ > trap_ne ;
+2393 : d0fe > bne * ;failed not equal (non zero)
+ >
+2395 : 68 > pla ;load status
+ > eor_flag $ff-fnz
+2396 : 497d > eor #$ff-fnz|fao ;invert expected flags + always on bits
+ >
+2398 : d95f02 > cmp absflo,y ;test flags
+ > trap_ne
+239b : d0fe > bne * ;failed not equal (non zero)
+ >
+
+239d : c60c dec zpt
+239f : 88 dey
+23a0 : 10e4 bpl tora2
+
+23a2 : e042 cpx #$42
+ trap_ne ;x altered during test
+23a4 : d0fe > bne * ;failed not equal (non zero)
+
+23a6 : ba tsx
+23a7 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+23a9 : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+23ab : ad0202 > lda test_case ;previous test
+23ae : c913 > cmp #test_num
+ > trap_ne ;test is out of sequence
+23b0 : d0fe > bne * ;failed not equal (non zero)
+ >
+0014 = >test_num = test_num + 1
+23b2 : a914 > lda #test_num ;*** next tests' number
+23b4 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ if I_flag = 3
+23b7 : 58 cli
+ endif
+
+ ; full binary add/subtract test - (zp) only
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+23b8 : d8 cld
+23b9 : a20e ldx #ad2 ;for indexed test
+23bb : a0ff ldy #$ff ;max range
+23bd : a900 lda #0 ;start with adding zeroes & no carry
+23bf : 850c sta adfc ;carry in - for diag
+23c1 : 850d sta ad1 ;operand 1 - accumulator
+23c3 : 850e sta ad2 ;operand 2 - memory or immediate
+23c5 : 8d0502 sta ada2 ;non zp
+23c8 : 850f sta adrl ;expected result bits 0-7
+23ca : 8510 sta adrh ;expected result bit 8 (carry out)
+23cc : a9ff lda #$ff ;complemented operand 2 for subtract
+23ce : 8512 sta sb2
+23d0 : 8d0602 sta sba2 ;non zp
+23d3 : a902 lda #2 ;expected Z-flag
+23d5 : 8511 sta adrf
+23d7 : 18 tadd clc ;test with carry clear
+23d8 : 204e26 jsr chkadd
+23db : e60c inc adfc ;now with carry
+23dd : e60f inc adrl ;result +1
+23df : 08 php ;save N & Z from low result
+23e0 : 08 php
+23e1 : 68 pla ;accu holds expected flags
+23e2 : 2982 and #$82 ;mask N & Z
+23e4 : 28 plp
+23e5 : d002 bne tadd1
+23e7 : e610 inc adrh ;result bit 8 - carry
+23e9 : 0510 tadd1 ora adrh ;merge C to expected flags
+23eb : 8511 sta adrf ;save expected flags except overflow
+23ed : 38 sec ;test with carry set
+23ee : 204e26 jsr chkadd
+23f1 : c60c dec adfc ;same for operand +1 but no carry
+23f3 : e60d inc ad1
+23f5 : d0e0 bne tadd ;iterate op1
+23f7 : a900 lda #0 ;preset result to op2 when op1 = 0
+23f9 : 8510 sta adrh
+23fb : ee0502 inc ada2
+23fe : e60e inc ad2
+2400 : 08 php ;save NZ as operand 2 becomes the new result
+2401 : 68 pla
+2402 : 2982 and #$82 ;mask N00000Z0
+2404 : 8511 sta adrf ;no need to check carry as we are adding to 0
+2406 : c612 dec sb2 ;complement subtract operand 2
+2408 : ce0602 dec sba2
+240b : a50e lda ad2
+240d : 850f sta adrl
+240f : d0c6 bne tadd ;iterate op2
+
+2411 : e00e cpx #ad2
+ trap_ne ;x altered during test
+2413 : d0fe > bne * ;failed not equal (non zero)
+
+2415 : c0ff cpy #$ff
+ trap_ne ;y altered during test
+2417 : d0fe > bne * ;failed not equal (non zero)
+
+2419 : ba tsx
+241a : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+241c : d0fe > bne * ;failed not equal (non zero)
+
+ next_test
+241e : ad0202 > lda test_case ;previous test
+2421 : c914 > cmp #test_num
+ > trap_ne ;test is out of sequence
+2423 : d0fe > bne * ;failed not equal (non zero)
+ >
+0015 = >test_num = test_num + 1
+2425 : a915 > lda #test_num ;*** next tests' number
+2427 : 8d0202 > sta test_case
+ > ;check_ram ;uncomment to find altered RAM after each test
+
+
+ ; decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, the V flag is ignored
+ ; although V is declared as beeing valid on the 65C02 it has absolutely
+ ; no use in BCD math. No sign = no overflow!
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+242a : f8 sed
+242b : a20e ldx #ad2 ;for indexed test
+242d : a0ff ldy #$ff ;max range
+242f : a999 lda #$99 ;start with adding 99 to 99 with carry
+2431 : 850d sta ad1 ;operand 1 - accumulator
+2433 : 850e sta ad2 ;operand 2 - memory or immediate
+2435 : 8d0502 sta ada2 ;non zp
+2438 : 850f sta adrl ;expected result bits 0-7
+243a : a901 lda #1 ;set carry in & out
+243c : 850c sta adfc ;carry in - for diag
+243e : 8510 sta adrh ;expected result bit 8 (carry out)
+2440 : a981 lda #$81 ;set N & C (99 + 99 + C = 99 + C)
+2442 : 8511 sta adrf
+2444 : a900 lda #0 ;complemented operand 2 for subtract
+2446 : 8512 sta sb2
+2448 : 8d0602 sta sba2 ;non zp
+244b : 38 tdad sec ;test with carry set
+244c : 20f724 jsr chkdad
+244f : c60c dec adfc ;now with carry clear
+2451 : a50f lda adrl ;decimal adjust result
+2453 : d008 bne tdad1 ;skip clear carry & preset result 99 (9A-1)
+2455 : c610 dec adrh
+2457 : a999 lda #$99
+2459 : 850f sta adrl
+245b : d012 bne tdad3
+245d : 290f tdad1 and #$f ;lower nibble mask
+245f : d00c bne tdad2 ;no decimal adjust needed
+2461 : c60f dec adrl ;decimal adjust (?0-6)
+2463 : c60f dec adrl
+2465 : c60f dec adrl
+2467 : c60f dec adrl
+2469 : c60f dec adrl
+246b : c60f dec adrl
+246d : c60f tdad2 dec adrl ;result -1
+246f : 08 tdad3 php ;save valid flags
+2470 : 68 pla
+2471 : 2982 and #$82 ;N-----Z-
+2473 : 0510 ora adrh ;N-----ZC
+2475 : 8511 sta adrf
+2477 : 18 clc ;test with carry clear
+2478 : 20f724 jsr chkdad
+247b : e60c inc adfc ;same for operand -1 but with carry
+247d : a50d lda ad1 ;decimal adjust operand 1
+247f : f015 beq tdad5 ;iterate operand 2
+2481 : 290f and #$f ;lower nibble mask
+2483 : d00c bne tdad4 ;skip decimal adjust
+2485 : c60d dec ad1 ;decimal adjust (?0-6)
+2487 : c60d dec ad1
+2489 : c60d dec ad1
+248b : c60d dec ad1
+248d : c60d dec ad1
+248f : c60d dec ad1
+2491 : c60d tdad4 dec ad1 ;operand 1 -1
+2493 : 4c4b24 jmp tdad ;iterate op1
+
+2496 : a999 tdad5 lda #$99 ;precharge op1 max
+2498 : 850d sta ad1
+249a : a50e lda ad2 ;decimal adjust operand 2
+249c : f039 beq tdad7 ;end of iteration
+249e : 290f and #$f ;lower nibble mask
+24a0 : d018 bne tdad6 ;skip decimal adjust
+24a2 : c60e dec ad2 ;decimal adjust (?0-6)
+24a4 : c60e dec ad2
+24a6 : c60e dec ad2
+24a8 : c60e dec ad2
+24aa : c60e dec ad2
+24ac : c60e dec ad2
+24ae : e612 inc sb2 ;complemented decimal adjust for subtract (?9+6)
+24b0 : e612 inc sb2
+24b2 : e612 inc sb2
+24b4 : e612 inc sb2
+24b6 : e612 inc sb2
+24b8 : e612 inc sb2
+24ba : c60e tdad6 dec ad2 ;operand 2 -1
+24bc : e612 inc sb2 ;complemented operand for subtract
+24be : a512 lda sb2
+24c0 : 8d0602 sta sba2 ;copy as non zp operand
+24c3 : a50e lda ad2
+24c5 : 8d0502 sta ada2 ;copy as non zp operand
+24c8 : 850f sta adrl ;new result since op1+carry=00+carry +op2=op2
+24ca : 08 php ;save flags
+24cb : 68 pla
+24cc : 2982 and #$82 ;N-----Z-
+24ce : 0901 ora #1 ;N-----ZC
+24d0 : 8511 sta adrf
+24d2 : e610 inc adrh ;result carry
+24d4 : 4c4b24 jmp tdad ;iterate op2
+
+24d7 : e00e tdad7 cpx #ad2
+ trap_ne ;x altered during test
+24d9 : d0fe > bne * ;failed not equal (non zero)
+
+24db : c0ff cpy #$ff
+ trap_ne ;y altered during test
+24dd : d0fe > bne * ;failed not equal (non zero)
+
+24df : ba tsx
+24e0 : e0ff cpx #$ff
+ trap_ne ;sp push/pop mismatch
+24e2 : d0fe > bne * ;failed not equal (non zero)
+
+24e4 : d8 cld
+
+24e5 : ad0202 lda test_case
+24e8 : c915 cmp #test_num
+ trap_ne ;previous test is out of sequence
+24ea : d0fe > bne * ;failed not equal (non zero)
+
+24ec : a9f0 lda #$f0 ;mark opcode testing complete
+24ee : 8d0202 sta test_case
+
+ ; final RAM integrity test
+ ; verifies that none of the previous tests has altered RAM outside of the
+ ; designated write areas.
+ check_ram
+ > ;RAM check disabled - RAM size not set
+
+ ; *** DEBUG INFO ***
+ ; to debug checksum errors uncomment check_ram in the next_test macro to
+ ; narrow down the responsible opcode.
+ ; may give false errors when monitor, OS or other background activity is
+ ; allowed during previous tests.
+
+
+ ; S U C C E S S ************************************************
+ ; -------------
+ success ;if you get here everything went well
+24f1 : 4cf124 > jmp * ;test passed, no errors
+
+ ; -------------
+ ; S U C C E S S ************************************************
+24f4 : 4c0004 jmp start ;run again
+
+ ; core subroutine of the decimal add/subtract test
+ ; *** WARNING - tests documented behavior only! ***
+ ; only valid BCD operands are tested, V flag is ignored
+ ; iterates through all valid combinations of operands and carry input
+ ; uses increments/decrements to predict result & carry flag
+24f7 : chkdad
+ ; decimal ADC / SBC zp
+24f7 : 08 php ;save carry for subtract
+24f8 : a50d lda ad1
+24fa : 650e adc ad2 ;perform add
+24fc : 08 php
+24fd : c50f cmp adrl ;check result
+ trap_ne ;bad result
+24ff : d0fe > bne * ;failed not equal (non zero)
+
+2501 : 68 pla ;check flags
+2502 : 2983 and #$83 ;mask N-----ZC
+2504 : c511 cmp adrf
+ trap_ne ;bad flags
+2506 : d0fe > bne * ;failed not equal (non zero)
+
+2508 : 28 plp
+2509 : 08 php ;save carry for next add
+250a : a50d lda ad1
+250c : e512 sbc sb2 ;perform subtract
+250e : 08 php
+250f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2511 : d0fe > bne * ;failed not equal (non zero)
+
+2513 : 68 pla ;check flags
+2514 : 2983 and #$83 ;mask N-----ZC
+2516 : c511 cmp adrf
+ trap_ne ;bad flags
+2518 : d0fe > bne * ;failed not equal (non zero)
+
+251a : 28 plp
+ ; decimal ADC / SBC abs
+251b : 08 php ;save carry for subtract
+251c : a50d lda ad1
+251e : 6d0502 adc ada2 ;perform add
+2521 : 08 php
+2522 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2524 : d0fe > bne * ;failed not equal (non zero)
+
+2526 : 68 pla ;check flags
+2527 : 2983 and #$83 ;mask N-----ZC
+2529 : c511 cmp adrf
+ trap_ne ;bad flags
+252b : d0fe > bne * ;failed not equal (non zero)
+
+252d : 28 plp
+252e : 08 php ;save carry for next add
+252f : a50d lda ad1
+2531 : ed0602 sbc sba2 ;perform subtract
+2534 : 08 php
+2535 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2537 : d0fe > bne * ;failed not equal (non zero)
+
+2539 : 68 pla ;check flags
+253a : 2983 and #$83 ;mask N-----ZC
+253c : c511 cmp adrf
+ trap_ne ;bad flags
+253e : d0fe > bne * ;failed not equal (non zero)
+
+2540 : 28 plp
+ ; decimal ADC / SBC #
+2541 : 08 php ;save carry for subtract
+2542 : a50e lda ad2
+2544 : 8d0b02 sta ex_adci+1 ;set ADC # operand
+2547 : a50d lda ad1
+2549 : 200a02 jsr ex_adci ;execute ADC # in RAM
+254c : 08 php
+254d : c50f cmp adrl ;check result
+ trap_ne ;bad result
+254f : d0fe > bne * ;failed not equal (non zero)
+
+2551 : 68 pla ;check flags
+2552 : 2983 and #$83 ;mask N-----ZC
+2554 : c511 cmp adrf
+ trap_ne ;bad flags
+2556 : d0fe > bne * ;failed not equal (non zero)
+
+2558 : 28 plp
+2559 : 08 php ;save carry for next add
+255a : a512 lda sb2
+255c : 8d0e02 sta ex_sbci+1 ;set SBC # operand
+255f : a50d lda ad1
+2561 : 200d02 jsr ex_sbci ;execute SBC # in RAM
+2564 : 08 php
+2565 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2567 : d0fe > bne * ;failed not equal (non zero)
+
+2569 : 68 pla ;check flags
+256a : 2983 and #$83 ;mask N-----ZC
+256c : c511 cmp adrf
+ trap_ne ;bad flags
+256e : d0fe > bne * ;failed not equal (non zero)
+
+2570 : 28 plp
+ ; decimal ADC / SBC zp,x
+2571 : 08 php ;save carry for subtract
+2572 : a50d lda ad1
+2574 : 7500 adc 0,x ;perform add
+2576 : 08 php
+2577 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2579 : d0fe > bne * ;failed not equal (non zero)
+
+257b : 68 pla ;check flags
+257c : 2983 and #$83 ;mask N-----ZC
+257e : c511 cmp adrf
+ trap_ne ;bad flags
+2580 : d0fe > bne * ;failed not equal (non zero)
+
+2582 : 28 plp
+2583 : 08 php ;save carry for next add
+2584 : a50d lda ad1
+2586 : f504 sbc sb2-ad2,x ;perform subtract
+2588 : 08 php
+2589 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+258b : d0fe > bne * ;failed not equal (non zero)
+
+258d : 68 pla ;check flags
+258e : 2983 and #$83 ;mask N-----ZC
+2590 : c511 cmp adrf
+ trap_ne ;bad flags
+2592 : d0fe > bne * ;failed not equal (non zero)
+
+2594 : 28 plp
+ ; decimal ADC / SBC abs,x
+2595 : 08 php ;save carry for subtract
+2596 : a50d lda ad1
+2598 : 7df701 adc ada2-ad2,x ;perform add
+259b : 08 php
+259c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+259e : d0fe > bne * ;failed not equal (non zero)
+
+25a0 : 68 pla ;check flags
+25a1 : 2983 and #$83 ;mask N-----ZC
+25a3 : c511 cmp adrf
+ trap_ne ;bad flags
+25a5 : d0fe > bne * ;failed not equal (non zero)
+
+25a7 : 28 plp
+25a8 : 08 php ;save carry for next add
+25a9 : a50d lda ad1
+25ab : fdf801 sbc sba2-ad2,x ;perform subtract
+25ae : 08 php
+25af : c50f cmp adrl ;check result
+ trap_ne ;bad result
+25b1 : d0fe > bne * ;failed not equal (non zero)
+
+25b3 : 68 pla ;check flags
+25b4 : 2983 and #$83 ;mask N-----ZC
+25b6 : c511 cmp adrf
+ trap_ne ;bad flags
+25b8 : d0fe > bne * ;failed not equal (non zero)
+
+25ba : 28 plp
+ ; decimal ADC / SBC abs,y
+25bb : 08 php ;save carry for subtract
+25bc : a50d lda ad1
+25be : 790601 adc ada2-$ff,y ;perform add
+25c1 : 08 php
+25c2 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+25c4 : d0fe > bne * ;failed not equal (non zero)
+
+25c6 : 68 pla ;check flags
+25c7 : 2983 and #$83 ;mask N-----ZC
+25c9 : c511 cmp adrf
+ trap_ne ;bad flags
+25cb : d0fe > bne * ;failed not equal (non zero)
+
+25cd : 28 plp
+25ce : 08 php ;save carry for next add
+25cf : a50d lda ad1
+25d1 : f90701 sbc sba2-$ff,y ;perform subtract
+25d4 : 08 php
+25d5 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+25d7 : d0fe > bne * ;failed not equal (non zero)
+
+25d9 : 68 pla ;check flags
+25da : 2983 and #$83 ;mask N-----ZC
+25dc : c511 cmp adrf
+ trap_ne ;bad flags
+25de : d0fe > bne * ;failed not equal (non zero)
+
+25e0 : 28 plp
+ ; decimal ADC / SBC (zp,x)
+25e1 : 08 php ;save carry for subtract
+25e2 : a50d lda ad1
+25e4 : 6144 adc (lo adi2-ad2,x) ;perform add
+25e6 : 08 php
+25e7 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+25e9 : d0fe > bne * ;failed not equal (non zero)
+
+25eb : 68 pla ;check flags
+25ec : 2983 and #$83 ;mask N-----ZC
+25ee : c511 cmp adrf
+ trap_ne ;bad flags
+25f0 : d0fe > bne * ;failed not equal (non zero)
+
+25f2 : 28 plp
+25f3 : 08 php ;save carry for next add
+25f4 : a50d lda ad1
+25f6 : e146 sbc (lo sbi2-ad2,x) ;perform subtract
+25f8 : 08 php
+25f9 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+25fb : d0fe > bne * ;failed not equal (non zero)
+
+25fd : 68 pla ;check flags
+25fe : 2983 and #$83 ;mask N-----ZC
+2600 : c511 cmp adrf
+ trap_ne ;bad flags
+2602 : d0fe > bne * ;failed not equal (non zero)
+
+2604 : 28 plp
+ ; decimal ADC / SBC (abs),y
+2605 : 08 php ;save carry for subtract
+2606 : a50d lda ad1
+2608 : 7156 adc (adiy2),y ;perform add
+260a : 08 php
+260b : c50f cmp adrl ;check result
+ trap_ne ;bad result
+260d : d0fe > bne * ;failed not equal (non zero)
+
+260f : 68 pla ;check flags
+2610 : 2983 and #$83 ;mask N-----ZC
+2612 : c511 cmp adrf
+ trap_ne ;bad flags
+2614 : d0fe > bne * ;failed not equal (non zero)
+
+2616 : 28 plp
+2617 : 08 php ;save carry for next add
+2618 : a50d lda ad1
+261a : f158 sbc (sbiy2),y ;perform subtract
+261c : 08 php
+261d : c50f cmp adrl ;check result
+ trap_ne ;bad result
+261f : d0fe > bne * ;failed not equal (non zero)
+
+2621 : 68 pla ;check flags
+2622 : 2983 and #$83 ;mask N-----ZC
+2624 : c511 cmp adrf
+ trap_ne ;bad flags
+2626 : d0fe > bne * ;failed not equal (non zero)
+
+2628 : 28 plp
+ ; decimal ADC / SBC (zp)
+2629 : 08 php ;save carry for subtract
+262a : a50d lda ad1
+262c : 7252 adc (adi2) ;perform add
+262e : 08 php
+262f : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2631 : d0fe > bne * ;failed not equal (non zero)
+
+2633 : 68 pla ;check flags
+2634 : 2983 and #$83 ;mask N-----ZC
+2636 : c511 cmp adrf
+ trap_ne ;bad flags
+2638 : d0fe > bne * ;failed not equal (non zero)
+
+263a : 28 plp
+263b : 08 php ;save carry for next add
+263c : a50d lda ad1
+263e : f254 sbc (sbi2) ;perform subtract
+2640 : 08 php
+2641 : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2643 : d0fe > bne * ;failed not equal (non zero)
+
+2645 : 68 pla ;check flags
+2646 : 2983 and #$83 ;mask N-----ZC
+2648 : c511 cmp adrf
+ trap_ne ;bad flags
+264a : d0fe > bne * ;failed not equal (non zero)
+
+264c : 28 plp
+264d : 60 rts
+
+ ; core subroutine of the full binary add/subtract test
+ ; iterates through all combinations of operands and carry input
+ ; uses increments/decrements to predict result & result flags
+264e : a511 chkadd lda adrf ;add V-flag if overflow
+2650 : 2983 and #$83 ;keep N-----ZC / clear V
+2652 : 48 pha
+2653 : a50d lda ad1 ;test sign unequal between operands
+2655 : 450e eor ad2
+2657 : 300a bmi ckad1 ;no overflow possible - operands have different sign
+2659 : a50d lda ad1 ;test sign equal between operands and result
+265b : 450f eor adrl
+265d : 1004 bpl ckad1 ;no overflow occured - operand and result have same sign
+265f : 68 pla
+2660 : 0940 ora #$40 ;set V
+2662 : 48 pha
+2663 : 68 ckad1 pla
+2664 : 8511 sta adrf ;save expected flags
+ ; binary ADC / SBC (zp)
+2666 : 08 php ;save carry for subtract
+2667 : a50d lda ad1
+2669 : 7252 adc (adi2) ;perform add
+266b : 08 php
+266c : c50f cmp adrl ;check result
+ trap_ne ;bad result
+266e : d0fe > bne * ;failed not equal (non zero)
+
+2670 : 68 pla ;check flags
+2671 : 29c3 and #$c3 ;mask NV----ZC
+2673 : c511 cmp adrf
+ trap_ne ;bad flags
+2675 : d0fe > bne * ;failed not equal (non zero)
+
+2677 : 28 plp
+2678 : 08 php ;save carry for next add
+2679 : a50d lda ad1
+267b : f254 sbc (sbi2) ;perform subtract
+267d : 08 php
+267e : c50f cmp adrl ;check result
+ trap_ne ;bad result
+2680 : d0fe > bne * ;failed not equal (non zero)
+
+2682 : 68 pla ;check flags
+2683 : 29c3 and #$c3 ;mask NV----ZC
+2685 : c511 cmp adrf
+ trap_ne ;bad flags
+2687 : d0fe > bne * ;failed not equal (non zero)
+
+2689 : 28 plp
+268a : 60 rts
+
+ ; target for the jump indirect test
+268b : 9126 ji_adr dw test_ji
+268d : 8216 dw ji_ret
+
+268f : 88 dey
+2690 : 88 dey
+2691 : test_ji
+2691 : 08 php ;either SP or Y count will fail, if we do not hit
+2692 : 88 dey
+2693 : 88 dey
+2694 : 88 dey
+2695 : 28 plp
+ trap_cs ;flags loaded?
+2696 : b0fe > bcs * ;failed carry set
+
+ trap_vs
+2698 : 70fe > bvs * ;failed overflow set
+
+ trap_mi
+269a : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_eq
+269c : f0fe > beq * ;failed equal (zero)
+
+269e : c949 cmp #'I' ;registers loaded?
+ trap_ne
+26a0 : d0fe > bne * ;failed not equal (non zero)
+
+26a2 : e04e cpx #'N'
+ trap_ne
+26a4 : d0fe > bne * ;failed not equal (non zero)
+
+26a6 : c041 cpy #('D'-3)
+ trap_ne
+26a8 : d0fe > bne * ;failed not equal (non zero)
+
+26aa : 48 pha ;save a,x
+26ab : 8a txa
+26ac : 48 pha
+26ad : ba tsx
+26ae : e0fd cpx #$fd ;check SP
+ trap_ne
+26b0 : d0fe > bne * ;failed not equal (non zero)
+
+26b2 : 68 pla ;restore x
+26b3 : aa tax
+ set_stat $ff
+ > load_flag $ff
+26b4 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+26b6 : 48 > pha ;use stack to load status
+26b7 : 28 > plp
+
+26b8 : 68 pla ;restore a
+26b9 : e8 inx ;return registers with modifications
+26ba : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+26bc : 6cff02 jmp (ji_tab+2)
+26bf : ea nop
+26c0 : ea nop
+ trap ;runover protection
+26c1 : 4cc126 > jmp * ;failed anyway
+
+26c4 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ; target for the jump indirect test
+26c7 : 0e27 jxi_adr dw trap_ind
+26c9 : 0e27 dw trap_ind
+26cb : d526 dw test_jxi ;+4
+26cd : ce16 dw jxi_ret ;+6
+26cf : 0e27 dw trap_ind
+26d1 : 0e27 dw trap_ind
+
+26d3 : 88 dey
+26d4 : 88 dey
+26d5 : test_jxi
+26d5 : 08 php ;either SP or Y count will fail, if we do not hit
+26d6 : 88 dey
+26d7 : 88 dey
+26d8 : 88 dey
+26d9 : 28 plp
+ trap_cs ;flags loaded?
+26da : b0fe > bcs * ;failed carry set
+
+ trap_vs
+26dc : 70fe > bvs * ;failed overflow set
+
+ trap_mi
+26de : 30fe > bmi * ;failed minus (bit 7 set)
+
+ trap_eq
+26e0 : f0fe > beq * ;failed equal (zero)
+
+26e2 : c958 cmp #'X' ;registers loaded?
+ trap_ne
+26e4 : d0fe > bne * ;failed not equal (non zero)
+
+26e6 : e004 cpx #4
+ trap_ne
+26e8 : d0fe > bne * ;failed not equal (non zero)
+
+26ea : c046 cpy #('I'-3)
+ trap_ne
+26ec : d0fe > bne * ;failed not equal (non zero)
+
+26ee : 48 pha ;save a,x
+26ef : 8a txa
+26f0 : 48 pha
+26f1 : ba tsx
+26f2 : e0fd cpx #$fd ;check SP
+ trap_ne
+26f4 : d0fe > bne * ;failed not equal (non zero)
+
+26f6 : 68 pla ;restore x
+26f7 : aa tax
+ set_stat $ff
+ > load_flag $ff
+26f8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+ >
+26fa : 48 > pha ;use stack to load status
+26fb : 28 > plp
+
+26fc : 68 pla ;restore a
+26fd : e8 inx ;return registers with modifications
+26fe : e8 inx
+26ff : 49aa eor #$aa ;N=1, V=1, Z=0, C=1
+2701 : 7cf902 jmp (jxi_tab,x)
+2704 : ea nop
+2705 : ea nop
+ trap ;runover protection
+2706 : 4c0627 > jmp * ;failed anyway
+
+2709 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ; JMP (abs,x) with bad x
+270c : ea nop
+270d : ea nop
+270e : trap_ind
+270e : ea nop
+270f : ea nop
+ trap ;near miss indexed indirect jump
+2710 : 4c1027 > jmp * ;failed anyway
+
+2713 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ ;trap in case of unexpected IRQ, NMI, BRK, RESET
+2716 : nmi_trap
+ trap ;check stack for conditions at NMI
+2716 : 4c1627 > jmp * ;failed anyway
+
+2719 : 4c0004 jmp start ;catastrophic error - cannot continue
+271c : res_trap
+ trap ;unexpected RESET
+271c : 4c1c27 > jmp * ;failed anyway
+
+271f : 4c0004 jmp start ;catastrophic error - cannot continue
+
+2722 : 88 dey
+2723 : 88 dey
+2724 : irq_trap ;BRK test or unextpected BRK or IRQ
+2724 : 08 php ;either SP or Y count will fail, if we do not hit
+2725 : 88 dey
+2726 : 88 dey
+2727 : 88 dey
+ ;next traps could be caused by unexpected BRK or IRQ
+ ;check stack for BREAK and originating location
+ ;possible jump/branch into weeds (uninitialized space)
+2728 : c9bd cmp #$ff-'B' ;BRK pass 2 registers loaded?
+272a : f042 beq break2
+272c : c942 cmp #'B' ;BRK pass 1 registers loaded?
+ trap_ne
+272e : d0fe > bne * ;failed not equal (non zero)
+
+2730 : e052 cpx #'R'
+ trap_ne
+2732 : d0fe > bne * ;failed not equal (non zero)
+
+2734 : c048 cpy #'K'-3
+ trap_ne
+2736 : d0fe > bne * ;failed not equal (non zero)
+
+2738 : 850a sta irq_a ;save registers during break test
+273a : 860b stx irq_x
+273c : ba tsx ;test break on stack
+273d : bd0201 lda $102,x
+ cmp_flag 0 ;break test should have B=1 & unused=1 on stack
+2740 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ;possible no break flag on stack
+2742 : d0fe > bne * ;failed not equal (non zero)
+
+2744 : 68 pla
+ cmp_flag intdis ;should have added interrupt disable
+2745 : c934 > cmp #(intdis |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+2747 : d0fe > bne * ;failed not equal (non zero)
+
+2749 : ba tsx
+274a : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+274c : d0fe > bne * ;failed not equal (non zero)
+
+274e : adff01 lda $1ff ;propper return on stack
+2751 : c917 cmp #hi(brk_ret0)
+ trap_ne
+2753 : d0fe > bne * ;failed not equal (non zero)
+
+2755 : adfe01 lda $1fe
+2758 : c920 cmp #lo(brk_ret0)
+ trap_ne
+275a : d0fe > bne * ;failed not equal (non zero)
+
+ load_flag $ff
+275c : a9ff > lda #$ff ;allow test to change I-flag (no mask)
+
+275e : 48 pha
+275f : a60b ldx irq_x
+2761 : e8 inx ;return registers with modifications
+2762 : a50a lda irq_a
+2764 : 49aa eor #$aa
+2766 : 28 plp ;N=1, V=1, Z=1, C=1 but original flags should be restored
+2767 : 40 rti
+ trap ;runover protection
+2768 : 4c6827 > jmp * ;failed anyway
+
+276b : 4c0004 jmp start ;catastrophic error - cannot continue
+
+276e : break2 ;BRK pass 2
+276e : e0ad cpx #$ff-'R'
+ trap_ne
+2770 : d0fe > bne * ;failed not equal (non zero)
+
+2772 : c0b1 cpy #$ff-'K'-3
+ trap_ne
+2774 : d0fe > bne * ;failed not equal (non zero)
+
+2776 : 850a sta irq_a ;save registers during break test
+2778 : 860b stx irq_x
+277a : ba tsx ;test break on stack
+277b : bd0201 lda $102,x
+ cmp_flag $ff ;break test should have B=1
+277e : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
+
+ trap_ne ;possibly no break flag on stack
+2780 : d0fe > bne * ;failed not equal (non zero)
+
+2782 : 68 pla
+ cmp_flag $ff-decmode ;actual passed flags should have decmode cleared
+2783 : c9f7 > cmp #($ff-decmode |fao)&m8 ;expected flags + always on bits
+
+ trap_ne
+2785 : d0fe > bne * ;failed not equal (non zero)
+
+2787 : ba tsx
+2788 : e0fc cpx #$fc ;sp -3? (return addr, flags)
+ trap_ne
+278a : d0fe > bne * ;failed not equal (non zero)
+
+278c : adff01 lda $1ff ;propper return on stack
+278f : c917 cmp #hi(brk_ret1)
+ trap_ne
+2791 : d0fe > bne * ;failed not equal (non zero)
+
+2793 : adfe01 lda $1fe
+2796 : c946 cmp #lo(brk_ret1)
+ trap_ne
+2798 : d0fe > bne * ;failed not equal (non zero)
+
+ load_flag intdis
+279a : a904 > lda #intdis ;allow test to change I-flag (no mask)
+
+279c : 48 pha
+279d : a60b ldx irq_x
+279f : e8 inx ;return registers with modifications
+27a0 : a50a lda irq_a
+27a2 : 49aa eor #$aa
+27a4 : 28 plp ;N=0, V=0, Z=0, C=0 but original flags should be restored
+27a5 : 40 rti
+ trap ;runover protection
+27a6 : 4ca627 > jmp * ;failed anyway
+
+27a9 : 4c0004 jmp start ;catastrophic error - cannot continue
+
+ if report = 1
+ include "report.i65"
+ endif
+
+ ;copy of data to initialize BSS segment
+ if load_data_direct != 1
+ zp_init
+ zp1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ zp7f_ db $7f ;test pattern for compare
+ ;logical zeropage operands
+ zpOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ zpAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ zpEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;indirect addressing pointers
+ ind1_ dw abs1 ;indirect pointer to pattern in absolute memory
+ dw abs1+1
+ dw abs1+2
+ dw abs1+3
+ dw abs7f
+ inw1_ dw abs1-$f8 ;indirect pointer for wrap-test pattern
+ indt_ dw abst ;indirect pointer to store area in absolute memory
+ dw abst+1
+ dw abst+2
+ dw abst+3
+ inwt_ dw abst-$f8 ;indirect pointer for wrap-test store
+ indAN_ dw absAN ;indirect pointer to AND pattern in absolute memory
+ dw absAN+1
+ dw absAN+2
+ dw absAN+3
+ indEO_ dw absEO ;indirect pointer to EOR pattern in absolute memory
+ dw absEO+1
+ dw absEO+2
+ dw absEO+3
+ indOR_ dw absOR ;indirect pointer to OR pattern in absolute memory
+ dw absOR+1
+ dw absOR+2
+ dw absOR+3
+ ;add/subtract indirect pointers
+ adi2_ dw ada2 ;indirect pointer to operand 2 in absolute memory
+ sbi2_ dw sba2 ;indirect pointer to complemented operand 2 (SBC)
+ adiy2_ dw ada2-$ff ;with offset for indirect indexed
+ sbiy2_ dw sba2-$ff
+ zp_end
+ if (zp_end - zp_init) != (zp_bss_end - zp_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and zeropage data
+ endif
+ data_init
+ ex_adc_ adc #0 ;execute immediate opcodes
+ rts
+ ex_sbc_ sbc #0 ;execute immediate opcodes
+ rts
+ abs1_ db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
+ abs7f_ db $7f ;test pattern for compare
+ ;loads
+ fLDx_ db fn,fn,0,fz ;expected flags for load
+ ;shifts
+ rASL_ ;expected result ASL & ROL -carry
+ rROL_ db $86,$04,$82,0 ; "
+ rROLc_ db $87,$05,$83,1 ;expected result ROL +carry
+ rLSR_ ;expected result LSR & ROR -carry
+ rROR_ db $61,$41,$20,0 ; "
+ rRORc_ db $e1,$c1,$a0,$80 ;expected result ROR +carry
+ fASL_ ;expected flags for shifts
+ fROL_ db fnc,fc,fn,fz ;no carry in
+ fROLc_ db fnc,fc,fn,0 ;carry in
+ fLSR_
+ fROR_ db fc,0,fc,fz ;no carry in
+ fRORc_ db fnc,fn,fnc,fn ;carry in
+ ;increments (decrements)
+ rINC_ db $7f,$80,$ff,0,1 ;expected result for INC/DEC
+ fINC_ db 0,fn,fn,fz,0 ;expected flags for INC/DEC
+ ;logical memory operand
+ absOR_ db 0,$1f,$71,$80 ;test pattern for OR
+ absAN_ db $0f,$ff,$7f,$80 ;test pattern for AND
+ absEO_ db $ff,$0f,$8f,$8f ;test pattern for EOR
+ ;logical accu operand
+ absORa_ db 0,$f1,$1f,0 ;test pattern for OR
+ absANa_ db $f0,$ff,$ff,$ff ;test pattern for AND
+ absEOa_ db $ff,$f0,$f0,$0f ;test pattern for EOR
+ ;logical results
+ absrlo_ db 0,$ff,$7f,$80
+ absflo_ db fz,fn,0,fn
+ data_end
+ if (data_end - data_init) != (data_bss_end - data_bss)
+ ;force assembler error if size is different
+ ERROR ERROR ERROR ;mismatch between bss and data
+ endif
+
+ vec_init
+ dw nmi_trap
+ dw res_trap
+ dw irq_trap
+ vec_bss equ $fffa
+ endif ;end of RAM init data
+
+ ; code at end of image due to the need to add blank space as required
+ if ($ff & (ji_ret - * - 2)) < ($ff & (jxi_ret - * - 2))
+ ; JMP (abs) when $xxff and $xx00 are from same page
+ ds lo(ji_ret - * - 2)
+ nop
+ nop
+ ji_px nop ;low address byte matched with ji_ret
+ nop
+ trap ;jmp indirect page cross bug
+
+ ; JMP (abs,x) when $xxff and $xx00 are from same page
+ ds lo(jxi_ret - * - 2)
+ nop
+ nop
+ jxi_px nop ;low address byte matched with jxi_ret
+ nop
+ trap ;jmp indexed indirect page cross bug
+ else
+ ; JMP (abs,x) when $xxff and $xx00 are from same page
+27ac : 00000000000000.. ds lo(jxi_ret - * - 2)
+27cc : ea nop
+27cd : ea nop
+27ce : ea jxi_px nop ;low address byte matched with jxi_ret
+27cf : ea nop
+ trap ;jmp indexed indirect page cross bug
+27d0 : 4cd027 > jmp * ;failed anyway
+
+
+ ; JMP (abs) when $xxff and $xx00 are from same page
+27d3 : 00000000000000.. ds lo(ji_ret - * - 2)
+2880 : ea nop
+2881 : ea nop
+2882 : ea ji_px nop ;low address byte matched with ji_ret
+2883 : ea nop
+ trap ;jmp indirect page cross bug
+2884 : 4c8428 > jmp * ;failed anyway
+
+ endif
+
+ if (load_data_direct = 1) & (ROM_vectors = 1)
+fffa = org $fffa ;vectors
+fffa : 1627 dw nmi_trap
+fffc : 1c27 dw res_trap
+fffe : 2427 dw irq_trap
+ endif
+
+fffa = end start
+
+No errors in pass 2.
diff --git a/tests/65c02-a.bin b/tests/65c02-a.bin
new file mode 100644
index 0000000..992047e
Binary files /dev/null and b/tests/65c02-a.bin differ
diff --git a/tests/65c02-a.lst b/tests/65c02-a.lst
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+++ b/tests/65c02-a.lst
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+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20d102 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20da02 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+02ca : a504 lda DA
+02cc : c506 cmp AR
+02ce : d000 bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02d0 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02d1 : a506 A6502 lda AR ; 65C02
+02d3 : 08 php
+02d4 : 68 pla
+02d5 : 8507 sta NF
+02d7 : 8509 sta ZF
+02d9 : 60 rts
+
+02da : 20ab02 S6502 jsr SUB2
+02dd : a506 lda AR
+02df : 08 php
+02e0 : 68 pla
+02e1 : 8507 sta NF
+02e3 : 8509 sta ZF
+02e5 : a503 lda HNVZC
+02e7 : 8508 sta VF
+02e9 : 850a sta CF
+02eb : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02da = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-addonly-a.bin b/tests/65c02-addonly-a.bin
new file mode 100644
index 0000000..45820a8
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diff --git a/tests/65c02-addonly-a.lst b/tests/65c02-addonly-a.lst
new file mode 100644
index 0000000..65a5026
--- /dev/null
+++ b/tests/65c02-addonly-a.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204102 jsr ADD
+0229 : 20c602 jsr A6502
+022c : 20bf02 jsr COMPARE
+022f : d00f bne DONE
+ ; jsr SUB
+ ; jsr S6502
+ ; jsr COMPARE
+ ; bne DONE
+0231 : e600 NEXT1 inc N1 ; [5] see text
+0233 : d0e5 bne LOOP2 ; loop through all 256 values of N1
+0235 : e601 NEXT2 inc N2 ; [6] see text
+0237 : d0d1 bne LOOP1 ; loop through all 256 values of N2
+0239 : 88 dey
+023a : 10ce bpl LOOP1 ; loop through both values of the carry flag
+023c : a900 lda #0 ; test passed, so store 0 in ERROR
+023e : 850b sta ERROR
+0240 : DONE
+ end_of_test
+0240 : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+0241 : f8 ADD sed ; decimal mode
+0242 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0244 : a500 lda N1
+0246 : 6501 adc N2
+0248 : 8504 sta DA ; actual accumulator result in decimal mode
+024a : 08 php
+024b : 68 pla
+024c : 8505 sta DNVZC ; actual flags result in decimal mode
+024e : d8 cld ; binary mode
+024f : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0251 : a500 lda N1
+0253 : 6501 adc N2
+0255 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0257 : 08 php
+0258 : 68 pla
+0259 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+025b : c001 cpy #1
+025d : a50c lda N1L
+025f : 650e adc N2L
+0261 : c90a cmp #$0A
+0263 : a200 ldx #0
+0265 : 9006 bcc A1
+0267 : e8 inx
+0268 : 6905 adc #5 ; add 6 (carry is set)
+026a : 290f and #$0F
+026c : 38 sec
+026d : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+026f : 750f adc N2H,x
+0271 : 08 php
+0272 : b004 bcs A2
+0274 : c9a0 cmp #$A0
+0276 : 9003 bcc A3
+0278 : 695f A2 adc #$5F ; add $60 (carry is set)
+027a : 38 sec
+027b : 8506 A3 sta AR ; predicted accumulator result
+027d : 08 php
+027e : 68 pla
+027f : 850a sta CF ; predicted carry result
+0281 : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+0282 : 8508 sta VF ; predicted V flags
+0284 : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0285 : f8 SUB sed ; decimal mode
+0286 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0288 : a500 lda N1
+028a : e501 sbc N2
+028c : 8504 sta DA ; actual accumulator result in decimal mode
+028e : 08 php
+028f : 68 pla
+0290 : 8505 sta DNVZC ; actual flags result in decimal mode
+0292 : d8 cld ; binary mode
+0293 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0295 : a500 lda N1
+0297 : e501 sbc N2
+0299 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+029b : 08 php
+029c : 68 pla
+029d : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+029f : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02a0 : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a2 : a50c lda N1L
+02a4 : e50e sbc N2L
+02a6 : a200 ldx #0
+02a8 : b004 bcs S21
+02aa : e8 inx
+02ab : 290f and #$0F
+02ad : 18 clc
+02ae : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02b0 : f50f sbc N2H,x
+02b2 : b002 bcs S22
+02b4 : e95f sbc #$5F ; subtract $60 (carry is clear)
+02b6 : e000 S22 cpx #0
+02b8 : f002 beq S23
+02ba : e906 sbc #6
+02bc : 8506 S23 sta AR ; predicted accumulator result
+02be : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02bf : COMPARE
+ if chk_a = 1
+02bf : a504 lda DA
+02c1 : c506 cmp AR
+02c3 : d000 bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02c5 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02c6 : a506 A6502 lda AR ; 65C02
+02c8 : 08 php
+02c9 : 68 pla
+02ca : 8507 sta NF
+02cc : 8509 sta ZF
+02ce : 60 rts
+
+02cf : 20a002 S6502 jsr SUB2
+02d2 : a506 lda AR
+02d4 : 08 php
+02d5 : 68 pla
+02d6 : 8507 sta NF
+02d8 : 8509 sta ZF
+02da : a503 lda HNVZC
+02dc : 8508 sta VF
+02de : 850a sta CF
+02e0 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02cf = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-addonly-c.bin b/tests/65c02-addonly-c.bin
new file mode 100644
index 0000000..f3ecf8a
Binary files /dev/null and b/tests/65c02-addonly-c.bin differ
diff --git a/tests/65c02-addonly-c.lst b/tests/65c02-addonly-c.lst
new file mode 100644
index 0000000..5dc684a
--- /dev/null
+++ b/tests/65c02-addonly-c.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0001 = chk_c = 1 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204102 jsr ADD
+0229 : 20c602 jsr A6502
+022c : 20bf02 jsr COMPARE
+022f : d00f bne DONE
+ ; jsr SUB
+ ; jsr S6502
+ ; jsr COMPARE
+ ; bne DONE
+0231 : e600 NEXT1 inc N1 ; [5] see text
+0233 : d0e5 bne LOOP2 ; loop through all 256 values of N1
+0235 : e601 NEXT2 inc N2 ; [6] see text
+0237 : d0d1 bne LOOP1 ; loop through all 256 values of N2
+0239 : 88 dey
+023a : 10ce bpl LOOP1 ; loop through both values of the carry flag
+023c : a900 lda #0 ; test passed, so store 0 in ERROR
+023e : 850b sta ERROR
+0240 : DONE
+ end_of_test
+0240 : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+0241 : f8 ADD sed ; decimal mode
+0242 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0244 : a500 lda N1
+0246 : 6501 adc N2
+0248 : 8504 sta DA ; actual accumulator result in decimal mode
+024a : 08 php
+024b : 68 pla
+024c : 8505 sta DNVZC ; actual flags result in decimal mode
+024e : d8 cld ; binary mode
+024f : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0251 : a500 lda N1
+0253 : 6501 adc N2
+0255 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0257 : 08 php
+0258 : 68 pla
+0259 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+025b : c001 cpy #1
+025d : a50c lda N1L
+025f : 650e adc N2L
+0261 : c90a cmp #$0A
+0263 : a200 ldx #0
+0265 : 9006 bcc A1
+0267 : e8 inx
+0268 : 6905 adc #5 ; add 6 (carry is set)
+026a : 290f and #$0F
+026c : 38 sec
+026d : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+026f : 750f adc N2H,x
+0271 : 08 php
+0272 : b004 bcs A2
+0274 : c9a0 cmp #$A0
+0276 : 9003 bcc A3
+0278 : 695f A2 adc #$5F ; add $60 (carry is set)
+027a : 38 sec
+027b : 8506 A3 sta AR ; predicted accumulator result
+027d : 08 php
+027e : 68 pla
+027f : 850a sta CF ; predicted carry result
+0281 : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+0282 : 8508 sta VF ; predicted V flags
+0284 : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0285 : f8 SUB sed ; decimal mode
+0286 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0288 : a500 lda N1
+028a : e501 sbc N2
+028c : 8504 sta DA ; actual accumulator result in decimal mode
+028e : 08 php
+028f : 68 pla
+0290 : 8505 sta DNVZC ; actual flags result in decimal mode
+0292 : d8 cld ; binary mode
+0293 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0295 : a500 lda N1
+0297 : e501 sbc N2
+0299 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+029b : 08 php
+029c : 68 pla
+029d : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+029f : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02a0 : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a2 : a50c lda N1L
+02a4 : e50e sbc N2L
+02a6 : a200 ldx #0
+02a8 : b004 bcs S21
+02aa : e8 inx
+02ab : 290f and #$0F
+02ad : 18 clc
+02ae : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02b0 : f50f sbc N2H,x
+02b2 : b002 bcs S22
+02b4 : e95f sbc #$5F ; subtract $60 (carry is clear)
+02b6 : e000 S22 cpx #0
+02b8 : f002 beq S23
+02ba : e906 sbc #6
+02bc : 8506 S23 sta AR ; predicted accumulator result
+02be : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02bf : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+02bf : a505 lda DNVZC
+02c1 : 450a eor CF
+02c3 : 2901 and #1 ; mask off C flag
+ endif
+02c5 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02c6 : a506 A6502 lda AR ; 65C02
+02c8 : 08 php
+02c9 : 68 pla
+02ca : 8507 sta NF
+02cc : 8509 sta ZF
+02ce : 60 rts
+
+02cf : 20a002 S6502 jsr SUB2
+02d2 : a506 lda AR
+02d4 : 08 php
+02d5 : 68 pla
+02d6 : 8507 sta NF
+02d8 : 8509 sta ZF
+02da : a503 lda HNVZC
+02dc : 8508 sta VF
+02de : 850a sta CF
+02e0 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02cf = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-addonly-n.bin b/tests/65c02-addonly-n.bin
new file mode 100644
index 0000000..1e17270
Binary files /dev/null and b/tests/65c02-addonly-n.bin differ
diff --git a/tests/65c02-addonly-n.lst b/tests/65c02-addonly-n.lst
new file mode 100644
index 0000000..1691960
--- /dev/null
+++ b/tests/65c02-addonly-n.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0001 = chk_n = 1 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204102 jsr ADD
+0229 : 20c802 jsr A6502
+022c : 20bf02 jsr COMPARE
+022f : d00f bne DONE
+ ; jsr SUB
+ ; jsr S6502
+ ; jsr COMPARE
+ ; bne DONE
+0231 : e600 NEXT1 inc N1 ; [5] see text
+0233 : d0e5 bne LOOP2 ; loop through all 256 values of N1
+0235 : e601 NEXT2 inc N2 ; [6] see text
+0237 : d0d1 bne LOOP1 ; loop through all 256 values of N2
+0239 : 88 dey
+023a : 10ce bpl LOOP1 ; loop through both values of the carry flag
+023c : a900 lda #0 ; test passed, so store 0 in ERROR
+023e : 850b sta ERROR
+0240 : DONE
+ end_of_test
+0240 : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+0241 : f8 ADD sed ; decimal mode
+0242 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0244 : a500 lda N1
+0246 : 6501 adc N2
+0248 : 8504 sta DA ; actual accumulator result in decimal mode
+024a : 08 php
+024b : 68 pla
+024c : 8505 sta DNVZC ; actual flags result in decimal mode
+024e : d8 cld ; binary mode
+024f : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0251 : a500 lda N1
+0253 : 6501 adc N2
+0255 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0257 : 08 php
+0258 : 68 pla
+0259 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+025b : c001 cpy #1
+025d : a50c lda N1L
+025f : 650e adc N2L
+0261 : c90a cmp #$0A
+0263 : a200 ldx #0
+0265 : 9006 bcc A1
+0267 : e8 inx
+0268 : 6905 adc #5 ; add 6 (carry is set)
+026a : 290f and #$0F
+026c : 38 sec
+026d : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+026f : 750f adc N2H,x
+0271 : 08 php
+0272 : b004 bcs A2
+0274 : c9a0 cmp #$A0
+0276 : 9003 bcc A3
+0278 : 695f A2 adc #$5F ; add $60 (carry is set)
+027a : 38 sec
+027b : 8506 A3 sta AR ; predicted accumulator result
+027d : 08 php
+027e : 68 pla
+027f : 850a sta CF ; predicted carry result
+0281 : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+0282 : 8508 sta VF ; predicted V flags
+0284 : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0285 : f8 SUB sed ; decimal mode
+0286 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0288 : a500 lda N1
+028a : e501 sbc N2
+028c : 8504 sta DA ; actual accumulator result in decimal mode
+028e : 08 php
+028f : 68 pla
+0290 : 8505 sta DNVZC ; actual flags result in decimal mode
+0292 : d8 cld ; binary mode
+0293 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0295 : a500 lda N1
+0297 : e501 sbc N2
+0299 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+029b : 08 php
+029c : 68 pla
+029d : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+029f : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02a0 : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a2 : a50c lda N1L
+02a4 : e50e sbc N2L
+02a6 : a200 ldx #0
+02a8 : b004 bcs S21
+02aa : e8 inx
+02ab : 290f and #$0F
+02ad : 18 clc
+02ae : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02b0 : f50f sbc N2H,x
+02b2 : b002 bcs S22
+02b4 : e95f sbc #$5F ; subtract $60 (carry is clear)
+02b6 : e000 S22 cpx #0
+02b8 : f002 beq S23
+02ba : e906 sbc #6
+02bc : 8506 S23 sta AR ; predicted accumulator result
+02be : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02bf : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+02bf : a505 lda DNVZC ; [7] see text
+02c1 : 4507 eor NF
+02c3 : 2980 and #$80 ; mask off N flag
+02c5 : d000 bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02c7 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02c8 : a506 A6502 lda AR ; 65C02
+02ca : 08 php
+02cb : 68 pla
+02cc : 8507 sta NF
+02ce : 8509 sta ZF
+02d0 : 60 rts
+
+02d1 : 20a002 S6502 jsr SUB2
+02d4 : a506 lda AR
+02d6 : 08 php
+02d7 : 68 pla
+02d8 : 8507 sta NF
+02da : 8509 sta ZF
+02dc : a503 lda HNVZC
+02de : 8508 sta VF
+02e0 : 850a sta CF
+02e2 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02d1 = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-addonly-v.bin b/tests/65c02-addonly-v.bin
new file mode 100644
index 0000000..3beac16
Binary files /dev/null and b/tests/65c02-addonly-v.bin differ
diff --git a/tests/65c02-addonly-v.lst b/tests/65c02-addonly-v.lst
new file mode 100644
index 0000000..4d577e8
--- /dev/null
+++ b/tests/65c02-addonly-v.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0001 = chk_v = 1 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204102 jsr ADD
+0229 : 20c802 jsr A6502
+022c : 20bf02 jsr COMPARE
+022f : d00f bne DONE
+ ; jsr SUB
+ ; jsr S6502
+ ; jsr COMPARE
+ ; bne DONE
+0231 : e600 NEXT1 inc N1 ; [5] see text
+0233 : d0e5 bne LOOP2 ; loop through all 256 values of N1
+0235 : e601 NEXT2 inc N2 ; [6] see text
+0237 : d0d1 bne LOOP1 ; loop through all 256 values of N2
+0239 : 88 dey
+023a : 10ce bpl LOOP1 ; loop through both values of the carry flag
+023c : a900 lda #0 ; test passed, so store 0 in ERROR
+023e : 850b sta ERROR
+0240 : DONE
+ end_of_test
+0240 : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+0241 : f8 ADD sed ; decimal mode
+0242 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0244 : a500 lda N1
+0246 : 6501 adc N2
+0248 : 8504 sta DA ; actual accumulator result in decimal mode
+024a : 08 php
+024b : 68 pla
+024c : 8505 sta DNVZC ; actual flags result in decimal mode
+024e : d8 cld ; binary mode
+024f : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0251 : a500 lda N1
+0253 : 6501 adc N2
+0255 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0257 : 08 php
+0258 : 68 pla
+0259 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+025b : c001 cpy #1
+025d : a50c lda N1L
+025f : 650e adc N2L
+0261 : c90a cmp #$0A
+0263 : a200 ldx #0
+0265 : 9006 bcc A1
+0267 : e8 inx
+0268 : 6905 adc #5 ; add 6 (carry is set)
+026a : 290f and #$0F
+026c : 38 sec
+026d : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+026f : 750f adc N2H,x
+0271 : 08 php
+0272 : b004 bcs A2
+0274 : c9a0 cmp #$A0
+0276 : 9003 bcc A3
+0278 : 695f A2 adc #$5F ; add $60 (carry is set)
+027a : 38 sec
+027b : 8506 A3 sta AR ; predicted accumulator result
+027d : 08 php
+027e : 68 pla
+027f : 850a sta CF ; predicted carry result
+0281 : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+0282 : 8508 sta VF ; predicted V flags
+0284 : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0285 : f8 SUB sed ; decimal mode
+0286 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0288 : a500 lda N1
+028a : e501 sbc N2
+028c : 8504 sta DA ; actual accumulator result in decimal mode
+028e : 08 php
+028f : 68 pla
+0290 : 8505 sta DNVZC ; actual flags result in decimal mode
+0292 : d8 cld ; binary mode
+0293 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0295 : a500 lda N1
+0297 : e501 sbc N2
+0299 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+029b : 08 php
+029c : 68 pla
+029d : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+029f : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02a0 : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a2 : a50c lda N1L
+02a4 : e50e sbc N2L
+02a6 : a200 ldx #0
+02a8 : b004 bcs S21
+02aa : e8 inx
+02ab : 290f and #$0F
+02ad : 18 clc
+02ae : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02b0 : f50f sbc N2H,x
+02b2 : b002 bcs S22
+02b4 : e95f sbc #$5F ; subtract $60 (carry is clear)
+02b6 : e000 S22 cpx #0
+02b8 : f002 beq S23
+02ba : e906 sbc #6
+02bc : 8506 S23 sta AR ; predicted accumulator result
+02be : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02bf : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+02bf : a505 lda DNVZC ; [8] see text
+02c1 : 4508 eor VF
+02c3 : 2940 and #$40 ; mask off V flag
+02c5 : d000 bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02c7 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02c8 : a506 A6502 lda AR ; 65C02
+02ca : 08 php
+02cb : 68 pla
+02cc : 8507 sta NF
+02ce : 8509 sta ZF
+02d0 : 60 rts
+
+02d1 : 20a002 S6502 jsr SUB2
+02d4 : a506 lda AR
+02d6 : 08 php
+02d7 : 68 pla
+02d8 : 8507 sta NF
+02da : 8509 sta ZF
+02dc : a503 lda HNVZC
+02de : 8508 sta VF
+02e0 : 850a sta CF
+02e2 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02d1 = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-addonly-z.bin b/tests/65c02-addonly-z.bin
new file mode 100644
index 0000000..199e08e
Binary files /dev/null and b/tests/65c02-addonly-z.bin differ
diff --git a/tests/65c02-addonly-z.lst b/tests/65c02-addonly-z.lst
new file mode 100644
index 0000000..4c4ba3d
--- /dev/null
+++ b/tests/65c02-addonly-z.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0001 = chk_z = 1 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204102 jsr ADD
+0229 : 20c802 jsr A6502
+022c : 20bf02 jsr COMPARE
+022f : d00f bne DONE
+ ; jsr SUB
+ ; jsr S6502
+ ; jsr COMPARE
+ ; bne DONE
+0231 : e600 NEXT1 inc N1 ; [5] see text
+0233 : d0e5 bne LOOP2 ; loop through all 256 values of N1
+0235 : e601 NEXT2 inc N2 ; [6] see text
+0237 : d0d1 bne LOOP1 ; loop through all 256 values of N2
+0239 : 88 dey
+023a : 10ce bpl LOOP1 ; loop through both values of the carry flag
+023c : a900 lda #0 ; test passed, so store 0 in ERROR
+023e : 850b sta ERROR
+0240 : DONE
+ end_of_test
+0240 : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+0241 : f8 ADD sed ; decimal mode
+0242 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0244 : a500 lda N1
+0246 : 6501 adc N2
+0248 : 8504 sta DA ; actual accumulator result in decimal mode
+024a : 08 php
+024b : 68 pla
+024c : 8505 sta DNVZC ; actual flags result in decimal mode
+024e : d8 cld ; binary mode
+024f : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0251 : a500 lda N1
+0253 : 6501 adc N2
+0255 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0257 : 08 php
+0258 : 68 pla
+0259 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+025b : c001 cpy #1
+025d : a50c lda N1L
+025f : 650e adc N2L
+0261 : c90a cmp #$0A
+0263 : a200 ldx #0
+0265 : 9006 bcc A1
+0267 : e8 inx
+0268 : 6905 adc #5 ; add 6 (carry is set)
+026a : 290f and #$0F
+026c : 38 sec
+026d : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+026f : 750f adc N2H,x
+0271 : 08 php
+0272 : b004 bcs A2
+0274 : c9a0 cmp #$A0
+0276 : 9003 bcc A3
+0278 : 695f A2 adc #$5F ; add $60 (carry is set)
+027a : 38 sec
+027b : 8506 A3 sta AR ; predicted accumulator result
+027d : 08 php
+027e : 68 pla
+027f : 850a sta CF ; predicted carry result
+0281 : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+0282 : 8508 sta VF ; predicted V flags
+0284 : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0285 : f8 SUB sed ; decimal mode
+0286 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0288 : a500 lda N1
+028a : e501 sbc N2
+028c : 8504 sta DA ; actual accumulator result in decimal mode
+028e : 08 php
+028f : 68 pla
+0290 : 8505 sta DNVZC ; actual flags result in decimal mode
+0292 : d8 cld ; binary mode
+0293 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0295 : a500 lda N1
+0297 : e501 sbc N2
+0299 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+029b : 08 php
+029c : 68 pla
+029d : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+029f : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02a0 : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a2 : a50c lda N1L
+02a4 : e50e sbc N2L
+02a6 : a200 ldx #0
+02a8 : b004 bcs S21
+02aa : e8 inx
+02ab : 290f and #$0F
+02ad : 18 clc
+02ae : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02b0 : f50f sbc N2H,x
+02b2 : b002 bcs S22
+02b4 : e95f sbc #$5F ; subtract $60 (carry is clear)
+02b6 : e000 S22 cpx #0
+02b8 : f002 beq S23
+02ba : e906 sbc #6
+02bc : 8506 S23 sta AR ; predicted accumulator result
+02be : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02bf : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+02bf : a505 lda DNVZC
+02c1 : 4509 eor ZF ; mask off Z flag
+02c3 : 2902 and #2
+02c5 : d000 bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02c7 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02c8 : a506 A6502 lda AR ; 65C02
+02ca : 08 php
+02cb : 68 pla
+02cc : 8507 sta NF
+02ce : 8509 sta ZF
+02d0 : 60 rts
+
+02d1 : 20a002 S6502 jsr SUB2
+02d4 : a506 lda AR
+02d6 : 08 php
+02d7 : 68 pla
+02d8 : 8507 sta NF
+02da : 8509 sta ZF
+02dc : a503 lda HNVZC
+02de : 8508 sta VF
+02e0 : 850a sta CF
+02e2 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02d1 = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-all.bin b/tests/65c02-all.bin
new file mode 100644
index 0000000..bf29b1b
Binary files /dev/null and b/tests/65c02-all.bin differ
diff --git a/tests/65c02-all.lst b/tests/65c02-all.lst
new file mode 100644
index 0000000..ae12038
--- /dev/null
+++ b/tests/65c02-all.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0001 = chk_n = 1 ; check sign (negative) flag
+0001 = chk_v = 1 ; check overflow flag
+0001 = chk_z = 1 ; check zero flag
+0001 = chk_c = 1 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20ef02 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20f802 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+02ca : a504 lda DA
+02cc : c506 cmp AR
+02ce : d01e bne C1
+ endif
+ if chk_n = 1
+02d0 : a505 lda DNVZC ; [7] see text
+02d2 : 4507 eor NF
+02d4 : 2980 and #$80 ; mask off N flag
+02d6 : d016 bne C1
+ endif
+ if chk_v = 1
+02d8 : a505 lda DNVZC ; [8] see text
+02da : 4508 eor VF
+02dc : 2940 and #$40 ; mask off V flag
+02de : d00e bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+02e0 : a505 lda DNVZC
+02e2 : 4509 eor ZF ; mask off Z flag
+02e4 : 2902 and #2
+02e6 : d006 bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+02e8 : a505 lda DNVZC
+02ea : 450a eor CF
+02ec : 2901 and #1 ; mask off C flag
+ endif
+02ee : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02ef : a506 A6502 lda AR ; 65C02
+02f1 : 08 php
+02f2 : 68 pla
+02f3 : 8507 sta NF
+02f5 : 8509 sta ZF
+02f7 : 60 rts
+
+02f8 : 20ab02 S6502 jsr SUB2
+02fb : a506 lda AR
+02fd : 08 php
+02fe : 68 pla
+02ff : 8507 sta NF
+0301 : 8509 sta ZF
+0303 : a503 lda HNVZC
+0305 : 8508 sta VF
+0307 : 850a sta CF
+0309 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02f8 = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-c.bin b/tests/65c02-c.bin
new file mode 100644
index 0000000..d32b1b7
Binary files /dev/null and b/tests/65c02-c.bin differ
diff --git a/tests/65c02-c.lst b/tests/65c02-c.lst
new file mode 100644
index 0000000..f347af3
--- /dev/null
+++ b/tests/65c02-c.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0001 = chk_c = 1 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20d102 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20da02 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+02ca : a505 lda DNVZC
+02cc : 450a eor CF
+02ce : 2901 and #1 ; mask off C flag
+ endif
+02d0 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02d1 : a506 A6502 lda AR ; 65C02
+02d3 : 08 php
+02d4 : 68 pla
+02d5 : 8507 sta NF
+02d7 : 8509 sta ZF
+02d9 : 60 rts
+
+02da : 20ab02 S6502 jsr SUB2
+02dd : a506 lda AR
+02df : 08 php
+02e0 : 68 pla
+02e1 : 8507 sta NF
+02e3 : 8509 sta ZF
+02e5 : a503 lda HNVZC
+02e7 : 8508 sta VF
+02e9 : 850a sta CF
+02eb : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02da = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-n.bin b/tests/65c02-n.bin
new file mode 100644
index 0000000..4d81e41
Binary files /dev/null and b/tests/65c02-n.bin differ
diff --git a/tests/65c02-n.lst b/tests/65c02-n.lst
new file mode 100644
index 0000000..1f3429c
--- /dev/null
+++ b/tests/65c02-n.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0001 = chk_n = 1 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20d302 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20dc02 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+02ca : a505 lda DNVZC ; [7] see text
+02cc : 4507 eor NF
+02ce : 2980 and #$80 ; mask off N flag
+02d0 : d000 bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02d2 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02d3 : a506 A6502 lda AR ; 65C02
+02d5 : 08 php
+02d6 : 68 pla
+02d7 : 8507 sta NF
+02d9 : 8509 sta ZF
+02db : 60 rts
+
+02dc : 20ab02 S6502 jsr SUB2
+02df : a506 lda AR
+02e1 : 08 php
+02e2 : 68 pla
+02e3 : 8507 sta NF
+02e5 : 8509 sta ZF
+02e7 : a503 lda HNVZC
+02e9 : 8508 sta VF
+02eb : 850a sta CF
+02ed : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02dc = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-v.bin b/tests/65c02-v.bin
new file mode 100644
index 0000000..fab150e
Binary files /dev/null and b/tests/65c02-v.bin differ
diff --git a/tests/65c02-v.lst b/tests/65c02-v.lst
new file mode 100644
index 0000000..ba8ad3d
--- /dev/null
+++ b/tests/65c02-v.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0001 = chk_v = 1 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20d302 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20dc02 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+02ca : a505 lda DNVZC ; [8] see text
+02cc : 4508 eor VF
+02ce : 2940 and #$40 ; mask off V flag
+02d0 : d000 bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02d2 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02d3 : a506 A6502 lda AR ; 65C02
+02d5 : 08 php
+02d6 : 68 pla
+02d7 : 8507 sta NF
+02d9 : 8509 sta ZF
+02db : 60 rts
+
+02dc : 20ab02 S6502 jsr SUB2
+02df : a506 lda AR
+02e1 : 08 php
+02e2 : 68 pla
+02e3 : 8507 sta NF
+02e5 : 8509 sta ZF
+02e7 : a503 lda HNVZC
+02e9 : 8508 sta VF
+02eb : 850a sta CF
+02ed : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02dc = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-a.bin b/tests/65c02-vld-a.bin
new file mode 100644
index 0000000..7874d9a
Binary files /dev/null and b/tests/65c02-vld-a.bin differ
diff --git a/tests/65c02-vld-a.lst b/tests/65c02-vld-a.lst
new file mode 100644
index 0000000..016fb03
--- /dev/null
+++ b/tests/65c02-vld-a.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20e102 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 20ea02 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+02da : a504 lda DA
+02dc : c506 cmp AR
+02de : d000 bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02e0 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02e1 : a506 A6502 lda AR ; 65C02
+02e3 : 08 php
+02e4 : 68 pla
+02e5 : 8507 sta NF
+02e7 : 8509 sta ZF
+02e9 : 60 rts
+
+02ea : 20bb02 S6502 jsr SUB2
+02ed : a506 lda AR
+02ef : 08 php
+02f0 : 68 pla
+02f1 : 8507 sta NF
+02f3 : 8509 sta ZF
+02f5 : a503 lda HNVZC
+02f7 : 8508 sta VF
+02f9 : 850a sta CF
+02fb : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02ea = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-all.bin b/tests/65c02-vld-all.bin
new file mode 100644
index 0000000..a52d9f2
Binary files /dev/null and b/tests/65c02-vld-all.bin differ
diff --git a/tests/65c02-vld-all.lst b/tests/65c02-vld-all.lst
new file mode 100644
index 0000000..14ba544
--- /dev/null
+++ b/tests/65c02-vld-all.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0001 = chk_n = 1 ; check sign (negative) flag
+0001 = chk_v = 1 ; check overflow flag
+0001 = chk_z = 1 ; check zero flag
+0001 = chk_c = 1 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20ff02 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 200803 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+02da : a504 lda DA
+02dc : c506 cmp AR
+02de : d01e bne C1
+ endif
+ if chk_n = 1
+02e0 : a505 lda DNVZC ; [7] see text
+02e2 : 4507 eor NF
+02e4 : 2980 and #$80 ; mask off N flag
+02e6 : d016 bne C1
+ endif
+ if chk_v = 1
+02e8 : a505 lda DNVZC ; [8] see text
+02ea : 4508 eor VF
+02ec : 2940 and #$40 ; mask off V flag
+02ee : d00e bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+02f0 : a505 lda DNVZC
+02f2 : 4509 eor ZF ; mask off Z flag
+02f4 : 2902 and #2
+02f6 : d006 bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+02f8 : a505 lda DNVZC
+02fa : 450a eor CF
+02fc : 2901 and #1 ; mask off C flag
+ endif
+02fe : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02ff : a506 A6502 lda AR ; 65C02
+0301 : 08 php
+0302 : 68 pla
+0303 : 8507 sta NF
+0305 : 8509 sta ZF
+0307 : 60 rts
+
+0308 : 20bb02 S6502 jsr SUB2
+030b : a506 lda AR
+030d : 08 php
+030e : 68 pla
+030f : 8507 sta NF
+0311 : 8509 sta ZF
+0313 : a503 lda HNVZC
+0315 : 8508 sta VF
+0317 : 850a sta CF
+0319 : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+0308 = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-c.bin b/tests/65c02-vld-c.bin
new file mode 100644
index 0000000..050f3bb
Binary files /dev/null and b/tests/65c02-vld-c.bin differ
diff --git a/tests/65c02-vld-c.lst b/tests/65c02-vld-c.lst
new file mode 100644
index 0000000..6617fe1
--- /dev/null
+++ b/tests/65c02-vld-c.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0001 = chk_c = 1 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20e102 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 20ea02 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+02da : a505 lda DNVZC
+02dc : 450a eor CF
+02de : 2901 and #1 ; mask off C flag
+ endif
+02e0 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02e1 : a506 A6502 lda AR ; 65C02
+02e3 : 08 php
+02e4 : 68 pla
+02e5 : 8507 sta NF
+02e7 : 8509 sta ZF
+02e9 : 60 rts
+
+02ea : 20bb02 S6502 jsr SUB2
+02ed : a506 lda AR
+02ef : 08 php
+02f0 : 68 pla
+02f1 : 8507 sta NF
+02f3 : 8509 sta ZF
+02f5 : a503 lda HNVZC
+02f7 : 8508 sta VF
+02f9 : 850a sta CF
+02fb : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02ea = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-n.bin b/tests/65c02-vld-n.bin
new file mode 100644
index 0000000..7874d9a
Binary files /dev/null and b/tests/65c02-vld-n.bin differ
diff --git a/tests/65c02-vld-n.lst b/tests/65c02-vld-n.lst
new file mode 100644
index 0000000..016fb03
--- /dev/null
+++ b/tests/65c02-vld-n.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0001 = chk_a = 1 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20e102 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 20ea02 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+02da : a504 lda DA
+02dc : c506 cmp AR
+02de : d000 bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02e0 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02e1 : a506 A6502 lda AR ; 65C02
+02e3 : 08 php
+02e4 : 68 pla
+02e5 : 8507 sta NF
+02e7 : 8509 sta ZF
+02e9 : 60 rts
+
+02ea : 20bb02 S6502 jsr SUB2
+02ed : a506 lda AR
+02ef : 08 php
+02f0 : 68 pla
+02f1 : 8507 sta NF
+02f3 : 8509 sta ZF
+02f5 : a503 lda HNVZC
+02f7 : 8508 sta VF
+02f9 : 850a sta CF
+02fb : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02ea = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-v.bin b/tests/65c02-vld-v.bin
new file mode 100644
index 0000000..ea02ef8
Binary files /dev/null and b/tests/65c02-vld-v.bin differ
diff --git a/tests/65c02-vld-v.lst b/tests/65c02-vld-v.lst
new file mode 100644
index 0000000..e856389
--- /dev/null
+++ b/tests/65c02-vld-v.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0001 = chk_v = 1 ; check overflow flag
+0000 = chk_z = 0 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20e302 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 20ec02 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+02da : a505 lda DNVZC ; [8] see text
+02dc : 4508 eor VF
+02de : 2940 and #$40 ; mask off V flag
+02e0 : d000 bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+ lda DNVZC
+ eor ZF ; mask off Z flag
+ and #2
+ bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02e2 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02e3 : a506 A6502 lda AR ; 65C02
+02e5 : 08 php
+02e6 : 68 pla
+02e7 : 8507 sta NF
+02e9 : 8509 sta ZF
+02eb : 60 rts
+
+02ec : 20bb02 S6502 jsr SUB2
+02ef : a506 lda AR
+02f1 : 08 php
+02f2 : 68 pla
+02f3 : 8507 sta NF
+02f5 : 8509 sta ZF
+02f7 : a503 lda HNVZC
+02f9 : 8508 sta VF
+02fb : 850a sta CF
+02fd : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02ec = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-vld-z.bin b/tests/65c02-vld-z.bin
new file mode 100644
index 0000000..807899c
Binary files /dev/null and b/tests/65c02-vld-z.bin differ
diff --git a/tests/65c02-vld-z.lst b/tests/65c02-vld-z.lst
new file mode 100644
index 0000000..8b03124
--- /dev/null
+++ b/tests/65c02-vld-z.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0001 = chk_z = 1 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+020e : c90a cmp #$0a
+0210 : b03e bcs NEXT2
+ endif
+0212 : 850e sta N2L
+0214 : a501 lda N2 ; N2H = N2 & $F0
+0216 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+0218 : c9a0 cmp #$a0
+021a : b034 bcs NEXT2
+ endif
+021c : 850f sta N2H
+021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0220 : 8510 sta N2H+1
+0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+0224 : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+0226 : c90a cmp #$0a
+0228 : b022 bcs NEXT1
+ endif
+022a : 850c sta N1L
+022c : a500 lda N1 ; N1H = N1 & $F0
+022e : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+0230 : c9a0 cmp #$a0
+0232 : b018 bcs NEXT1
+ endif
+0234 : 850d sta N1H
+0236 : 205c02 jsr ADD
+0239 : 20e302 jsr A6502
+023c : 20da02 jsr COMPARE
+023f : d01a bne DONE
+0241 : 20a002 jsr SUB
+0244 : 20ec02 jsr S6502
+0247 : 20da02 jsr COMPARE
+024a : d00f bne DONE
+024c : e600 NEXT1 inc N1 ; [5] see text
+024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
+0250 : e601 NEXT2 inc N2 ; [6] see text
+0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
+0254 : 88 dey
+0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
+0257 : a900 lda #0 ; test passed, so store 0 in ERROR
+0259 : 850b sta ERROR
+025b : DONE
+ end_of_test
+025b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+025c : f8 ADD sed ; decimal mode
+025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025f : a500 lda N1
+0261 : 6501 adc N2
+0263 : 8504 sta DA ; actual accumulator result in decimal mode
+0265 : 08 php
+0266 : 68 pla
+0267 : 8505 sta DNVZC ; actual flags result in decimal mode
+0269 : d8 cld ; binary mode
+026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+026c : a500 lda N1
+026e : 6501 adc N2
+0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0272 : 08 php
+0273 : 68 pla
+0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0276 : c001 cpy #1
+0278 : a50c lda N1L
+027a : 650e adc N2L
+027c : c90a cmp #$0A
+027e : a200 ldx #0
+0280 : 9006 bcc A1
+0282 : e8 inx
+0283 : 6905 adc #5 ; add 6 (carry is set)
+0285 : 290f and #$0F
+0287 : 38 sec
+0288 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+028a : 750f adc N2H,x
+028c : 08 php
+028d : b004 bcs A2
+028f : c9a0 cmp #$A0
+0291 : 9003 bcc A3
+0293 : 695f A2 adc #$5F ; add $60 (carry is set)
+0295 : 38 sec
+0296 : 8506 A3 sta AR ; predicted accumulator result
+0298 : 08 php
+0299 : 68 pla
+029a : 850a sta CF ; predicted carry result
+029c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+029d : 8508 sta VF ; predicted V flags
+029f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+02a0 : f8 SUB sed ; decimal mode
+02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a3 : a500 lda N1
+02a5 : e501 sbc N2
+02a7 : 8504 sta DA ; actual accumulator result in decimal mode
+02a9 : 08 php
+02aa : 68 pla
+02ab : 8505 sta DNVZC ; actual flags result in decimal mode
+02ad : d8 cld ; binary mode
+02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02b0 : a500 lda N1
+02b2 : e501 sbc N2
+02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02b6 : 08 php
+02b7 : 68 pla
+02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02ba : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02bd : a50c lda N1L
+02bf : e50e sbc N2L
+02c1 : a200 ldx #0
+02c3 : b004 bcs S21
+02c5 : e8 inx
+02c6 : 290f and #$0F
+02c8 : 18 clc
+02c9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02cb : f50f sbc N2H,x
+02cd : b002 bcs S22
+02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02d1 : e000 S22 cpx #0
+02d3 : f002 beq S23
+02d5 : e906 sbc #6
+02d7 : 8506 S23 sta AR ; predicted accumulator result
+02d9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02da : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+02da : a505 lda DNVZC
+02dc : 4509 eor ZF ; mask off Z flag
+02de : 2902 and #2
+02e0 : d000 bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02e2 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02e3 : a506 A6502 lda AR ; 65C02
+02e5 : 08 php
+02e6 : 68 pla
+02e7 : 8507 sta NF
+02e9 : 8509 sta ZF
+02eb : 60 rts
+
+02ec : 20bb02 S6502 jsr SUB2
+02ef : a506 lda AR
+02f1 : 08 php
+02f2 : 68 pla
+02f3 : 8507 sta NF
+02f5 : 8509 sta ZF
+02f7 : a503 lda HNVZC
+02f9 : 8508 sta VF
+02fb : 850a sta CF
+02fd : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02ec = end TEST
+
+No errors in pass 2.
diff --git a/tests/65c02-z.bin b/tests/65c02-z.bin
new file mode 100644
index 0000000..cc823ca
Binary files /dev/null and b/tests/65c02-z.bin differ
diff --git a/tests/65c02-z.lst b/tests/65c02-z.lst
new file mode 100644
index 0000000..fee677a
--- /dev/null
+++ b/tests/65c02-z.lst
@@ -0,0 +1,363 @@
+AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
+----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
+
+355 lines read, no errors in pass 1.
+ ; Verify decimal mode behavior
+ ; Written by Bruce Clark. This code is public domain.
+ ; see http://www.6502.org/tutorials/decimal_mode.html
+ ;
+ ; Returns:
+ ; ERROR = 0 if the test passed
+ ; ERROR = 1 if the test failed
+ ; modify the code at the DONE label for desired program end
+ ;
+ ; This routine requires 17 bytes of RAM -- 1 byte each for:
+ ; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+ ; and 2 bytes for N2H
+ ;
+ ; Variables:
+ ; N1 and N2 are the two numbers to be added or subtracted
+ ; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+ ; DA and DNVZC are the actual accumulator and flag results in decimal mode
+ ; HA and HNVZC are the accumulator and flag results when N1 and N2 are
+ ; added or subtracted using binary arithmetic
+ ; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+ ; flag results, calculated using binary arithmetic
+ ;
+ ; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+ ; a 65C02 than a 6502 or 65816)
+ ;
+
+ ; Configuration:
+0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
+0000 = vld_bcd = 0 ; 0 = allow invalid bcd, 1 = valid bcd only
+0000 = chk_a = 0 ; check accumulator
+0000 = chk_n = 0 ; check sign (negative) flag
+0000 = chk_v = 0 ; check overflow flag
+0001 = chk_z = 1 ; check zero flag
+0000 = chk_c = 0 ; check carry flag
+
+ end_of_test macro
+ db $db ;execute 65C02 stop instruction
+ endm
+
+ bss
+0000 = org 0
+ ; operands - register Y = carry in
+0000 = N1 ds 1
+0001 = N2 ds 1
+ ; binary result
+0002 = HA ds 1
+0003 = HNVZC ds 1
+ ;04
+ ; decimal result
+0004 = DA ds 1
+0005 = DNVZC ds 1
+ ; predicted results
+0006 = AR ds 1
+0007 = NF ds 1
+ ;08
+0008 = VF ds 1
+0009 = ZF ds 1
+000a = CF ds 1
+000b = ERROR ds 1
+ ;0C
+ ; workspace
+000c = N1L ds 1
+000d = N1H ds 1
+000e = N2L ds 1
+000f = N2H ds 2
+
+ code
+0200 = org $200
+0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
+0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
+0204 : a900 lda #0 ; initialize N1 and N2
+0206 : 8500 sta N1
+0208 : 8501 sta N2
+020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
+020c : 290f and #$0F ; [1] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT2
+ endif
+020e : 850e sta N2L
+0210 : a501 lda N2 ; N2H = N2 & $F0
+0212 : 29f0 and #$F0 ; [2] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT2
+ endif
+0214 : 850f sta N2H
+0216 : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
+0218 : 8510 sta N2H+1
+021a : a500 LOOP2 lda N1 ; N1L = N1 & $0F
+021c : 290f and #$0F ; [3] see text
+ if vld_bcd = 1
+ cmp #$0a
+ bcs NEXT1
+ endif
+021e : 850c sta N1L
+0220 : a500 lda N1 ; N1H = N1 & $F0
+0222 : 29f0 and #$F0 ; [4] see text
+ if vld_bcd = 1
+ cmp #$a0
+ bcs NEXT1
+ endif
+0224 : 850d sta N1H
+0226 : 204c02 jsr ADD
+0229 : 20d302 jsr A6502
+022c : 20ca02 jsr COMPARE
+022f : d01a bne DONE
+0231 : 209002 jsr SUB
+0234 : 20dc02 jsr S6502
+0237 : 20ca02 jsr COMPARE
+023a : d00f bne DONE
+023c : e600 NEXT1 inc N1 ; [5] see text
+023e : d0da bne LOOP2 ; loop through all 256 values of N1
+0240 : e601 NEXT2 inc N2 ; [6] see text
+0242 : d0c6 bne LOOP1 ; loop through all 256 values of N2
+0244 : 88 dey
+0245 : 10c3 bpl LOOP1 ; loop through both values of the carry flag
+0247 : a900 lda #0 ; test passed, so store 0 in ERROR
+0249 : 850b sta ERROR
+024b : DONE
+ end_of_test
+024b : db > db $db ;execute 65C02 stop instruction
+
+
+ ; Calculate the actual decimal mode accumulator and flags, the accumulator
+ ; and flag results when N1 is added to N2 using binary arithmetic, the
+ ; predicted accumulator result, the predicted carry flag, and the predicted
+ ; V flag
+ ;
+024c : f8 ADD sed ; decimal mode
+024d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+024f : a500 lda N1
+0251 : 6501 adc N2
+0253 : 8504 sta DA ; actual accumulator result in decimal mode
+0255 : 08 php
+0256 : 68 pla
+0257 : 8505 sta DNVZC ; actual flags result in decimal mode
+0259 : d8 cld ; binary mode
+025a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+025c : a500 lda N1
+025e : 6501 adc N2
+0260 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
+
+0262 : 08 php
+0263 : 68 pla
+0264 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
+0266 : c001 cpy #1
+0268 : a50c lda N1L
+026a : 650e adc N2L
+026c : c90a cmp #$0A
+026e : a200 ldx #0
+0270 : 9006 bcc A1
+0272 : e8 inx
+0273 : 6905 adc #5 ; add 6 (carry is set)
+0275 : 290f and #$0F
+0277 : 38 sec
+0278 : 050d A1 ora N1H
+ ;
+ ; if N1L + N2L < $0A, then add N2 & $F0
+ ; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+ ;
+027a : 750f adc N2H,x
+027c : 08 php
+027d : b004 bcs A2
+027f : c9a0 cmp #$A0
+0281 : 9003 bcc A3
+0283 : 695f A2 adc #$5F ; add $60 (carry is set)
+0285 : 38 sec
+0286 : 8506 A3 sta AR ; predicted accumulator result
+0288 : 08 php
+0289 : 68 pla
+028a : 850a sta CF ; predicted carry result
+028c : 68 pla
+ ;
+ ; note that all 8 bits of the P register are stored in VF
+ ;
+028d : 8508 sta VF ; predicted V flags
+028f : 60 rts
+
+ ; Calculate the actual decimal mode accumulator and flags, and the
+ ; accumulator and flag results when N2 is subtracted from N1 using binary
+ ; arithmetic
+ ;
+0290 : f8 SUB sed ; decimal mode
+0291 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+0293 : a500 lda N1
+0295 : e501 sbc N2
+0297 : 8504 sta DA ; actual accumulator result in decimal mode
+0299 : 08 php
+029a : 68 pla
+029b : 8505 sta DNVZC ; actual flags result in decimal mode
+029d : d8 cld ; binary mode
+029e : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02a0 : a500 lda N1
+02a2 : e501 sbc N2
+02a4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
+
+02a6 : 08 php
+02a7 : 68 pla
+02a8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
+02aa : 60 rts
+
+ if cputype != 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65816
+ ;
+ SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+ lda N1L
+ sbc N2L
+ ldx #0
+ bcs S11
+ inx
+ sbc #5 ; subtract 6 (carry is clear)
+ and #$0F
+ clc
+ S11 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+ sbc N2H,x
+ bcs S12
+ sbc #$5F ; subtract $60 (carry is clear)
+ S12 sta AR
+ rts
+ endif
+
+ if cputype = 1
+ ; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+ ;
+02ab : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
+02ad : a50c lda N1L
+02af : e50e sbc N2L
+02b1 : a200 ldx #0
+02b3 : b004 bcs S21
+02b5 : e8 inx
+02b6 : 290f and #$0F
+02b8 : 18 clc
+02b9 : 050d S21 ora N1H
+ ;
+ ; if N1L - N2L >= 0, then subtract N2 & $F0
+ ; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+ ;
+02bb : f50f sbc N2H,x
+02bd : b002 bcs S22
+02bf : e95f sbc #$5F ; subtract $60 (carry is clear)
+02c1 : e000 S22 cpx #0
+02c3 : f002 beq S23
+02c5 : e906 sbc #6
+02c7 : 8506 S23 sta AR ; predicted accumulator result
+02c9 : 60 rts
+ endif
+
+ ; Compare accumulator actual results to predicted results
+ ;
+ ; Return:
+ ; Z flag = 1 (BEQ branch) if same
+ ; Z flag = 0 (BNE branch) if different
+ ;
+02ca : COMPARE
+ if chk_a = 1
+ lda DA
+ cmp AR
+ bne C1
+ endif
+ if chk_n = 1
+ lda DNVZC ; [7] see text
+ eor NF
+ and #$80 ; mask off N flag
+ bne C1
+ endif
+ if chk_v = 1
+ lda DNVZC ; [8] see text
+ eor VF
+ and #$40 ; mask off V flag
+ bne C1 ; [9] see text
+ endif
+ if chk_z = 1
+02ca : a505 lda DNVZC
+02cc : 4509 eor ZF ; mask off Z flag
+02ce : 2902 and #2
+02d0 : d000 bne C1 ; [10] see text
+ endif
+ if chk_c = 1
+ lda DNVZC
+ eor CF
+ and #1 ; mask off C flag
+ endif
+02d2 : 60 C1 rts
+
+ ; These routines store the predicted values for ADC and SBC for the 6502,
+ ; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+ if cputype = 0
+
+ A6502 lda VF ; 6502
+ ;
+ ; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+ ; the N flag for NF
+ ;
+ sta NF
+ lda HNVZC
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda HNVZC
+ sta NF
+ sta VF
+ sta ZF
+ sta CF
+ rts
+
+ endif
+ if cputype = 1
+
+02d3 : a506 A6502 lda AR ; 65C02
+02d5 : 08 php
+02d6 : 68 pla
+02d7 : 8507 sta NF
+02d9 : 8509 sta ZF
+02db : 60 rts
+
+02dc : 20ab02 S6502 jsr SUB2
+02df : a506 lda AR
+02e1 : 08 php
+02e2 : 68 pla
+02e3 : 8507 sta NF
+02e5 : 8509 sta ZF
+02e7 : a503 lda HNVZC
+02e9 : 8508 sta VF
+02eb : 850a sta CF
+02ed : 60 rts
+
+ endif
+ if cputype = 2
+
+ A6502 lda AR ; 65C816
+ php
+ pla
+ sta NF
+ sta ZF
+ rts
+
+ S6502 jsr SUB1
+ lda AR
+ php
+ pla
+ sta NF
+ sta ZF
+ lda HNVZC
+ sta VF
+ sta CF
+ rts
+
+ endif
+
+02dc = end TEST
+
+No errors in pass 2.
diff --git a/util/testharness.cpp b/util/testharness.cpp
index 1c1a718..5e91d3d 100644
--- a/util/testharness.cpp
+++ b/util/testharness.cpp
@@ -1,19 +1,16 @@
#include
#include
#include
+#include
+#include
+#include
#include "cpu.h"
#include "mmu.h"
-#ifdef BASICTEST
-#include "6502_functional_test.h"
-#elif defined(VERBOSETEST)
-#include "6502_functional_test_2.h"
-#elif defined(EXTENDEDTEST)
-#include "65C02_extended_opcodes_test.h"
-#else
-#error undefined test - specify one of BASICTEST, VERBOSETEST, or EXTENDEDTEST
-#endif
+bool running = true;
+bool verbose = false;
+unsigned long startpc = 0x400;
class TestMMU : public MMU {
public:
@@ -22,43 +19,98 @@ public:
virtual void Reset() {}
- virtual uint8_t read(uint16_t mem) { if (mem == 0xBFF0) { return 'R'; } return ram[mem];}
+ virtual uint8_t read(uint16_t mem) { if (mem == 0xBFF0 || mem == 0xF001) { return 'R'; } return ram[mem];}
virtual void write(uint16_t mem, uint8_t val) {
- if (mem == 0xBFF0) {printf("%c", val); return;}
-#if defined(EXTENDEDTEST)
- if (mem == 0x202) {printf("Start test %d\n", val);}
-#else
- if (mem == 0x200) {printf("Start test %d\n", val);}
-#endif
+ if (mem == 0xBFF0 || mem == 0xF001) {printf("%c", val); return;}
+ if (mem == 0x202 || mem == 0x200) {
+ if (val == 240) { printf("All tests successful!\n"); running = 0; }
+ printf("Start test %d\n", val);
+ }
ram[mem] = val;}
virtual uint8_t readDirect(uint16_t address, uint8_t fromPage) { return read(address);}
+ virtual bool Serialize(int8_t fd) { return false; }
+ virtual bool Deserialize(int8_t fd) { return false; }
+
uint8_t ram[65536];
};
+class FileManager;
+
+FileManager *g_filemanager = NULL;
Cpu cpu;
TestMMU mmu;
int main(int argc, char *argv[])
{
+ int ch;
+ int fd = -1;
+
+ while ((ch = getopt(argc, argv, "f:vs:")) != -1) {
+ switch (ch) {
+ case 's':
+ if (optarg[0] == '0' &&
+ optarg[1] == 'x') {
+ startpc = strtol(optarg+2, NULL, 16);
+ } else {
+ startpc = strtol(optarg, NULL, 10);
+ }
+ break;
+ case 'v':
+ verbose = true;
+ break;
+ case 'f':
+ {
+ if ((fd = open(optarg, O_RDONLY, 0)) < 0) {
+ fprintf(stderr, "%s: %s\n", optarg, strerror(errno));
+ exit(1);
+ }
+ }
+ break;
+ }
+ }
+
+ if (fd == -1) {
+ fprintf(stderr, "Missing '-f '\n");
+ exit(1);
+ }
+
cpu.SetMMU(&mmu);
cpu.rst();
- // Load the 6502 functional test
- memcpy(mmu.ram, functest, 0x10000);
- cpu.pc = 0x400;
+
+ ssize_t s;
+ char c;
+ unsigned long pos = 0;
+ while ((s = read(fd, &c, 1)) == 1) {
+ mmu.ram[pos] = c;
+ pos ++;
+ }
+
+ cpu.pc = startpc;
// cpu.Reset();
time_t startTime = time(NULL);
// call cpu.Run() in the worst possible way (most overhead)
- for (uint32_t i=0; i<1000000000; i++) {
+ for (uint32_t i=0; running && i<1000000000; i++) {
+ if (cpu.pc == 0x453a) {
+ printf("Somehow wound up at input routine; exiting\n");
+ exit(1);
+ }
+
+ int o = mmu.read(cpu.pc);
+ if (o == 0xDB) {
+ // end of the decimal mode tests
+ int result = mmu.read(0x0b);
+ printf("Test complete. Result: %s\n", result ? "failed" : "passed");
+ exit(1);
+ }
+
cpu.Run(1);
-#if 0
- if (cpu.pc < 0x477F) {
- printf("%llu OP $%.2X #%d 0x%.2X X 0x%.2X Y 0x%.2X A 0x%.2X SP 0x%.2X S 0x%.2X\n", cpu.cycles, mmu.read(cpu.pc), mmu.read(0x200), cpu.pc, cpu.x, cpu.y, cpu.a, cpu.sp, cpu.flags);
+ if (verbose) {
+ printf("time %u PC $%.4X OP $%.2X mem200 #%d mem202 #%d X 0x%.2X Y 0x%.2X A 0x%.2X SP 0x%.2X Status 0x%.2X\n", cpu.cycles, cpu.pc, mmu.read(cpu.pc), mmu.read(0x200), mmu.read(0x202), cpu.x, cpu.y, cpu.a, cpu.sp, cpu.flags);
}
-#endif
}
time_t endTime = time(NULL);