mirror of https://github.com/JorjBauer/aiie.git
364 lines
18 KiB
Plaintext
364 lines
18 KiB
Plaintext
AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
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----------------------------------------------------- 6502_decimal_test.a65 ------------------------------------------------------
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355 lines read, no errors in pass 1.
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; Verify decimal mode behavior
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; Written by Bruce Clark. This code is public domain.
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; see http://www.6502.org/tutorials/decimal_mode.html
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;
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; Returns:
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; ERROR = 0 if the test passed
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; ERROR = 1 if the test failed
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; modify the code at the DONE label for desired program end
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;
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; This routine requires 17 bytes of RAM -- 1 byte each for:
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; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
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; and 2 bytes for N2H
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;
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; Variables:
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; N1 and N2 are the two numbers to be added or subtracted
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; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
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; DA and DNVZC are the actual accumulator and flag results in decimal mode
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; HA and HNVZC are the accumulator and flag results when N1 and N2 are
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; added or subtracted using binary arithmetic
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; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
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; flag results, calculated using binary arithmetic
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;
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; This program takes approximately 1 minute at 1 MHz (a few seconds more on
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; a 65C02 than a 6502 or 65816)
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;
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; Configuration:
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0001 = cputype = 1 ; 0 = 6502, 1 = 65C02, 2 = 65C816
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0001 = vld_bcd = 1 ; 0 = allow invalid bcd, 1 = valid bcd only
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0000 = chk_a = 0 ; check accumulator
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0000 = chk_n = 0 ; check sign (negative) flag
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0000 = chk_v = 0 ; check overflow flag
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0000 = chk_z = 0 ; check zero flag
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0001 = chk_c = 1 ; check carry flag
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end_of_test macro
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db $db ;execute 65C02 stop instruction
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endm
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bss
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0000 = org 0
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; operands - register Y = carry in
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0000 = N1 ds 1
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0001 = N2 ds 1
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; binary result
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0002 = HA ds 1
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0003 = HNVZC ds 1
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;04
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; decimal result
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0004 = DA ds 1
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0005 = DNVZC ds 1
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; predicted results
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0006 = AR ds 1
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0007 = NF ds 1
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;08
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0008 = VF ds 1
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0009 = ZF ds 1
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000a = CF ds 1
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000b = ERROR ds 1
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;0C
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; workspace
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000c = N1L ds 1
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000d = N1H ds 1
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000e = N2L ds 1
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000f = N2H ds 2
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code
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0200 = org $200
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0200 : a001 TEST ldy #1 ; initialize Y (used to loop through carry flag values)
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0202 : 840b sty ERROR ; store 1 in ERROR until the test passes
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0204 : a900 lda #0 ; initialize N1 and N2
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0206 : 8500 sta N1
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0208 : 8501 sta N2
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020a : a501 LOOP1 lda N2 ; N2L = N2 & $0F
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020c : 290f and #$0F ; [1] see text
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if vld_bcd = 1
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020e : c90a cmp #$0a
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0210 : b03e bcs NEXT2
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endif
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0212 : 850e sta N2L
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0214 : a501 lda N2 ; N2H = N2 & $F0
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0216 : 29f0 and #$F0 ; [2] see text
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if vld_bcd = 1
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0218 : c9a0 cmp #$a0
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021a : b034 bcs NEXT2
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endif
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021c : 850f sta N2H
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021e : 090f ora #$0F ; N2H+1 = (N2 & $F0) + $0F
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0220 : 8510 sta N2H+1
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0222 : a500 LOOP2 lda N1 ; N1L = N1 & $0F
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0224 : 290f and #$0F ; [3] see text
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if vld_bcd = 1
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0226 : c90a cmp #$0a
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0228 : b022 bcs NEXT1
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endif
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022a : 850c sta N1L
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022c : a500 lda N1 ; N1H = N1 & $F0
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022e : 29f0 and #$F0 ; [4] see text
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if vld_bcd = 1
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0230 : c9a0 cmp #$a0
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0232 : b018 bcs NEXT1
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endif
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0234 : 850d sta N1H
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0236 : 205c02 jsr ADD
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0239 : 20e102 jsr A6502
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023c : 20da02 jsr COMPARE
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023f : d01a bne DONE
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0241 : 20a002 jsr SUB
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0244 : 20ea02 jsr S6502
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0247 : 20da02 jsr COMPARE
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024a : d00f bne DONE
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024c : e600 NEXT1 inc N1 ; [5] see text
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024e : d0d2 bne LOOP2 ; loop through all 256 values of N1
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0250 : e601 NEXT2 inc N2 ; [6] see text
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0252 : d0b6 bne LOOP1 ; loop through all 256 values of N2
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0254 : 88 dey
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0255 : 10b3 bpl LOOP1 ; loop through both values of the carry flag
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0257 : a900 lda #0 ; test passed, so store 0 in ERROR
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0259 : 850b sta ERROR
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025b : DONE
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end_of_test
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025b : db > db $db ;execute 65C02 stop instruction
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; Calculate the actual decimal mode accumulator and flags, the accumulator
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; and flag results when N1 is added to N2 using binary arithmetic, the
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; predicted accumulator result, the predicted carry flag, and the predicted
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; V flag
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;
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025c : f8 ADD sed ; decimal mode
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025d : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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025f : a500 lda N1
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0261 : 6501 adc N2
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0263 : 8504 sta DA ; actual accumulator result in decimal mode
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0265 : 08 php
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0266 : 68 pla
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0267 : 8505 sta DNVZC ; actual flags result in decimal mode
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0269 : d8 cld ; binary mode
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026a : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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026c : a500 lda N1
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026e : 6501 adc N2
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0270 : 8502 sta HA ; accumulator result of N1+N2 using binary arithmetic
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0272 : 08 php
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0273 : 68 pla
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0274 : 8503 sta HNVZC ; flags result of N1+N2 using binary arithmetic
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0276 : c001 cpy #1
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0278 : a50c lda N1L
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027a : 650e adc N2L
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027c : c90a cmp #$0A
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027e : a200 ldx #0
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0280 : 9006 bcc A1
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0282 : e8 inx
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0283 : 6905 adc #5 ; add 6 (carry is set)
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0285 : 290f and #$0F
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0287 : 38 sec
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0288 : 050d A1 ora N1H
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;
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; if N1L + N2L < $0A, then add N2 & $F0
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; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
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;
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028a : 750f adc N2H,x
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028c : 08 php
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028d : b004 bcs A2
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028f : c9a0 cmp #$A0
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0291 : 9003 bcc A3
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0293 : 695f A2 adc #$5F ; add $60 (carry is set)
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0295 : 38 sec
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0296 : 8506 A3 sta AR ; predicted accumulator result
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0298 : 08 php
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0299 : 68 pla
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029a : 850a sta CF ; predicted carry result
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029c : 68 pla
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;
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; note that all 8 bits of the P register are stored in VF
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;
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029d : 8508 sta VF ; predicted V flags
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029f : 60 rts
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; Calculate the actual decimal mode accumulator and flags, and the
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; accumulator and flag results when N2 is subtracted from N1 using binary
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; arithmetic
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;
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02a0 : f8 SUB sed ; decimal mode
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02a1 : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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02a3 : a500 lda N1
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02a5 : e501 sbc N2
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02a7 : 8504 sta DA ; actual accumulator result in decimal mode
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02a9 : 08 php
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02aa : 68 pla
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02ab : 8505 sta DNVZC ; actual flags result in decimal mode
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02ad : d8 cld ; binary mode
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02ae : c001 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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02b0 : a500 lda N1
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02b2 : e501 sbc N2
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02b4 : 8502 sta HA ; accumulator result of N1-N2 using binary arithmetic
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02b6 : 08 php
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02b7 : 68 pla
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02b8 : 8503 sta HNVZC ; flags result of N1-N2 using binary arithmetic
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02ba : 60 rts
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if cputype != 1
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; Calculate the predicted SBC accumulator result for the 6502 and 65816
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;
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SUB1 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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lda N1L
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sbc N2L
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ldx #0
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bcs S11
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inx
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sbc #5 ; subtract 6 (carry is clear)
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and #$0F
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clc
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S11 ora N1H
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;
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; if N1L - N2L >= 0, then subtract N2 & $F0
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; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
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;
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sbc N2H,x
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bcs S12
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sbc #$5F ; subtract $60 (carry is clear)
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S12 sta AR
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rts
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endif
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if cputype = 1
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; Calculate the predicted SBC accumulator result for the 6502 and 65C02
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;
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02bb : c001 SUB2 cpy #1 ; set carry if Y = 1, clear carry if Y = 0
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02bd : a50c lda N1L
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02bf : e50e sbc N2L
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02c1 : a200 ldx #0
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02c3 : b004 bcs S21
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02c5 : e8 inx
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02c6 : 290f and #$0F
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02c8 : 18 clc
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02c9 : 050d S21 ora N1H
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;
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; if N1L - N2L >= 0, then subtract N2 & $F0
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; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
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;
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02cb : f50f sbc N2H,x
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02cd : b002 bcs S22
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02cf : e95f sbc #$5F ; subtract $60 (carry is clear)
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02d1 : e000 S22 cpx #0
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02d3 : f002 beq S23
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02d5 : e906 sbc #6
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02d7 : 8506 S23 sta AR ; predicted accumulator result
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02d9 : 60 rts
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endif
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; Compare accumulator actual results to predicted results
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;
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; Return:
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; Z flag = 1 (BEQ branch) if same
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; Z flag = 0 (BNE branch) if different
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;
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02da : COMPARE
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if chk_a = 1
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lda DA
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cmp AR
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bne C1
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endif
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if chk_n = 1
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lda DNVZC ; [7] see text
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eor NF
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and #$80 ; mask off N flag
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bne C1
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endif
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if chk_v = 1
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lda DNVZC ; [8] see text
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eor VF
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and #$40 ; mask off V flag
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bne C1 ; [9] see text
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endif
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if chk_z = 1
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lda DNVZC
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eor ZF ; mask off Z flag
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and #2
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bne C1 ; [10] see text
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endif
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if chk_c = 1
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02da : a505 lda DNVZC
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02dc : 450a eor CF
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02de : 2901 and #1 ; mask off C flag
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endif
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02e0 : 60 C1 rts
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; These routines store the predicted values for ADC and SBC for the 6502,
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; 65C02, and 65816 in AR, CF, NF, VF, and ZF
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if cputype = 0
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A6502 lda VF ; 6502
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;
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; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
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; the N flag for NF
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;
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sta NF
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lda HNVZC
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sta ZF
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rts
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S6502 jsr SUB1
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lda HNVZC
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sta NF
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sta VF
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sta ZF
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sta CF
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rts
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endif
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if cputype = 1
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02e1 : a506 A6502 lda AR ; 65C02
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02e3 : 08 php
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02e4 : 68 pla
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02e5 : 8507 sta NF
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02e7 : 8509 sta ZF
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02e9 : 60 rts
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02ea : 20bb02 S6502 jsr SUB2
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02ed : a506 lda AR
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02ef : 08 php
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02f0 : 68 pla
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02f1 : 8507 sta NF
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02f3 : 8509 sta ZF
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02f5 : a503 lda HNVZC
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02f7 : 8508 sta VF
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02f9 : 850a sta CF
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02fb : 60 rts
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endif
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if cputype = 2
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A6502 lda AR ; 65C816
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php
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pla
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sta NF
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sta ZF
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rts
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S6502 jsr SUB1
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lda AR
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php
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pla
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sta NF
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sta ZF
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lda HNVZC
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sta VF
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sta CF
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rts
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endif
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02ea = end TEST
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No errors in pass 2.
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