mirror of https://github.com/JorjBauer/aiie.git
854 lines
19 KiB
C++
854 lines
19 KiB
C++
#ifdef TEENSYDUINO
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#include <Arduino.h>
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#else
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#include <stdio.h>
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#include <unistd.h>
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#endif
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#include "applemmu.h"
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#include "applemmu-rom.h"
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#include "physicalspeaker.h"
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#include "cpu.h"
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#include "globals.h"
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// apple //e memory map
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/*
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page 0x00: zero page (straight ram)
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page 0x01: stack (straight ram)
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page 0x02:
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page 0x03:
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text/lores page 1: 0x0400 - 0x7FF
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text/lores page 2: 0x0800 - 0xBFF
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pages 0x0C - 0x1F: straight ram
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hires page 1: pages 0x20 - 0x3F
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hires page 2: pages 0x40 - 0x5F
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pages 0x60 - 0xBF: straight ram
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page 0xc0: I/O switches
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pages 0xc1 - 0xcf: slot ROMs
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pages 0xd0 - 0xdf: Basic ROM
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pages 0xe0 - 0xff: monitor ROM
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*/
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AppleMMU::AppleMMU(AppleDisplay *display)
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{
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anyKeyDown = false;
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keyboardStrobe = 0x00;
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isOpenApplePressed = false;
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isClosedApplePressed = false;
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for (int8_t i=0; i<=7; i++) {
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slots[i] = NULL;
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}
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allocateMemory();
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this->display = display;
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this->display->setSwitches(&switches);
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resetRAM(); // initialize RAM, load ROM
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}
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AppleMMU::~AppleMMU()
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{
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delete display;
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// FIXME: clean up the memory we allocated
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}
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void AppleMMU::Reset()
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{
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resetRAM();
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resetDisplay(); // sets the switches properly
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}
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uint8_t AppleMMU::read(uint16_t address)
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{
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if (address >= 0xC000 &&
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address <= 0xC0FF) {
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return readSwitches(address);
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}
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uint8_t res = readPages[(address & 0xFF00) >> 8][address & 0xFF];
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return res;
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}
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// Bypass MMU and read directly from a given page - also bypasses switches
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uint8_t AppleMMU::readDirect(uint16_t address, uint8_t fromPage)
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{
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return ramPages[(address & 0xFF00) >> 8][fromPage][address & 0xFF];
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}
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void AppleMMU::write(uint16_t address, uint8_t v)
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{
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if (address >= 0xC000 &&
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address <= 0xC0FF) {
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return writeSwitches(address, v);
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}
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// Don't allow writes to ROM
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if (address >= 0xC100 && address <= 0xCFFF)
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return;
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if (address >= 0xD000 && address <= 0xFFFF && !writebsr) {
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// memory-protected, so don't allow writes
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return;
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}
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writePages[(address & 0xFF00) >> 8][address & 0xFF] = v;
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if (address >= 0x400 &&
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address <= 0x7FF) {
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display->writeLores(address, v);
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return;
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}
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if (address >= 0x2000 &&
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address <= 0x5FFF) {
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display->writeHires(address, v);
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}
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}
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// FIXME: this is no longer "MMU", is it?
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void AppleMMU::resetDisplay()
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{
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updateMemoryPages();
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display->modeChange();
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}
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void AppleMMU::handleMemorySwitches(uint16_t address, uint16_t lastSwitch)
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{
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// many of these are spelled out here:
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// http://apple2.org.za/gswv/a2zine/faqs/csa2pfaq.html
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switch (address) {
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// These are write-only and perform no action on read
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case 0xC000: // CLR80STORE
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switches &= ~S_80STORE;
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updateMemoryPages();
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break;
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case 0xC001: // SET80STORE
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switches |= S_80STORE;
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updateMemoryPages();
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break;
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case 0xC002: // CLRAUXRD read from main 48k RAM
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auxRamRead = false;
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break;
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case 0xC003: // SETAUXRD read from aux/alt 48k
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auxRamRead = true;
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break;
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case 0xC004: // CLRAUXWR write to main 48k RAM
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auxRamWrite = false;
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break;
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case 0xC005: // SETAUXWR write to aux/alt 48k
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auxRamWrite = true;
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break;
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case 0xC006: // CLRCXROM use ROM on cards
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intcxrom = false;
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break;
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case 0xC007: // SETCXROM use internal ROM
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intcxrom = true;
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break;
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case 0xC008: // CLRAUXZP use main zero page, stack, LC
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altzp = false;
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break;
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case 0xC009: // SETAUXZP use alt zero page, stack, LC
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altzp = true;
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break;
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case 0xC00A: // CLRC3ROM use internal slot 3 ROM
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slot3rom = false;
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break;
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case 0xC00B: // SETC3ROM use external slot 3 ROM
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slot3rom = true;
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break;
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// these are probably read/write ?
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case 0xC080: // READBSR2 and shadow copy
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case 0xC084:
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bank1 = false; // LC RAM bank2, Read and Write-prot RAM
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readbsr = true; // read from bank2
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writebsr = false; // write-protected
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break;
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case 0xC081: // ROMIN
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case 0xC085:
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bank1 = false; // LC RAM bank2, read ROM, write-enable RAM
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readbsr = false; // if it's read twice in a row
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writebsr = writebsr || ((lastSwitch & 0xF3) == (address & 0xF3));
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break;
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case 0xC082:
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case 0xC086:
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bank1 = false; // LC RAM bank2, Read ROM instead of RAM,
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readbsr = false; // WR-protect RAM
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writebsr = false;
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break;
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case 0xC083: // READWRBSR2
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case 0xC087:
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bank1 = false;
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readbsr = true;
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writebsr = writebsr || ((lastSwitch & 0xF3) == (address & 0xF3));
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break;
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case 0xC088: // READBSR1
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case 0xC08C:
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bank1 = true;
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readbsr = true;
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writebsr = false;
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break;
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case 0xC089: // WRITEBSR1
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case 0xC08D:
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bank1 = true;
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readbsr = false;
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writebsr = writebsr || ((lastSwitch & 0xF3) == (address & 0xF3));
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break;
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case 0xC08A: // OFFBSR1
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case 0xC08E:
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bank1 = true;
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readbsr = false;
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writebsr = false;
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break;
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case 0xC08B: // READWRBSR1
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case 0xC08F:
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bank1 = true;
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readbsr = true;
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writebsr = writebsr || ((lastSwitch & 0xF3) == (address & 0xF3));
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break;
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}
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updateMemoryPages();
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}
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// many (most? all?) switches are documented here:
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// http://apple2.org.za/gswv/a2zine/faqs/csa2pfaq.html
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uint8_t AppleMMU::readSwitches(uint16_t address)
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{
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static uint16_t lastReadSwitch = 0x0000;
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static uint16_t thisReadSwitch = 0x0000;
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lastReadSwitch = thisReadSwitch;
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thisReadSwitch = address;
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// If this is a read for any of the slot switches, and we have
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// hardware in that slot, then return its result.
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if (address >= 0xC090 && address <= 0xC0FF) {
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for (uint8_t i=1; i<=7; i++) {
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if (address >= (0xC080 | (i << 4)) &&
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address <= (0xC08F | (i << 4))) {
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if (slots[i]) {
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return slots[i]->readSwitches(address & ~(0xC080 | (i<<4)));
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}
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else
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return FLOATING;
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}
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}
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}
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switch (address) {
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case 0xC010:
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// consume the keyboard strobe flag
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keyboardStrobe &= 0x7F;
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return (anyKeyDown ? 0x80 : 0x00);
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#if 0
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case 0xC000:
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case 0xC001:
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case 0xC002:
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case 0xC003:
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case 0xC004:
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case 0xC005:
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case 0xC006:
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case 0xC007:
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case 0xC008:
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case 0xC009:
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case 0xC00A:
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case 0xC00B:
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// nothing happens in read mode for these, so don't call this:
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// handleMemorySwitches(address, lastReadSwitch);
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case 0xC00C:
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case 0xC00D:
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case 0xC00E:
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case 0xC00F:
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// But according to UTA2E, these ALL return keyboard strobe data.
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// We do that after the switch statement so we get the other affects
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// from reads to these addresses within the switch statement.
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break;
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#endif
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case 0xC080:
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case 0xC081:
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case 0xC082:
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case 0xC083:
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case 0xC084:
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case 0xC085:
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case 0xC086:
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case 0xC087:
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case 0xC088:
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case 0xC089:
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case 0xC08A:
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case 0xC08B:
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case 0xC08C:
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case 0xC08D:
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case 0xC08E:
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case 0xC08F:
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// but read does affect these, same as write
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handleMemorySwitches(address, lastReadSwitch);
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break;
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case 0xC00C: // CLR80VID disable 80-col video mode
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if (switches & S_80COL) {
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switches &= ~S_80COL;
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resetDisplay();
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}
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break;
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case 0xC00D: // SET80VID enable 80-col video mode
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if (!(switches & S_80COL)) {
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switches |= S_80COL;
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resetDisplay();
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}
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break;
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case 0xC00E: // CLRALTCH use main char set - norm LC, flash UC
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switches &= ~S_ALTCH;
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break;
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case 0xC00F: // SETALTCH use alt char set - norm inverse, LC; no flash
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switches |= S_ALTCH;
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break;
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case 0xC011: // RDLCBNK2
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return bank1 ? 0x00 : 0x80;
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case 0xC012: // RDLCRAM
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return readbsr ? 0x80 : 0x00;
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case 0xC013: // RDRAMRD
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return auxRamRead ? 0x80 : 0x00;
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case 0xC014: // RDRAMWR
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return auxRamWrite ? 0x80 : 0x00;
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case 0xC015: // RDCXROM
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return intcxrom ? 0x80 : 0x00;
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case 0xC016: // RDAUXZP
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return altzp ? 0x80 : 0x00;
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case 0xC017: // RDC3ROM
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return slot3rom ? 0x80 : 0x00;
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case 0xC018: // RD80COL
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return (switches & S_80STORE) ? 0x80 : 0x00;
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// 0xC019: RDVBLBAR -- is the vertical blanking low?
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case 0xC01A: // RDTEXT
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return ( (switches & S_TEXT) ? 0x80 : 0x00 );
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case 0xC01B: // RDMIXED
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return ( (switches & S_MIXED) ? 0x80 : 0x00 );
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case 0xC01C: // RDPAGE2
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return ( (switches & S_PAGE2) ? 0x80 : 0x00 );
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case 0xC01D: // RDHIRES
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return ( (switches & S_HIRES) ? 0x80 : 0x00 );
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case 0xC01E: // RDALTCH
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return ( (switches & S_ALTCH) ? 0x80 : 0x00 );
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case 0xC01F: // RD80VID
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return ( (switches & S_80COL) ? 0x80 : 0x00 );
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case 0xC030: // SPEAKER
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g_speaker->toggleAtCycle(g_cpu->cycles);
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break;
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case 0xC050: // CLRTEXT
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if (switches & S_TEXT) {
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switches &= ~S_TEXT;
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resetDisplay();
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}
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return FLOATING;
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case 0xC051: // SETTEXT
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if (!(switches & S_TEXT)) {
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switches |= S_TEXT;
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resetDisplay();
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}
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return FLOATING;
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case 0xC052: // CLRMIXED
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if (switches & S_MIXED) {
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switches &= ~S_MIXED;
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resetDisplay();
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}
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return FLOATING;
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case 0xC053: // SETMIXED
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if (!(switches & S_MIXED)) {
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switches |= S_MIXED;
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resetDisplay();
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}
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return FLOATING;
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case 0xC054: // PAGE1
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if (switches & S_PAGE2) {
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switches &= ~S_PAGE2;
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if (!(switches & S_80COL)) {
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resetDisplay();
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} else {
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updateMemoryPages();
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}
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}
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return FLOATING;
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case 0xC055: // PAGE2
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if (!(switches & S_PAGE2)) {
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switches |= S_PAGE2;
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if (!(switches & S_80COL)) {
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resetDisplay();
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} else {
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updateMemoryPages();
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}
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}
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return FLOATING;
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case 0xC056: // CLRHIRES
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if (switches & S_HIRES) {
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switches &= ~S_HIRES;
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resetDisplay();
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}
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return FLOATING;
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case 0xC057: // SETHIRES
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if (!(switches & S_HIRES)) {
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switches |= S_HIRES;
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resetDisplay();
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}
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return FLOATING;
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case 0xC05E: // DHIRES ON
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if (!(switches & S_DHIRES)) {
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switches |= S_DHIRES;
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resetDisplay();
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}
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return FLOATING;
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case 0xC05F: // DHIRES OFF
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if (switches & S_DHIRES) {
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switches &= ~S_DHIRES;
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resetDisplay();
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}
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return FLOATING;
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// paddles
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case 0xC061: // OPNAPPLE
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return isOpenApplePressed ? 0x80 : 0x00;
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case 0xC062: // CLSAPPLE
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return isClosedApplePressed ? 0x80 : 0x00;
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case 0xC070: // PDLTRIG
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// It doesn't matter if we update readPages or writePages, because 0xC0
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// has only one page.
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readPages[0xC0][0x64] = readPages[0xC0][0x65] = 0xFF;
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g_paddles->startReading();
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return FLOATING;
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}
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if (address >= 0xc000 && address <= 0xc00f) {
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// This is the keyboardStrobe support referenced in the switch statement above.
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return keyboardStrobe;
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}
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return readPages[address >> 8][address & 0xFF];
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}
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void AppleMMU::writeSwitches(uint16_t address, uint8_t v)
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{
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// fixme: combine these with the last read switch
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static uint16_t lastWriteSwitch = 0x0000;
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static uint16_t thisWriteSwitch = 0x0000;
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lastWriteSwitch = thisWriteSwitch;
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thisWriteSwitch = address;
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// If this is a write for any of the slot switches, and we have
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// hardware in that slot, then return its result.
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if (address >= 0xC090 && address <= 0xC0FF) {
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for (uint8_t i=1; i<=7; i++) {
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if (address >= (0xC080 | (i << 4)) &&
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address <= (0xC08F | (i << 4))) {
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if (slots[i]) {
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slots[i]->writeSwitches(address & ~(0xC080 | (i<<4)), v);
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return;
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}
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}
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}
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}
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switch (address) {
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case 0xC010:
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case 0xC011: // Per Understanding the Apple //e, p. 7-3:
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case 0xC012: // a write to any $C01x address causes
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case 0xC013: // a clear of the keyboard strobe.
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case 0xC014:
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case 0xC015:
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case 0xC016:
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case 0xC017:
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case 0xC018:
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case 0xC019:
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case 0xC01A:
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case 0xC01B:
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case 0xC01C:
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case 0xC01D:
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case 0xC01E:
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case 0xC01F:
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keyboardStrobe &= 0x7F;
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return;
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case 0xC050: // graphics mode
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if (switches & S_TEXT) {
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switches &= ~S_TEXT;
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resetDisplay();
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}
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return;
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case 0xC051:
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if (!(switches & S_TEXT)) {
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switches |= S_TEXT;
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resetDisplay();
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}
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return;
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case 0xC052: // "no mixed"
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if (switches & S_MIXED) {
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switches &= ~S_MIXED;
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resetDisplay();
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}
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return;
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case 0xC053: // "mixed"
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if (!(switches & S_MIXED)) {
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switches |= S_MIXED;
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resetDisplay();
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}
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return;
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case 0xC054: // page2 off
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if (switches & S_PAGE2) {
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switches &= ~S_PAGE2;
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if (!(switches & S_80COL)) {
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resetDisplay();
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} else {
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updateMemoryPages();
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}
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}
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return;
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case 0xC055: // page2 on
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if (!(switches & S_PAGE2)) {
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switches |= S_PAGE2;
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if (!(switches & S_80COL)) {
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resetDisplay();
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} else {
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updateMemoryPages();
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}
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}
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return;
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case 0xC056: // hires off
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if (switches & S_HIRES) {
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switches &= ~S_HIRES;
|
|
resetDisplay();
|
|
}
|
|
return;
|
|
|
|
case 0xC057: // hires on
|
|
if (!(switches & S_HIRES)) {
|
|
switches |= S_HIRES;
|
|
resetDisplay();
|
|
}
|
|
return;
|
|
|
|
case 0xC05E: // DHIRES ON
|
|
if (!(switches & S_DHIRES)) {
|
|
switches |= S_DHIRES;
|
|
resetDisplay();
|
|
}
|
|
return;
|
|
|
|
case 0xC05F: // DHIRES OFF
|
|
if (switches & S_DHIRES) {
|
|
switches &= ~S_DHIRES;
|
|
resetDisplay();
|
|
}
|
|
return;
|
|
|
|
// paddles
|
|
case 0xC070:
|
|
g_paddles->startReading();
|
|
writePages[0xC0][0x64] = writePages[0xC0][0x65] = 0xFF;
|
|
break;
|
|
|
|
case 0xC000:
|
|
case 0xC001:
|
|
case 0xC002:
|
|
case 0xC003:
|
|
case 0xC004:
|
|
case 0xC005:
|
|
case 0xC006:
|
|
case 0xC007:
|
|
case 0xC008:
|
|
case 0xC009:
|
|
case 0xC00A:
|
|
case 0xC00B:
|
|
case 0xC080:
|
|
case 0xC081:
|
|
case 0xC082:
|
|
case 0xC083:
|
|
case 0xC084:
|
|
case 0xC085:
|
|
case 0xC086:
|
|
case 0xC087:
|
|
case 0xC088:
|
|
case 0xC089:
|
|
case 0xC08A:
|
|
case 0xC08B:
|
|
case 0xC08C:
|
|
case 0xC08D:
|
|
case 0xC08E:
|
|
case 0xC08F:
|
|
handleMemorySwitches(address, lastWriteSwitch);
|
|
break;
|
|
|
|
case 0xC00C: // CLR80VID disable 80-col video mode
|
|
if (switches & S_80COL) {
|
|
switches &= ~S_80COL;
|
|
resetDisplay();
|
|
}
|
|
break;
|
|
case 0xC00D: // SET80VID enable 80-col video mode
|
|
if (!(switches & S_80COL)) {
|
|
switches |= S_80COL;
|
|
resetDisplay();
|
|
}
|
|
break;
|
|
|
|
case 0xC00E: // CLRALTCH use main char set - norm LC, flash UC
|
|
switches &= ~S_ALTCH;
|
|
break;
|
|
case 0xC00F: // SETALTCH use alt char set - norm inverse, LC; no flash
|
|
switches |= S_ALTCH;
|
|
break;
|
|
}
|
|
}
|
|
|
|
void AppleMMU::keyboardInput(uint8_t v)
|
|
{
|
|
keyboardStrobe = v | 0x80;
|
|
anyKeyDown = true;
|
|
}
|
|
|
|
void AppleMMU::setKeyDown(bool isTrue)
|
|
{
|
|
anyKeyDown = isTrue;
|
|
}
|
|
|
|
void AppleMMU::triggerPaddleTimer(uint8_t paddle)
|
|
{
|
|
writePages[0xC0][0x64 + paddle] = 0x00;
|
|
}
|
|
|
|
void AppleMMU::resetRAM()
|
|
{
|
|
switches = S_TEXT;
|
|
|
|
bank1 = true;
|
|
auxRamRead = auxRamWrite = false;
|
|
readbsr = writebsr = false;
|
|
altzp = false;
|
|
intcxrom = false;
|
|
slot3rom = false;
|
|
|
|
for (uint8_t i=0; i<0xFF; i++) {
|
|
for (uint8_t j=0; j<5; j++) {
|
|
if (ramPages[i][j]) {
|
|
for (uint16_t k=0; k<0x100; k++) {
|
|
ramPages[i][j][k] = 0;
|
|
}
|
|
}
|
|
}
|
|
readPages[i] = writePages[i] = ramPages[i][0];
|
|
}
|
|
|
|
// Load ROM
|
|
|
|
#ifdef TEENSYDUINO
|
|
for (uint16_t i=0x80; i<=0xFF; i++) {
|
|
for (uint16_t k=0; k<0x100; k++) {
|
|
uint16_t idx = ((i-0x80) << 8) | k;
|
|
uint8_t v = pgm_read_byte(&romData[idx]);
|
|
for (uint8_t j=0; j<5; j++) {
|
|
if (ramPages[i][j]) {
|
|
ramPages[i][j][k] = v;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#else
|
|
for (uint16_t i=0x80; i<=0xFF; i++) {
|
|
for (uint16_t k=0; k<0x100; k++) {
|
|
uint16_t idx = ((i-0x80) << 8) | k;
|
|
uint8_t v = romData[idx];
|
|
for (uint8_t j=0; j<5; j++) {
|
|
if (ramPages[i][j]) {
|
|
ramPages[i][j][k] = v;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
for (uint8_t slotnum = 0; slotnum <= 7; slotnum++) {
|
|
if (slots[slotnum]) {
|
|
slots[slotnum]->loadROM(ramPages[0xC0 + slotnum][0]);
|
|
}
|
|
}
|
|
}
|
|
|
|
void AppleMMU::setSlot(int8_t slotnum, Slot *peripheral)
|
|
{
|
|
slots[slotnum] = peripheral;
|
|
if (slots[slotnum]) {
|
|
slots[slotnum]->loadROM(ramPages[0xC0 + slotnum][0]);
|
|
}
|
|
}
|
|
|
|
void AppleMMU::allocateMemory()
|
|
{
|
|
for (uint16_t i=0; i<0xC0; i++) {
|
|
for (uint8_t j=0; j<2; j++) {
|
|
ramPages[i][j] = (uint8_t *)malloc(0x100);
|
|
}
|
|
for (uint8_t j=2; j<5; j++) {
|
|
ramPages[i][j] = NULL;
|
|
}
|
|
readPages[i] = ramPages[i][0];
|
|
writePages[i] = ramPages[i][0];
|
|
}
|
|
for (uint16_t i=0xC0; i<0x100; i++) {
|
|
for (uint8_t j=0; j<5; j++) {
|
|
ramPages[i][j] = (uint8_t *)malloc(0x100);
|
|
}
|
|
readPages[i] = ramPages[i][0];
|
|
writePages[i] = ramPages[i][0];
|
|
}
|
|
}
|
|
|
|
void AppleMMU::updateMemoryPages()
|
|
{
|
|
if (auxRamRead) {
|
|
for (uint8_t idx = 0x02; idx < 0xc0; idx++) {
|
|
readPages[idx] = ramPages[idx][1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0x02; idx < 0xc0; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
|
|
if (auxRamWrite) {
|
|
for (uint8_t idx = 0x02; idx < 0xc0; idx++) {
|
|
writePages[idx] = ramPages[idx][1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0x02; idx < 0xc0; idx++) {
|
|
writePages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
|
|
if (switches & S_80STORE) {
|
|
if (switches & S_PAGE2) {
|
|
for (uint8_t idx = 0x04; idx < 0x08; idx++) {
|
|
readPages[idx] = ramPages[idx][1];
|
|
writePages[idx] = ramPages[idx][1];
|
|
}
|
|
|
|
// If HIRES is on, then we honor the PAGE2 setting; otherwise, we don't
|
|
for (uint8_t idx = 0x20; idx < 0x40; idx++) {
|
|
readPages[idx] = ramPages[idx][(switches & S_HIRES) ? 1 : 0];
|
|
writePages[idx] = ramPages[idx][(switches & S_HIRES) ? 1 : 0];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0x04; idx < 0x08; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
writePages[idx] = ramPages[idx][0];
|
|
}
|
|
if (switches & S_HIRES) {
|
|
// PAGE2 is off, so we set this back to 0 regardless
|
|
for (uint8_t idx = 0x20; idx < 0x40; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
writePages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
if (intcxrom) {
|
|
for (uint8_t idx = 0xc1; idx < 0xd0; idx++) {
|
|
readPages[idx] = ramPages[idx][1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0xc1; idx < 0xd0; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
|
|
if (altzp) {
|
|
for (uint8_t idx = 0x00; idx < 0x02; idx++) {
|
|
readPages[idx] = ramPages[idx][1];
|
|
writePages[idx] = ramPages[idx][1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0x00; idx < 0x02; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
writePages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
|
|
if (readbsr) {
|
|
if (bank1) {
|
|
for (uint8_t idx = 0xd0; idx < 0xe0; idx++) {
|
|
readPages[idx] = ramPages[idx][altzp ? 2 : 1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0xd0; idx < 0xe0; idx++) {
|
|
readPages[idx] = ramPages[idx][altzp ? 4 : 3];
|
|
}
|
|
}
|
|
for (uint16_t idx = 0xe0; idx < 0x100; idx++) {
|
|
readPages[idx] = ramPages[idx][altzp ? 2 : 1];
|
|
}
|
|
} else {
|
|
for (uint16_t idx = 0xd0; idx < 0x100; idx++) {
|
|
readPages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
|
|
if (writebsr) {
|
|
if (bank1) {
|
|
for (uint8_t idx = 0xd0; idx < 0xe0; idx++) {
|
|
writePages[idx] = ramPages[idx][altzp ? 2 : 1];
|
|
}
|
|
} else {
|
|
for (uint8_t idx = 0xd0; idx < 0xe0; idx++) {
|
|
writePages[idx] = ramPages[idx][altzp ? 4 : 3];
|
|
}
|
|
}
|
|
for (uint16_t idx = 0xe0; idx < 0x100; idx++) {
|
|
writePages[idx] = ramPages[idx][altzp ? 2 : 1];
|
|
}
|
|
} else {
|
|
for (uint16_t idx = 0xd0; idx < 0x100; idx++) {
|
|
writePages[idx] = ramPages[idx][0];
|
|
}
|
|
}
|
|
}
|
|
|