mirror of https://github.com/JorjBauer/aiie.git
68 lines
1.6 KiB
C++
68 lines
1.6 KiB
C++
#ifndef __SY6522_H
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#define __SY6522_H
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#include <stdint.h>
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#include "ay8910.h"
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// 6522 interface registers
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enum {
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SY_ORB = 0x00, // ORB
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SY_ORA = 0x01, // ORA
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SY_DDRB = 0x02, // DDRB
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SY_DDRA = 0x03, // DDRA
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SY_TMR1L = 0x04, // TIMER1L_COUNTER
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SY_TMR1H = 0x05, // TIMER1H_COUNTER
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SY_TMR1LL = 0x06, // TIMER1L_LATCH
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SY_TMR1HL = 0x07, // TIMER1H_LATCH
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SY_TMR2L = 0x08, // TIMER2L
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SY_TMR2H = 0x09, // TIMER2H
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SY_SS = 0x0a, // SERIAL_SHIFT
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SY_ACR = 0x0b, // ACR
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SY_PCR = 0x0c, // PCR
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SY_IFR = 0x0d, // IFR
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SY_IER = 0x0e, // IER
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SY_ORANOHS = 0x0f // ORA_NO_HS
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};
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// IFR and IER share the names of all but the high bit
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enum {
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SY_IR_CA2 = 1,
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SY_IR_CA1 = 2,
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SY_IR_SHIFTREG = 4,
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SY_IR_CB2 = 8,
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SY_IR_CB1 = 16,
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SY_IR_TIMER2 = 32,
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SY_IR_TIMER1 = 64,
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SY_IER_SETCLEAR = 128,
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SY_IFR_IRQ = 128
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};
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class SY6522 {
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public:
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SY6522();
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uint8_t read(uint8_t address);
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void write(uint8_t address, uint8_t val);
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void update(uint32_t cycles);
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private:
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uint8_t ORB; // port B
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uint8_t ORA; // port A
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uint8_t DDRB; // data direction register
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uint8_t DDRA; //
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uint16_t T1_CTR; // counters
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uint16_t T1_CTR_LATCH;
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uint16_t T2_CTR;
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uint16_t T2_CTR_LATCH;
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uint8_t ACR; // Aux Control Register
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uint8_t PCR; // Peripheral Control Register
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uint8_t IFR; // Interrupt Flag Register
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uint8_t IER; // Interrupt Enable Register
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AY8910 ay8910[1]; // FIXME: an array in case we support more than one ... ?
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};
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#endif
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