Apple-2-HW/analog-firmware
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Macro consolidation

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This commit is contained in:
David Kuder 2023-04-28 23:21:14 -04:00
parent ea4af57302
commit d5e001f2c1
3 changed files with 62 additions and 40 deletions
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3
common/abus.h
View File

@ -7,6 +7,9 @@ void abus_init();
#define CARD_IOSEL (((address & 0xff00) >= 0xc100) && ((address & 0xff00) < 0xc700)) #define CARD_IOSEL (((address & 0xff00) >= 0xc100) && ((address & 0xff00) < 0xc700))
#define CARD_IOSTROBE ((address & 0xf800) == 0xc800) #define CARD_IOSTROBE ((address & 0xf800) == 0xc800)
#define ACCESS_READ ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) != 0)
#define ACCESS_WRITE ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)
enum { enum {
ABUS_MAIN_SM = 0, ABUS_MAIN_SM = 0,
ABUS_DEVICE_READ_SM = 1, ABUS_DEVICE_READ_SM = 1,

3
common/main.c
View File

@ -19,9 +19,6 @@
#include <pico/cyw43_arch.h> #include <pico/cyw43_arch.h>
#endif #endif
#define ACCESS_READ ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) != 0)
#define ACCESS_WRITE ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)
static void __noinline __time_critical_func(core1_loop)() { static void __noinline __time_critical_func(core1_loop)() {
uint32_t value; uint32_t value;
uint32_t address; uint32_t address;

96
vga/businterface.c
View File

@ -18,6 +18,8 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
} }
#endif #endif
// Shadow parts of the Apple's memory by observing the bus write cycles
if(ACCESS_WRITE) {
// Mirror Video Memory from MAIN & AUX banks // Mirror Video Memory from MAIN & AUX banks
if(soft_switches & SOFTSW_80STORE) { if(soft_switches & SOFTSW_80STORE) {
if(soft_switches & SOFTSW_PAGE_2) { if(soft_switches & SOFTSW_PAGE_2) {
@ -46,57 +48,57 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
if((address & 0xff80) == 0xc000) { if((address & 0xff80) == 0xc000) {
switch(address & 0x7f) { switch(address & 0x7f) {
case 0x00: case 0x00:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_80STORE; soft_switches &= ~SOFTSW_80STORE;
} }
break; break;
case 0x01: case 0x01:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches |= SOFTSW_80STORE; soft_switches |= SOFTSW_80STORE;
} }
break; break;
case 0x04: case 0x04:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_AUX_WRITE; soft_switches &= ~SOFTSW_AUX_WRITE;
} }
break; break;
case 0x05: case 0x05:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches |= SOFTSW_AUX_WRITE; soft_switches |= SOFTSW_AUX_WRITE;
} }
break; break;
case 0x08: case 0x08:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_AUXZP; soft_switches &= ~SOFTSW_AUXZP;
} }
break; break;
case 0x09: case 0x09:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches |= SOFTSW_AUXZP; soft_switches |= SOFTSW_AUXZP;
} }
break; break;
case 0x0c: case 0x0c:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_80COL; soft_switches &= ~SOFTSW_80COL;
} }
break; break;
case 0x0d: case 0x0d:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches |= SOFTSW_80COL; soft_switches |= SOFTSW_80COL;
} }
break; break;
case 0x0e: case 0x0e:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_ALTCHAR; soft_switches &= ~SOFTSW_ALTCHAR;
} }
break; break;
case 0x0f: case 0x0f:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
soft_switches |= SOFTSW_ALTCHAR; soft_switches |= SOFTSW_ALTCHAR;
} }
break; break;
case 0x21: case 0x21:
if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & (IFLAGS_IIGS_REGS | IFLAGS_IIE_REGS)) && ACCESS_WRITE) {
if(value & 0x80) { if(value & 0x80) {
soft_switches |= SOFTSW_MONOCHROME; soft_switches |= SOFTSW_MONOCHROME;
} else { } else {
@ -105,22 +107,22 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
} }
break; break;
case 0x22: case 0x22:
if((internal_flags & IFLAGS_IIGS_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIGS_REGS) && ACCESS_WRITE) {
apple_tbcolor = value & 0xff; apple_tbcolor = value & 0xff;
} }
break; break;
case 0x29: case 0x29:
if((internal_flags & IFLAGS_IIGS_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIGS_REGS) && ACCESS_WRITE) {
soft_switches = (soft_switches & ~(SOFTSW_NEWVID_MASK << SOFTSW_NEWVID_SHIFT)) | ((value & SOFTSW_NEWVID_MASK) << SOFTSW_NEWVID_SHIFT); soft_switches = (soft_switches & ~(SOFTSW_NEWVID_MASK << SOFTSW_NEWVID_SHIFT)) | ((value & SOFTSW_NEWVID_MASK) << SOFTSW_NEWVID_SHIFT);
} }
break; break;
case 0x34: case 0x34:
if((internal_flags & IFLAGS_IIGS_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIGS_REGS) && ACCESS_WRITE) {
apple_border = value & 0x0f; apple_border = value & 0x0f;
} }
break; break;
case 0x35: case 0x35:
if((internal_flags & IFLAGS_IIGS_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIGS_REGS) && ACCESS_WRITE) {
soft_switches = (soft_switches & ~(SOFTSW_SHADOW_MASK << SOFTSW_SHADOW_SHIFT)) | ((value & SOFTSW_SHADOW_MASK) << SOFTSW_SHADOW_SHIFT); soft_switches = (soft_switches & ~(SOFTSW_SHADOW_MASK << SOFTSW_SHADOW_SHIFT)) | ((value & SOFTSW_SHADOW_MASK) << SOFTSW_SHADOW_SHIFT);
} }
break; break;
@ -159,12 +161,12 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
} }
break; break;
case 0x7e: case 0x7e:
if((internal_flags & IFLAGS_IIE_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIE_REGS) && ACCESS_WRITE) {
soft_switches |= SOFTSW_IOUDIS; soft_switches |= SOFTSW_IOUDIS;
} }
break; break;
case 0x7f: case 0x7f:
if((internal_flags & IFLAGS_IIE_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) { if((internal_flags & IFLAGS_IIE_REGS) && ACCESS_WRITE) {
soft_switches &= ~SOFTSW_IOUDIS; soft_switches &= ~SOFTSW_IOUDIS;
} }
break; break;
@ -173,24 +175,24 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
} }
// Control sequences used by ROMX and ROMXe // Control sequences used by ROMX and ROMXe
if(value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) { switch(current_machine) {
if(((address >> 8) == 0xCA) || ((address >> 8) == 0xFA)) { case MACHINE_IIE:
switch(address & 0xFF) { // Trigger on read sequence FACA FACA FAFE
case 0xCA: if(ACCESS_READ) {
romx_unlocked = (romx_unlocked == 1) ? 2 : 1; if((address >> 8) == 0xFA) {
break; switch(address & 0xFF) {
case 0xFE: case 0xCA:
romx_unlocked = (romx_unlocked == 2) ? 3 : 0; romx_unlocked = (romx_unlocked == 1) ? 2 : 1;
if(romx_unlocked == 3) break;
romx_type = address >> 8; case 0xFE:
break; romx_unlocked = (romx_unlocked == 2) ? 3 : 0;
default: break;
if(romx_unlocked != 3) default:
romx_unlocked = 0; if(romx_unlocked != 3)
break; romx_unlocked = 0;
} break;
} else if(romx_unlocked == 3) { }
if(romx_type == 0xFA) { } else if(romx_unlocked == 3) {
if((address & 0xFFF0) == 0xF810) { if((address & 0xFFF0) == 0xF810) {
romx_textbank = address & 0xF; romx_textbank = address & 0xF;
} }
@ -198,7 +200,26 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
romx_changed = 1; romx_changed = 1;
romx_unlocked = 0; romx_unlocked = 0;
} }
} else if(romx_type == 0xCA) { }
}
break;
case MACHINE_II:
// Trigger on read sequence CACA CACA CAFE
if(ACCESS_READ) {
if((address >> 8) == 0xCA) {
switch(address & 0xFF) {
case 0xCA:
romx_unlocked = (romx_unlocked == 1) ? 2 : 1;
break;
case 0xFE:
romx_unlocked = (romx_unlocked == 2) ? 3 : 0;
break;
default:
if(romx_unlocked != 3)
romx_unlocked = 0;
break;
}
} else if(romx_unlocked == 3) {
if((address & 0xFFF0) == 0xCFD0) { if((address & 0xFFF0) == 0xCFD0) {
romx_textbank = address & 0xF; romx_textbank = address & 0xF;
} }
@ -208,10 +229,11 @@ void __time_critical_func(vga_businterface)(uint32_t address, uint32_t value) {
} }
} }
} }
break;
} }
// Card Registers // Card Registers
if((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0) { if(ACCESS_WRITE) {
if(CARD_SELECT && CARD_DEVSEL) { if(CARD_SELECT && CARD_DEVSEL) {
cardslot = (address >> 4) & 0x7; cardslot = (address >> 4) & 0x7;
switch(address & 0x0F) { switch(address & 0x0F) {