2023-01-17 01:36:00 +00:00
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#include <string.h>
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#include <hardware/pio.h>
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#include "common/config.h"
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#include "common/buffers.h"
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#include "abus.pio.h"
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#include "fs/businterface.h"
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#include "fs/fs.h"
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2023-01-29 15:50:12 +00:00
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volatile uint8_t fs_slot = 0;
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void __time_critical_func(fs_businterface)(uint32_t address, uint32_t value) {
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2023-01-17 01:36:00 +00:00
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// Shadow parts of the Apple's memory by observing the bus write cycles
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if((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0) {
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if(address < 0x200) {
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if((soft_switches & (SOFTSW_80STORE | SOFTSW_AUXZP)) == (SOFTSW_80STORE | SOFTSW_AUXZP)) {
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private_memory[address] = value & 0xff;
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} else {
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apple_memory[address] = value & 0xff;
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}
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} else if((address < 0xC000) || (address >= 0xD000)) {
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if((soft_switches & (SOFTSW_80STORE | SOFTSW_AUX_WRITE)) == (SOFTSW_80STORE | SOFTSW_AUX_WRITE)) {
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private_memory[address] = value & 0xff;
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} else {
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apple_memory[address] = value & 0xff;
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}
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}
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}
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if(CARD_SELECT) {
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if(CARD_DEVSEL) {
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if((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0) {
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apple_memory[address] = value;
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}
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}
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if(CARD_IOSTROBE) {
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apple_memory[address] = value;
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}
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}
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// Shadow the soft-switches by observing all read & write bus cycles
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2023-03-02 16:05:44 +00:00
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if((internal_flags & IFLAGS_IIE_REGS) && ((value & (1u << CONFIG_PIN_APPLEBUS_RW-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)) {
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2023-01-17 01:36:00 +00:00
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if((address & 0xff80) == 0xc000) {
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switch(address & 0x7f) {
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case 0x00:
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soft_switches &= ~SOFTSW_80STORE;
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break;
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case 0x01:
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soft_switches |= SOFTSW_80STORE;
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break;
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case 0x04:
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soft_switches &= ~SOFTSW_AUX_WRITE;
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break;
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case 0x05:
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soft_switches |= SOFTSW_AUX_WRITE;
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break;
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case 0x08:
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soft_switches &= ~SOFTSW_AUXZP;
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break;
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case 0x09:
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soft_switches |= SOFTSW_AUXZP;
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break;
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}
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}
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}
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}
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