Apple-2-HW/analog
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Project files reorg

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Cleaning up the repos to break the project into smaller chunks.
This commit is contained in:
David Kuder 2023-04-17 01:23:34 -04:00
parent e9fbdca002
commit 52c049270d
163 changed files with 31 additions and 184575 deletions
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18
.gitmodules vendored
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@ -1,3 +1,15 @@
[submodule "v2-analog-rev1/lib/littlefs"]
path = v2-analog-rev1/lib/littlefs
url = https://github.com/lurk101/littlefs-lib
[submodule "picopal-v1"]
path = picopal-v1
url = https://github.com/V2RetroComputing/picopal-v1
[submodule "analog-firmware"]
path = analog-firmware
url = https://github.com/V2RetroComputing/analog-firmware
[submodule "analog-utilities"]
path = analog-utilities
url = https://github.com/V2RetroComputing/analog-utilities
[submodule "analog-preload"]
path = analog-preload
url = https://github.com/V2RetroComputing/analog-preload
[submodule "analog-hardware"]
path = analog-hardware
url = https://github.com/V2RetroComputing/analog-hardware

16
Bill-of-Materials.md
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@ -1,16 +0,0 @@
|Qty|Designator|Item|Package|Description|
|---|---|---|---|---|
|9x|C1-C9|16V 100nF X7R|0402|Multilayer Ceramic Capacitor|
|1x|C11|25V 10uF X5R|0805|Multilayer Ceramic Capacitor|
|1x|C10|25V 22uF X5R|0805|Multilayer Ceramic Capacitor|
|1x|U7|AZ1117H-3.3|SOT-223|Fixed 3.3V regulator|
|1x|D1|SS14F|SMAF|40V 550mV @ 1A Shottkey Barrier Diode|
|3x|R12,R13,R14|10K Ohm 100mW|0402|10K Ohm 100mW Thin Film Resistor|
|3x|R3,R6,R9|2K Ohm 100mW|0402|2K Ohm 100mW Thin Film Resistor|
|3x|R2,R5,R8|1K Ohm 100mW|0402|1K Ohm 100mW Thin Film Resistor|
|3x|R1,R4,R7|470 Ohm 100mW|0402|470 Ohm 100mW Thin Film Resistor|
|2x|R10,R11|47 Ohm 100mW|0402|47 Ohm 100mW Thin Film Resistor|
|4x|U1-U4|SN74LVC8T245DGVR|TVSOP-24|Texas Instruments SN74LVC8T245DGVR Level Translating Transceiver|
|1x|U5|ATF16V8C-5JX|PLCC-20|Microchip ATF16V8C PLD|
|1x|U6|Pico-W|Module|Raspberry Pi Pico or Pico-W module (no pins)|
|1x|J2|VGA Connector|HD-15|High-Density D-SUB 15 VGA Connector|

38
CUPL/PicoPal.jed
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@ -1,38 +0,0 @@

CUPL(WM) 5.0a Serial# MW-10400000
Device g16v8ma Library DLIB-h-40-8
Created Sun Jan 08 15:55:21 2023
Name PicoPal
Partno U5
Revision 01
Date 27/11/22
Designer David Kuder
Company Grizzly Adams
Assembly None
Location None
*QP20
*QF2194
*G0
*F0
*L00256 11111111111111111111111111111111
*L00288 11111111110111111111111111111111
*L00320 11111111111111111111111110111111
*L00512 11111111111111111111111111111111
*L00544 11111101111111111111111111111111
*L00576 10111111111111111111111111111111
*L00608 11111111111111111101111111111111
*L00640 11111011011101110111111111111111
*L00768 11111111111111111111111111111111
*L00800 11111111110111111111111111111011
*L01024 11111111111111111111111111111111
*L01056 11110111101101111111110111011001
*L01792 11111111111111111111111111111111
*L01824 11111111111111111111101111111111
*L01856 11111111111111111111111110111111
*L01888 11111111111111011111111111111111
*L02048 00011000010101010011010100000000
*L02112 00000000111111111111111111111111
*L02144 11111111111111111111111111111111
*L02176 111111111111111111
*C485E
*EEEB

6
CUPL/build.bat
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@set OLDPATH=%PATH%
@set PATH=c:\wincupl\WinCupl\Fitters;c:\Wincupl\Shared\;%PATH%
cupl.exe -jxfu c:\wincupl\shared\cupl.dl g16v8 picopal.pld
@set PATH=%OLDPATH%

205
CUPL/picopal.doc
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@ -1,205 +0,0 @@
*******************************************************************************
PicoPal
*******************************************************************************
CUPL(WM) 5.0a Serial# MW-10400000
Device g16v8ma Library DLIB-h-40-8
Created Sun Jan 08 15:55:21 2023
Name PicoPal
Partno U5
Revision 01
Date 27/11/22
Designer David Kuder
Company Grizzly Adams
Assembly None
Location None
===============================================================================
Expanded Product Terms
===============================================================================
CARDSELECT =>
DEVSELECT
# IOSELECT
# EXTSELECT
EXTDISABLE =>
EXTENABLE
# IOSELECT
EXTENABLE =>
EXTDISABLE
# RESET
# EXTOFF
# BSEL0 & BSEL1 & BSEL2 & !BSEL3
EXTOFF =>
A0 & A1 & A2 & BSEL1 & !BSEL2 & BSEL3 & IOSTROBE
EXTSELECT =>
EXTENABLE & IOSTROBE
A0.oe =>
0
A1.oe =>
0
CARDSELECT.oe =>
1
EXTDISABLE.oe =>
1
EXTENABLE.oe =>
1
EXTOFF.oe =>
1
EXTSELECT.oe =>
1
===============================================================================
Symbol Table
===============================================================================
Pin Variable Pterms Max Min
Pol Name Ext Pin Type Used Pterms Level
--- -------- --- --- ---- ------ ------ -----
A0 14 V - - -
A1 13 V - - -
A2 11 V - - -
BSEL0 6 V - - -
BSEL1 5 V - - -
BSEL2 4 V - - -
BSEL3 3 V - - -
! CARDSELECT 12 V 3 7 1
CLOCK 1 V - - -
! DEVSELECT 7 V - - -
EXTDISABLE 18 V 2 7 1
EXTENABLE 17 V 4 7 1
EXTOFF 15 V 1 7 1
EXTSELECT 16 V 1 7 1
! IOSELECT 8 V - - -
! IOSTROBE 9 V - - -
! RESET 2 V - - -
A0 oe 14 D 1 1 0
A1 oe 13 D 1 1 0
CARDSELECT oe 12 D 1 1 0
EXTDISABLE oe 18 D 1 1 0
EXTENABLE oe 17 D 1 1 0
EXTOFF oe 15 D 1 1 0
EXTSELECT oe 16 D 1 1 0
LEGEND D : default variable F : field G : group
I : intermediate variable N : node M : extended node
U : undefined V : variable X : extended variable
T : function
===============================================================================
Fuse Plot
===============================================================================
Syn 02192 - Ac0 02193 -
Pin #19 02048 Pol x 02120 Ac1 -
00000 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00032 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00064 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00096 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00128 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00160 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00192 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00224 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #18 02049 Pol x 02121 Ac1 -
00256 --------------------------------
00288 ----------x---------------------
00320 -------------------------x------
00352 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00384 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00416 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00448 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00480 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #17 02050 Pol x 02122 Ac1 -
00512 --------------------------------
00544 ------x-------------------------
00576 -x------------------------------
00608 ------------------x-------------
00640 -----x--x---x---x---------------
00672 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00704 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00736 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #16 02051 Pol - 02123 Ac1 -
00768 --------------------------------
00800 ----------x------------------x--
00832 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00864 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00896 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00928 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00960 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
00992 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #15 02052 Pol - 02124 Ac1 -
01024 --------------------------------
01056 ----x----x--x---------x---x--xx-
01088 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01120 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01152 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01184 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01216 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01248 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #14 02053 Pol x 02125 Ac1 -
01280 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01312 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01344 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01376 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01408 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01440 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01472 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01504 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #13 02054 Pol x 02126 Ac1 -
01536 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01568 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01600 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01632 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01664 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01696 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01728 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01760 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Pin #12 02055 Pol x 02127 Ac1 -
01792 --------------------------------
01824 ---------------------x----------
01856 -------------------------x------
01888 --------------x-----------------
01920 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01952 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
01984 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
02016 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
LEGEND X : fuse not blown
- : fuse blown
===============================================================================
Chip Diagram
===============================================================================
______________
| PicoPal |
CLOCK x---|1 20|---x Vcc
!RESET x---|2 19|---x
BSEL3 x---|3 18|---x EXTDISABLE
BSEL2 x---|4 17|---x EXTENABLE
BSEL1 x---|5 16|---x EXTSELECT
BSEL0 x---|6 15|---x EXTOFF
!DEVSELECT x---|7 14|---x A0
!IOSELECT x---|8 13|---x A1
!IOSTROBE x---|9 12|---x !CARDSELECT
GND x---|10 11|---x A2
|______________|

55
CUPL/picopal.pld
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@ -1,55 +0,0 @@
Name PicoPal;
Partno U5;
Date 27/11/22;
Revision 01;
Designer David Kuder;
Company Grizzly Adams;
Assembly None;
Location None;
Device g16V8;
/****************************************************************/
/* */
/* Apple II Pi Pico Address Logic */
/* */
/****************************************************************/
/* Allowable Target Device Types : PAL16V8 */
/****************************************************************/
/** Inputs **/
PIN 1 = CLOCK; /* Unused Register Clock */
PIN 2 = !RESET; /* System Reset */
PIN [3..6] = [BSEL3..0]; /* Buffer Mode Select */
PIN 7 = !DEVSELECT; /* $C0nX Selected -> 16B I/O */
PIN 8 = !IOSELECT; /* $CnXX Selected -> Base ROM */
PIN 9 = !IOSTROBE; /* $C8XX Selected -> Extd ROM */
PIN 11 = A2;
PIN 13 = A1;
PIN 14 = A0;
/** Outputs **/
PIN 12 = !CARDSELECT; /* Card Select */
/** Logic Overflow **/
PIN 15 = EXTOFF; /* Combinatorial */
PIN 16 = EXTSELECT; /* Combinatorial */
PIN 17 = EXTENABLE; /* Combinatorial */
PIN 18 = EXTDISABLE; /* Combinatorial */
/** Logic Equations **/
/* $CFxx disables, but only triggered during AddrLo */
EXTOFF = IOSTROBE & [A2..0]:'b'111 & [BSEL3..0]:'b'101X;
/* Implement an SR Latch */
EXTDISABLE = !(EXTENABLE # IOSELECT);
EXTENABLE = !(EXTDISABLE # RESET # EXTOFF # [BSEL3..0]:'b'0111);
/* $C8XX and extended rom is enabled */
EXTSELECT = EXTENABLE & IOSTROBE;
/* Tell the Pico that the Apple wants attention. */
CARDSELECT = DEVSELECT # IOSELECT # EXTSELECT;

52
CUPL/picopal.si
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@ -1,52 +0,0 @@
Name PicoPal;
PartNo U5;
Date 27/11/22;
Revision 01;
Designer David Kuder;
Company Grizzly Adams;
Assembly None;
Location None;
Device g16V8;
ORDER: A0, A1, A2, BSEL0, BSEL1, BSEL2, BSEL3, !DEVSELECT, !IOSELECT, !IOSTROBE, !RESET, !CARDSELECT, EXTDISABLE, EXTENABLE, EXTOFF, EXTSELECT;
VECTORS:
00001111110*****
00001111111*****
00001101111*****
00001011111*****
00000111111*****
00001101101*****
00001011101*****
00000111101*****
00001100111*****
00001010111*****
00000110111*****
00001101011*****
00001011011*****
00000111011*****
00001101101*****
00001011101*****
00000111101*****
00001101101*****
00001011101*****
00010111101*****
11101101101*****
11101011101*****
11100111101*****
00001101011*****
00001011011*****
00000111011*****
00001111110*****
00001101101*****
00001011101*****
00000111101*****
00001101011*****
00001011011*****
00000111011*****
00001111110*****
00001101101*****
00001011101*****
00000111101*****

67
CUPL/picopal.sim
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@ -1,67 +0,0 @@
%SIGNAL
PIN 14 = A0
PIN 13 = A1
PIN 11 = A2
PIN 6 = BSEL0
PIN 5 = BSEL1
PIN 4 = BSEL2
PIN 3 = BSEL3
PIN 12 = !CARDSELECT
PIN 1 = CLOCK
PIN 7 = !DEVSELECT
PIN 18 = EXTDISABLE
PIN 17 = EXTENABLE
PIN 15 = EXTOFF
PIN 16 = EXTSELECT
PIN 8 = !IOSELECT
PIN 9 = !IOSTROBE
PIN 2 = !RESET
%END
%FIELD
%END
%EQUATION
CARDSELECT =>
!DEVSELECT
# !IOSELECT
# EXTSELECT
EXTDISABLE =>
EXTENABLE
# !IOSELECT
EXTENABLE =>
EXTDISABLE
# !RESET
# EXTOFF
# BSEL0 & BSEL1 & BSEL2 & !BSEL3
EXTOFF =>
A0 & A1 & A2 & BSEL1 & !BSEL2 & BSEL3 & !IOSTROBE
EXTSELECT =>
EXTENABLE & !IOSTROBE
A0.oe =>
0
A1.oe =>
0
CARDSELECT.oe =>
1
EXTDISABLE.oe =>
1
EXTENABLE.oe =>
1
EXTOFF.oe =>
1
EXTSELECT.oe =>
1
%END

72
CUPL/picopal.so
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@ -1,72 +0,0 @@
CSIM(WM): CUPL Simulation Program
Version 5.0a Serial#
Copyright (c) 1983, 1998 Logical Devices, Inc.
CREATED Sun Jan 08 15:54:24 2023
LISTING FOR SIMULATION FILE: picopal.si
1: Name PicoPal;
2: PartNo U5;
3: Date 27/11/22;
4: Revision 01;
5: Designer David Kuder;
6: Company Grizzly Adams;
7: Assembly None;
8: Location None;
9: Device g16V8;
10:
11:
12: ORDER: A0, A1, A2, BSEL0, BSEL1, BSEL2, BSEL3, !DEVSELECT, !IOSELECT, !IOSTROBE, !RESET, !CARDSELECT, EXTDISABLE, EXTENABLE, EXTOFF, EXTSELECT;
13:
14:
=========================
!
! CE
D!! AXE E
EII RTX X
VOO DDT T
SSS!SIEES
BBBBEETRESNXE
SSSSLLRELAATL
EEEEEEOSEBBOE
AAALLLLCCBECLLFC
0120123TTETTEEFT
=========================
0001: 00001111110HHLLL
0002: 00001111111HHLLL
0003: 00001101111HHLLL
0004: 00001011111HHLLL
0005: 00000111111HHLLL
0006: 00001101101HHLLL
0007: 00001011101HHLLL
0008: 00000111101HHLLL
0009: 00001100111LHLLL
0010: 00001010111LHLLL
0011: 00000110111LHLLL
0012: 00001101011LLHLL
0013: 00001011011LLHLL
0014: 00000111011LLHLL
0015: 00001101101LLHLH
0016: 00001011101LLHLH
0017: 00000111101LLHLH
0018: 00001101101LLHLH
0019: 00001011101LLHLH
0020: 00010111101LLHLH
0021: 11101101101LLHLH
0022: 11101011101HHLHL
0023: 11100111101HHLLL
0024: 00001101011LLHLL
0025: 00001011011LLHLL
0026: 00000111011LLHLL
0027: 00001111110HHLLL
0028: 00001101101HHLLL
0029: 00001011101HHLLL
0030: 00000111101HHLLL
0031: 00001101011LLHLL
0032: 00001011011LLHLL
0033: 00000111011LLHLL
0034: 00001111110HHLLL
0035: 00001101101HHLLL
0036: 00001011101HHLLL
0037: 00000111101HHLLL

52
CUPL/picopal.wo
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@ -1,52 +0,0 @@
#WAVEFORM
#H Name PicoPal;
#H PartNo U5;
#H Date 27/11/22;
#H Revision 01;
#H Designer David Kuder;
#H Company Grizzly Adams;
#H Assembly None;
#H Location None;
#H Device g16V8;
#H
#H
#H ORDER: A0, A1, A2, BSEL0, BSEL1, BSEL2, BSEL3, !DEVSELECT, !IOSELECT, !IOSTROBE, !RESET, !CARDSELECT, EXTDISABLE, EXTENABLE, EXTOFF, EXTSELECT;
#H
#H
#V 0001 00001111110HHLLL
#V 0002 00001111111HHLLL
#V 0003 00001101111HHLLL
#V 0004 00001011111HHLLL
#V 0005 00000111111HHLLL
#V 0006 00001101101HHLLL
#V 0007 00001011101HHLLL
#V 0008 00000111101HHLLL
#V 0009 00001100111LHLLL
#V 0010 00001010111LHLLL
#V 0011 00000110111LHLLL
#V 0012 00001101011LLHLL
#V 0013 00001011011LLHLL
#V 0014 00000111011LLHLL
#V 0015 00001101101LLHLH
#V 0016 00001011101LLHLH
#V 0017 00000111101LLHLH
#V 0018 00001101101LLHLH
#V 0019 00001011101LLHLH
#V 0020 00010111101LLHLH
#V 0021 11101101101LLHLH
#V 0022 11101011101HHLHL
#V 0023 11100111101HHLLL
#V 0024 00001101011LLHLL
#V 0025 00001011011LLHLL
#V 0026 00000111011LLHLL
#V 0027 00001111110HHLLL
#V 0028 00001101101HHLLL
#V 0029 00001011101HHLLL
#V 0030 00000111101HHLLL
#V 0031 00001101011LLHLL
#V 0032 00001011011LLHLL
#V 0033 00000111011LLHLL
#V 0034 00001111110HHLLL
#V 0035 00001101101HHLLL
#V 0036 00001011101HHLLL
#V 0037 00000111101HHLLL

3814
GERBERS-Rev0/AppleII-Pico-B_Cu.gbl
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94
GERBERS-Rev0/AppleII-Pico-B_Mask.gbs
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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-11-27T19:39:58-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Soldermask,Bot*%
%TF.FilePolarity,Negative*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-11-27 19:39:58*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,4.000000*%
%ADD11C,1.600000*%
%ADD12R,1.600000X1.600000*%
%ADD13R,1.400000X8.000000*%
%ADD14C,0.254000*%
%ADD15C,0.100000*%
G04 APERTURE END LIST*
D10*
%TO.C,J2*%
X88485000Y-122569000D03*
X88485000Y-97569000D03*
D11*
X86575000Y-105224000D03*
X86575000Y-107514000D03*
X86575000Y-109804000D03*
X86575000Y-112094000D03*
X86575000Y-114384000D03*
X88555000Y-106369000D03*
X88555000Y-108659000D03*
X88555000Y-110949000D03*
X88555000Y-113239000D03*
X88555000Y-115529000D03*
X90535000Y-105224000D03*
X90535000Y-107514000D03*
X90535000Y-109804000D03*
X90535000Y-112094000D03*
D12*
X90535000Y-114384000D03*
%TD*%
D13*
%TO.C,J1*%
X172590000Y-130237500D03*
X170050000Y-130237500D03*
X167510000Y-130237500D03*
X164970000Y-130237500D03*
X162430000Y-130237500D03*
X159890000Y-130237500D03*
X157350000Y-130237500D03*
X154810000Y-130237500D03*
X152270000Y-130237500D03*
X149730000Y-130237500D03*
X147190000Y-130237500D03*
X144650000Y-130237500D03*
X142110000Y-130237500D03*
X139570000Y-130237500D03*
X137030000Y-130237500D03*
X134490000Y-130237500D03*
X131950000Y-130237500D03*
X129410000Y-130237500D03*
X126870000Y-130237500D03*
X124330000Y-130237500D03*
X121790000Y-130237500D03*
X119250000Y-130237500D03*
X116710000Y-130237500D03*
X114170000Y-130237500D03*
X111630000Y-130237500D03*
%TD*%
D14*
X174609000Y-126489606D02*
X174609000Y-133774394D01*
X173933394Y-134450000D01*
X110260606Y-134450000D01*
X109585000Y-133774394D01*
X109585000Y-126489606D01*
X110260606Y-125814000D01*
X173933394Y-125814000D01*
X174609000Y-126489606D01*
D15*
G36*
X174609000Y-126489606D02*
G01*
X174609000Y-133774394D01*
X173933394Y-134450000D01*
X110260606Y-134450000D01*
X109585000Y-133774394D01*
X109585000Y-126489606D01*
X110260606Y-125814000D01*
X173933394Y-125814000D01*
X174609000Y-126489606D01*
G37*
M02*

44
GERBERS-Rev0/AppleII-Pico-B_Paste.gbp
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@ -1,44 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-11-27T19:39:58-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Paste,Bot*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-11-27 19:39:58*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10R,1.400000X8.000000*%
G04 APERTURE END LIST*
D10*
%TO.C,J1*%
X172590000Y-130237500D03*
X170050000Y-130237500D03*
X167510000Y-130237500D03*
X164970000Y-130237500D03*
X162430000Y-130237500D03*
X159890000Y-130237500D03*
X157350000Y-130237500D03*
X154810000Y-130237500D03*
X152270000Y-130237500D03*
X149730000Y-130237500D03*
X147190000Y-130237500D03*
X144650000Y-130237500D03*
X142110000Y-130237500D03*
X139570000Y-130237500D03*
X137030000Y-130237500D03*
X134490000Y-130237500D03*
X131950000Y-130237500D03*
X129410000Y-130237500D03*
X126870000Y-130237500D03*
X124330000Y-130237500D03*
X121790000Y-130237500D03*
X119250000Y-130237500D03*
X116710000Y-130237500D03*
X114170000Y-130237500D03*
X111630000Y-130237500D03*
%TD*%
M02*

1470
GERBERS-Rev0/AppleII-Pico-B_SilkS.gbo
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48
GERBERS-Rev0/AppleII-Pico-Edge_Cuts.gm1
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@ -1,48 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-11-27T19:39:58-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Profile,NP*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-11-27 19:39:58*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%TA.AperFunction,Profile*%
%ADD10C,0.050000*%
%TD*%
G04 APERTURE END LIST*
D10*
X132064000Y-96096000D02*
X132064000Y-77808000D01*
X129016000Y-99144000D02*
X132064000Y-96096000D01*
X98536000Y-99144000D02*
X129016000Y-99144000D01*
X92948000Y-93556000D02*
X98536000Y-99144000D01*
X83296000Y-93556000D02*
X92948000Y-93556000D01*
X174241000Y-134492000D02*
X174749000Y-133984000D01*
X109979000Y-134492000D02*
X109471000Y-133984000D01*
X109979000Y-134492000D02*
X174241000Y-134492000D01*
X109471000Y-126576000D02*
X109471000Y-133984000D01*
X83296000Y-126576000D02*
X109471000Y-126576000D01*
X83296000Y-93556000D02*
X83296000Y-126576000D01*
X183880000Y-77808000D02*
X132064000Y-77808000D01*
X183880000Y-126576000D02*
X183880000Y-77808000D01*
X174749000Y-126576000D02*
X183880000Y-126576000D01*
X174749000Y-133984000D02*
X174749000Y-126576000D01*
M02*

10981
GERBERS-Rev0/AppleII-Pico-F_Cu.gtl
View File

File diff suppressed because it is too large Load Diff

3841
GERBERS-Rev0/AppleII-Pico-F_Mask.gts
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3792
GERBERS-Rev0/AppleII-Pico-F_Paste.gtp
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611
GERBERS-Rev0/AppleII-Pico-F_SilkS.gto
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@ -1,611 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-11-27T19:39:58-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Legend,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-11-27 19:39:58*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,0.400000*%
%ADD11C,0.500000*%
%ADD12C,0.120000*%
%ADD13C,0.100000*%
%ADD14C,0.150000*%
G04 APERTURE END LIST*
D10*
X165519314Y-124508961D02*
X164852647Y-123556580D01*
X164376457Y-124508961D02*
X164376457Y-122508961D01*
X165138361Y-122508961D01*
X165328838Y-122604200D01*
X165424076Y-122699438D01*
X165519314Y-122889914D01*
X165519314Y-123175628D01*
X165424076Y-123366104D01*
X165328838Y-123461342D01*
X165138361Y-123556580D01*
X164376457Y-123556580D01*
X167138361Y-124413723D02*
X166947885Y-124508961D01*
X166566933Y-124508961D01*
X166376457Y-124413723D01*
X166281219Y-124223247D01*
X166281219Y-123461342D01*
X166376457Y-123270866D01*
X166566933Y-123175628D01*
X166947885Y-123175628D01*
X167138361Y-123270866D01*
X167233600Y-123461342D01*
X167233600Y-123651819D01*
X166281219Y-123842295D01*
X167900266Y-123175628D02*
X168376457Y-124508961D01*
X168852647Y-123175628D01*
X171519314Y-122508961D02*
X171709790Y-122508961D01*
X171900266Y-122604200D01*
X171995504Y-122699438D01*
X172090742Y-122889914D01*
X172185980Y-123270866D01*
X172185980Y-123747057D01*
X172090742Y-124128009D01*
X171995504Y-124318485D01*
X171900266Y-124413723D01*
X171709790Y-124508961D01*
X171519314Y-124508961D01*
X171328838Y-124413723D01*
X171233600Y-124318485D01*
X171138361Y-124128009D01*
X171043123Y-123747057D01*
X171043123Y-123270866D01*
X171138361Y-122889914D01*
X171233600Y-122699438D01*
X171328838Y-122604200D01*
X171519314Y-122508961D01*
D11*
X103049190Y-119753666D02*
X104239666Y-119753666D01*
X102811095Y-120467952D02*
X103644428Y-117967952D01*
X104477761Y-120467952D01*
X105311095Y-118801285D02*
X105311095Y-120467952D01*
X105311095Y-119039380D02*
X105430142Y-118920333D01*
X105668238Y-118801285D01*
X106025380Y-118801285D01*
X106263476Y-118920333D01*
X106382523Y-119158428D01*
X106382523Y-120467952D01*
X108644428Y-120467952D02*
X108644428Y-119158428D01*
X108525380Y-118920333D01*
X108287285Y-118801285D01*
X107811095Y-118801285D01*
X107573000Y-118920333D01*
X108644428Y-120348904D02*
X108406333Y-120467952D01*
X107811095Y-120467952D01*
X107573000Y-120348904D01*
X107453952Y-120110809D01*
X107453952Y-119872714D01*
X107573000Y-119634619D01*
X107811095Y-119515571D01*
X108406333Y-119515571D01*
X108644428Y-119396523D01*
X110192047Y-120467952D02*
X109953952Y-120348904D01*
X109834904Y-120110809D01*
X109834904Y-117967952D01*
X111501571Y-120467952D02*
X111263476Y-120348904D01*
X111144428Y-120229857D01*
X111025380Y-119991761D01*
X111025380Y-119277476D01*
X111144428Y-119039380D01*
X111263476Y-118920333D01*
X111501571Y-118801285D01*
X111858714Y-118801285D01*
X112096809Y-118920333D01*
X112215857Y-119039380D01*
X112334904Y-119277476D01*
X112334904Y-119991761D01*
X112215857Y-120229857D01*
X112096809Y-120348904D01*
X111858714Y-120467952D01*
X111501571Y-120467952D01*
X114477761Y-118801285D02*
X114477761Y-120825095D01*
X114358714Y-121063190D01*
X114239666Y-121182238D01*
X114001571Y-121301285D01*
X113644428Y-121301285D01*
X113406333Y-121182238D01*
X114477761Y-120348904D02*
X114239666Y-120467952D01*
X113763476Y-120467952D01*
X113525380Y-120348904D01*
X113406333Y-120229857D01*
X113287285Y-119991761D01*
X113287285Y-119277476D01*
X113406333Y-119039380D01*
X113525380Y-118920333D01*
X113763476Y-118801285D01*
X114239666Y-118801285D01*
X114477761Y-118920333D01*
X140923404Y-83126261D02*
X140923404Y-84554833D01*
X140828166Y-84840547D01*
X140637690Y-85031023D01*
X140351976Y-85126261D01*
X140161500Y-85126261D01*
X142828166Y-85126261D02*
X141875785Y-85126261D01*
X141875785Y-83126261D01*
X144637690Y-84935785D02*
X144542452Y-85031023D01*
X144256738Y-85126261D01*
X144066261Y-85126261D01*
X143780547Y-85031023D01*
X143590071Y-84840547D01*
X143494833Y-84650071D01*
X143399595Y-84269119D01*
X143399595Y-83983404D01*
X143494833Y-83602452D01*
X143590071Y-83411976D01*
X143780547Y-83221500D01*
X144066261Y-83126261D01*
X144256738Y-83126261D01*
X144542452Y-83221500D01*
X144637690Y-83316738D01*
X146066261Y-83126261D02*
X146066261Y-84554833D01*
X145971023Y-84840547D01*
X145780547Y-85031023D01*
X145494833Y-85126261D01*
X145304357Y-85126261D01*
X147971023Y-85126261D02*
X147018642Y-85126261D01*
X147018642Y-83126261D01*
X149780547Y-84935785D02*
X149685309Y-85031023D01*
X149399595Y-85126261D01*
X149209119Y-85126261D01*
X148923404Y-85031023D01*
X148732928Y-84840547D01*
X148637690Y-84650071D01*
X148542452Y-84269119D01*
X148542452Y-83983404D01*
X148637690Y-83602452D01*
X148732928Y-83411976D01*
X148923404Y-83221500D01*
X149209119Y-83126261D01*
X149399595Y-83126261D01*
X149685309Y-83221500D01*
X149780547Y-83316738D01*
X151209119Y-83126261D02*
X151209119Y-84554833D01*
X151113880Y-84840547D01*
X150923404Y-85031023D01*
X150637690Y-85126261D01*
X150447214Y-85126261D01*
X153113880Y-85126261D02*
X152161500Y-85126261D01*
X152161500Y-83126261D01*
X154923404Y-84935785D02*
X154828166Y-85031023D01*
X154542452Y-85126261D01*
X154351976Y-85126261D01*
X154066261Y-85031023D01*
X153875785Y-84840547D01*
X153780547Y-84650071D01*
X153685309Y-84269119D01*
X153685309Y-83983404D01*
X153780547Y-83602452D01*
X153875785Y-83411976D01*
X154066261Y-83221500D01*
X154351976Y-83126261D01*
X154542452Y-83126261D01*
X154828166Y-83221500D01*
X154923404Y-83316738D01*
X156351976Y-83126261D02*
X156351976Y-84554833D01*
X156256738Y-84840547D01*
X156066261Y-85031023D01*
X155780547Y-85126261D01*
X155590071Y-85126261D01*
X158256738Y-85126261D02*
X157304357Y-85126261D01*
X157304357Y-83126261D01*
X160066261Y-84935785D02*
X159971023Y-85031023D01*
X159685309Y-85126261D01*
X159494833Y-85126261D01*
X159209119Y-85031023D01*
X159018642Y-84840547D01*
X158923404Y-84650071D01*
X158828166Y-84269119D01*
X158828166Y-83983404D01*
X158923404Y-83602452D01*
X159018642Y-83411976D01*
X159209119Y-83221500D01*
X159494833Y-83126261D01*
X159685309Y-83126261D01*
X159971023Y-83221500D01*
X160066261Y-83316738D01*
X108188000Y-113368000D02*
X107045000Y-113368000D01*
X106799190Y-112633952D02*
X107632523Y-115133952D01*
X108465857Y-112633952D01*
X109180142Y-112872047D02*
X109299190Y-112753000D01*
X109537285Y-112633952D01*
X110132523Y-112633952D01*
X110370619Y-112753000D01*
X110489666Y-112872047D01*
X110608714Y-113110142D01*
X110608714Y-113348238D01*
X110489666Y-113705380D01*
X109061095Y-115133952D01*
X110608714Y-115133952D01*
D12*
%TO.C,U6*%
X132452000Y-77905000D02*
X132452000Y-101950000D01*
X183492000Y-77905000D02*
X132452000Y-77905000D01*
X183492000Y-101950000D02*
X183492000Y-77905000D01*
X132452000Y-101950000D02*
X183492000Y-101950000D01*
X132512000Y-81810000D02*
X132512000Y-98250000D01*
X183432000Y-81810000D02*
X132512000Y-81810000D01*
X183432000Y-98250000D02*
X183432000Y-81810000D01*
X132512000Y-98250000D02*
X183432000Y-98250000D01*
%TO.C,C11*%
X180351000Y-122818248D02*
X180351000Y-123340752D01*
X181821000Y-122818248D02*
X181821000Y-123340752D01*
%TO.C,C10*%
X172794500Y-113995748D02*
X172794500Y-114518252D01*
X174264500Y-113995748D02*
X174264500Y-114518252D01*
%TO.C,U7*%
X175355000Y-119934000D02*
X175355000Y-113924000D01*
X182175000Y-117684000D02*
X182175000Y-113924000D01*
X175355000Y-113924000D02*
X176615000Y-113924000D01*
X182175000Y-113924000D02*
X180915000Y-113924000D01*
D13*
%TO.C,U5*%
X171392000Y-120692000D02*
X171392000Y-119042000D01*
X169742000Y-120692000D02*
X171392000Y-120692000D01*
X161062000Y-120692000D02*
X161062000Y-119042000D01*
X162712000Y-120692000D02*
X161062000Y-120692000D01*
X171392000Y-110362000D02*
X171392000Y-112012000D01*
X169742000Y-110362000D02*
X171392000Y-110362000D01*
X161062000Y-111512000D02*
X161062000Y-112012000D01*
X162212000Y-110362000D02*
X161062000Y-111512000D01*
X162712000Y-110362000D02*
X162212000Y-110362000D01*
D12*
%TO.C,C9*%
X168016165Y-109156000D02*
X168247835Y-109156000D01*
X168016165Y-108436000D02*
X168247835Y-108436000D01*
%TO.C,C8*%
X157475165Y-111442000D02*
X157706835Y-111442000D01*
X157475165Y-110722000D02*
X157706835Y-110722000D01*
%TO.C,C7*%
X157475165Y-117030000D02*
X157706835Y-117030000D01*
X157475165Y-116310000D02*
X157706835Y-116310000D01*
%TO.C,C6*%
X146045165Y-111442000D02*
X146276835Y-111442000D01*
X146045165Y-110722000D02*
X146276835Y-110722000D01*
%TO.C,C5*%
X146045165Y-117030000D02*
X146276835Y-117030000D01*
X146045165Y-116310000D02*
X146276835Y-116310000D01*
%TO.C,C4*%
X134615165Y-111442000D02*
X134846835Y-111442000D01*
X134615165Y-110722000D02*
X134846835Y-110722000D01*
%TO.C,C3*%
X134615165Y-117030000D02*
X134846835Y-117030000D01*
X134615165Y-116310000D02*
X134846835Y-116310000D01*
%TO.C,C2*%
X123185165Y-111442000D02*
X123416835Y-111442000D01*
X123185165Y-110722000D02*
X123416835Y-110722000D01*
%TO.C,C1*%
X123185165Y-117030000D02*
X123416835Y-117030000D01*
X123185165Y-116310000D02*
X123416835Y-116310000D01*
%TO.C,D1*%
X177840000Y-104396000D02*
X177840000Y-107256000D01*
X179760000Y-104396000D02*
X177840000Y-104396000D01*
X179760000Y-107256000D02*
X179760000Y-104396000D01*
%TO.C,J2*%
X92666325Y-114384000D02*
X93099338Y-114134000D01*
X93099338Y-114634000D02*
X92666325Y-114384000D01*
X93099338Y-114134000D02*
X93099338Y-114634000D01*
X92205000Y-125554000D02*
X83605000Y-125554000D01*
X92205000Y-94584000D02*
X92205000Y-125554000D01*
X83605000Y-94584000D02*
X92205000Y-94584000D01*
%TO.C,U4*%
X154486000Y-113876000D02*
X154486000Y-110276000D01*
X154486000Y-113876000D02*
X154486000Y-116076000D01*
X149266000Y-113876000D02*
X149266000Y-111676000D01*
X149266000Y-113876000D02*
X149266000Y-116076000D01*
%TO.C,U3*%
X143056000Y-113876000D02*
X143056000Y-110276000D01*
X143056000Y-113876000D02*
X143056000Y-116076000D01*
X137836000Y-113876000D02*
X137836000Y-111676000D01*
X137836000Y-113876000D02*
X137836000Y-116076000D01*
%TO.C,U1*%
X120196000Y-113876000D02*
X120196000Y-110276000D01*
X120196000Y-113876000D02*
X120196000Y-116076000D01*
X114976000Y-113876000D02*
X114976000Y-111676000D01*
X114976000Y-113876000D02*
X114976000Y-116076000D01*
%TO.C,U2*%
X131626000Y-113876000D02*
X131626000Y-110276000D01*
X131626000Y-113876000D02*
X131626000Y-116076000D01*
X126406000Y-113876000D02*
X126406000Y-111676000D01*
X126406000Y-113876000D02*
X126406000Y-116076000D01*
%TO.C,R14*%
X171308000Y-106088379D02*
X171308000Y-106423621D01*
X172068000Y-106088379D02*
X172068000Y-106423621D01*
%TO.C,R13*%
X174356000Y-106088379D02*
X174356000Y-106423621D01*
X175116000Y-106088379D02*
X175116000Y-106423621D01*
%TO.C,R12*%
X168260000Y-106088379D02*
X168260000Y-106423621D01*
X169020000Y-106088379D02*
X169020000Y-106423621D01*
%TO.C,R11*%
X98830621Y-102828000D02*
X98495379Y-102828000D01*
X98830621Y-103588000D02*
X98495379Y-103588000D01*
%TO.C,R10*%
X98830621Y-101304000D02*
X98495379Y-101304000D01*
X98830621Y-102064000D02*
X98495379Y-102064000D01*
%TO.C,R9*%
X98830621Y-104860000D02*
X98495379Y-104860000D01*
X98830621Y-105620000D02*
X98495379Y-105620000D01*
%TO.C,R8*%
X98830621Y-106384000D02*
X98495379Y-106384000D01*
X98830621Y-107144000D02*
X98495379Y-107144000D01*
%TO.C,R7*%
X98830621Y-107908000D02*
X98495379Y-107908000D01*
X98830621Y-108668000D02*
X98495379Y-108668000D01*
%TO.C,R6*%
X98830621Y-109940000D02*
X98495379Y-109940000D01*
X98830621Y-110700000D02*
X98495379Y-110700000D01*
%TO.C,R5*%
X98830621Y-111464000D02*
X98495379Y-111464000D01*
X98830621Y-112224000D02*
X98495379Y-112224000D01*
%TO.C,R4*%
X98830621Y-112988000D02*
X98495379Y-112988000D01*
X98830621Y-113748000D02*
X98495379Y-113748000D01*
%TO.C,R3*%
X98830621Y-115020000D02*
X98495379Y-115020000D01*
X98830621Y-115780000D02*
X98495379Y-115780000D01*
%TO.C,R2*%
X98830621Y-116544000D02*
X98495379Y-116544000D01*
X98830621Y-117304000D02*
X98495379Y-117304000D01*
%TO.C,R1*%
X98830621Y-118068000D02*
X98495379Y-118068000D01*
X98830621Y-118828000D02*
X98495379Y-118828000D01*
%TO.C,U7*%
D14*
X175752095Y-116630380D02*
X175752095Y-117439904D01*
X175799714Y-117535142D01*
X175847333Y-117582761D01*
X175942571Y-117630380D01*
X176133047Y-117630380D01*
X176228285Y-117582761D01*
X176275904Y-117535142D01*
X176323523Y-117439904D01*
X176323523Y-116630380D01*
X176704476Y-116630380D02*
X177371142Y-116630380D01*
X176942571Y-117630380D01*
%TO.C,U5*%
X165465095Y-112820380D02*
X165465095Y-113629904D01*
X165512714Y-113725142D01*
X165560333Y-113772761D01*
X165655571Y-113820380D01*
X165846047Y-113820380D01*
X165941285Y-113772761D01*
X165988904Y-113725142D01*
X166036523Y-113629904D01*
X166036523Y-112820380D01*
X166988904Y-112820380D02*
X166512714Y-112820380D01*
X166465095Y-113296571D01*
X166512714Y-113248952D01*
X166607952Y-113201333D01*
X166846047Y-113201333D01*
X166941285Y-113248952D01*
X166988904Y-113296571D01*
X167036523Y-113391809D01*
X167036523Y-113629904D01*
X166988904Y-113725142D01*
X166941285Y-113772761D01*
X166846047Y-113820380D01*
X166607952Y-113820380D01*
X166512714Y-113772761D01*
X166465095Y-113725142D01*
%TO.C,U4*%
X152638095Y-112058380D02*
X152638095Y-112867904D01*
X152685714Y-112963142D01*
X152733333Y-113010761D01*
X152828571Y-113058380D01*
X153019047Y-113058380D01*
X153114285Y-113010761D01*
X153161904Y-112963142D01*
X153209523Y-112867904D01*
X153209523Y-112058380D01*
X154114285Y-112391714D02*
X154114285Y-113058380D01*
X153876190Y-112010761D02*
X153638095Y-112725047D01*
X154257142Y-112725047D01*
%TO.C,U3*%
X141208095Y-112058380D02*
X141208095Y-112867904D01*
X141255714Y-112963142D01*
X141303333Y-113010761D01*
X141398571Y-113058380D01*
X141589047Y-113058380D01*
X141684285Y-113010761D01*
X141731904Y-112963142D01*
X141779523Y-112867904D01*
X141779523Y-112058380D01*
X142160476Y-112058380D02*
X142779523Y-112058380D01*
X142446190Y-112439333D01*
X142589047Y-112439333D01*
X142684285Y-112486952D01*
X142731904Y-112534571D01*
X142779523Y-112629809D01*
X142779523Y-112867904D01*
X142731904Y-112963142D01*
X142684285Y-113010761D01*
X142589047Y-113058380D01*
X142303333Y-113058380D01*
X142208095Y-113010761D01*
X142160476Y-112963142D01*
%TO.C,U1*%
X118348095Y-112058380D02*
X118348095Y-112867904D01*
X118395714Y-112963142D01*
X118443333Y-113010761D01*
X118538571Y-113058380D01*
X118729047Y-113058380D01*
X118824285Y-113010761D01*
X118871904Y-112963142D01*
X118919523Y-112867904D01*
X118919523Y-112058380D01*
X119919523Y-113058380D02*
X119348095Y-113058380D01*
X119633809Y-113058380D02*
X119633809Y-112058380D01*
X119538571Y-112201238D01*
X119443333Y-112296476D01*
X119348095Y-112344095D01*
%TO.C,U2*%
X129778095Y-112058380D02*
X129778095Y-112867904D01*
X129825714Y-112963142D01*
X129873333Y-113010761D01*
X129968571Y-113058380D01*
X130159047Y-113058380D01*
X130254285Y-113010761D01*
X130301904Y-112963142D01*
X130349523Y-112867904D01*
X130349523Y-112058380D01*
X130778095Y-112153619D02*
X130825714Y-112106000D01*
X130920952Y-112058380D01*
X131159047Y-112058380D01*
X131254285Y-112106000D01*
X131301904Y-112153619D01*
X131349523Y-112248857D01*
X131349523Y-112344095D01*
X131301904Y-112486952D01*
X130730476Y-113058380D01*
X131349523Y-113058380D01*
%TD*%
M02*

4467
GERBERS-Rev0/AppleII-Pico-In1_Cu.g2
View File

File diff suppressed because it is too large Load Diff

4643
GERBERS-Rev0/AppleII-Pico-In2_Cu.g3
View File

File diff suppressed because it is too large Load Diff

165
GERBERS-Rev0/AppleII-Pico-job.gbrjob
View File

@ -1,165 +0,0 @@
{
"Header":
{
"GenerationSoftware":
{
"Vendor": "KiCad",
"Application": "Pcbnew",
"Version": "(5.1.10)-1"
},
"CreationDate": "2022-11-27T19:39:58-05:00"
},
"GeneralSpecs":
{
"ProjectId":
{
"Name": "AppleII-Pico",
"GUID": "4170706c-6549-4492-9d50-69636f2e6b69",
"Revision": "rev?"
},
"Size":
{
"X": 100.634,
"Y": 56.734
},
"LayerNumber": 4,
"BoardThickness": 2.000
},
"DesignRules":
[
{
"Layers": "Outer",
"PadToPad": 0.100,
"PadToTrack": 0.100,
"TrackToTrack": 0.100,
"MinLineWidth": 0.200,
"TrackToRegion": 0.575,
"RegionToRegion": 0.575
},
{
"Layers": "Inner",
"PadToPad": 0.100,
"PadToTrack": 0.100,
"TrackToTrack": 0.100,
"MinLineWidth": 0.200,
"TrackToRegion": 0.575,
"RegionToRegion": 0.575
}
],
"FilesAttributes":
[
{
"Path": "AppleII-Pico-F_Cu.gtl",
"FileFunction": "Copper,L1,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-In1_Cu.g2",
"FileFunction": "Copper,L2,Inr",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-In2_Cu.g3",
"FileFunction": "Copper,L3,Inr",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_Cu.gbl",
"FileFunction": "Copper,L4,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_Paste.gtp",
"FileFunction": "SolderPaste,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_Paste.gbp",
"FileFunction": "SolderPaste,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_SilkS.gto",
"FileFunction": "Legend,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_SilkS.gbo",
"FileFunction": "Legend,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_Mask.gts",
"FileFunction": "SolderMask,Top",
"FilePolarity": "Negative"
},
{
"Path": "AppleII-Pico-B_Mask.gbs",
"FileFunction": "SolderMask,Bot",
"FilePolarity": "Negative"
},
{
"Path": "AppleII-Pico-Edge_Cuts.gm1",
"FileFunction": "Profile",
"FilePolarity": "Positive"
}
],
"MaterialStackup":
[
{
"Type": "Legend",
"Notes": "Layer F.SilkS"
},
{
"Type": "SolderPaste",
"Notes": "Layer F.Paste"
},
{
"Type": "SolderMask",
"Notes": "Layer F.Mask"
},
{
"Type": "Copper",
"Notes": "Layer F.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L1/L2"
},
{
"Type": "Copper",
"Notes": "Layer In1.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L2/L3"
},
{
"Type": "Copper",
"Notes": "Layer In2.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L3/L4"
},
{
"Type": "Copper",
"Notes": "Layer B.Cu"
},
{
"Type": "SolderMask",
"Notes": "Layer B.Mask"
},
{
"Type": "SolderPaste",
"Notes": "Layer B.Paste"
},
{
"Type": "Legend",
"Notes": "Layer B.SilkS"
}
]
}

164
GERBERS-Rev0/AppleII-Pico.drl
View File

@ -1,164 +0,0 @@
M48
; DRILL file {KiCad (5.1.10)-1} date 11/27/22 19:40:00
; FORMAT={-:-/ absolute / metric / decimal}
; #@! TF.CreationDate,2022-11-27T19:40:00-05:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.10)-1
FMAT,2
METRIC
T1C0.400
T2C1.000
T3C3.200
%
G90
G05
T1
X84.312Y-94.572
X84.312Y-95.715
X84.312Y-124.417
X84.312Y-125.56
X85.455Y-94.572
X85.455Y-125.56
X92.313Y-109.812
X94.218Y-110.447
X94.218Y-113.749
X96.758Y-105.494
X96.758Y-108.288
X96.885Y-101.684
X98.663Y-100.668
X98.663Y-104.224
X98.663Y-109.304
X98.663Y-114.384
X98.663Y-119.464
X100.314Y-101.684
X100.314Y-105.24
X100.314Y-106.764
X100.314Y-103.208
X100.314Y-108.288
X102.854Y-100.16
X104.124Y-100.16
X105.394Y-100.16
X106.664Y-100.16
X107.68Y-125.56
X107.934Y-100.16
X108.823Y-124.417
X108.823Y-125.56
X109.204Y-100.16
X111.617Y-124.925
X118.729Y-105.113
X118.983Y-114.638
X119.618Y-105.748
X120.507Y-106.383
X121.264Y-116.738
X121.274Y-111.013
X121.396Y-107.018
X122.285Y-107.653
X123.174Y-108.288
X124.063Y-108.923
X124.698Y-118.702
X124.952Y-109.558
X125.587Y-117.94
X125.587Y-119.464
X126.476Y-120.226
X127.619Y-120.226
X128.127Y-105.113
X128.762Y-120.226
X129.016Y-105.748
X129.616Y-119.464
X129.905Y-106.383
X130.413Y-114.765
X130.54Y-118.702
X130.794Y-107.018
X131.302Y-114.13
X131.683Y-107.653
X132.572Y-108.288
X132.699Y-116.738
X132.704Y-111.013
X133.334Y-82.57
X133.461Y-108.923
X133.842Y-102.319
X134.35Y-109.558
X136.382Y-102.319
X136.382Y-82.126
X138.922Y-82.126
X141.462Y-102.319
X144.002Y-102.319
X144.129Y-112.606
X144.129Y-116.738
X144.134Y-111.013
X146.542Y-102.319
X149.082Y-102.446
X149.099Y-96.35
X149.463Y-119.464
X150.479Y-123.274
X151.622Y-96.35
X151.876Y-122.258
X154.162Y-102.319
X154.162Y-96.858
X155.559Y-116.738
X155.564Y-111.013
X155.813Y-102.319
X158.861Y-118.067
X158.988Y-115.527
X160.385Y-112.987
X160.385Y-115.527
X160.385Y-118.067
X161.782Y-82.126
X163.687Y-109.558
X164.068Y-117.686
X164.322Y-82.126
X164.322Y-102.954
X164.957Y-115.527
X166.227Y-105.621
X166.862Y-83.015
X167.497Y-113.304
X167.497Y-125.687
X169.402Y-83.015
X169.402Y-102.446
X169.91Y-108.796
X170.037Y-125.737
X171.942Y-83.015
X171.942Y-102.446
X173.249Y-106.853
X174.482Y-83.015
X174.482Y-102.446
X175.371Y-124.417
X175.371Y-125.56
X176.387Y-120.988
X176.514Y-125.56
X177.022Y-82.126
X177.022Y-103.271
X178.765Y-111.047
X178.8Y-102.7
X178.8Y-108.542
X179.27Y-122.042
X179.562Y-82.253
X179.562Y-97.429
X181.721Y-102.827
X181.721Y-125.56
X182.102Y-98.128
X182.102Y-82.253
X182.864Y-102.827
X182.864Y-103.97
X182.864Y-124.417
X182.864Y-125.56
T2
X86.575Y-105.224
X86.575Y-107.514
X86.575Y-109.804
X86.575Y-112.094
X86.575Y-114.384
X88.555Y-106.369
X88.555Y-108.659
X88.555Y-110.949
X88.555Y-113.239
X88.555Y-115.529
X90.535Y-105.224
X90.535Y-107.514
X90.535Y-109.804
X90.535Y-112.094
X90.535Y-114.384
T3
X88.485Y-97.569
X88.485Y-122.569
T0
M30

BIN
GERBERS-Rev0/AppleII-Pico.zip
View File

Binary file not shown.

4350
GERBERS-Rev1/AppleII-Pico-B_Cu.gbl
View File

File diff suppressed because it is too large Load Diff

94
GERBERS-Rev1/AppleII-Pico-B_Mask.gbs
View File

@ -1,94 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-12-06T13:34:18-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Soldermask,Bot*%
%TF.FilePolarity,Negative*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-12-06 13:34:18*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,4.000000*%
%ADD11C,1.600000*%
%ADD12R,1.600000X1.600000*%
%ADD13R,1.400000X8.000000*%
%ADD14C,0.254000*%
%ADD15C,0.100000*%
G04 APERTURE END LIST*
D10*
%TO.C,J2*%
X88485000Y-122569000D03*
X88485000Y-97569000D03*
D11*
X86575000Y-105224000D03*
X86575000Y-107514000D03*
X86575000Y-109804000D03*
X86575000Y-112094000D03*
X86575000Y-114384000D03*
X88555000Y-106369000D03*
X88555000Y-108659000D03*
X88555000Y-110949000D03*
X88555000Y-113239000D03*
X88555000Y-115529000D03*
X90535000Y-105224000D03*
X90535000Y-107514000D03*
X90535000Y-109804000D03*
X90535000Y-112094000D03*
D12*
X90535000Y-114384000D03*
%TD*%
D13*
%TO.C,J1*%
X172590000Y-130237500D03*
X170050000Y-130237500D03*
X167510000Y-130237500D03*
X164970000Y-130237500D03*
X162430000Y-130237500D03*
X159890000Y-130237500D03*
X157350000Y-130237500D03*
X154810000Y-130237500D03*
X152270000Y-130237500D03*
X149730000Y-130237500D03*
X147190000Y-130237500D03*
X144650000Y-130237500D03*
X142110000Y-130237500D03*
X139570000Y-130237500D03*
X137030000Y-130237500D03*
X134490000Y-130237500D03*
X131950000Y-130237500D03*
X129410000Y-130237500D03*
X126870000Y-130237500D03*
X124330000Y-130237500D03*
X121790000Y-130237500D03*
X119250000Y-130237500D03*
X116710000Y-130237500D03*
X114170000Y-130237500D03*
X111630000Y-130237500D03*
%TD*%
D14*
X174609000Y-126489606D02*
X174609000Y-133774394D01*
X173933394Y-134450000D01*
X110260606Y-134450000D01*
X109585000Y-133774394D01*
X109585000Y-126489606D01*
X110260606Y-125814000D01*
X173933394Y-125814000D01*
X174609000Y-126489606D01*
D15*
G36*
X174609000Y-126489606D02*
G01*
X174609000Y-133774394D01*
X173933394Y-134450000D01*
X110260606Y-134450000D01*
X109585000Y-133774394D01*
X109585000Y-126489606D01*
X110260606Y-125814000D01*
X173933394Y-125814000D01*
X174609000Y-126489606D01*
G37*
M02*

44
GERBERS-Rev1/AppleII-Pico-B_Paste.gbp
View File

@ -1,44 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-12-06T13:34:18-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Paste,Bot*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-12-06 13:34:18*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10R,1.400000X8.000000*%
G04 APERTURE END LIST*
D10*
%TO.C,J1*%
X172590000Y-130237500D03*
X170050000Y-130237500D03*
X167510000Y-130237500D03*
X164970000Y-130237500D03*
X162430000Y-130237500D03*
X159890000Y-130237500D03*
X157350000Y-130237500D03*
X154810000Y-130237500D03*
X152270000Y-130237500D03*
X149730000Y-130237500D03*
X147190000Y-130237500D03*
X144650000Y-130237500D03*
X142110000Y-130237500D03*
X139570000Y-130237500D03*
X137030000Y-130237500D03*
X134490000Y-130237500D03*
X131950000Y-130237500D03*
X129410000Y-130237500D03*
X126870000Y-130237500D03*
X124330000Y-130237500D03*
X121790000Y-130237500D03*
X119250000Y-130237500D03*
X116710000Y-130237500D03*
X114170000Y-130237500D03*
X111630000Y-130237500D03*
%TD*%
M02*

1942
GERBERS-Rev1/AppleII-Pico-B_SilkS.gbo
View File

File diff suppressed because it is too large Load Diff

48
GERBERS-Rev1/AppleII-Pico-Edge_Cuts.gm1
View File

@ -1,48 +0,0 @@
%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-12-06T13:34:18-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Profile,NP*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-12-06 13:34:18*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%TA.AperFunction,Profile*%
%ADD10C,0.050000*%
%TD*%
G04 APERTURE END LIST*
D10*
X132064000Y-96096000D02*
X132064000Y-77808000D01*
X129016000Y-99144000D02*
X132064000Y-96096000D01*
X98536000Y-99144000D02*
X129016000Y-99144000D01*
X92948000Y-93556000D02*
X98536000Y-99144000D01*
X77581000Y-93556000D02*
X92948000Y-93556000D01*
X174241000Y-134492000D02*
X174749000Y-133984000D01*
X109979000Y-134492000D02*
X109471000Y-133984000D01*
X109979000Y-134492000D02*
X174241000Y-134492000D01*
X109471000Y-126576000D02*
X109471000Y-133984000D01*
X77581000Y-126576000D02*
X109471000Y-126576000D01*
X77581000Y-93556000D02*
X77581000Y-126576000D01*
X183880000Y-77808000D02*
X132064000Y-77808000D01*
X183880000Y-126576000D02*
X183880000Y-77808000D01*
X174749000Y-126576000D02*
X183880000Y-126576000D01*
X174749000Y-133984000D02*
X174749000Y-126576000D01*
M02*

11248
GERBERS-Rev1/AppleII-Pico-F_Cu.gtl
View File

File diff suppressed because it is too large Load Diff

3833
GERBERS-Rev1/AppleII-Pico-F_Mask.gts
View File

File diff suppressed because it is too large Load Diff

3748
GERBERS-Rev1/AppleII-Pico-F_Paste.gtp
View File

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%TF.GenerationSoftware,KiCad,Pcbnew,(5.1.10)-1*%
%TF.CreationDate,2022-12-06T13:34:18-05:00*%
%TF.ProjectId,AppleII-Pico,4170706c-6549-4492-9d50-69636f2e6b69,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Legend,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.10)-1) date 2022-12-06 13:34:18*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%ADD10C,0.400000*%
%ADD11C,0.500000*%
%ADD12C,0.120000*%
%ADD13C,0.100000*%
%ADD14C,0.150000*%
G04 APERTURE END LIST*
D10*
X165519314Y-124508961D02*
X164852647Y-123556580D01*
X164376457Y-124508961D02*
X164376457Y-122508961D01*
X165138361Y-122508961D01*
X165328838Y-122604200D01*
X165424076Y-122699438D01*
X165519314Y-122889914D01*
X165519314Y-123175628D01*
X165424076Y-123366104D01*
X165328838Y-123461342D01*
X165138361Y-123556580D01*
X164376457Y-123556580D01*
X167138361Y-124413723D02*
X166947885Y-124508961D01*
X166566933Y-124508961D01*
X166376457Y-124413723D01*
X166281219Y-124223247D01*
X166281219Y-123461342D01*
X166376457Y-123270866D01*
X166566933Y-123175628D01*
X166947885Y-123175628D01*
X167138361Y-123270866D01*
X167233600Y-123461342D01*
X167233600Y-123651819D01*
X166281219Y-123842295D01*
X167900266Y-123175628D02*
X168376457Y-124508961D01*
X168852647Y-123175628D01*
X172185980Y-124508961D02*
X171043123Y-124508961D01*
X171614552Y-124508961D02*
X171614552Y-122508961D01*
X171424076Y-122794676D01*
X171233600Y-122985152D01*
X171043123Y-123080390D01*
D11*
X103049190Y-119753666D02*
X104239666Y-119753666D01*
X102811095Y-120467952D02*
X103644428Y-117967952D01*
X104477761Y-120467952D01*
X105311095Y-118801285D02*
X105311095Y-120467952D01*
X105311095Y-119039380D02*
X105430142Y-118920333D01*
X105668238Y-118801285D01*
X106025380Y-118801285D01*
X106263476Y-118920333D01*
X106382523Y-119158428D01*
X106382523Y-120467952D01*
X108644428Y-120467952D02*
X108644428Y-119158428D01*
X108525380Y-118920333D01*
X108287285Y-118801285D01*
X107811095Y-118801285D01*
X107573000Y-118920333D01*
X108644428Y-120348904D02*
X108406333Y-120467952D01*
X107811095Y-120467952D01*
X107573000Y-120348904D01*
X107453952Y-120110809D01*
X107453952Y-119872714D01*
X107573000Y-119634619D01*
X107811095Y-119515571D01*
X108406333Y-119515571D01*
X108644428Y-119396523D01*
X110192047Y-120467952D02*
X109953952Y-120348904D01*
X109834904Y-120110809D01*
X109834904Y-117967952D01*
X111501571Y-120467952D02*
X111263476Y-120348904D01*
X111144428Y-120229857D01*
X111025380Y-119991761D01*
X111025380Y-119277476D01*
X111144428Y-119039380D01*
X111263476Y-118920333D01*
X111501571Y-118801285D01*
X111858714Y-118801285D01*
X112096809Y-118920333D01*
X112215857Y-119039380D01*
X112334904Y-119277476D01*
X112334904Y-119991761D01*
X112215857Y-120229857D01*
X112096809Y-120348904D01*
X111858714Y-120467952D01*
X111501571Y-120467952D01*
X114477761Y-118801285D02*
X114477761Y-120825095D01*
X114358714Y-121063190D01*
X114239666Y-121182238D01*
X114001571Y-121301285D01*
X113644428Y-121301285D01*
X113406333Y-121182238D01*
X114477761Y-120348904D02*
X114239666Y-120467952D01*
X113763476Y-120467952D01*
X113525380Y-120348904D01*
X113406333Y-120229857D01*
X113287285Y-119991761D01*
X113287285Y-119277476D01*
X113406333Y-119039380D01*
X113525380Y-118920333D01*
X113763476Y-118801285D01*
X114239666Y-118801285D01*
X114477761Y-118920333D01*
X148708504Y-89019061D02*
X148708504Y-90447633D01*
X148613266Y-90733347D01*
X148422790Y-90923823D01*
X148137076Y-91019061D01*
X147946600Y-91019061D01*
X150613266Y-91019061D02*
X149660885Y-91019061D01*
X149660885Y-89019061D01*
X152422790Y-90828585D02*
X152327552Y-90923823D01*
X152041838Y-91019061D01*
X151851361Y-91019061D01*
X151565647Y-90923823D01*
X151375171Y-90733347D01*
X151279933Y-90542871D01*
X151184695Y-90161919D01*
X151184695Y-89876204D01*
X151279933Y-89495252D01*
X151375171Y-89304776D01*
X151565647Y-89114300D01*
X151851361Y-89019061D01*
X152041838Y-89019061D01*
X152327552Y-89114300D01*
X152422790Y-89209538D01*
X153851361Y-89019061D02*
X153851361Y-90447633D01*
X153756123Y-90733347D01*
X153565647Y-90923823D01*
X153279933Y-91019061D01*
X153089457Y-91019061D01*
X155756123Y-91019061D02*
X154803742Y-91019061D01*
X154803742Y-89019061D01*
X157565647Y-90828585D02*
X157470409Y-90923823D01*
X157184695Y-91019061D01*
X156994219Y-91019061D01*
X156708504Y-90923823D01*
X156518028Y-90733347D01*
X156422790Y-90542871D01*
X156327552Y-90161919D01*
X156327552Y-89876204D01*
X156422790Y-89495252D01*
X156518028Y-89304776D01*
X156708504Y-89114300D01*
X156994219Y-89019061D01*
X157184695Y-89019061D01*
X157470409Y-89114300D01*
X157565647Y-89209538D01*
X158994219Y-89019061D02*
X158994219Y-90447633D01*
X158898980Y-90733347D01*
X158708504Y-90923823D01*
X158422790Y-91019061D01*
X158232314Y-91019061D01*
X160898980Y-91019061D02*
X159946600Y-91019061D01*
X159946600Y-89019061D01*
X162708504Y-90828585D02*
X162613266Y-90923823D01*
X162327552Y-91019061D01*
X162137076Y-91019061D01*
X161851361Y-90923823D01*
X161660885Y-90733347D01*
X161565647Y-90542871D01*
X161470409Y-90161919D01*
X161470409Y-89876204D01*
X161565647Y-89495252D01*
X161660885Y-89304776D01*
X161851361Y-89114300D01*
X162137076Y-89019061D01*
X162327552Y-89019061D01*
X162613266Y-89114300D01*
X162708504Y-89209538D01*
X164137076Y-89019061D02*
X164137076Y-90447633D01*
X164041838Y-90733347D01*
X163851361Y-90923823D01*
X163565647Y-91019061D01*
X163375171Y-91019061D01*
X166041838Y-91019061D02*
X165089457Y-91019061D01*
X165089457Y-89019061D01*
X167851361Y-90828585D02*
X167756123Y-90923823D01*
X167470409Y-91019061D01*
X167279933Y-91019061D01*
X166994219Y-90923823D01*
X166803742Y-90733347D01*
X166708504Y-90542871D01*
X166613266Y-90161919D01*
X166613266Y-89876204D01*
X166708504Y-89495252D01*
X166803742Y-89304776D01*
X166994219Y-89114300D01*
X167279933Y-89019061D01*
X167470409Y-89019061D01*
X167756123Y-89114300D01*
X167851361Y-89209538D01*
X108188000Y-113368000D02*
X107045000Y-113368000D01*
X106799190Y-112633952D02*
X107632523Y-115133952D01*
X108465857Y-112633952D01*
X109180142Y-112872047D02*
X109299190Y-112753000D01*
X109537285Y-112633952D01*
X110132523Y-112633952D01*
X110370619Y-112753000D01*
X110489666Y-112872047D01*
X110608714Y-113110142D01*
X110608714Y-113348238D01*
X110489666Y-113705380D01*
X109061095Y-115133952D01*
X110608714Y-115133952D01*
D12*
%TO.C,U6*%
X132452000Y-77905000D02*
X132452000Y-101950000D01*
X183492000Y-77905000D02*
X132452000Y-77905000D01*
X183492000Y-101950000D02*
X183492000Y-77905000D01*
X132452000Y-101950000D02*
X183492000Y-101950000D01*
X132512000Y-82405000D02*
X132512000Y-97405000D01*
X183432000Y-82405000D02*
X132512000Y-82405000D01*
X183432000Y-97405000D02*
X183432000Y-82405000D01*
X132512000Y-97405000D02*
X183432000Y-97405000D01*
%TO.C,J3*%
X164827000Y-116527000D02*
X164827000Y-114527000D01*
X167627000Y-116527000D02*
X164827000Y-116527000D01*
X167627000Y-114527000D02*
X167627000Y-116527000D01*
X164827000Y-114527000D02*
X167627000Y-114527000D01*
%TO.C,D1*%
X174019000Y-106765000D02*
X174019000Y-110065000D01*
X174019000Y-110065000D02*
X180919000Y-110065000D01*
X174019000Y-106765000D02*
X180919000Y-106765000D01*
%TO.C,C11*%
X180351000Y-122818248D02*
X180351000Y-123340752D01*
X181821000Y-122818248D02*
X181821000Y-123340752D01*
%TO.C,C10*%
X172794500Y-113995748D02*
X172794500Y-114518252D01*
X174264500Y-113995748D02*
X174264500Y-114518252D01*
%TO.C,U7*%
X175355000Y-119934000D02*
X175355000Y-113924000D01*
X182175000Y-117684000D02*
X182175000Y-113924000D01*
X175355000Y-113924000D02*
X176615000Y-113924000D01*
X182175000Y-113924000D02*
X180915000Y-113924000D01*
D13*
%TO.C,U5*%
X171392000Y-120692000D02*
X171392000Y-119042000D01*
X169742000Y-120692000D02*
X171392000Y-120692000D01*
X161062000Y-120692000D02*
X161062000Y-119042000D01*
X162712000Y-120692000D02*
X161062000Y-120692000D01*
X171392000Y-110362000D02*
X171392000Y-112012000D01*
X169742000Y-110362000D02*
X171392000Y-110362000D01*
X161062000Y-111512000D02*
X161062000Y-112012000D01*
X162212000Y-110362000D02*
X161062000Y-111512000D01*
X162712000Y-110362000D02*
X162212000Y-110362000D01*
D12*
%TO.C,C9*%
X168016165Y-109156000D02*
X168247835Y-109156000D01*
X168016165Y-108436000D02*
X168247835Y-108436000D01*
%TO.C,C8*%
X157475165Y-111442000D02*
X157706835Y-111442000D01*
X157475165Y-110722000D02*
X157706835Y-110722000D01*
%TO.C,C7*%
X157475165Y-117030000D02*
X157706835Y-117030000D01*
X157475165Y-116310000D02*
X157706835Y-116310000D01*
%TO.C,C6*%
X146045165Y-111442000D02*
X146276835Y-111442000D01*
X146045165Y-110722000D02*
X146276835Y-110722000D01*
%TO.C,C5*%
X146045165Y-117030000D02*
X146276835Y-117030000D01*
X146045165Y-116310000D02*
X146276835Y-116310000D01*
%TO.C,C4*%
X134615165Y-111442000D02*
X134846835Y-111442000D01*
X134615165Y-110722000D02*
X134846835Y-110722000D01*
%TO.C,C3*%
X134615165Y-117030000D02*
X134846835Y-117030000D01*
X134615165Y-116310000D02*
X134846835Y-116310000D01*
%TO.C,C2*%
X123185165Y-111442000D02*
X123416835Y-111442000D01*
X123185165Y-110722000D02*
X123416835Y-110722000D01*
%TO.C,C1*%
X123185165Y-117030000D02*
X123416835Y-117030000D01*
X123185165Y-116310000D02*
X123416835Y-116310000D01*
%TO.C,J2*%
X92666325Y-114384000D02*
X93099338Y-114134000D01*
X93099338Y-114634000D02*
X92666325Y-114384000D01*
X93099338Y-114134000D02*
X93099338Y-114634000D01*
X92205000Y-125554000D02*
X83605000Y-125554000D01*
X92205000Y-94584000D02*
X92205000Y-125554000D01*
X83605000Y-94584000D02*
X92205000Y-94584000D01*
%TO.C,U4*%
X154486000Y-113876000D02*
X154486000Y-110276000D01*
X154486000Y-113876000D02*
X154486000Y-116076000D01*
X149266000Y-113876000D02*
X149266000Y-111676000D01*
X149266000Y-113876000D02*
X149266000Y-116076000D01*
%TO.C,U3*%
X143056000Y-113876000D02*
X143056000Y-110276000D01*
X143056000Y-113876000D02*
X143056000Y-116076000D01*
X137836000Y-113876000D02*
X137836000Y-111676000D01*
X137836000Y-113876000D02*
X137836000Y-116076000D01*
%TO.C,U1*%
X120196000Y-113876000D02*
X120196000Y-110276000D01*
X120196000Y-113876000D02*
X120196000Y-116076000D01*
X114976000Y-113876000D02*
X114976000Y-111676000D01*
X114976000Y-113876000D02*
X114976000Y-116076000D01*
%TO.C,U2*%
X131626000Y-113876000D02*
X131626000Y-110276000D01*
X131626000Y-113876000D02*
X131626000Y-116076000D01*
X126406000Y-113876000D02*
X126406000Y-111676000D01*
X126406000Y-113876000D02*
X126406000Y-116076000D01*
%TO.C,R14*%
X171562000Y-104945379D02*
X171562000Y-105280621D01*
X172322000Y-104945379D02*
X172322000Y-105280621D01*
%TO.C,R13*%
X174102000Y-104945379D02*
X174102000Y-105280621D01*
X174862000Y-104945379D02*
X174862000Y-105280621D01*
%TO.C,R12*%
X169022000Y-104945379D02*
X169022000Y-105280621D01*
X169782000Y-104945379D02*
X169782000Y-105280621D01*
%TO.C,R11*%
X98830621Y-102828000D02*
X98495379Y-102828000D01*
X98830621Y-103588000D02*
X98495379Y-103588000D01*
%TO.C,R10*%
X98830621Y-101304000D02*
X98495379Y-101304000D01*
X98830621Y-102064000D02*
X98495379Y-102064000D01*
%TO.C,R9*%
X98830621Y-104860000D02*
X98495379Y-104860000D01*
X98830621Y-105620000D02*
X98495379Y-105620000D01*
%TO.C,R8*%
X98830621Y-106384000D02*
X98495379Y-106384000D01*
X98830621Y-107144000D02*
X98495379Y-107144000D01*
%TO.C,R7*%
X98830621Y-107908000D02*
X98495379Y-107908000D01*
X98830621Y-108668000D02*
X98495379Y-108668000D01*
%TO.C,R6*%
X98830621Y-109940000D02*
X98495379Y-109940000D01*
X98830621Y-110700000D02*
X98495379Y-110700000D01*
%TO.C,R5*%
X98830621Y-111464000D02*
X98495379Y-111464000D01*
X98830621Y-112224000D02*
X98495379Y-112224000D01*
%TO.C,R4*%
X98830621Y-112988000D02*
X98495379Y-112988000D01*
X98830621Y-113748000D02*
X98495379Y-113748000D01*
%TO.C,R3*%
X98830621Y-115020000D02*
X98495379Y-115020000D01*
X98830621Y-115780000D02*
X98495379Y-115780000D01*
%TO.C,R2*%
X98830621Y-116544000D02*
X98495379Y-116544000D01*
X98830621Y-117304000D02*
X98495379Y-117304000D01*
%TO.C,R1*%
X98830621Y-118068000D02*
X98495379Y-118068000D01*
X98830621Y-118828000D02*
X98495379Y-118828000D01*
%TO.C,J3*%
D14*
X165893666Y-113179380D02*
X165893666Y-113893666D01*
X165846047Y-114036523D01*
X165750809Y-114131761D01*
X165607952Y-114179380D01*
X165512714Y-114179380D01*
X166274619Y-113179380D02*
X166893666Y-113179380D01*
X166560333Y-113560333D01*
X166703190Y-113560333D01*
X166798428Y-113607952D01*
X166846047Y-113655571D01*
X166893666Y-113750809D01*
X166893666Y-113988904D01*
X166846047Y-114084142D01*
X166798428Y-114131761D01*
X166703190Y-114179380D01*
X166417476Y-114179380D01*
X166322238Y-114131761D01*
X166274619Y-114084142D01*
%TO.C,U7*%
X175752095Y-116630380D02*
X175752095Y-117439904D01*
X175799714Y-117535142D01*
X175847333Y-117582761D01*
X175942571Y-117630380D01*
X176133047Y-117630380D01*
X176228285Y-117582761D01*
X176275904Y-117535142D01*
X176323523Y-117439904D01*
X176323523Y-116630380D01*
X176704476Y-116630380D02*
X177371142Y-116630380D01*
X176942571Y-117630380D01*
%TO.C,U5*%
X165465095Y-112820380D02*
X165465095Y-113629904D01*
X165512714Y-113725142D01*
X165560333Y-113772761D01*
X165655571Y-113820380D01*
X165846047Y-113820380D01*
X165941285Y-113772761D01*
X165988904Y-113725142D01*
X166036523Y-113629904D01*
X166036523Y-112820380D01*
X166988904Y-112820380D02*
X166512714Y-112820380D01*
X166465095Y-113296571D01*
X166512714Y-113248952D01*
X166607952Y-113201333D01*
X166846047Y-113201333D01*
X166941285Y-113248952D01*
X166988904Y-113296571D01*
X167036523Y-113391809D01*
X167036523Y-113629904D01*
X166988904Y-113725142D01*
X166941285Y-113772761D01*
X166846047Y-113820380D01*
X166607952Y-113820380D01*
X166512714Y-113772761D01*
X166465095Y-113725142D01*
%TO.C,U4*%
X152638095Y-112058380D02*
X152638095Y-112867904D01*
X152685714Y-112963142D01*
X152733333Y-113010761D01*
X152828571Y-113058380D01*
X153019047Y-113058380D01*
X153114285Y-113010761D01*
X153161904Y-112963142D01*
X153209523Y-112867904D01*
X153209523Y-112058380D01*
X154114285Y-112391714D02*
X154114285Y-113058380D01*
X153876190Y-112010761D02*
X153638095Y-112725047D01*
X154257142Y-112725047D01*
%TO.C,U3*%
X141208095Y-112058380D02*
X141208095Y-112867904D01*
X141255714Y-112963142D01*
X141303333Y-113010761D01*
X141398571Y-113058380D01*
X141589047Y-113058380D01*
X141684285Y-113010761D01*
X141731904Y-112963142D01*
X141779523Y-112867904D01*
X141779523Y-112058380D01*
X142160476Y-112058380D02*
X142779523Y-112058380D01*
X142446190Y-112439333D01*
X142589047Y-112439333D01*
X142684285Y-112486952D01*
X142731904Y-112534571D01*
X142779523Y-112629809D01*
X142779523Y-112867904D01*
X142731904Y-112963142D01*
X142684285Y-113010761D01*
X142589047Y-113058380D01*
X142303333Y-113058380D01*
X142208095Y-113010761D01*
X142160476Y-112963142D01*
%TO.C,U1*%
X118348095Y-112058380D02*
X118348095Y-112867904D01*
X118395714Y-112963142D01*
X118443333Y-113010761D01*
X118538571Y-113058380D01*
X118729047Y-113058380D01*
X118824285Y-113010761D01*
X118871904Y-112963142D01*
X118919523Y-112867904D01*
X118919523Y-112058380D01*
X119919523Y-113058380D02*
X119348095Y-113058380D01*
X119633809Y-113058380D02*
X119633809Y-112058380D01*
X119538571Y-112201238D01*
X119443333Y-112296476D01*
X119348095Y-112344095D01*
%TO.C,U2*%
X129778095Y-112058380D02*
X129778095Y-112867904D01*
X129825714Y-112963142D01*
X129873333Y-113010761D01*
X129968571Y-113058380D01*
X130159047Y-113058380D01*
X130254285Y-113010761D01*
X130301904Y-112963142D01*
X130349523Y-112867904D01*
X130349523Y-112058380D01*
X130778095Y-112153619D02*
X130825714Y-112106000D01*
X130920952Y-112058380D01*
X131159047Y-112058380D01*
X131254285Y-112106000D01*
X131301904Y-112153619D01*
X131349523Y-112248857D01*
X131349523Y-112344095D01*
X131301904Y-112486952D01*
X130730476Y-113058380D01*
X131349523Y-113058380D01*
%TD*%
M02*

4828
GERBERS-Rev1/AppleII-Pico-In1_Cu.g2
View File

File diff suppressed because it is too large Load Diff

5027
GERBERS-Rev1/AppleII-Pico-In2_Cu.g3
View File

File diff suppressed because it is too large Load Diff

165
GERBERS-Rev1/AppleII-Pico-job.gbrjob
View File

@ -1,165 +0,0 @@
{
"Header":
{
"GenerationSoftware":
{
"Vendor": "KiCad",
"Application": "Pcbnew",
"Version": "(5.1.10)-1"
},
"CreationDate": "2022-12-06T13:34:18-05:00"
},
"GeneralSpecs":
{
"ProjectId":
{
"Name": "AppleII-Pico",
"GUID": "4170706c-6549-4492-9d50-69636f2e6b69",
"Revision": "rev?"
},
"Size":
{
"X": 106.349,
"Y": 56.734
},
"LayerNumber": 4,
"BoardThickness": 2.000
},
"DesignRules":
[
{
"Layers": "Outer",
"PadToPad": 0.100,
"PadToTrack": 0.100,
"TrackToTrack": 0.100,
"MinLineWidth": 0.200,
"TrackToRegion": 0.575,
"RegionToRegion": 0.575
},
{
"Layers": "Inner",
"PadToPad": 0.100,
"PadToTrack": 0.100,
"TrackToTrack": 0.100,
"MinLineWidth": 0.200,
"TrackToRegion": 0.575,
"RegionToRegion": 0.575
}
],
"FilesAttributes":
[
{
"Path": "AppleII-Pico-F_Cu.gtl",
"FileFunction": "Copper,L1,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-In1_Cu.g2",
"FileFunction": "Copper,L2,Inr",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-In2_Cu.g3",
"FileFunction": "Copper,L3,Inr",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_Cu.gbl",
"FileFunction": "Copper,L4,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_Paste.gtp",
"FileFunction": "SolderPaste,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_Paste.gbp",
"FileFunction": "SolderPaste,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_SilkS.gto",
"FileFunction": "Legend,Top",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-B_SilkS.gbo",
"FileFunction": "Legend,Bot",
"FilePolarity": "Positive"
},
{
"Path": "AppleII-Pico-F_Mask.gts",
"FileFunction": "SolderMask,Top",
"FilePolarity": "Negative"
},
{
"Path": "AppleII-Pico-B_Mask.gbs",
"FileFunction": "SolderMask,Bot",
"FilePolarity": "Negative"
},
{
"Path": "AppleII-Pico-Edge_Cuts.gm1",
"FileFunction": "Profile",
"FilePolarity": "Positive"
}
],
"MaterialStackup":
[
{
"Type": "Legend",
"Notes": "Layer F.SilkS"
},
{
"Type": "SolderPaste",
"Notes": "Layer F.Paste"
},
{
"Type": "SolderMask",
"Notes": "Layer F.Mask"
},
{
"Type": "Copper",
"Notes": "Layer F.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L1/L2"
},
{
"Type": "Copper",
"Notes": "Layer In1.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L2/L3"
},
{
"Type": "Copper",
"Notes": "Layer In2.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Notes": "Layers L3/L4"
},
{
"Type": "Copper",
"Notes": "Layer B.Cu"
},
{
"Type": "SolderMask",
"Notes": "Layer B.Mask"
},
{
"Type": "SolderPaste",
"Notes": "Layer B.Paste"
},
{
"Type": "Legend",
"Notes": "Layer B.SilkS"
}
]
}

176
GERBERS-Rev1/AppleII-Pico.drl
View File

@ -1,176 +0,0 @@
M48
; DRILL file {KiCad (5.1.10)-1} date 12/06/22 13:34:20
; FORMAT={-:-/ absolute / metric / decimal}
; #@! TF.CreationDate,2022-12-06T13:34:20-05:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.10)-1
FMAT,2
METRIC
T1C0.400
T2C1.000
T3C3.200
%
G90
G05
T1
X78.47Y-94.572
X78.47Y-95.715
X78.47Y-124.417
X78.47Y-125.56
X79.613Y-94.572
X79.613Y-125.56
X92.313Y-109.812
X94.218Y-110.447
X94.218Y-113.749
X96.758Y-105.494
X96.758Y-108.288
X96.885Y-101.684
X98.663Y-100.668
X98.663Y-104.224
X98.663Y-109.304
X98.663Y-114.384
X98.663Y-119.464
X100.314Y-101.684
X100.314Y-105.24
X100.314Y-106.764
X100.314Y-108.288
X100.314Y-110.32
X100.314Y-111.844
X100.314Y-113.368
X100.314Y-115.4
X100.314Y-116.924
X100.314Y-118.448
X100.314Y-103.208
X107.68Y-125.56
X108.823Y-124.417
X108.823Y-125.56
X111.617Y-124.925
X118.729Y-105.113
X118.983Y-114.638
X119.618Y-105.748
X120.507Y-106.383
X121.264Y-116.738
X121.274Y-111.013
X121.396Y-107.018
X122.285Y-107.653
X123.174Y-108.288
X124.063Y-108.923
X124.698Y-118.702
X124.952Y-109.558
X125.587Y-117.94
X125.587Y-119.464
X126.476Y-120.226
X127.619Y-120.226
X128.127Y-105.113
X128.762Y-120.226
X129.016Y-105.748
X129.616Y-119.464
X129.905Y-106.383
X130.413Y-114.765
X130.54Y-118.702
X130.794Y-107.018
X131.302Y-114.13
X131.683Y-107.653
X132.572Y-108.288
X132.699Y-116.738
X132.704Y-111.013
X132.826Y-124.925
X133.334Y-83.269
X133.461Y-108.923
X133.842Y-102.319
X134.35Y-109.558
X134.604Y-124.544
X136.382Y-102.319
X136.382Y-82.888
X137.144Y-124.544
X138.922Y-82.888
X139.43Y-124.544
X141.462Y-102.319
X144.002Y-102.319
X144.129Y-112.606
X144.129Y-116.738
X144.134Y-111.013
X146.542Y-102.319
X149.082Y-82.888
X149.082Y-102.446
X149.463Y-119.464
X150.476Y-120.356
X151.622Y-82.888
X153.4Y-124.925
X154.162Y-102.319
X154.162Y-82.888
X155.178Y-120.988
X155.559Y-116.738
X155.564Y-111.013
X155.813Y-102.319
X156.194Y-125.052
X158.861Y-118.067
X158.988Y-115.527
X160.004Y-122.258
X160.385Y-112.987
X160.385Y-115.527
X160.385Y-118.067
X160.893Y-120.734
X161.782Y-86.952
X162.036Y-125.052
X163.687Y-109.558
X164.322Y-82.888
X164.322Y-102.954
X164.957Y-113.368
X164.957Y-121.877
X166.227Y-105.621
X166.766Y-117.686
X166.862Y-86.444
X167.497Y-113.304
X167.497Y-125.687
X168.132Y-86.063
X168.894Y-122.512
X168.894Y-124.036
X169.402Y-102.446
X169.529Y-85.555
X169.91Y-108.796
X170.037Y-125.737
X170.926Y-85.047
X171.942Y-102.446
X171.942Y-106.764
X172.196Y-117.94
X172.323Y-84.539
X173.593Y-84.539
X174.482Y-102.446
X175.371Y-124.417
X175.371Y-125.56
X176.006Y-106.002
X176.387Y-120.988
X176.514Y-125.56
X177.022Y-82.888
X177.022Y-103.271
X178.765Y-111.047
X179.27Y-122.042
X179.562Y-96.858
X181.721Y-102.763
X181.721Y-125.56
X182.102Y-96.858
X182.864Y-102.763
X182.864Y-103.906
X182.864Y-124.417
X182.864Y-125.56
T2
X86.575Y-105.224
X86.575Y-107.514
X86.575Y-109.804
X86.575Y-112.094
X86.575Y-114.384
X88.555Y-106.369
X88.555Y-108.659
X88.555Y-110.949
X88.555Y-113.239
X88.555Y-115.529
X90.535Y-105.224
X90.535Y-107.514
X90.535Y-109.804
X90.535Y-112.094
X90.535Y-114.384
T3
X88.485Y-97.569
X88.485Y-122.569
T0
M30

BIN
GERBERS-Rev1/V2AnalogPicoPalRev1.zip
View File

Binary file not shown.

522
PCB/AppleII-Pico-cache.lib
View File

@ -1,522 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_DB15_Female_HighDensity_MountingHoles
#
DEF Connector_DB15_Female_HighDensity_MountingHoles J 0 40 Y N 1 F N
F0 "J" 0 850 50 H V C CNN
F1 "Connector_DB15_Female_HighDensity_MountingHoles" 0 750 50 H V C CNN
F2 "" -950 400 50 H I C CNN
F3 "" -950 400 50 H I C CNN
$FPLIST
DSUB*Female*
$ENDFPLIST
DRAW
C -75 -400 25 0 1 0 N
C -75 -200 25 0 1 0 N
C -75 0 25 0 1 0 N
C -75 200 25 0 1 0 N
C -75 400 25 0 1 0 N
C 0 -300 25 0 1 0 N
C 0 -100 25 0 1 0 N
C 0 100 25 0 1 0 N
C 0 300 25 0 1 0 N
C 0 500 25 0 1 0 N
C 75 -400 25 0 1 0 N
C 75 -200 25 0 1 0 N
C 75 0 25 0 1 0 N
C 75 200 25 0 1 0 N
C 75 400 25 0 1 0 N
P 2 0 1 0 -125 300 -25 300 N
P 2 0 1 0 -25 -300 -125 -300 N
P 2 0 1 0 -25 -100 -125 -100 N
P 2 0 1 0 -25 100 -125 100 N
P 2 0 1 0 -25 500 -125 500 N
P 5 0 1 10 -150 700 -150 -600 150 -500 150 600 -150 700 f
X ~ 0 0 -700 150 U 50 50 1 1 P
X ~ 1 -300 400 200 R 50 50 1 1 P
X ~ 10 -300 -300 200 R 50 50 1 1 P
X ~ 11 300 400 200 L 50 50 1 1 P
X ~ 12 300 200 200 L 50 50 1 1 P
X ~ 13 300 0 200 L 50 50 1 1 P
X ~ 14 300 -200 200 L 50 50 1 1 P
X ~ 15 300 -400 200 L 50 50 1 1 P
X ~ 2 -300 200 200 R 50 50 1 1 P
X ~ 3 -300 0 200 R 50 50 1 1 P
X ~ 4 -300 -200 200 R 50 50 1 1 P
X ~ 5 -300 -400 200 R 50 50 1 1 P
X ~ 6 -300 500 200 R 50 50 1 1 P
X ~ 7 -300 300 200 R 50 50 1 1 P
X ~ 8 -300 100 200 R 50 50 1 1 P
X ~ 9 -300 -100 200 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x02
#
DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 50 50 -150 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
X Pin_2 2 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x10_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x10_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 500 50 H V C CNN
F1 "Connector_Generic_Conn_02x10_Counter_Clockwise" 50 -600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 450 150 -550 1 1 10 f
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
X Pin_1 1 -200 400 150 R 50 50 1 1 P
X Pin_10 10 -200 -500 150 R 50 50 1 1 P
X Pin_11 11 300 -500 150 L 50 50 1 1 P
X Pin_12 12 300 -400 150 L 50 50 1 1 P
X Pin_13 13 300 -300 150 L 50 50 1 1 P
X Pin_14 14 300 -200 150 L 50 50 1 1 P
X Pin_15 15 300 -100 150 L 50 50 1 1 P
X Pin_16 16 300 0 150 L 50 50 1 1 P
X Pin_17 17 300 100 150 L 50 50 1 1 P
X Pin_18 18 300 200 150 L 50 50 1 1 P
X Pin_19 19 300 300 150 L 50 50 1 1 P
X Pin_2 2 -200 300 150 R 50 50 1 1 P
X Pin_20 20 300 400 150 L 50 50 1 1 P
X Pin_3 3 -200 200 150 R 50 50 1 1 P
X Pin_4 4 -200 100 150 R 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 -200 -100 150 R 50 50 1 1 P
X Pin_7 7 -200 -200 150 R 50 50 1 1 P
X Pin_8 8 -200 -300 150 R 50 50 1 1 P
X Pin_9 9 -200 -400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x12_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x12_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 600 50 H V C CNN
F1 "Connector_Generic_Conn_02x12_Counter_Clockwise" 50 -700 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 550 150 -650 1 1 10 f
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
X Pin_1 1 -200 500 150 R 50 50 1 1 P
X Pin_10 10 -200 -400 150 R 50 50 1 1 P
X Pin_11 11 -200 -500 150 R 50 50 1 1 P
X Pin_12 12 -200 -600 150 R 50 50 1 1 P
X Pin_13 13 300 -600 150 L 50 50 1 1 P
X Pin_14 14 300 -500 150 L 50 50 1 1 P
X Pin_15 15 300 -400 150 L 50 50 1 1 P
X Pin_16 16 300 -300 150 L 50 50 1 1 P
X Pin_17 17 300 -200 150 L 50 50 1 1 P
X Pin_18 18 300 -100 150 L 50 50 1 1 P
X Pin_19 19 300 0 150 L 50 50 1 1 P
X Pin_2 2 -200 400 150 R 50 50 1 1 P
X Pin_20 20 300 100 150 L 50 50 1 1 P
X Pin_21 21 300 200 150 L 50 50 1 1 P
X Pin_22 22 300 300 150 L 50 50 1 1 P
X Pin_23 23 300 400 150 L 50 50 1 1 P
X Pin_24 24 300 500 150 L 50 50 1 1 P
X Pin_3 3 -200 300 150 R 50 50 1 1 P
X Pin_4 4 -200 200 150 R 50 50 1 1 P
X Pin_5 5 -200 100 150 R 50 50 1 1 P
X Pin_6 6 -200 0 150 R 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 -200 -200 150 R 50 50 1 1 P
X Pin_9 9 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x20_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x20_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1000 50 H V C CNN
F1 "Connector_Generic_Conn_02x20_Counter_Clockwise" 50 -1100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 950 150 -1050 1 1 10 f
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
X Pin_1 1 -200 900 150 R 50 50 1 1 P
X Pin_10 10 -200 0 150 R 50 50 1 1 P
X Pin_11 11 -200 -100 150 R 50 50 1 1 P
X Pin_12 12 -200 -200 150 R 50 50 1 1 P
X Pin_13 13 -200 -300 150 R 50 50 1 1 P
X Pin_14 14 -200 -400 150 R 50 50 1 1 P
X Pin_15 15 -200 -500 150 R 50 50 1 1 P
X Pin_16 16 -200 -600 150 R 50 50 1 1 P
X Pin_17 17 -200 -700 150 R 50 50 1 1 P
X Pin_18 18 -200 -800 150 R 50 50 1 1 P
X Pin_19 19 -200 -900 150 R 50 50 1 1 P
X Pin_2 2 -200 800 150 R 50 50 1 1 P
X Pin_20 20 -200 -1000 150 R 50 50 1 1 P
X Pin_21 21 300 -1000 150 L 50 50 1 1 P
X Pin_22 22 300 -900 150 L 50 50 1 1 P
X Pin_23 23 300 -800 150 L 50 50 1 1 P
X Pin_24 24 300 -700 150 L 50 50 1 1 P
X Pin_25 25 300 -600 150 L 50 50 1 1 P
X Pin_26 26 300 -500 150 L 50 50 1 1 P
X Pin_27 27 300 -400 150 L 50 50 1 1 P
X Pin_28 28 300 -300 150 L 50 50 1 1 P
X Pin_29 29 300 -200 150 L 50 50 1 1 P
X Pin_3 3 -200 700 150 R 50 50 1 1 P
X Pin_30 30 300 -100 150 L 50 50 1 1 P
X Pin_31 31 300 0 150 L 50 50 1 1 P
X Pin_32 32 300 100 150 L 50 50 1 1 P
X Pin_33 33 300 200 150 L 50 50 1 1 P
X Pin_34 34 300 300 150 L 50 50 1 1 P
X Pin_35 35 300 400 150 L 50 50 1 1 P
X Pin_36 36 300 500 150 L 50 50 1 1 P
X Pin_37 37 300 600 150 L 50 50 1 1 P
X Pin_38 38 300 700 150 L 50 50 1 1 P
X Pin_39 39 300 800 150 L 50 50 1 1 P
X Pin_4 4 -200 600 150 R 50 50 1 1 P
X Pin_40 40 300 900 150 L 50 50 1 1 P
X Pin_5 5 -200 500 150 R 50 50 1 1 P
X Pin_6 6 -200 400 150 R 50 50 1 1 P
X Pin_7 7 -200 300 150 R 50 50 1 1 P
X Pin_8 8 -200 200 150 R 50 50 1 1 P
X Pin_9 9 -200 100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x25_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1300 50 H V C CNN
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1250 150 -1250 1 1 10 f
S 150 -1195 100 -1205 1 1 6 N
S 150 -1095 100 -1105 1 1 6 N
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
S 150 1005 100 995 1 1 6 N
S 150 1105 100 1095 1 1 6 N
S 150 1205 100 1195 1 1 6 N
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
X Pin_10 10 -200 300 150 R 50 50 1 1 P
X Pin_11 11 -200 200 150 R 50 50 1 1 P
X Pin_12 12 -200 100 150 R 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
X Pin_29 29 300 -900 150 L 50 50 1 1 P
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
X Pin_30 30 300 -800 150 L 50 50 1 1 P
X Pin_31 31 300 -700 150 L 50 50 1 1 P
X Pin_32 32 300 -600 150 L 50 50 1 1 P
X Pin_33 33 300 -500 150 L 50 50 1 1 P
X Pin_34 34 300 -400 150 L 50 50 1 1 P
X Pin_35 35 300 -300 150 L 50 50 1 1 P
X Pin_36 36 300 -200 150 L 50 50 1 1 P
X Pin_37 37 300 -100 150 L 50 50 1 1 P
X Pin_38 38 300 0 150 L 50 50 1 1 P
X Pin_39 39 300 100 150 L 50 50 1 1 P
X Pin_4 4 -200 900 150 R 50 50 1 1 P
X Pin_40 40 300 200 150 L 50 50 1 1 P
X Pin_41 41 300 300 150 L 50 50 1 1 P
X Pin_42 42 300 400 150 L 50 50 1 1 P
X Pin_43 43 300 500 150 L 50 50 1 1 P
X Pin_44 44 300 600 150 L 50 50 1 1 P
X Pin_45 45 300 700 150 L 50 50 1 1 P
X Pin_46 46 300 800 150 L 50 50 1 1 P
X Pin_47 47 300 900 150 L 50 50 1 1 P
X Pin_48 48 300 1000 150 L 50 50 1 1 P
X Pin_49 49 300 1100 150 L 50 50 1 1 P
X Pin_5 5 -200 800 150 R 50 50 1 1 P
X Pin_50 50 300 1200 150 L 50 50 1 1 P
X Pin_6 6 -200 700 150 R 50 50 1 1 P
X Pin_7 7 -200 600 150 R 50 50 1 1 P
X Pin_8 8 -200 500 150 R 50 50 1 1 P
X Pin_9 9 -200 400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_D_Schottky
#
DEF Device_D_Schottky D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Device_D_Schottky" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO-???*
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
P 6 0 1 10 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Regulator_Linear_AP1117-33
#
DEF Regulator_Linear_AP1117-33 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "Regulator_Linear_AP1117-33" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN
F3 "" 100 -250 50 H I C CNN
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 AMS1117-1.5 AMS1117-1.8 AMS1117-2.5 AMS1117-2.85 AMS1117-3.3 AMS1117-5.0
$FPLIST
SOT?223*TabPin2*
$ENDFPLIST
DRAW
S -200 -200 200 75 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 w
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

35
PCB/AppleII-Pico.cmp
View File

@ -1,35 +0,0 @@
Cmp-Mod V01 Created by PcbNew date = 5/19/2022 10:08:23 PM
BeginCmp
TimeStamp = 62874572
Path =
Reference = IDT7007;
ValeurCmp = 32Kx8 DP-SRAM;
IdModule = Package_QFP:TQFP-80_14x14mm_P0.65mm;
EndCmp
BeginCmp
TimeStamp = 62874090
Path =
Reference = REF**;
ValeurCmp = PLCC-84;
IdModule = Package_LCC:PLCC-84;
EndCmp
BeginCmp
TimeStamp = 62873184
Path =
Reference = STDBUS;
ValeurCmp = STDBUS;
IdModule = STDBUS:STDBUS_EDGECARD;
EndCmp
BeginCmp
TimeStamp = 62870246
Path =
Reference = REF**;
ValeurCmp = MountingHole_2.5mm_Pad;
IdModule = MountingHole:MountingHole_2.5mm_Pad;
EndCmp
EndListe

5134
PCB/AppleII-Pico.kicad_pcb
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5135
PCB/AppleII-Pico.kicad_pcb-bak
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744
PCB/AppleII-Pico.net
View File

@ -1,744 +0,0 @@
(export (version D)
(design
(source C:\Users\Grizzly\Documents\DasUberTerm\PCB\DasUberTerm.sch)
(date "5/27/2022 7:48:33 PM")
(tool "Eeschema (5.1.10)-1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source DasUberTerm.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref J2)
(value "MKR VIDOR 4000")
(footprint Connector_PCBEdge:BUS_PCI_Express_Mini_Half)
(datasheet ~)
(libsource (lib Connector) (part Bus_PCI_Express_Mini) (description "Mini-PCI Express bus connector"))
(sheetpath (names /) (tstamps /))
(tstamp 6291A584))
(comp (ref J1)
(value "Apple II")
(footprint STDBUS:AppleII)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 629381EB))
(comp (ref J3)
(value "MKR VIDOR 4000")
(footprint Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x14) (description "Generic connector, single row, 01x14, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 629D1345))
(comp (ref J4)
(value "MKR VIDOR 4000")
(footprint Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x14) (description "Generic connector, single row, 01x14, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 629D29DB))
(comp (ref U1)
(value SN74LVC8T245DGVR)
(footprint Package_SO:TSSOP-24_4.4x5mm_P0.4mm)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x12_Counter_Clockwise) (description "Generic connector, double row, 02x12, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 62A8607A))
(comp (ref U2)
(value SN74LVC8T245DGVR)
(footprint Package_SO:TSSOP-24_4.4x5mm_P0.4mm)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x12_Counter_Clockwise) (description "Generic connector, double row, 02x12, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 62A87454))
(comp (ref U3)
(value SN74LVC8T245DGVR)
(footprint Package_SO:TSSOP-24_4.4x5mm_P0.4mm)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x12_Counter_Clockwise) (description "Generic connector, double row, 02x12, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 62A887EA))
(comp (ref U4)
(value SN74LVC8T245DGVR)
(footprint Package_SO:TSSOP-24_4.4x5mm_P0.4mm)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x12_Counter_Clockwise) (description "Generic connector, double row, 02x12, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 62A898B8))
(comp (ref R3)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62B78737))
(comp (ref R6)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62B81CAC))
(comp (ref R7)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62B8B68F))
(comp (ref R5)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62B95325))
(comp (ref R1)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62BA8CC7))
(comp (ref R4)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62BB2E94))
(comp (ref U5)
(value SN74LVC2T45DCUT)
(footprint Package_SO:VSSOP-8_2.3x2mm_P0.5mm)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_02x04_Counter_Clockwise) (description "Generic connector, double row, 02x04, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 62DB7B52))
(comp (ref Q1)
(value 2N3904)
(footprint Package_TO_SOT_THT:TO-92_HandSolder)
(datasheet https://www.onsemi.com/pub/Collateral/2N3903-D.PDF)
(libsource (lib Transistor_BJT) (part 2N3904) (description "0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92"))
(sheetpath (names /) (tstamps /))
(tstamp 62EAF7EA))
(comp (ref R2)
(value R)
(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal)
(datasheet ~)
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /) (tstamps /))
(tstamp 62EE8D3D)))
(libparts
(libpart (lib Connector) (part Bus_PCI_Express_Mini)
(description "Mini-PCI Express bus connector")
(docs ~)
(footprints
(fp *PCI*Express*Mini*))
(fields
(field (name Reference) J)
(field (name Value) Bus_PCI_Express_Mini))
(pins
(pin (num 1) (name ~WAKE) (type openCol))
(pin (num 2) (name +3V3AUX) (type power_in))
(pin (num 3) (name COEX1) (type passive))
(pin (num 4) (name GND) (type power_in))
(pin (num 5) (name COEX2) (type passive))
(pin (num 6) (name +1V5) (type power_in))
(pin (num 7) (name ~CLKREQ) (type openCol))
(pin (num 8) (name UIM_PWR) (type power_out))
(pin (num 9) (name GND) (type passive))
(pin (num 10) (name UIM_DATA) (type BiDi))
(pin (num 11) (name REFCLK-) (type input))
(pin (num 12) (name UIM_CLK) (type output))
(pin (num 13) (name REFCLK+) (type input))
(pin (num 14) (name ~UIM_RESET) (type output))
(pin (num 15) (name GND) (type passive))
(pin (num 16) (name UIM_VPP) (type power_out))
(pin (num 17) (name UIM_C8) (type passive))
(pin (num 18) (name GND) (type passive))
(pin (num 19) (name UIM_C4) (type passive))
(pin (num 20) (name ~W_DISABLE) (type input))
(pin (num 21) (name GND) (type passive))
(pin (num 22) (name ~PERST) (type input))
(pin (num 23) (name PERn0) (type output))
(pin (num 24) (name +3V3AUX) (type power_in))
(pin (num 25) (name PERp0) (type output))
(pin (num 26) (name GND) (type passive))
(pin (num 27) (name GND) (type passive))
(pin (num 28) (name +1V5) (type power_in))
(pin (num 29) (name GND) (type passive))
(pin (num 30) (name SMB_CLK) (type input))
(pin (num 31) (name PETn0) (type input))
(pin (num 32) (name SMB_DATA) (type BiDi))
(pin (num 33) (name PETp0) (type input))
(pin (num 34) (name GND) (type passive))
(pin (num 35) (name GND) (type passive))
(pin (num 36) (name USB_D-) (type BiDi))
(pin (num 37) (name GND) (type passive))
(pin (num 38) (name USB_D+) (type BiDi))
(pin (num 39) (name +3V3AUX) (type power_in))
(pin (num 40) (name GND) (type passive))
(pin (num 41) (name +3V3AUX) (type power_in))
(pin (num 42) (name ~LED_WWAN) (type openCol))
(pin (num 43) (name GND) (type passive))
(pin (num 44) (name ~LED_WLAN) (type openCol))
(pin (num 45) (name Reserved) (type passive))
(pin (num 46) (name ~LED_WPAN) (type openCol))
(pin (num 47) (name Reserved) (type passive))
(pin (num 48) (name +1V5) (type power_in))
(pin (num 49) (name Reserved) (type passive))
(pin (num 50) (name GND) (type passive))
(pin (num 51) (name Reserved) (type passive))
(pin (num 52) (name +3V3AUX) (type power_in))
(pin (num MP) (name MP) (type passive))))
(libpart (lib Connector_Generic) (part Conn_01x14)
(description "Generic connector, single row, 01x14, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_1x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_01x14))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))
(pin (num 10) (name Pin_10) (type passive))
(pin (num 11) (name Pin_11) (type passive))
(pin (num 12) (name Pin_12) (type passive))
(pin (num 13) (name Pin_13) (type passive))
(pin (num 14) (name Pin_14) (type passive))))
(libpart (lib Connector_Generic) (part Conn_02x04_Counter_Clockwise)
(description "Generic connector, double row, 02x04, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_02x04_Counter_Clockwise))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))))
(libpart (lib Connector_Generic) (part Conn_02x12_Counter_Clockwise)
(description "Generic connector, double row, 02x12, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_02x12_Counter_Clockwise))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))
(pin (num 10) (name Pin_10) (type passive))
(pin (num 11) (name Pin_11) (type passive))
(pin (num 12) (name Pin_12) (type passive))
(pin (num 13) (name Pin_13) (type passive))
(pin (num 14) (name Pin_14) (type passive))
(pin (num 15) (name Pin_15) (type passive))
(pin (num 16) (name Pin_16) (type passive))
(pin (num 17) (name Pin_17) (type passive))
(pin (num 18) (name Pin_18) (type passive))
(pin (num 19) (name Pin_19) (type passive))
(pin (num 20) (name Pin_20) (type passive))
(pin (num 21) (name Pin_21) (type passive))
(pin (num 22) (name Pin_22) (type passive))
(pin (num 23) (name Pin_23) (type passive))
(pin (num 24) (name Pin_24) (type passive))))
(libpart (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise)
(description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_02x25_Counter_Clockwise))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))
(pin (num 3) (name Pin_3) (type passive))
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))
(pin (num 7) (name Pin_7) (type passive))
(pin (num 8) (name Pin_8) (type passive))
(pin (num 9) (name Pin_9) (type passive))
(pin (num 10) (name Pin_10) (type passive))
(pin (num 11) (name Pin_11) (type passive))
(pin (num 12) (name Pin_12) (type passive))
(pin (num 13) (name Pin_13) (type passive))
(pin (num 14) (name Pin_14) (type passive))
(pin (num 15) (name Pin_15) (type passive))
(pin (num 16) (name Pin_16) (type passive))
(pin (num 17) (name Pin_17) (type passive))
(pin (num 18) (name Pin_18) (type passive))
(pin (num 19) (name Pin_19) (type passive))
(pin (num 20) (name Pin_20) (type passive))
(pin (num 21) (name Pin_21) (type passive))
(pin (num 22) (name Pin_22) (type passive))
(pin (num 23) (name Pin_23) (type passive))
(pin (num 24) (name Pin_24) (type passive))
(pin (num 25) (name Pin_25) (type passive))
(pin (num 26) (name Pin_26) (type passive))
(pin (num 27) (name Pin_27) (type passive))
(pin (num 28) (name Pin_28) (type passive))
(pin (num 29) (name Pin_29) (type passive))
(pin (num 30) (name Pin_30) (type passive))
(pin (num 31) (name Pin_31) (type passive))
(pin (num 32) (name Pin_32) (type passive))
(pin (num 33) (name Pin_33) (type passive))
(pin (num 34) (name Pin_34) (type passive))
(pin (num 35) (name Pin_35) (type passive))
(pin (num 36) (name Pin_36) (type passive))
(pin (num 37) (name Pin_37) (type passive))
(pin (num 38) (name Pin_38) (type passive))
(pin (num 39) (name Pin_39) (type passive))
(pin (num 40) (name Pin_40) (type passive))
(pin (num 41) (name Pin_41) (type passive))
(pin (num 42) (name Pin_42) (type passive))
(pin (num 43) (name Pin_43) (type passive))
(pin (num 44) (name Pin_44) (type passive))
(pin (num 45) (name Pin_45) (type passive))
(pin (num 46) (name Pin_46) (type passive))
(pin (num 47) (name Pin_47) (type passive))
(pin (num 48) (name Pin_48) (type passive))
(pin (num 49) (name Pin_49) (type passive))
(pin (num 50) (name Pin_50) (type passive))))
(libpart (lib Device) (part R)
(description Resistor)
(docs ~)
(footprints
(fp R_*))
(fields
(field (name Reference) R)
(field (name Value) R))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib Transistor_BJT) (part 2N3904)
(description "0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92")
(docs https://www.onsemi.com/pub/Collateral/2N3903-D.PDF)
(footprints
(fp TO?92*))
(fields
(field (name Reference) Q)
(field (name Value) 2N3904)
(field (name Footprint) Package_TO_SOT_THT:TO-92_Inline))
(pins
(pin (num 1) (name E) (type passive))
(pin (num 2) (name B) (type passive))
(pin (num 3) (name C) (type passive)))))
(libraries
(library (logical Connector)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector.lib"))
(library (logical Connector_Generic)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector_Generic.lib"))
(library (logical Device)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Device.lib"))
(library (logical Transistor_BJT)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Transistor_BJT.lib")))
(nets
(net (code 1) (name LD3)
(node (ref J4) (pin 12))
(node (ref U1) (pin 18)))
(net (code 2) (name LD2)
(node (ref J4) (pin 11))
(node (ref U1) (pin 19)))
(net (code 3) (name LD1)
(node (ref J4) (pin 10))
(node (ref U1) (pin 20)))
(net (code 4) (name LD0)
(node (ref J4) (pin 9))
(node (ref U1) (pin 21)))
(net (code 5) (name 3V3)
(node (ref J2) (pin 2))
(node (ref U3) (pin 24))
(node (ref J2) (pin 39))
(node (ref U2) (pin 23))
(node (ref J2) (pin 24))
(node (ref J2) (pin 52))
(node (ref J2) (pin 41))
(node (ref U3) (pin 23))
(node (ref U2) (pin 24))
(node (ref J3) (pin 3))
(node (ref U4) (pin 23))
(node (ref U4) (pin 24))
(node (ref U1) (pin 24))
(node (ref U1) (pin 23))
(node (ref U5) (pin 8)))
(net (code 6) (name nACTIVE)
(node (ref U1) (pin 22))
(node (ref U5) (pin 2)))
(net (code 7) (name D3)
(node (ref J1) (pin 46))
(node (ref U1) (pin 6)))
(net (code 8) (name D0)
(node (ref J1) (pin 49))
(node (ref U1) (pin 3)))
(net (code 9) (name GND)
(node (ref U5) (pin 4))
(node (ref U5) (pin 5))
(node (ref Q1) (pin 1))
(node (ref R7) (pin 1))
(node (ref J2) (pin 18))
(node (ref U1) (pin 11))
(node (ref U4) (pin 11))
(node (ref U4) (pin 12))
(node (ref U4) (pin 13))
(node (ref J3) (pin 4))
(node (ref J1) (pin 26))
(node (ref U1) (pin 13))
(node (ref U1) (pin 12))
(node (ref J2) (pin 21))
(node (ref J2) (pin 50))
(node (ref J2) (pin 43))
(node (ref J2) (pin 40))
(node (ref J2) (pin 9))
(node (ref J2) (pin 26))
(node (ref J2) (pin 27))
(node (ref J2) (pin 29))
(node (ref J2) (pin 4))
(node (ref J2) (pin 34))
(node (ref J2) (pin 35))
(node (ref J2) (pin 37))
(node (ref R3) (pin 1))
(node (ref R6) (pin 1))
(node (ref J2) (pin 15))
(node (ref U2) (pin 13))
(node (ref U2) (pin 12))
(node (ref U2) (pin 11))
(node (ref U3) (pin 13))
(node (ref U3) (pin 12))
(node (ref U3) (pin 11)))
(net (code 10) (name nLACTIVE)
(node (ref U5) (pin 7))
(node (ref J2) (pin 33)))
(net (code 11) (name D2)
(node (ref U1) (pin 5))
(node (ref J1) (pin 47)))
(net (code 12) (name D5)
(node (ref U1) (pin 8))
(node (ref J1) (pin 44)))
(net (code 13) (name LD5)
(node (ref U1) (pin 16))
(node (ref J4) (pin 14)))
(net (code 14) (name LD4)
(node (ref J4) (pin 13))
(node (ref U1) (pin 17)))
(net (code 15) (name LD7)
(node (ref J3) (pin 13))
(node (ref U1) (pin 14)))
(net (code 16) (name LD6)
(node (ref J3) (pin 14))
(node (ref U1) (pin 15)))
(net (code 17) (name D7)
(node (ref U1) (pin 10))
(node (ref J1) (pin 42)))
(net (code 18) (name D6)
(node (ref U1) (pin 9))
(node (ref J1) (pin 43)))
(net (code 19) (name D4)
(node (ref U1) (pin 7))
(node (ref J1) (pin 45)))
(net (code 20) (name D1)
(node (ref U1) (pin 4))
(node (ref J1) (pin 48)))
(net (code 21) (name LA12)
(node (ref J2) (pin 45))
(node (ref U3) (pin 17)))
(net (code 22) (name A5)
(node (ref J1) (pin 7))
(node (ref U2) (pin 8)))
(net (code 23) (name A6)
(node (ref U2) (pin 9))
(node (ref J1) (pin 8)))
(net (code 24) (name LA15)
(node (ref U3) (pin 14))
(node (ref J2) (pin 51)))
(net (code 25) (name LA14)
(node (ref U3) (pin 15))
(node (ref J2) (pin 49)))
(net (code 26) (name A4)
(node (ref J1) (pin 6))
(node (ref U2) (pin 7)))
(net (code 27) (name LA11)
(node (ref J2) (pin 48))
(node (ref U3) (pin 18)))
(net (code 28) (name "Net-(R6-Pad2)")
(node (ref U3) (pin 22))
(node (ref R6) (pin 2)))
(net (code 29) (name A8)
(node (ref U3) (pin 3))
(node (ref J1) (pin 10)))
(net (code 30) (name A9)
(node (ref U3) (pin 4))
(node (ref J1) (pin 11)))
(net (code 31) (name LA2)
(node (ref J2) (pin 10))
(node (ref U2) (pin 19)))
(net (code 32) (name A7)
(node (ref J1) (pin 9))
(node (ref U2) (pin 10)))
(net (code 33) (name LA4)
(node (ref U2) (pin 17))
(node (ref J2) (pin 14)))
(net (code 34) (name LA3)
(node (ref J2) (pin 12))
(node (ref U2) (pin 18)))
(net (code 35) (name A10)
(node (ref U3) (pin 5))
(node (ref J1) (pin 12)))
(net (code 36) (name LA1)
(node (ref U2) (pin 20))
(node (ref J2) (pin 8)))
(net (code 37) (name LA0)
(node (ref U2) (pin 21))
(node (ref J2) (pin 6)))
(net (code 38) (name A0)
(node (ref J1) (pin 2))
(node (ref U2) (pin 3)))
(net (code 39) (name A1)
(node (ref J1) (pin 3))
(node (ref U2) (pin 4)))
(net (code 40) (name A2)
(node (ref J1) (pin 4))
(node (ref U2) (pin 5)))
(net (code 41) (name A3)
(node (ref J1) (pin 5))
(node (ref U2) (pin 6)))
(net (code 42) (name "Net-(U4-Pad6)")
(node (ref U4) (pin 6)))
(net (code 43) (name "Net-(U4-Pad7)")
(node (ref U4) (pin 7)))
(net (code 44) (name "Net-(U4-Pad8)")
(node (ref U4) (pin 8)))
(net (code 45) (name "Net-(U4-Pad9)")
(node (ref U4) (pin 9)))
(net (code 46) (name +5V)
(node (ref U5) (pin 1))
(node (ref U2) (pin 1))
(node (ref R5) (pin 2))
(node (ref R1) (pin 2))
(node (ref R4) (pin 2))
(node (ref U1) (pin 1))
(node (ref J1) (pin 25))
(node (ref J3) (pin 2))
(node (ref U3) (pin 1))
(node (ref U4) (pin 1)))
(net (code 47) (name "Net-(U4-Pad15)")
(node (ref U4) (pin 15)))
(net (code 48) (name A11)
(node (ref U3) (pin 6))
(node (ref J1) (pin 13)))
(net (code 49) (name A12)
(node (ref U3) (pin 7))
(node (ref J1) (pin 14)))
(net (code 50) (name "Net-(U4-Pad10)")
(node (ref U4) (pin 10)))
(net (code 51) (name "Net-(U4-Pad14)")
(node (ref U4) (pin 14)))
(net (code 52) (name LPHI0)
(node (ref U4) (pin 17))
(node (ref J2) (pin 11)))
(net (code 53) (name LA7)
(node (ref J2) (pin 28))
(node (ref U2) (pin 14)))
(net (code 54) (name LA6)
(node (ref U2) (pin 15))
(node (ref J2) (pin 20)))
(net (code 55) (name LR\W)
(node (ref J2) (pin 13))
(node (ref U4) (pin 16)))
(net (code 56) (name nLRESET)
(node (ref U4) (pin 18)))
(net (code 57) (name nROMINHIBIT)
(node (ref J1) (pin 32))
(node (ref Q1) (pin 3)))
(net (code 58) (name nLROMINHIBIT)
(node (ref R2) (pin 2)))
(net (code 59) (name LA5)
(node (ref U2) (pin 16))
(node (ref J2) (pin 16)))
(net (code 60) (name LA13)
(node (ref U3) (pin 16))
(node (ref J2) (pin 47)))
(net (code 61) (name nROMRQ)
(node (ref J1) (pin 1))
(node (ref U4) (pin 5)))
(net (code 62) (name LA10)
(node (ref U3) (pin 19))
(node (ref J2) (pin 46)))
(net (code 63) (name LA9)
(node (ref U3) (pin 20))
(node (ref J2) (pin 44)))
(net (code 64) (name LA8)
(node (ref J2) (pin 42))
(node (ref U3) (pin 21)))
(net (code 65) (name nDDIR)
(node (ref U1) (pin 2))
(node (ref U5) (pin 3)))
(net (code 66) (name "Net-(Q1-Pad2)")
(node (ref Q1) (pin 2))
(node (ref R2) (pin 1)))
(net (code 67) (name nIORQ)
(node (ref J1) (pin 41))
(node (ref U4) (pin 4)))
(net (code 68) (name nEXMEMRQ)
(node (ref J1) (pin 20))
(node (ref U4) (pin 3)))
(net (code 69) (name nLDDIR)
(node (ref U5) (pin 6)))
(net (code 70) (name "Net-(R1-Pad1)")
(node (ref U2) (pin 2))
(node (ref R1) (pin 1)))
(net (code 71) (name "Net-(R7-Pad2)")
(node (ref R7) (pin 2))
(node (ref U4) (pin 22)))
(net (code 72) (name "Net-(R5-Pad1)")
(node (ref R5) (pin 1))
(node (ref U4) (pin 2)))
(net (code 73) (name "Net-(R4-Pad1)")
(node (ref R4) (pin 1))
(node (ref U3) (pin 2)))
(net (code 74) (name nLEXMEMRQ)
(node (ref U4) (pin 21))
(node (ref J2) (pin 31)))
(net (code 75) (name nLIORQ)
(node (ref J2) (pin 25))
(node (ref U4) (pin 20)))
(net (code 76) (name nLROMRQ)
(node (ref J2) (pin 23))
(node (ref U4) (pin 19)))
(net (code 77) (name "Net-(R3-Pad2)")
(node (ref R3) (pin 2))
(node (ref U2) (pin 22)))
(net (code 78) (name A13)
(node (ref U3) (pin 8))
(node (ref J1) (pin 15)))
(net (code 79) (name A14)
(node (ref U3) (pin 9))
(node (ref J1) (pin 16)))
(net (code 80) (name A15)
(node (ref U3) (pin 10))
(node (ref J1) (pin 17)))
(net (code 81) (name "Net-(J2-Pad5)")
(node (ref J2) (pin 5)))
(net (code 82) (name "Net-(J2-Pad7)")
(node (ref J2) (pin 7)))
(net (code 83) (name "Net-(J2-PadMP)")
(node (ref J2) (pin MP)))
(net (code 84) (name "Net-(J2-Pad30)")
(node (ref J2) (pin 30)))
(net (code 85) (name "Net-(J2-Pad3)")
(node (ref J2) (pin 3)))
(net (code 86) (name "Net-(J2-Pad32)")
(node (ref J2) (pin 32)))
(net (code 87) (name "Net-(J2-Pad36)")
(node (ref J2) (pin 36)))
(net (code 88) (name "Net-(J2-Pad38)")
(node (ref J2) (pin 38)))
(net (code 89) (name "Net-(J2-Pad19)")
(node (ref J2) (pin 19)))
(net (code 90) (name nLRST)
(node (ref J2) (pin 22)))
(net (code 91) (name "Net-(J2-Pad17)")
(node (ref J2) (pin 17)))
(net (code 92) (name "Net-(J2-Pad1)")
(node (ref J2) (pin 1)))
(net (code 93) (name nNMI)
(node (ref J1) (pin 29)))
(net (code 94) (name nIRQ)
(node (ref J1) (pin 30)))
(net (code 95) (name nDMA)
(node (ref J1) (pin 22)))
(net (code 96) (name nSYNC)
(node (ref J1) (pin 19)))
(net (code 97) (name -12V)
(node (ref J1) (pin 33)))
(net (code 98) (name nWR)
(node (ref J1) (pin 18)))
(net (code 99) (name nSYSRESET)
(node (ref J1) (pin 31)))
(net (code 100) (name +12V)
(node (ref J1) (pin 50)))
(net (code 101) (name FPGARESET)
(node (ref J3) (pin 5)))
(net (code 102) (name UARTRX)
(node (ref J3) (pin 7)))
(net (code 103) (name SCL)
(node (ref J3) (pin 8)))
(net (code 104) (name SDA)
(node (ref J3) (pin 9)))
(net (code 105) (name "Net-(J4-Pad7)")
(node (ref J4) (pin 7)))
(net (code 106) (name "Net-(J4-Pad2)")
(node (ref J4) (pin 2)))
(net (code 107) (name "Net-(J4-Pad3)")
(node (ref J4) (pin 3)))
(net (code 108) (name "Net-(J4-Pad4)")
(node (ref J4) (pin 4)))
(net (code 109) (name "Net-(J4-Pad5)")
(node (ref J4) (pin 5)))
(net (code 110) (name "Net-(J4-Pad6)")
(node (ref J4) (pin 6)))
(net (code 111) (name "Net-(J4-Pad8)")
(node (ref J4) (pin 8)))
(net (code 112) (name UARTTX)
(node (ref J3) (pin 6)))
(net (code 113) (name "Net-(J4-Pad1)")
(node (ref J4) (pin 1)))
(net (code 114) (name "Net-(J3-Pad1)")
(node (ref J3) (pin 1)))
(net (code 115) (name "Net-(J1-Pad35)")
(node (ref J1) (pin 35)))
(net (code 116) (name 2MHz)
(node (ref J1) (pin 37)))
(net (code 117) (name nRDY)
(node (ref J1) (pin 21)))
(net (code 118) (name "Net-(J1-Pad23)")
(node (ref J1) (pin 23))
(node (ref J1) (pin 28)))
(net (code 119) (name "Net-(J1-Pad24)")
(node (ref J1) (pin 24))
(node (ref J1) (pin 27)))
(net (code 120) (name "Net-(J3-Pad12)")
(node (ref J3) (pin 12)))
(net (code 121) (name PHI1)
(node (ref J1) (pin 38)))
(net (code 122) (name PHI0)
(node (ref J1) (pin 40)))
(net (code 123) (name USER1)
(node (ref J1) (pin 39)))
(net (code 124) (name "Net-(J3-Pad10)")
(node (ref J3) (pin 10)))
(net (code 125) (name "Net-(J3-Pad11)")
(node (ref J3) (pin 11)))
(net (code 126) (name -5V)
(node (ref J1) (pin 34)))
(net (code 127) (name 7MHz)
(node (ref J1) (pin 36)))))

258
PCB/AppleII-Pico.pro
View File

@ -1,258 +0,0 @@
update=11/27/2022 4:35:57 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=DasUberTerm.net
CopperLayerCount=4
BoardThickness=2
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=0
MinTrackWidth=0.15
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.15
TrackWidth3=0.175
TrackWidth4=0.2
TrackWidth5=0.3175
TrackWidth6=0.5
TrackWidth7=0.635
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter2=0.8
ViaDrill2=0.4
ViaDiameter3=1.6
ViaDrill3=0.8
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

1790
PCB/AppleII-Pico.sch
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1790
PCB/AppleII-Pico.sch-bak
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File diff suppressed because it is too large Load Diff

464
PCB/DasUberTerm-cache.lib
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@ -1,464 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Bus_PCI_Express_Mini
#
DEF Connector_Bus_PCI_Express_Mini J 0 20 Y Y 1 F N
F0 "J" -650 1250 50 H V C CNN
F1 "Connector_Bus_PCI_Express_Mini" 900 1250 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" -150 -1150 50 H I C CNN
$FPLIST
*PCI*Express*Mini*
$ENDFPLIST
DRAW
S -600 1200 600 -1100 0 1 10 f
X ~WAKE 1 -700 -700 100 R 50 50 1 1 C
X UIM_DATA 10 700 -600 100 L 50 50 1 1 B
X REFCLK- 11 -700 -200 100 R 50 50 1 1 I
X UIM_CLK 12 700 -700 100 L 50 50 1 1 O
X REFCLK+ 13 -700 -100 100 R 50 50 1 1 I
X ~UIM_RESET 14 700 -800 100 L 50 50 1 1 O
X GND 15 0 -1200 100 U 50 50 1 1 P N
X UIM_VPP 16 700 -400 100 L 50 50 1 1 w
X UIM_C8 17 700 -1000 100 L 50 50 1 1 P
X GND 18 0 -1200 100 U 50 50 1 1 P N
X UIM_C4 19 700 -900 100 L 50 50 1 1 P
X +3V3AUX 2 -400 1300 100 D 50 50 1 1 W
X ~W_DISABLE 20 -700 -900 100 R 50 50 1 1 I
X GND 21 0 -1200 100 U 50 50 1 1 P N
X ~PERST 22 -700 -1000 100 R 50 50 1 1 I
X PERn0 23 -700 100 100 R 50 50 1 1 O
X +3V3AUX 24 -300 1300 100 D 50 50 1 1 W
X PERp0 25 -700 200 100 R 50 50 1 1 O
X GND 26 0 -1200 100 U 50 50 1 1 P N
X GND 27 0 -1200 100 U 50 50 1 1 P N
X +1V5 28 300 1300 100 D 50 50 1 1 W
X GND 29 0 -1200 100 U 50 50 1 1 P N
X COEX1 3 700 400 100 L 50 50 1 1 P
X SMB_CLK 30 -700 -500 100 R 50 50 1 1 I
X PETn0 31 -700 300 100 R 50 50 1 1 I
X SMB_DATA 32 -700 -400 100 R 50 50 1 1 B
X PETp0 33 -700 400 100 R 50 50 1 1 I
X GND 34 0 -1200 100 U 50 50 1 1 P N
X GND 35 0 -1200 100 U 50 50 1 1 P N
X USB_D- 36 -700 600 100 R 50 50 1 1 B
X GND 37 0 -1200 100 U 50 50 1 1 P N
X USB_D+ 38 -700 700 100 R 50 50 1 1 B
X +3V3AUX 39 -200 1300 100 D 50 50 1 1 W
X GND 4 0 -1200 100 U 50 50 1 1 W
X GND 40 0 -1200 100 U 50 50 1 1 P N
X +3V3AUX 41 -100 1300 100 D 50 50 1 1 W
X ~LED_WWAN 42 700 600 100 L 50 50 1 1 C
X GND 43 0 -1200 100 U 50 50 1 1 P N
X ~LED_WLAN 44 700 700 100 L 50 50 1 1 C
X Reserved 45 700 100 100 L 50 50 1 1 P
X ~LED_WPAN 46 700 800 100 L 50 50 1 1 C
X Reserved 47 700 0 100 L 50 50 1 1 P
X +1V5 48 400 1300 100 D 50 50 1 1 W
X Reserved 49 700 -100 100 L 50 50 1 1 P
X COEX2 5 700 300 100 L 50 50 1 1 P
X GND 50 0 -1200 100 U 50 50 1 1 P N
X Reserved 51 700 -200 100 L 50 50 1 1 P
X +3V3AUX 52 0 1300 100 D 50 50 1 1 W
X +1V5 6 200 1300 100 D 50 50 1 1 W
X ~CLKREQ 7 -700 -800 100 R 50 50 1 1 C
X UIM_PWR 8 700 -500 100 L 50 50 1 1 w
X GND 9 0 -1200 100 U 50 50 1 1 P N
X MP MP 100 -1200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x14
#
DEF Connector_Generic_Conn_01x14 J 0 40 Y N 1 F N
F0 "J" 0 700 50 H V C CNN
F1 "Connector_Generic_Conn_01x14" 0 -800 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 650 50 -750 1 1 10 f
X Pin_1 1 -200 600 150 R 50 50 1 1 P
X Pin_10 10 -200 -300 150 R 50 50 1 1 P
X Pin_11 11 -200 -400 150 R 50 50 1 1 P
X Pin_12 12 -200 -500 150 R 50 50 1 1 P
X Pin_13 13 -200 -600 150 R 50 50 1 1 P
X Pin_14 14 -200 -700 150 R 50 50 1 1 P
X Pin_2 2 -200 500 150 R 50 50 1 1 P
X Pin_3 3 -200 400 150 R 50 50 1 1 P
X Pin_4 4 -200 300 150 R 50 50 1 1 P
X Pin_5 5 -200 200 150 R 50 50 1 1 P
X Pin_6 6 -200 100 150 R 50 50 1 1 P
X Pin_7 7 -200 0 150 R 50 50 1 1 P
X Pin_8 8 -200 -100 150 R 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x04_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x04_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 200 50 H V C CNN
F1 "Connector_Generic_Conn_02x04_Counter_Clockwise" 50 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 150 -250 1 1 10 f
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 -200 0 150 R 50 50 1 1 P
X Pin_3 3 -200 -100 150 R 50 50 1 1 P
X Pin_4 4 -200 -200 150 R 50 50 1 1 P
X Pin_5 5 300 -200 150 L 50 50 1 1 P
X Pin_6 6 300 -100 150 L 50 50 1 1 P
X Pin_7 7 300 0 150 L 50 50 1 1 P
X Pin_8 8 300 100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x06_Odd_Even
#
DEF Connector_Generic_Conn_02x06_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 300 50 H V C CNN
F1 "Connector_Generic_Conn_02x06_Odd_Even" 50 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 150 -350 1 1 10 f
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_10 10 300 -200 150 L 50 50 1 1 P
X Pin_11 11 -200 -300 150 R 50 50 1 1 P
X Pin_12 12 300 -300 150 L 50 50 1 1 P
X Pin_2 2 300 200 150 L 50 50 1 1 P
X Pin_3 3 -200 100 150 R 50 50 1 1 P
X Pin_4 4 300 100 150 L 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 300 0 150 L 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 300 -100 150 L 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x12_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x12_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 600 50 H V C CNN
F1 "Connector_Generic_Conn_02x12_Counter_Clockwise" 50 -700 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 550 150 -650 1 1 10 f
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
X Pin_1 1 -200 500 150 R 50 50 1 1 P
X Pin_10 10 -200 -400 150 R 50 50 1 1 P
X Pin_11 11 -200 -500 150 R 50 50 1 1 P
X Pin_12 12 -200 -600 150 R 50 50 1 1 P
X Pin_13 13 300 -600 150 L 50 50 1 1 P
X Pin_14 14 300 -500 150 L 50 50 1 1 P
X Pin_15 15 300 -400 150 L 50 50 1 1 P
X Pin_16 16 300 -300 150 L 50 50 1 1 P
X Pin_17 17 300 -200 150 L 50 50 1 1 P
X Pin_18 18 300 -100 150 L 50 50 1 1 P
X Pin_19 19 300 0 150 L 50 50 1 1 P
X Pin_2 2 -200 400 150 R 50 50 1 1 P
X Pin_20 20 300 100 150 L 50 50 1 1 P
X Pin_21 21 300 200 150 L 50 50 1 1 P
X Pin_22 22 300 300 150 L 50 50 1 1 P
X Pin_23 23 300 400 150 L 50 50 1 1 P
X Pin_24 24 300 500 150 L 50 50 1 1 P
X Pin_3 3 -200 300 150 R 50 50 1 1 P
X Pin_4 4 -200 200 150 R 50 50 1 1 P
X Pin_5 5 -200 100 150 R 50 50 1 1 P
X Pin_6 6 -200 0 150 R 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 -200 -200 150 R 50 50 1 1 P
X Pin_9 9 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x25_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1300 50 H V C CNN
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1250 150 -1250 1 1 10 f
S 150 -1195 100 -1205 1 1 6 N
S 150 -1095 100 -1105 1 1 6 N
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
S 150 1005 100 995 1 1 6 N
S 150 1105 100 1095 1 1 6 N
S 150 1205 100 1195 1 1 6 N
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
X Pin_10 10 -200 300 150 R 50 50 1 1 P
X Pin_11 11 -200 200 150 R 50 50 1 1 P
X Pin_12 12 -200 100 150 R 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
X Pin_29 29 300 -900 150 L 50 50 1 1 P
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
X Pin_30 30 300 -800 150 L 50 50 1 1 P
X Pin_31 31 300 -700 150 L 50 50 1 1 P
X Pin_32 32 300 -600 150 L 50 50 1 1 P
X Pin_33 33 300 -500 150 L 50 50 1 1 P
X Pin_34 34 300 -400 150 L 50 50 1 1 P
X Pin_35 35 300 -300 150 L 50 50 1 1 P
X Pin_36 36 300 -200 150 L 50 50 1 1 P
X Pin_37 37 300 -100 150 L 50 50 1 1 P
X Pin_38 38 300 0 150 L 50 50 1 1 P
X Pin_39 39 300 100 150 L 50 50 1 1 P
X Pin_4 4 -200 900 150 R 50 50 1 1 P
X Pin_40 40 300 200 150 L 50 50 1 1 P
X Pin_41 41 300 300 150 L 50 50 1 1 P
X Pin_42 42 300 400 150 L 50 50 1 1 P
X Pin_43 43 300 500 150 L 50 50 1 1 P
X Pin_44 44 300 600 150 L 50 50 1 1 P
X Pin_45 45 300 700 150 L 50 50 1 1 P
X Pin_46 46 300 800 150 L 50 50 1 1 P
X Pin_47 47 300 900 150 L 50 50 1 1 P
X Pin_48 48 300 1000 150 L 50 50 1 1 P
X Pin_49 49 300 1100 150 L 50 50 1 1 P
X Pin_5 5 -200 800 150 R 50 50 1 1 P
X Pin_50 50 300 1200 150 L 50 50 1 1 P
X Pin_6 6 -200 700 150 R 50 50 1 1 P
X Pin_7 7 -200 600 150 R 50 50 1 1 P
X Pin_8 8 -200 500 150 R 50 50 1 1 P
X Pin_9 9 -200 400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Jumper_SolderJumper_2_Open
#
DEF Jumper_SolderJumper_2_Open JP 0 0 Y N 1 F N
F0 "JP" 0 80 50 H V C CNN
F1 "Jumper_SolderJumper_2_Open" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SolderJumper*Open*
$ENDFPLIST
DRAW
A -10 0 40 901 -901 0 1 0 N -10 40 -10 -40
A -10 0 40 901 -901 0 1 0 F -10 40 -10 -40
A 10 0 40 -899 899 0 1 0 N 10 -40 10 40
A 10 0 40 -899 899 0 1 0 F 10 -40 10 40
P 2 0 1 0 -10 40 -10 -40 N
P 2 0 1 0 10 40 10 -40 N
X A 1 -150 0 100 R 50 50 1 1 P
X B 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

73
PCB/STDBUS.pretty/AppleII.kicad_mod
View File

@ -1,73 +0,0 @@
(module AppleII (layer F.Cu) (tedit 629162E1)
(descr "surface-mounted straight pin header, 2x25, 2.54mm pitch, double rows")
(tags "Surface mounted pin header SMD 2x25 2.54mm double row")
(attr smd)
(fp_text reference J1 (at 4.7625 30.1625 270 unlocked) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "Apple II" (at 4.7625 -28.575 270 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.5875 -32.7) (end -5.9 -32.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.5875 32.7) (end 1.5875 -32.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.9 32.7) (end 1.5875 32.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.9 -32.7) (end -5.9 32.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.6 -30.16) (end -2.54 -30.16) (layer F.Fab) (width 0.1))
(fp_line (start -3.6 -30.8) (end -3.6 -30.16) (layer F.Fab) (width 0.1))
(fp_line (start -2.54 -30.8) (end -3.6 -30.8) (layer F.Fab) (width 0.1))
(pad 50 smd rect (at -1.5875 -30.48) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 49 smd rect (at -1.5875 -27.94) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 48 smd rect (at -1.5875 -25.4) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 47 smd rect (at -1.5875 -22.86) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 46 smd rect (at -1.5875 -20.32) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 45 smd rect (at -1.5875 -17.78) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 44 smd rect (at -1.5875 -15.24) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 43 smd rect (at -1.5875 -12.7) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 42 smd rect (at -1.5875 -10.16) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 41 smd rect (at -1.5875 -7.62) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 40 smd rect (at -1.5875 -5.08) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 39 smd rect (at -1.5875 -2.54) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 38 smd rect (at -1.5875 0) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 37 smd rect (at -1.5875 2.54) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 36 smd rect (at -1.5875 5.08) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 35 smd rect (at -1.5875 7.62) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 34 smd rect (at -1.5875 10.16) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 33 smd rect (at -1.5875 12.7) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 32 smd rect (at -1.5875 15.24) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 31 smd rect (at -1.5875 17.78) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 30 smd rect (at -1.5875 20.32) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 29 smd rect (at -1.5875 22.86) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 28 smd rect (at -1.5875 25.4) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 27 smd rect (at -1.5875 27.94) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 26 smd rect (at -1.5875 30.48) (size 8 1.4) (layers B.Cu B.Paste B.Mask))
(pad 25 smd rect (at -1.5875 30.48) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -1.5875 27.94) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -1.5875 25.4) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -1.5875 22.86) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at -1.5875 20.32) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at -1.5875 17.78) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at -1.5875 15.24) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at -1.5875 12.7) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at -1.5875 10.16) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -1.5875 7.62) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at -1.5875 5.08) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -1.5875 2.54) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -1.5875 0) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -1.5875 -2.54) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -1.5875 -5.08) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -1.5875 -7.62) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -1.5875 -10.16) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -1.5875 -12.7) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -1.5875 -15.24) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -1.5875 -17.78) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -1.5875 -20.32) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.5875 -22.86) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.5875 -25.4) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.5875 -27.94) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -1.5875 -30.48) (size 8 1.4) (layers F.Cu F.Paste F.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x25_P2.54mm_Vertical_SMD.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

36
PCB/STDBUS.pretty/POGOPAD_01x14.kicad_mod
View File

@ -1,36 +0,0 @@
(module POGOPAD_01x14 (layer F.Cu) (tedit 62916F71)
(descr "Through hole straight pin header, 1x14, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x14 2.54mm single row")
(fp_text reference J3 (at 0 -2.33 180) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "MKR VIDOR 4000" (at 0 35.35 180) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 16.51 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.8 -1.8) (end -1.8 34.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 34.8) (end 1.8 34.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 34.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(pad 1 smd circle (at 0 0) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 2 smd circle (at 0 2.54) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 3 smd circle (at 0 5.08) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 4 smd circle (at 0 7.62) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 5 smd circle (at 0 10.16) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 6 smd circle (at 0 12.7) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 7 smd circle (at 0 15.24) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 8 smd circle (at 0 17.78) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 9 smd circle (at 0 20.32) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 10 smd circle (at 0 22.86) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 11 smd circle (at 0 25.4) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 12 smd circle (at 0 27.94) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 13 smd circle (at 0 30.48) (size 2 2) (layers F.Cu F.Paste F.Mask))
(pad 14 smd circle (at 0 33.02) (size 2 2) (layers F.Cu F.Paste F.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x14_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

68
PCB/STDBUS.pretty/STDBUS_EDGECARD.kicad_mod
View File

@ -1,68 +0,0 @@
(module STDBUS_EDGECARD (layer F.Cu) (tedit 6286B892)
(attr smd)
(fp_text reference REF** (at 0 -6.35 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value STDBUS (at -39.6875 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -43.3499 -4.9625) (end -44.1499 -5.7625) (layer F.SilkS) (width 0.12))
(fp_line (start 44.1499 -4.9625) (end -43.3499 -4.9625) (layer F.SilkS) (width 0.12))
(fp_line (start 43.9 -5.2125) (end -43.9 -5.2125) (layer F.CrtYd) (width 0.05))
(pad 56 smd rect (at 42.8625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 1 smd rect (at -42.8625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 55 smd rect (at 42.8625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -42.8625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 54 smd rect (at 39.6875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 3 smd rect (at -39.6875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 53 smd rect (at 39.6875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -39.6875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 52 smd rect (at 36.5125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 5 smd rect (at -36.5125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 51 smd rect (at 36.5125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -36.5125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 50 smd rect (at 33.3375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 7 smd rect (at -33.3375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 49 smd rect (at 33.3375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -33.3375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 48 smd rect (at 30.1625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 9 smd rect (at -30.1625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 47 smd rect (at 30.1625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -30.1625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 46 smd rect (at 26.9875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 11 smd rect (at -26.9875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 45 smd rect (at 26.9875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -26.9875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 44 smd rect (at 23.8125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 13 smd rect (at -23.8125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 43 smd rect (at 23.8125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -23.8125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 42 smd rect (at 20.6375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 15 smd rect (at -20.6375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 41 smd rect (at 20.6375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -20.6375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 40 smd rect (at 17.4625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 17 smd rect (at -17.4625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at 17.4625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at -17.4625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 38 smd rect (at 14.2875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 19 smd rect (at -14.2875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at 14.2875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at -14.2875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 36 smd rect (at 11.1125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 21 smd rect (at -11.1125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at 11.1125 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -11.1125 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 34 smd rect (at 7.9375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 23 smd rect (at -7.9375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at 7.9375 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -7.9375 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 32 smd rect (at 4.7625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 25 smd rect (at -4.7625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at 4.7625 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -4.7625 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 30 smd rect (at 1.5875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
(pad 27 smd rect (at -1.5875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at 1.5875 0) (size 1.5748 9) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -1.5875 0) (size 1.5748 9) (layers B.Cu B.Paste B.Mask))
)

51
PCB/atf1508.bck
View File

@ -1,51 +0,0 @@
EESchema-DOCLIB Version 2.0
#
$CMP ATF1502AS-xAx44
D Microchip CPLD, 32 Macrocell, 5 V, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0995-CPLD-ATF1502AS(L)-Datasheet.pdf
$ENDCMP
#
$CMP ATF1502ASL-xAx44
D Microchip CPLD, 32 Macrocell, 5 V, Low Power, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0995-CPLD-ATF1502AS(L)-Datasheet.pdf
$ENDCMP
#
$CMP ATF1502ASV-xAx44
D Microchip CPLD, 32 Macrocell, 3.3 V, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/doc1615.pdf
$ENDCMP
#
$CMP ATF1504AS-xAx44
D Microchip CPLD, 64 Macrocell, 5 V, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0950-CPLD-ATF1504AS(L)-Datasheet.pdf
$ENDCMP
#
$CMP ATF1504ASL-xAx44
D Microchip CPLD, 64 Macrocell, 5 V, Low Power, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0950-CPLD-ATF1504AS(L)-Datasheet.pdf
$ENDCMP
#
$CMP ATF1504ASV-xAx44
D Microchip CPLD, 64 Macrocell, 3.3 V, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/ATF1504ASV-ATF1504ASVL-Data-Sheet-20006185A.pdf
$ENDCMP
#
$CMP ATF1504ASVL-xAx44
D Microchip CPLD, 32 Macrocell, 3.3 V, Low Power, TQFP-44
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/ATF1504ASV-ATF1504ASVL-Data-Sheet-20006185A.pdf
$ENDCMP
#
$CMP ATF1508
D Microchip CPLD, 128 Macrocell, 5 V, PLCC-84
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0995-CPLD-ATF1502AS(L)-Datasheet.pdf
$ENDCMP
#
#End Doc Library

9
PCB/atf1508.dcm
View File

@ -1,9 +0,0 @@
EESchema-DOCLIB Version 2.0
#
$CMP ATF1508
D Microchip CPLD, 128 Macrocell, 5 V, PLCC-84
K CPLD
F http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0995-CPLD-ATF1502AS(L)-Datasheet.pdf
$ENDCMP
#
#End Doc Library

103
PCB/atf1508.lib
View File

@ -1,103 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# ATF1508
#
DEF ATF1508 U 0 20 Y Y 1 F N
F0 "U" -550 1950 50 H V L CNN
F1 "ATF1508" 600 1950 50 H V R CNN
F2 "Package_LCC:PLCC-84" 50 2100 50 H I C CNN
F3 "" 50 2100 50 H I C CNN
$FPLIST
TQFP*10x10mm*P0.8mm*
$ENDFPLIST
DRAW
S -700 1850 650 -1800 0 1 10 f
X INPUT/GCLR 1 -800 1650 100 R 50 50 1 1 I
X I/O 10 -800 950 100 R 50 50 1 1 B
X I/O 11 -800 850 100 R 50 50 1 1 B
X I/O/PD1 12 -800 750 100 R 50 50 1 1 B
X VCC 13 0 1950 100 D 50 50 1 1 P N
X I/O/TDI 14 -800 650 100 R 50 50 1 1 B
X I/O 15 -800 550 100 R 50 50 1 1 B
X I/O 16 -800 450 100 R 50 50 1 1 B
X I/O 17 -800 350 100 R 50 50 1 1 B
X I/O 18 -800 250 100 R 50 50 1 1 B
X GND 19 0 -1900 100 U 50 50 1 1 P N
X INPUT/OE/GCLK2 2 -800 1550 100 R 50 50 1 1 I
X I/O 20 -800 150 100 R 50 50 1 1 B
X I/O 21 -800 50 100 R 50 50 1 1 B
X I/O 22 -800 -50 100 R 50 50 1 1 B
X I/O/TMS 23 -800 -150 100 R 50 50 1 1 B
X I/O 24 -800 -250 100 R 50 50 1 1 B
X I/O 25 -800 -350 100 R 50 50 1 1 B
X VCC 26 0 1950 100 D 50 50 1 1 P N
X I/O 27 -800 -450 100 R 50 50 1 1 B
X I/O/PD2 28 -800 -550 100 R 50 50 1 1 B
X I/O 29 -800 -650 100 R 50 50 1 1 B
X VCC 3 0 1950 100 D 50 50 1 1 W
X I/O 30 -800 -750 100 R 50 50 1 1 B
X I/O 31 -800 -850 100 R 50 50 1 1 B
X GND 32 0 -1900 100 U 50 50 1 1 P N
X I/O/TDI 33 -800 -950 100 R 50 50 1 1 B
X I/O 34 -800 -1050 100 R 50 50 1 1 B
X I/O 35 -800 -1150 100 R 50 50 1 1 B
X I/O/PD1 36 -800 -1250 100 R 50 50 1 1 B
X I/O 37 -800 -1350 100 R 50 50 1 1 B
X VCC 38 0 1950 100 D 50 50 1 1 P N
X I/O/TMS 39 -800 -1450 100 R 50 50 1 1 B
X I/O 40 -800 -1550 100 R 50 50 1 1 B
X I/O 41 -800 -1650 100 R 50 50 1 1 B
X GND 42 0 -1900 100 U 50 50 1 1 W
X VCC 43 0 1950 100 D 50 50 1 1 P N
X I/O 44 750 -1650 100 L 50 50 1 1 B
X I/O/PD2 45 750 -1550 100 L 50 50 1 1 B
X I/O 46 750 -1450 100 L 50 50 1 1 B
X GND 47 0 -1900 100 U 50 50 1 1 P N
X I/O 48 750 -1350 100 L 50 50 1 1 B
X I/O 49 750 -1250 100 L 50 50 1 1 B
X I/O 5 -800 1450 100 R 50 50 1 1 B
X I/O 50 750 -1150 100 L 50 50 1 1 B
X I/O 51 750 -1050 100 L 50 50 1 1 B
X I/O 52 750 -950 100 L 50 50 1 1 B
X VCC 53 0 1950 100 D 50 50 1 1 P N
X I/O 54 750 -850 100 L 50 50 1 1 B
X I/O 55 750 -750 100 L 50 50 1 1 B
X I/O 56 750 -650 100 L 50 50 1 1 B
X I/O 57 750 -550 100 L 50 50 1 1 B
X I/O 58 750 -450 100 L 50 50 1 1 B
X GND 59 0 -1900 100 U 50 50 1 1 P N
X I/O 6 -800 1250 100 R 50 50 1 1 B
X I/O 6 -800 1350 100 R 50 50 1 1 B
X I/O 60 750 -350 100 L 50 50 1 1 B
X I/O 61 750 -250 100 L 50 50 1 1 B
X I/O/TCK 62 750 -150 100 L 50 50 1 1 B
X I/O 63 750 -50 100 L 50 50 1 1 B
X I/O 64 750 50 100 L 50 50 1 1 B
X I/O 65 750 150 100 L 50 50 1 1 B
X VCC 66 0 1950 100 D 50 50 1 1 P N
X I/O 67 750 250 100 L 50 50 1 1 B
X I/O 68 750 350 100 L 50 50 1 1 B
X I/O 69 750 450 100 L 50 50 1 1 B
X GND 7 0 -1900 100 U 50 50 1 1 P N
X I/O 70 750 550 100 L 50 50 1 1 B
X I/O/TDO 71 750 650 100 L 50 50 1 1 B
X GND 72 0 -1900 100 U 50 50 1 1 P N
X I/O 73 750 750 100 L 50 50 1 1 B
X I/O 74 750 850 100 L 50 50 1 1 B
X I/O 75 750 950 100 L 50 50 1 1 B
X I/O 76 750 1050 100 L 50 50 1 1 B
X I/O 77 750 1150 100 L 50 50 1 1 B
X VCC 78 0 1950 100 D 50 50 1 1 P N
X I/O 79 750 1250 100 L 50 50 1 1 B
X I/O 8 -800 1150 100 R 50 50 1 1 B
X I/O 80 750 1350 100 L 50 50 1 1 B
X I/O/GCK3 81 750 1450 100 L 50 50 1 1 B
X GND 82 0 -1900 100 U 50 50 1 1 P N
X IINPUT/GCLK1 83 750 1550 100 L 50 50 1 1 I
X INPUT/OE1 84 750 1650 100 L 50 50 1 1 I
X I/O 9 -800 1050 100 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library

83028
PCB/fp-info-cache
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9
PCB/idt7007pf.dcm
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@ -1,9 +0,0 @@
EESchema-DOCLIB Version 2.0
#
$CMP IDT7007PF
D 16K x 8 Dual-Port SRAM, TQFP-64
K dual-port ram
F https://www.idt.com/document/dst/7006-data-sheet
$ENDCMP
#
#End Doc Library

85
PCB/idt7007pf.lib
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@ -1,85 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# IDT7007PF
#
DEF IDT7007PF U 0 20 Y Y 1 F N
F0 "U" 0 100 50 H V C CNN
F1 "IDT7007PF" 0 -100 50 H V C CNN
F2 "Package_QFP:TQFP-80_14x14mm_P0.6mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TQFP*14x14mm*P0.8mm*
$ENDFPLIST
DRAW
S -400 -1600 400 1600 0 1 10 f
X GND 11 0 -1700 100 U 50 50 1 1 P N
X I/O0R 12 500 -800 100 L 50 50 1 1 B
X I/O1R 13 500 -900 100 L 50 50 1 1 B
X I/O2R 14 500 -1000 100 L 50 50 1 1 B
X VCC 15 0 1700 100 D 50 50 1 1 W
X I/O3R 16 500 -1100 100 L 50 50 1 1 B
X I/O4R 17 500 -1200 100 L 50 50 1 1 B
X I/O5R 18 500 -1300 100 L 50 50 1 1 B
X I/O6R 19 500 -1400 100 L 50 50 1 1 B
X I/O2L 2 -500 -1000 100 R 50 50 1 1 B
X I/O7R 21 500 -1500 100 L 50 50 1 1 B
X ~OE~R 23 500 1400 100 L 50 50 1 1 I
X R/~W~R 24 500 1300 100 L 50 50 1 1 I
X ~SEM~R 25 500 1100 100 L 50 50 1 1 I
X ~CE~R 26 500 1500 100 L 50 50 1 1 I
X A14R 28 500 -650 100 L 50 50 1 1 I
X A13R 29 500 -550 100 L 50 50 1 1 I
X I/O3L 3 -500 -1100 100 R 50 50 1 1 B
X GND 30 0 -1700 100 U 50 50 1 1 P N
X A12R 31 500 -450 100 L 50 50 1 1 I
X A11R 32 500 -350 100 L 50 50 1 1 I
X A10R 33 500 -250 100 L 50 50 1 1 I
X A9R 34 500 -150 100 L 50 50 1 1 I
X A8R 35 500 -50 100 L 50 50 1 1 I
X A7R 36 500 50 100 L 50 50 1 1 I
X A6R 37 500 150 100 L 50 50 1 1 I
X A5R 38 500 250 100 L 50 50 1 1 I
X I/O4L 4 -500 -1200 100 R 50 50 1 1 B
X A4R 43 500 350 100 L 50 50 1 1 I
X A3R 44 500 450 100 L 50 50 1 1 I
X A2R 45 500 550 100 L 50 50 1 1 I
X A1R 46 500 650 100 L 50 50 1 1 I
X A0R 47 500 750 100 L 50 50 1 1 I
X ~INT~R 48 500 1000 100 L 50 50 1 1 O
X ~BUSY~R 49 500 1200 100 L 50 50 1 1 O
X I/O5L 5 -500 -1300 100 R 50 50 1 1 B
X M/~S~ 50 -500 900 100 R 50 50 1 1 I
X GND 51 0 -1700 100 U 50 50 1 1 P N
X ~BUSY~L 52 -500 1200 100 R 50 50 1 1 O
X ~INT~L 53 -500 1000 100 R 50 50 1 1 O
X A0L 54 -500 750 100 R 50 50 1 1 I
X A1L 55 -500 650 100 R 50 50 1 1 I
X A2L 56 -500 550 100 R 50 50 1 1 I
X A3L 57 -500 450 100 R 50 50 1 1 I
X A4L 58 -500 350 100 R 50 50 1 1 I
X A5L 59 -500 250 100 R 50 50 1 1 I
X GND 6 0 -1700 100 U 50 50 1 1 W
X A6L 63 -500 150 100 R 50 50 1 1 I
X A7L 64 -500 50 100 R 50 50 1 1 I
X A8L 65 -500 -50 100 R 50 50 1 1 I
X A9L 66 -500 -150 100 R 50 50 1 1 I
X A10L 67 -500 -250 100 R 50 50 1 1 I
X A11L 68 -500 -350 100 R 50 50 1 1 I
X A12L 69 -500 -450 100 R 50 50 1 1 I
X I/O6L 7 -500 -1400 100 R 50 50 1 1 B
X VCC 70 100 1700 100 D 50 50 1 1 W
X A13L 71 -500 -550 100 R 50 50 1 1 I
X A14L 72 -500 -650 100 R 50 50 1 1 I
X ~CE~L 74 -500 1500 100 R 50 50 1 1 I
X ~SEM~L 75 -500 1100 100 R 50 50 1 1 I
X R/~W~L 76 -500 1300 100 R 50 50 1 1 I
X ~OE~L 77 -500 1400 100 R 50 50 1 1 I
X I/O0L 79 -500 -800 100 R 50 50 1 1 B
X I/O7L 8 -500 -1500 100 R 50 50 1 1 B
X I/O1L 80 -500 -900 100 R 50 50 1 1 B
X VCC 9 -100 1700 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library

15
README.md
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@ -3,15 +3,22 @@
# ∀2 Retro Computing Analog VGA Card & PicoPal
![PicoPal Logo](docs/PicoPalLogo.png)
This repo is now an archival copy.
This repo is now the root of a multi-project tree.
Continue to use this repo to report issues with the hardware or firmware.
Firmware development will continue to take place in [analog-firmware](https://github.com/V2RetroComputing/analog-firmware)
## Building the project files
Clone this repo and issue a git submodule update --init
Hardware development will continue in a new repo shortly.
## Sub-projects
[Flash Preloader](https://github.com/V2RetroComputing/analog-preload)
[Firmware](https://github.com/V2RetroComputing/analog-firmware)
[Utilities](https://github.com/V2RetroComputing/analog-utilities)
[Hardware](https://github.com/V2RetroComputing/analog-hardware)
[PicoPal V1](https://github.com/V2RetroComputing/picopal-v1)
This is a fork of Mark Aikens [Apple II VGA](https://github.com/markadev/AppleII-VGA/) project with a new board design,
custom logic in an PAL16V8 to handle card select lines, and upgraded firmware with many new features.
custom logic in an ATF16V8C to handle card select lines, and upgraded firmware with many new features.
Full details are available at [∀2 Retro Computing](https://www.v2retrocomputing.com/).

1
analog-firmware Submodule

@ -0,0 +1 @@
Subproject commit 0a23cd3effce8615e966fefe12a1ac05b661da1c

1
analog-hardware Submodule

@ -0,0 +1 @@
Subproject commit 22de82731a853e5188ca737446c8579017270bec

1
analog-preload Submodule

@ -0,0 +1 @@
Subproject commit d79c8724b38a4c309f4c28a935d19bb442ddeafa

1
analog-utilities Submodule

@ -0,0 +1 @@
Subproject commit 399115e592b157be7b05c4e18aabbf9d804e673e

1
picopal-v1 Submodule

@ -0,0 +1 @@
Subproject commit dbde4b1a4bb3d2647ef39bca39bba3fad3cf1425

119
utilities/Makefile
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@ -1,119 +0,0 @@
# Run 'make SYS=<target>'; or, set a SYS env.
# var. to build for another target system.
SYS ?= apple2
# For this one see https://applecommander.github.io/
AC ?= ac.jar
# Just the usual way to find out if we're
# using cmd.exe to execute make rules.
ifneq ($(shell echo),)
CMD_EXE = 1
endif
ifdef CMD_EXE
NULLDEV = nul:
DEL = -del /f
RMDIR = rmdir /s /q
else
NULLDEV = /dev/null
DEL = $(RM)
RMDIR = $(RM) -r
endif
ifdef CC65_HOME
AS = $(CC65_HOME)/bin/ca65
CC = $(CC65_HOME)/bin/cc65
CL = $(CC65_HOME)/bin/cl65
LD = $(CC65_HOME)/bin/ld65
else
AS := $(if $(wildcard ../../bin/ca65*),../../bin/ca65,ca65)
CC := $(if $(wildcard ../../bin/cc65*),../../bin/cc65,cc65)
CL := $(if $(wildcard ../../bin/cl65*),../../bin/cl65,cl65)
LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65)
endif
EXELIST_apple2 = uploadfont/uploadfont uploadfont/flashfont configtool/configtool
ifneq ($(EXELIST_$(SYS)),)
all: disk $(EXELIST_$(SYS))
else
all: notavailable
endif
# empty target used to skip systems that will not work with any program in this dir
notavailable:
ifeq ($(MAKELEVEL),0)
@echo "info: apple2 tests not available for" $(SYS)
else
# suppress the "nothing to be done for 'all' message
@echo > $(NULLDEV)
endif
disk: v2a525.po v2a35.po
v2a525.po: uploadfont/uploadfont uploadfont/uploadfonte uploadfont/flashfont uploadfont/flashfonte configtool/v2acfg configtool/v2acfge
cp prodos/pd525.po $@
java -jar $(AC) -n $@ V2ANALOG
java -jar $(AC) -as $@ UPLOADFONT <uploadfont/uploadfont
java -jar $(AC) -as $@ UPLOADFONTE <uploadfont/uploadfonte
java -jar $(AC) -as $@ FLASHFONT <uploadfont/flashfont
java -jar $(AC) -as $@ FLASHFONTE <uploadfont/flashfonte
java -jar $(AC) -as $@ V2ACFG <configtool/v2acfg
java -jar $(AC) -as $@ V2ACFGE <configtool/v2acfge
java -jar $(AC) -p $@ IIC.FONT BIN 0x2000 <fonts/iicfont.bin
java -jar $(AC) -p $@ IIPLUS.FONT BIN 0x2000 <fonts/iiplus.bin
java -jar $(AC) -p $@ LOWERCASE.FONT BIN 0x2000 <fonts/lcase.bin
java -jar $(AC) -p $@ PIG.FONT BIN 0x2000 <fonts/pigfont.bin
java -jar $(AC) -p $@ MOUSETEXT.FONT BIN 0x2000 <fonts/iiemouse.bin
java -jar $(AC) -p $@ REACTIVE.FONT BIN 0x2000 <fonts/reactive.bin
java -jar $(AC) -bas $@ IICFONT.BAS <prodos/iicfont.bas
java -jar $(AC) -bas $@ IIPLUS.BAS <prodos/iiplus.bas
java -jar $(AC) -bas $@ LOWERCASE.BAS <prodos/lowercase.bas
java -jar $(AC) -bas $@ PIGFONT.BAS <prodos/pigfont.bas
java -jar $(AC) -bas $@ MOUSETEXT.BAS <prodos/mousetext.bas
java -jar $(AC) -bas $@ REACTIVE.BAS <prodos/reactive.bas
v2a35.po: uploadfont/uploadfont uploadfont/uploadfonte uploadfont/flashfont uploadfont/flashfonte configtool/v2acfg configtool/v2acfge
cp prodos/pd35.po $@
java -jar $(AC) -n $@ V2ANALOG
java -jar $(AC) -as $@ UPLOADFONT <uploadfont/uploadfont
java -jar $(AC) -as $@ UPLOADFONTE <uploadfont/uploadfonte
java -jar $(AC) -as $@ FLASHFONT <uploadfont/flashfont
java -jar $(AC) -as $@ FLASHFONTE <uploadfont/flashfonte
java -jar $(AC) -as $@ V2ACFG <configtool/v2acfg
java -jar $(AC) -as $@ V2ACFGE <configtool/v2acfge
java -jar $(AC) -p $@ IIC.FONT BIN 0x2000 <fonts/iicfont.bin
java -jar $(AC) -p $@ IIPLUS.FONT BIN 0x2000 <fonts/iiplus.bin
java -jar $(AC) -p $@ LOWERCASE.FONT BIN 0x2000 <fonts/lcase.bin
java -jar $(AC) -p $@ PIG.FONT BIN 0x2000 <fonts/pigfont.bin
java -jar $(AC) -p $@ MOUSETEXT.FONT BIN 0x2000 <fonts/iiemouse.bin
java -jar $(AC) -p $@ REACTIVE.FONT BIN 0x2000 <fonts/reactive.bin
java -jar $(AC) -bas $@ IICFONT.BAS <prodos/iicfont.bas
java -jar $(AC) -bas $@ IIPLUS.BAS <prodos/iiplus.bas
java -jar $(AC) -bas $@ LOWERCASE.BAS <prodos/lowercase.bas
java -jar $(AC) -bas $@ PIGFONT.BAS <prodos/pigfont.bas
java -jar $(AC) -bas $@ MOUSETEXT.BAS <prodos/mousetext.bas
java -jar $(AC) -bas $@ REACTIVE.BAS <prodos/reactive.bas
uploadfont/uploadfont: uploadfont/uploadfont.c
$(MAKE) -C uploadfont uploadfont
uploadfont/uploadfonte: uploadfont/uploadfont.c
$(MAKE) -C uploadfont uploadfonte
uploadfont/flashfont: uploadfont/flashfont.c
$(MAKE) -C uploadfont flashfont
uploadfont/flashfonte: uploadfont/flashfont.c
$(MAKE) -C uploadfont flashfonte
configtool/v2acfg: configtool/configtool.c
$(MAKE) -C configtool v2acfg
configtool/v2acfge: configtool/configtool.c
$(MAKE) -C configtool v2acfge
clean:
@$(DEL) font.dsk 2>$(NULLDEV)

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utilities/common/picopal.h
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typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef signed char int8_t;
typedef signed short int16_t;
#define PICOPAL_REGISTER(n) (*(volatile unsigned char *)(0xC080 | (n) | (cardslot << 4)))
#define PICOPAL_WRDATA PICOPAL_REGISTER(0x0)
#define PICOPAL_ALSB PICOPAL_REGISTER(0x1)
#define PICOPAL_AMSB PICOPAL_REGISTER(0x2)
#define PICOPAL_MODE PICOPAL_REGISTER(0x3)
#define PICOPAL_TBCOLOR PICOPAL_REGISTER(0x4)
#define PICOPAL_BORDER PICOPAL_REGISTER(0x5)
#define PICOPAL_RDDATA PICOPAL_REGISTER(0x7)
#define PICOPAL_WRFONT PICOPAL_REGISTER(0x8)
#define PICOPAL_RDFONT PICOPAL_REGISTER(0xf)
#define CFG_BUFFER ((volatile unsigned char *)(0xC0E0 | (cardslot << 8)))
typedef enum {
MODE_REBOOT = 0,
MODE_DIAG,
MODE_FS,
MODE_VGACARD,
MODE_APPLICARD,
MODE_SERIAL,
MODE_PARALLEL,
MODE_MIDI,
MODE_SNESMAX,
MODE_ETHERNET
} v2mode_t;
typedef enum {
SERIAL_LOOP = 0,
SERIAL_USB,
SERIAL_WIFI,
SERIAL_PRINTER,
} serialmux_t;
typedef enum {
USB_HOST_CDC,
USB_GUEST_CDC,
USB_GUEST_MIDI,
} usbmux_t;
typedef enum {
WIFI_CLIENT = 0,
WIFI_AP,
} wifimode_t;
#define FS_BUFFER ((volatile unsigned char *)(0xC800))
#define FS_COMMAND PICOPAL_REGISTER(0x0)
#define FS_FILE PICOPAL_REGISTER(0x1)
#define FS_FLAGS PICOPAL_REGISTER(0x1)
#define FS_SIZELSB PICOPAL_REGISTER(0x2)
#define FS_SIZEMSB PICOPAL_REGISTER(0x3)
#define FS_OFFLSB PICOPAL_REGISTER(0x2)
#define FS_OFFMSB PICOPAL_REGISTER(0x3)
#define FS_WHENCE PICOPAL_REGISTER(0x4)
#define FS_BUSY PICOPAL_REGISTER(0xD)
#define FS_STATUS PICOPAL_REGISTER(0xE)
#define FS_EXECUTE PICOPAL_REGISTER(0xF)
#define FS_O_RD 1
#define FS_O_WR 2
#define FS_O_APPEND 4
#define FS_O_EXISTING 8
#define FS_O_CREATE 16
#define FS_O_TRUNC 32
#define FS_SEEK_SET 0
#define FS_SEEK_CUR 1
#define FS_SEEK_END 2
typedef enum {
FS_OPEN = 0x10,
FS_CLOSE = 0x11,
FS_READ = 0x12,
FS_WRITE = 0x13,
FS_SEEK = 0x14,
FS_TELL = 0x15,
} fscommand_t;
typedef enum {
FS_ERR_OK = 0, // No error
FS_ERR_IO = -1, // Error during device operation
FS_ERR_CORRUPT = -2, // Corrupted
FS_ERR_NOENT = -3, // No directory entry
FS_ERR_EXIST = -4, // Entry already exists
FS_ERR_NOTDIR = -5, // Entry is not a dir
FS_ERR_ISDIR = -5, // Entry is a dir
FS_ERR_NOTEMPTY = -7, // Dir is not empty
FS_ERR_BADF = -8, // Bad file number
FS_ERR_FBIG = -9, // File too large
FS_ERR_INVAL = -10, // Invalid parameter
FS_ERR_NOSPC = -11, // No space left on device
FS_ERR_NOMEM = -12, // No more memory available
FS_ERR_NOATTR = -13, // No data/attr available
FS_ERR_NAMETOOLONG = -14 // File name too long
} fserror_t;
typedef enum {
MACHINE_AUTO = 0,
MACHINE_APPLE_II = 1,
MACHINE_APPLE_IIE = 2,
MACHINE_APPLE_IIGS = 3,
MACHINE_MAXVALUE = 4
} compat_t;

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utilities/configtool/Makefile
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# Run 'make SYS=<target>'; or, set a SYS env.
# var. to build for another target system.
SYS ?= apple2
# For this one see https://applecommander.github.io/
AC ?= ac.jar
# Just the usual way to find out if we're
# using cmd.exe to execute make rules.
ifneq ($(shell echo),)
CMD_EXE = 1
endif
ifdef CMD_EXE
NULLDEV = nul:
DEL = -del /f
RMDIR = rmdir /s /q
else
NULLDEV = /dev/null
DEL = $(RM)
RMDIR = $(RM) -r
endif
ifdef CC65_HOME
AS = $(CC65_HOME)/bin/ca65
CC = $(CC65_HOME)/bin/cc65
CL = $(CC65_HOME)/bin/cl65
LD = $(CC65_HOME)/bin/ld65
else
AS := $(if $(wildcard ../../bin/ca65*),../../bin/ca65,ca65)
CC := $(if $(wildcard ../../bin/cc65*),../../bin/cc65,cc65)
CL := $(if $(wildcard ../../bin/cl65*),../../bin/cl65,cl65)
LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65)
endif
EXELIST_apple2 = \
uploadfont
ifneq ($(EXELIST_$(SYS)),)
all: $(EXELIST_$(SYS))
else
all: notavailable
endif
# empty target used to skip systems that will not work with any program in this dir
notavailable:
ifeq ($(MAKELEVEL),0)
@echo "info: apple2 tests not available for" $(SYS)
else
# suppress the "nothing to be done for 'all' message
@echo > $(NULLDEV)
endif
disk: font.dsk
font.dsk: uploadfont
cp prodos/prodos.dsk $@
java -jar $(AC) -n $@ FONTDISK
java -jar $(AC) -p $@ BASIC.SYSTEM SYS 0x2000 <prodos/basic.system
java -jar $(AC) -p $@ BITSY.BOOT SYS 0x2000 <prodos/bitsy.boot
java -jar $(AC) -p $@ QUIT.SYSTEM SYS 0x2000 <prodos/quit.system
java -jar $(AC) -as $@ UPLOADFONT <uploadfont
java -jar $(AC) -p $@ IIC.FONT BIN 0x2000 <fonts/iicfont.bin
java -jar $(AC) -p $@ IIPLUS.FONT BIN 0x2000 <fonts/iiplus.bin
java -jar $(AC) -p $@ LOWERCASE.FONT BIN 0x2000 <fonts/lcase.bin
java -jar $(AC) -p $@ PIG.FONT BIN 0x2000 <fonts/pigfont.bin
java -jar $(AC) -p $@ MOUSETEXT.FONT BIN 0x2000 <fonts/iiemouse.bin
java -jar $(AC) -p $@ REACTIVE.FONT BIN 0x2000 <fonts/reactive.bin
java -jar $(AC) -bas $@ IICFONT.BAS <prodos/iicfont.bas
java -jar $(AC) -bas $@ IIPLUS.BAS <prodos/iiplus.bas
java -jar $(AC) -bas $@ LOWERCASE.BAS <prodos/lowercase.bas
java -jar $(AC) -bas $@ PIGFONT.BAS <prodos/pigfont.bas
java -jar $(AC) -bas $@ MOUSETEXT.BAS <prodos/mousetext.bas
java -jar $(AC) -bas $@ REACTIVE.BAS <prodos/reactive.bas
uploadfont: uploadfont.c
$(CL) -Oirs -t apple2 --start-addr 0x4000 -m uploadfont.map $^
clean:
@$(DEL) font.dsk 2>$(NULLDEV)
@$(DEL) uploadfont uploadfont.map 2>$(NULLDEV)

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utilities/modes/Makefile
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# Run 'make SYS=<target>'; or, set a SYS env.
# var. to build for another target system.
SYS ?= apple2
# Just the usual way to find out if we're
# using cmd.exe to execute make rules.
ifneq ($(shell echo),)
CMD_EXE = 1
endif
ifdef CMD_EXE
NULLDEV = nul:
DEL = -del /f
RMDIR = rmdir /s /q
else
NULLDEV = /dev/null
DEL = $(RM)
RMDIR = $(RM) -r
endif
ifdef CC65_HOME
AS = $(CC65_HOME)/bin/ca65
CC = $(CC65_HOME)/bin/cc65
CL = $(CC65_HOME)/bin/cl65
LD = $(CC65_HOME)/bin/ld65
else
AS := $(if $(wildcard ../../bin/ca65*),../../bin/ca65,ca65)
CC := $(if $(wildcard ../../bin/cc65*),../../bin/cc65,cc65)
CL := $(if $(wildcard ../../bin/cl65*),../../bin/cl65,cl65)
LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65)
endif
EXELIST_apple2 = modeswitch
ifneq ($(EXELIST_$(SYS)),)
all: $(EXELIST_$(SYS))
else
all: notavailable
endif
# empty target used to skip systems that will not work with any program in this dir
notavailable:
ifeq ($(MAKELEVEL),0)
@echo "info: modeswitch not available for" $(SYS)
else
# suppress the "nothing to be done for 'all' message
@echo > $(NULLDEV)
endif
modeswitch: modeswitch.c
$(CL) -Oirs -t apple2 --start-addr 0x2000 -m $@.map -o $@ $^
~/applesingle/applesingle -r < $@ > $@"#062000"
clean:
@$(DEL) modeswitch modeswitch.map 2>$(NULLDEV)

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utilities/modes/modeswitch.c
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@ -1,299 +0,0 @@
// cl65 -t apple2 --start-addr 0x4000 uploadfont.c
#include <stdio.h>
#include <conio.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include "../common/picopal.h"
uint16_t cardslot = 3;
uint8_t *cfgbuf;
void paint_backdrop(char *str) {
int w, i;
w = strlen(str);
if(w > 20) {
w = 20;
}
clrscr();
gotoy(0); gotox(1);
cputs("V2 Analog");
gotoy(0); gotox(39 - w);
if((w == 19) && str[19])
w = 16;
for(i = 0; i < w; i++) {
cputc(str[i]);
}
if((i == 17) && str[i])
cputs("...");
gotoy(1); gotox(0);
cputs("----------------------------------------");
gotoy(22); gotox(0);
cputs("----------------------------------------");
gotoy(23); gotox(4);
cputs("https://www.v2retrocomputing.com");
}
void message(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-4)/2); i++) {
cputc(' ');
}
cputs("[OK]");
i += 4;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 0x1B:
case 'O':
case 'o':
return;
}
}
}
int confirm(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-12)/2); i++) {
cputc(' ');
}
cputs("[YES] / [NO]");
i += 12;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 'Y':
case 'y':
return 1;
case 0x1B:
case 'N':
case 'n':
return 0;
}
}
}
void cfg_cmd(char *cmd) {
int i = 0;
uint16_t delay;
while(i < 31) {
if(*cmd) {
cfgbuf[i++] = *cmd++;
} else {
cfgbuf[i++] = 0x00;
}
}
cfgbuf[31] = 0x00;
delay = 0x1fff;
while(delay > 0) delay--;
}
int prompt_slot(void) {
int c;
paint_backdrop("Mode Switch");
gotoy(11); gotox(2);
cputs("Which slot is the card installed in?");
gotoy(13); gotox(14);
printf("Default = %i", cardslot);
for(;;) {
c = cgetc();
if((c >= '1') && (c <= '7')) {
cardslot = c - '0';
return 1;
} else if((c == 0x0A) || (c == 0x0D)) {
return 1;
} else if(c == 0x1B) {
return 0;
}
}
}
void main (void) {
int paint_menu = 1;
int c;
if(!prompt_slot()) {
return;
}
cfgbuf = (uint8_t *)(0xC0E0 | (cardslot << 8));
paint_backdrop("Mode Switch");
gotoy(11); gotox(4);
cputs("1. VGA Card");
gotoy(12); gotox(4);
cputs("2. PCPI Applicard");
gotoy(13); gotox(4);
cputs("3. Serial");
gotoy(14); gotox(4);
cputs("4. Parallel");
gotoy(15); gotox(4);
cputs("5. Card Diagnostic");
gotoy(18); gotox(4);
cputs("8. Save Default");
gotoy(19); gotox(4);
cputs("9. Quit");
for(;;) {
c = cgetc();
switch(c) {
case '1':
cfg_cmd("MODE=VGA");
break;
case '2':
cfg_cmd("MODE=Z80");
break;
case '3':
cfg_cmd("MODE=SERIAL");
break;
case '4':
cfg_cmd("MODE=PARALLEL");
break;
case '5':
cfg_cmd("MODE=DIAG");
break;
case '8':
cfg_cmd("WRITE_CONFIG");
break;
case '9':
clrscr();
puts("Done.\n");
return;
}
}
}

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utilities/prodos/basic.system
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utilities/prodos/bitsy.boot
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6
utilities/prodos/iicfont.bas
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@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD IIC.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

6
utilities/prodos/iiplus.bas
View File

@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD IIPLUS.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

6
utilities/prodos/lowercase.bas
View File

@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD LOWERCASE.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

6
utilities/prodos/mousetext.bas
View File

@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD MOUSETEXT.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

6
utilities/prodos/pigfont.bas
View File

@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD PIG.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

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utilities/prodos/prodos.bin
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utilities/prodos/prodos.dsk
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BIN
utilities/prodos/quit.system
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6
utilities/prodos/reactive.bas
View File

@ -1,6 +0,0 @@
10 HOME
20 POKE - 16206,0
30 POKE - 16207,0
40 PRINT CHR$ (4);"BLOAD REACTIVE.FONT"
50 PRINT CHR$ (4);"BRUN UPLOADFONT"
60 PRINT CHR$ (4);"-QUIT.SYSTEM"

68
utilities/uploadfont/Makefile
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@ -1,68 +0,0 @@
# Run 'make SYS=<target>'; or, set a SYS env.
# var. to build for another target system.
SYS ?= apple2
# Just the usual way to find out if we're
# using cmd.exe to execute make rules.
ifneq ($(shell echo),)
CMD_EXE = 1
endif
ifdef CMD_EXE
NULLDEV = nul:
DEL = -del /f
RMDIR = rmdir /s /q
else
NULLDEV = /dev/null
DEL = $(RM)
RMDIR = $(RM) -r
endif
ifdef CC65_HOME
AS = $(CC65_HOME)/bin/ca65
CC = $(CC65_HOME)/bin/cc65
CL = $(CC65_HOME)/bin/cl65
LD = $(CC65_HOME)/bin/ld65
else
AS := $(if $(wildcard ../../bin/ca65*),../../bin/ca65,ca65)
CC := $(if $(wildcard ../../bin/cc65*),../../bin/cc65,cc65)
CL := $(if $(wildcard ../../bin/cl65*),../../bin/cl65,cl65)
LD := $(if $(wildcard ../../bin/ld65*),../../bin/ld65,ld65)
endif
EXELIST_apple2 = uploadfont uploadfonte flashfont flashfonte
ifneq ($(EXELIST_$(SYS)),)
all: $(EXELIST_$(SYS))
else
all: notavailable
endif
# empty target used to skip systems that will not work with any program in this dir
notavailable:
ifeq ($(MAKELEVEL),0)
@echo "info: uploadfont not available for" $(SYS)
else
# suppress the "nothing to be done for 'all' message
@echo > $(NULLDEV)
endif
uploadfont: uploadfont.c
$(CL) -Oirs -t apple2 --start-addr 0x2800 -m $@.map -o $@ $^
~/applesingle/applesingle -r < $@ > $@"#062800"
uploadfonte: uploadfont.c
$(CL) -Oirs -t apple2enh --start-addr 0x2800 -m $@.map -o $@ $^
~/applesingle/applesingle -r < $@ > $@"#062800"
flashfont: flashfont.c
$(CL) -Oirs -t apple2 --start-addr 0x2800 -m $@.map -o $@ $^
~/applesingle/applesingle -r < $@ > $@"#062800"
flashfonte: flashfont.c
$(CL) -Oirs -t apple2enh --start-addr 0x2800 -m $@.map -o $@ $^
~/applesingle/applesingle -r < $@ > $@"#062800"
clean:
@$(DEL) uploadfont uploadfont.map uploadfonte uploadfonte.map flashfont flashfont.map flashfonte flashfonte.map 2>$(NULLDEV)

449
utilities/uploadfont/flashfont.c
View File

@ -1,449 +0,0 @@
// cl65 -t apple2 --start-addr 0x4000 uploadfont.c
#include <stdio.h>
#include <conio.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include "../common/picopal.h"
uint16_t cardslot = 3;
uint8_t *cfgbuf;
uint8_t *fsbuf;
uint8_t *font = (uint8_t *)0x2000;
#define CARD_TIMEOUT 0xfff
uint16_t timeout = CARD_TIMEOUT;
void paint_backdrop(char *str) {
int w, i;
w = strlen(str);
if(w > 20) {
w = 20;
}
clrscr();
gotoy(0); gotox(1);
cputs("V2 Analog");
gotoy(0); gotox(39 - w);
if((w == 19) && str[19])
w = 16;
for(i = 0; i < w; i++) {
cputc(str[i]);
}
if((i == 17) && str[i])
cputs("...");
gotoy(1); gotox(0);
cputs("----------------------------------------");
gotoy(22); gotox(0);
cputs("----------------------------------------");
gotoy(23); gotox(4);
cputs("https://www.v2retrocomputing.com");
}
void message(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-4)/2); i++) {
cputc(' ');
}
cputs("[OK]");
i += 4;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 0x1B:
case 'O':
case 'o':
return;
}
}
}
int confirm(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-12)/2); i++) {
cputc(' ');
}
cputs("[YES] / [NO]");
i += 12;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 'Y':
case 'y':
return 1;
case 0x1B:
case 'N':
case 'n':
return 0;
}
}
}
void cfg_cmd(char *cmd) {
int i = 0;
uint16_t delay;
while(i < 31) {
if(*cmd) {
cfgbuf[i++] = *cmd++;
} else {
cfgbuf[i++] = 0x00;
}
}
cfgbuf[31] = 0x00;
delay = 0x1fff;
while(delay > 0) delay--;
}
int prompt_slot(void) {
int c;
paint_backdrop("Font Upload");
gotoy(11); gotox(2);
cputs("Which slot is the card installed in?");
gotoy(13); gotox(14);
printf("Default = %i", cardslot);
for(;;) {
c = cgetc();
if((c >= '1') && (c <= '7')) {
cardslot = c - '0';
return 1;
} else if((c == 0x0A) || (c == 0x0D)) {
return 1;
} else if(c == 0x1B) {
return 0;
}
}
}
int file_open(char *path, uint8_t flags) {
timeout = CARD_TIMEOUT;
strcpy((char *)fsbuf, path);
FS_FLAGS = flags;
FS_COMMAND = FS_OPEN;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
if(FS_STATUS != FS_ERR_OK) {
return FS_STATUS;
}
return FS_FILE;
}
int file_close(int file) {
timeout = CARD_TIMEOUT;
FS_FILE = file;
FS_COMMAND = FS_CLOSE;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
return FS_STATUS;
}
int file_read(int file, char *buffer, uint16_t size) {
timeout = CARD_TIMEOUT;
FS_FILE = file;
FS_COMMAND = FS_READ;
FS_SIZELSB = size & 0xFF;
FS_SIZEMSB = size >> 8;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
if(FS_STATUS != FS_ERR_OK) {
return FS_STATUS;
}
size = (((uint16_t)FS_SIZEMSB) << 8) | (uint16_t)FS_SIZELSB;
memcpy(buffer, fsbuf, size);
return size;
}
int file_write(int file, char *buffer, uint16_t size) {
timeout = CARD_TIMEOUT;
memcpy(fsbuf, buffer, size);
FS_FILE = file;
FS_COMMAND = FS_WRITE;
FS_SIZELSB = size & 0xFF;
FS_SIZEMSB = size >> 8;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
if(FS_STATUS != FS_ERR_OK) {
return FS_STATUS;
}
size = (((uint16_t)FS_SIZEMSB) << 8) | (uint16_t)FS_SIZELSB;
return size;
}
int file_seek(int file, int16_t off, uint8_t whence) {
timeout = CARD_TIMEOUT;
FS_FILE = file;
FS_COMMAND = FS_SEEK;
FS_OFFLSB = ((uint16_t)off) & 0xFF;
FS_OFFMSB = ((uint16_t)off) >> 8;
FS_WHENCE = whence;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
if(FS_STATUS != FS_ERR_OK) {
return FS_STATUS;
}
off = (int16_t)(((uint16_t)FS_SIZEMSB) << 8) | (uint16_t)FS_SIZELSB;
return off;
}
int file_tell(int file) {
uint16_t off;
timeout = CARD_TIMEOUT;
FS_FILE = file;
FS_COMMAND = FS_TELL;
FS_BUSY = 0xFF;
FS_EXECUTE = 0x00;
while(FS_BUSY && (timeout > 0)) {
timeout--;
}
if(FS_BUSY) {
message("I/O Error");
return FS_ERR_IO;
}
if(FS_STATUS != FS_ERR_OK) {
return FS_STATUS;
}
off = (((uint16_t)FS_SIZEMSB) << 8) | (uint16_t)FS_SIZELSB;
return off;
}
void main (void) {
int paint_menu = 1;
int file;
if(!prompt_slot()) {
return;
}
cfgbuf = (uint8_t *)CFG_BUFFER;
fsbuf = (uint8_t *)FS_BUFFER;
paint_backdrop("Please Wait");
gotoy(11); gotox(13);
cputs("Uploading font,");
gotoy(12); gotox(8);
cputs("your screen may flicker.");
cfg_cmd("MODE=FS");
while(memcmp(cfgbuf+24, "FSREADY.", 8) && (timeout > 0)) {
timeout--;
}
if(timeout == 0) {
message("Communication Timeout");
clrscr();
return;
}
file = file_open("font", FS_O_WR | FS_O_CREATE);
if(file >= 0) {
file_write(file, (char *)font, 2048);
file_close(file);
}
paint_backdrop("Please Wait");
gotoy(11); gotox(13);
cputs("Rebooting card,");
gotoy(12); gotox(8);
cputs("your screen may flicker.");
cfg_cmd("REBOOT");
clrscr();
puts("Done.\n");
}

BIN
utilities/uploadfont/uploadfont
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285
utilities/uploadfont/uploadfont.c
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@ -1,285 +0,0 @@
// cl65 -t apple2 --start-addr 0x4000 uploadfont.c
#include <stdio.h>
#include <conio.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include "../common/picopal.h"
uint16_t cardslot = 3;
uint8_t *cfgbuf;
uint8_t *fsbuf;
uint8_t *font = (uint8_t *)0x2000;
void paint_backdrop(char *str) {
int w, i;
w = strlen(str);
if(w > 20) {
w = 20;
}
clrscr();
gotoy(0); gotox(1);
cputs("V2 Analog");
gotoy(0); gotox(39 - w);
if((w == 19) && str[19])
w = 16;
for(i = 0; i < w; i++) {
cputc(str[i]);
}
if((i == 17) && str[i])
cputs("...");
gotoy(1); gotox(0);
cputs("----------------------------------------");
gotoy(22); gotox(0);
cputs("----------------------------------------");
gotoy(23); gotox(4);
cputs("https://www.v2retrocomputing.com");
}
void message(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-4)/2); i++) {
cputc(' ');
}
cputs("[OK]");
i += 4;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 0x1B:
case 'O':
case 'o':
return;
}
}
}
int confirm(char *str) {
int w, x, i, c;
if(strlen(str) > 34) {
w = 34;
} else {
w = strlen(str);
}
x = 20 - ((w+6)/2);
gotoy(9); gotox(x);
cputs(" +-");
for(i = 0; i < (w); i++) {
cputc('-');
}
cputs("-+ ");
gotoy(10); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(11); gotox(x);
cputs(" ! ");
for(c = 0; c < w; c++) {
cputc(str[c]);
}
cputs(" ! ");
gotoy(12); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(13); gotox(x);
cputs(" ! ");
for(i = 0; i < ((w-12)/2); i++) {
cputc(' ');
}
cputs("[YES] / [NO]");
i += 12;
for(; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(14); gotox(x);
cputs(" ! ");
for(i = 0; i < w; i++) {
cputc(' ');
}
cputs(" ! ");
gotoy(15); gotox(x);
cputs(" +-");
for(i = 0; i < w; i++) {
cputc('-');
}
cputs("-+ ");
for(;;) {
switch(cgetc()) {
case 0x0A:
case 0x0D:
case 'Y':
case 'y':
return 1;
case 0x1B:
case 'N':
case 'n':
return 0;
}
}
}
void cfg_cmd(char *cmd) {
int i = 0;
uint16_t delay;
while(i < 31) {
if(*cmd) {
cfgbuf[i++] = *cmd++;
} else {
cfgbuf[i++] = 0x00;
}
}
cfgbuf[31] = 0x00;
delay = 0x1fff;
while(delay > 0) delay--;
}
int prompt_slot(void) {
int c;
paint_backdrop("Font Upload");
gotoy(11); gotox(2);
cputs("Which slot is the card installed in?");
gotoy(13); gotox(14);
printf("Default = %i", cardslot);
for(;;) {
c = cgetc();
if((c >= '1') && (c <= '7')) {
cardslot = c - '0';
return 1;
} else if((c == 0x0A) || (c == 0x0D)) {
return 1;
} else if(c == 0x1B) {
return 0;
}
}
}
void main (void) {
int paint_menu = 1;
uint16_t i;
if(!prompt_slot()) {
return;
}
cfgbuf = (uint8_t *)CFG_BUFFER;
fsbuf = (uint8_t *)FS_BUFFER;
paint_backdrop("Please Wait");
gotoy(11); gotox(13);
cputs("Uploading font,");
gotoy(12); gotox(8);
cputs("your screen may flicker.");
cfg_cmd("BANK=SAVE");
cfg_cmd("BANK=FONT0");
for(i = 0; i < 0x200; i++) {
FS_BUFFER[i] = font[i];
}
cfg_cmd("BANK=FONT1");
for(i = 0; i < 0x200; i++) {
FS_BUFFER[i] = font[i+512];
}
cfg_cmd("BANK=FONT2");
for(i = 0; i < 0x200; i++) {
FS_BUFFER[i] = font[i+1024];
}
cfg_cmd("BANK=FONT3");
for(i = 0; i < 0x200; i++) {
FS_BUFFER[i] = font[i+1536];
}
cfg_cmd("BANK=RESTORE");
clrscr();
puts("Done.\n");
}

310
utilities/uploadfont/uploadfont.map
View File

@ -1,310 +0,0 @@
Modules list:
-------------
uploadfont.o:
CODE Offs=000000 Size=000061 Align=00001 Fill=0000
RODATA Offs=000000 Size=00002C Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(_directerrno.o):
CODE Offs=000061 Size=00000A Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(_file.o):
DATA Offs=000000 Size=00001E Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(_mappederrno.o):
CODE Offs=00006B Size=000010 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(_oserror.o):
BSS Offs=000000 Size=000001 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(_seterrno.o):
CODE Offs=00007B Size=000009 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(addeqsp.o):
CODE Offs=000084 Size=000011 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(addysp.o):
CODE Offs=000095 Size=00000E Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(callmain.o):
CODE Offs=0000A3 Size=000017 Align=00001 Fill=0000
DATA Offs=00001E Size=000004 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(condes.o):
CODE Offs=0000BA Size=00000C Align=00001 Fill=0000
DATA Offs=000022 Size=000025 Align=00001 Fill=0000
ONCE Offs=000000 Size=00000C Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(cout.o):
LOWCODE Offs=000000 Size=00000A Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(crt0.o):
CODE Offs=0000C6 Size=000012 Align=00001 Fill=0000
RODATA Offs=00002C Size=000007 Align=00001 Fill=0000
DATA Offs=000047 Size=000003 Align=00001 Fill=0000
STARTUP Offs=000000 Size=000034 Align=00001 Fill=0000
ONCE Offs=00000C Size=00006A Align=00001 Fill=0000
INIT Offs=000000 Size=00001D Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(decsp2.o):
CODE Offs=0000D8 Size=00000D Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(dosdetect.o):
DATA Offs=00004A Size=000001 Align=00001 Fill=0000
ONCE Offs=000076 Size=000014 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(errno.o):
BSS Offs=000001 Size=000002 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(exehdr.o):
EXEHDR Offs=000000 Size=00003A Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(filedes.o):
CODE Offs=0000E5 Size=000016 Align=00001 Fill=0000
DATA Offs=00004B Size=000020 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(incsp2.o):
CODE Offs=0000FB Size=000016 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(incsp4.o):
CODE Offs=000111 Size=000005 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(ldaxsp.o):
CODE Offs=000116 Size=000009 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(mli.o):
BSS Offs=000003 Size=000012 Align=00001 Fill=0000
DATA Offs=00006B Size=000024 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(oserror.o):
CODE Offs=00011F Size=000016 Align=00001 Fill=0000
RODATA Offs=000033 Size=000032 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(popptr1.o):
CODE Offs=000135 Size=00000E Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(pushax.o):
CODE Offs=000143 Size=00001A Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(pushwsp.o):
CODE Offs=00015D Size=00001C Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(puts.o):
CODE Offs=000179 Size=000068 Align=00001 Fill=0000
DATA Offs=00008F Size=000001 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(rwcommon.o):
CODE Offs=0001E1 Size=00003D Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(strlen.o):
CODE Offs=00021E Size=000016 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(write.o):
CODE Offs=000234 Size=000070 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(zerobss.o):
CODE Offs=0002A4 Size=000023 Align=00001 Fill=0000
/share/cc65/lib/apple2.lib(zeropage.o):
ZEROPAGE Offs=000000 Size=00001A Align=00001 Fill=0000
Segment list:
-------------
Name Start End Size Align
----------------------------------------------------
ZEROPAGE 000080 000099 00001A 00001
EXEHDR 003FC6 003FFF 00003A 00001
STARTUP 004000 004033 000034 00001
LOWCODE 004034 00403D 00000A 00001
CODE 00403E 004304 0002C7 00001
RODATA 004305 004369 000065 00001
DATA 00436A 0043F9 000090 00001
INIT 0043FA 004416 00001D 00001
BSS 004417 00442B 000015 00001
ONCE 004417 0044A2 00008C 00001
Exports list by name:
---------------------
COUT 004034 RLA __BSS_RUN__ 004417 RLA
__BSS_SIZE__ 000015 REA __CONSTRUCTOR_COUNT__ 000001 REA
__CONSTRUCTOR_TABLE__ 0044A1 RLA __DESTRUCTOR_COUNT__ 000000 REA
__DESTRUCTOR_TABLE__ 00436A RLA __EXEHDR__ 000001 REA
__FILETYPE__ 000006 REA __HIMEM__ 009600 REA
__LCADDR__ 00D400 REA __LCSIZE__ 000C00 REA
__LC_LAST__ 00D400 RLA __LC_START__ 00D400 RLA
__MAIN_LAST__ 0044A3 RLA __MAIN_START__ 004000 RLA
__ONCE_LOAD__ 004417 RLA __ONCE_RUN__ 004417 RLA
__ONCE_SIZE__ 00008C REA __STACKSIZE__ 000800 REA
__STARTUP__ 000001 REA __directerrno 00409F RLA
__dos_type 0043B4 RLA __errno 004418 RLA
__mappederrno 0040A9 RLA __oserror 004417 RLA
__osmaperrno 00415D RLA __seterrno 0040B9 RLA
_main 00403E RLA _puts 0041B7 RLA
_stdout 004384 RLA _strlen 00425C RLA
_write 004272 RLA addeq0sp 0040C2 RLA
addysp 0040D4 RLA callmain 0040E1 RLA
callmli 0043D5 RLA decsp2 004116 RLA
donelib 0040F8 RLA fdtab 0043B5 RLA
getfd 004123 RLA incsp2 004141 RLA
incsp4 00414F RLA initdostype 00448D LAI
initlib 004417 RLA ldaxysp 004156 RLA
mliparam 00441A RLA popax 004139 RLA
popptr1 004173 RLA ptr1 000088 RLZ
ptr2 00008A RLZ pusha0 004183 RLA
pushax 004185 RLA pushwysp 00419D RLA
rwcommon 00422C RLA rwepilog 00424F RLA
rwprolog 00421F RLA sp 000080 RLZ
zerobss 0042E2 RLA
Exports list by value:
----------------------
__DESTRUCTOR_COUNT__ 000000 REA __CONSTRUCTOR_COUNT__ 000001 REA
__EXEHDR__ 000001 REA __STARTUP__ 000001 REA
__FILETYPE__ 000006 REA __BSS_SIZE__ 000015 REA
sp 000080 RLZ ptr1 000088 RLZ
ptr2 00008A RLZ __ONCE_SIZE__ 00008C REA
__STACKSIZE__ 000800 REA __LCSIZE__ 000C00 REA
__MAIN_START__ 004000 RLA COUT 004034 RLA
_main 00403E RLA __directerrno 00409F RLA
__mappederrno 0040A9 RLA __seterrno 0040B9 RLA
addeq0sp 0040C2 RLA addysp 0040D4 RLA
callmain 0040E1 RLA donelib 0040F8 RLA
decsp2 004116 RLA getfd 004123 RLA
popax 004139 RLA incsp2 004141 RLA
incsp4 00414F RLA ldaxysp 004156 RLA
__osmaperrno 00415D RLA popptr1 004173 RLA
pusha0 004183 RLA pushax 004185 RLA
pushwysp 00419D RLA _puts 0041B7 RLA
rwprolog 00421F RLA rwcommon 00422C RLA
rwepilog 00424F RLA _strlen 00425C RLA
_write 004272 RLA zerobss 0042E2 RLA
__DESTRUCTOR_TABLE__ 00436A RLA _stdout 004384 RLA
__dos_type 0043B4 RLA fdtab 0043B5 RLA
callmli 0043D5 RLA __BSS_RUN__ 004417 RLA
__ONCE_LOAD__ 004417 RLA __ONCE_RUN__ 004417 RLA
__oserror 004417 RLA initlib 004417 RLA
__errno 004418 RLA mliparam 00441A RLA
initdostype 00448D LAI __CONSTRUCTOR_TABLE__ 0044A1 RLA
__MAIN_LAST__ 0044A3 RLA __HIMEM__ 009600 REA
__LCADDR__ 00D400 REA __LC_LAST__ 00D400 RLA
__LC_START__ 00D400 RLA
Imports list:
-------------
COUT (cout.o):
write.o apple2/write.s:9
__BSS_RUN__ ([linker generated]):
zerobss.o common/zerobss.s:8
__BSS_SIZE__ ([linker generated]):
zerobss.o common/zerobss.s:8
__CONSTRUCTOR_COUNT__ ([linker generated]):
condes.o runtime/condes.s:18
__CONSTRUCTOR_TABLE__ ([linker generated]):
condes.o runtime/condes.s:18
__DESTRUCTOR_COUNT__ ([linker generated]):
condes.o runtime/condes.s:19
__DESTRUCTOR_TABLE__ ([linker generated]):
condes.o runtime/condes.s:19
__EXEHDR__ (exehdr.o):
[linker generated] /share/cc65/cfg/apple2.cfg:7
__FILETYPE__ ([linker generated]):
exehdr.o apple2/exehdr.s:9
__HIMEM__ ([linker generated]):
[linker generated] /share/cc65/cfg/apple2.cfg:18
[linker generated] /share/cc65/cfg/apple2.cfg:17
__LCADDR__ ([linker generated]):
[linker generated] /share/cc65/cfg/apple2.cfg:19
__LCSIZE__ ([linker generated]):
[linker generated] /share/cc65/cfg/apple2.cfg:19
__LC_LAST__ ([linker generated]):
crt0.o apple2/crt0.s:13
__LC_START__ ([linker generated]):
crt0.o apple2/crt0.s:13
__MAIN_LAST__ ([linker generated]):
exehdr.o apple2/exehdr.s:10
__MAIN_START__ ([linker generated]):
exehdr.o apple2/exehdr.s:10
__ONCE_LOAD__ ([linker generated]):
crt0.o apple2/crt0.s:12
__ONCE_RUN__ ([linker generated]):
[linker generated] /share/cc65/cfg/apple2.cfg:18
[linker generated] /share/cc65/cfg/apple2.cfg:18
__ONCE_SIZE__ ([linker generated]):
crt0.o apple2/crt0.s:12
__STACKSIZE__ ([linker generated]):
[linker generated] /share/cc65/cfg/apple2.cfg:18
__STARTUP__ (crt0.o):
uploadfont.o uploadfont.s:13
__directerrno (_directerrno.o):
write.o /home/grizzly/cc65/asminc/errno.inc:10
__dos_type (dosdetect.o):
mli.o apple2/mli.s:7
__errno (errno.o):
_seterrno.o /home/grizzly/cc65/asminc/errno.inc:7
__mappederrno (_mappederrno.o):
rwcommon.o /home/grizzly/cc65/asminc/errno.inc:10
write.o /home/grizzly/cc65/asminc/errno.inc:10
__oserror (_oserror.o):
rwcommon.o /home/grizzly/cc65/asminc/errno.inc:7
_mappederrno.o /home/grizzly/cc65/asminc/errno.inc:7
_directerrno.o /home/grizzly/cc65/asminc/errno.inc:7
__osmaperrno (oserror.o):
_mappederrno.o /home/grizzly/cc65/asminc/errno.inc:8
__seterrno (_seterrno.o):
_mappederrno.o /home/grizzly/cc65/asminc/errno.inc:9
_directerrno.o /home/grizzly/cc65/asminc/errno.inc:9
_main (uploadfont.o):
callmain.o runtime/callmain.s:11
_puts (puts.o):
uploadfont.o uploadfont.s:14
_stdout (_file.o):
puts.o ../libwrk/apple2/puts.s:13
_strlen (strlen.o):
puts.o ../libwrk/apple2/puts.s:15
_write (write.o):
puts.o ../libwrk/apple2/puts.s:16
addeq0sp (addeqsp.o):
uploadfont.o uploadfont.s:85
addysp (addysp.o):
incsp4.o runtime/incsp4.s:8
callmain (callmain.o):
crt0.o apple2/crt0.s:11
callmli (mli.o):
rwcommon.o apple2/mli.inc:131
write.o apple2/mli.inc:131
decsp2 (decsp2.o):
uploadfont.o uploadfont.s:85
donelib (condes.o):
crt0.o apple2/crt0.s:10
fdtab (filedes.o):
write.o apple2/filedes.inc:13
getfd (filedes.o):
rwcommon.o apple2/filedes.inc:14
incsp2 (incsp2.o):
popptr1.o runtime/popptr1.s:8
puts.o ../libwrk/apple2/puts.s:79
incsp4 (incsp4.o):
uploadfont.o uploadfont.s:85
initlib (condes.o):
crt0.o apple2/crt0.s:10
ldaxysp (ldaxsp.o):
puts.o ../libwrk/apple2/puts.s:79
mliparam (mli.o):
rwcommon.o apple2/mli.inc:130
write.o apple2/mli.inc:130
popax (incsp2.o):
rwcommon.o apple2/rwcommon.s:6
popptr1 (popptr1.o):
rwcommon.o apple2/rwcommon.s:6
ptr1 (zeropage.o):
popptr1.o runtime/popptr1.s:9
rwcommon.o /home/grizzly/cc65/asminc/zeropage.inc:12
zerobss.o common/zerobss.s:9
write.o /home/grizzly/cc65/asminc/zeropage.inc:12
puts.o ../libwrk/apple2/puts.s:11
uploadfont.o uploadfont.s:11
ptr2 (zeropage.o):
rwcommon.o /home/grizzly/cc65/asminc/zeropage.inc:12
write.o /home/grizzly/cc65/asminc/zeropage.inc:12
strlen.o common/strlen.s:12
pusha0 (pushax.o):
puts.o ../libwrk/apple2/puts.s:79
pushax (pushax.o):
callmain.o runtime/callmain.s:11
puts.o ../libwrk/apple2/puts.s:79
uploadfont.o uploadfont.s:85
pushwysp (pushwsp.o):
puts.o ../libwrk/apple2/puts.s:79
rwcommon (rwcommon.o):
write.o apple2/write.s:8
rwepilog (rwcommon.o):
write.o apple2/write.s:8
rwprolog (rwcommon.o):
write.o apple2/write.s:8
sp (zeropage.o):
popptr1.o runtime/popptr1.s:9
pushwsp.o runtime/pushwsp.s:8
ldaxsp.o runtime/ldaxsp.s:8
incsp2.o runtime/incsp2.s:8
addysp.o runtime/addysp.s:8
pushax.o runtime/pushax.s:8
decsp2.o runtime/decsp2.s:8
crt0.o /home/grizzly/cc65/asminc/zeropage.inc:11
addeqsp.o runtime/addeqsp.s:8
uploadfont.o uploadfont.s:10
zerobss (zerobss.o):
crt0.o apple2/crt0.s:11

90
v2-analog-rev1/CMakeLists.txt
View File

@ -1,90 +0,0 @@
cmake_minimum_required(VERSION 3.16)
if(${CMAKE_CURRENT_BINARY_DIR} MATCHES "build-lc")
set(PICO_BOARD pico)
else()
set(PICO_BOARD pico_w)
endif()
set(PICO_TARGET_LINKER_SCRIPT memmap_ota.ld)
# Pull in SDK (must be before project)
include(cmake/pico_sdk_import.cmake)
project(v2-analog)
set(CMAKE_C_STANDARD 11)
pico_sdk_init()
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DPICO_USE_MALLOC_MUTEX=1")
add_executable(v2-analog-${PICO_BOARD})
pico_generate_pio_header(v2-analog-${PICO_BOARD}
${CMAKE_CURRENT_SOURCE_DIR}/vga/vga.pio)
pico_generate_pio_header(v2-analog-${PICO_BOARD}
${CMAKE_CURRENT_SOURCE_DIR}/common/abus.pio)
target_sources(v2-analog-${PICO_BOARD} PUBLIC
common/ota.o
common/buffers.c
common/flash.c
common/abus.c
common/config.c
common/main.c
common/usb_descriptors.c
diag/businterface.c
diag/diag.c
fs/businterface.c
fs/fs.c
vga/vgamain.c
vga/businterface.c
vga/vgabuf.c
vga/render.c
vga/render_hires.c
vga/render_lores.c
vga/render_text.c
vga/render_80col.c
vga/render_dhgr.c
vga/render_dgr.c
vga/render_shr.c
vga/render_test.c
vga/terminal_rom.c
vga/character_rom.c
vga/vgaout.c
z80/z80main.c
z80/businterface.c
z80/z80buf.c
serial/businterface.c
serial/serialbuffer.c
serial/serial.c
parallel/businterface.c
parallel/parallelbuffer.c
parallel/parallel.c
)
add_subdirectory(lib/littlefs)
target_include_directories(v2-analog-${PICO_BOARD} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
target_link_libraries(v2-analog-${PICO_BOARD} PUBLIC
pico_multicore
pico_stdlib
littlefs-lib
tinyusb_device
tinyusb_board
hardware_resets
hardware_irq
hardware_dma
hardware_pio
)
if(${PICO_BOARD} MATCHES "pico_w")
target_link_libraries(v2-analog-${PICO_BOARD} PUBLIC
pico_cyw43_arch_lwip_poll
)
endif(${PICO_BOARD} MATCHES "pico_w")
pico_enable_stdio_usb(v2-analog-${PICO_BOARD} 0)
pico_enable_stdio_uart(v2-analog-${PICO_BOARD} 0)
pico_add_extra_outputs(v2-analog-${PICO_BOARD})

50
v2-analog-rev1/README.md
View File

@ -1,50 +0,0 @@
# Set Up Raspberry Pi Pico SDK and build the firmware
## Windows Subsystem for Linux (WSL)
Windows Subsystem for Linux (WSL) allows you to install a complete Ubuntu terminal environment in minutes on your Windows machine, allowing you to develop cross-platform applications without leaving Windows. [Install Ubuntu on WSL for Windows](https://ubuntu.com/tutorials/install-ubuntu-on-wsl2-on-windows-10#1-overview)
## Prepare environment
```shell
sudo apt update
sudo apt install -y build-essential
```
## Install additional tools
GIT, Cmake
```shell
sudo apt install git cmake
```
[GNU Arm Embedded Toolchain](https://lindevs.com/install-gnu-arm-embedded-toolchain-on-ubuntu)
## Install SDK
```shell
sudo git clone https://github.com/raspberrypi/pico-sdk.git ~/pico-sdk
```
## Initialize submodules
```shell
sudo git -C ~/pico-sdk submodule update --init
```
## Set the PICO_SDK_PATH environment variable
```shell
export PICO_SDK_PATH=~/pico-sdk
```
## Build the firmware
```shell
cd ~/v2-analog-fw
mkdir build
cd build
cmake -DCMAKE_BUILD_TYPE=Release ..
make
$ ls *uf2
...
v2-analog-pico_w-vga.uf2
v2-analog-pico_w-z80.uf2
```
## Upload the firmware
Hold down the BOOTSEL button and connect the Raspberry Pi Pico to your PC via micro USB cable. Once Pico is connected release the BOOTSEL button. Pi Pico should be connected to PC with USB mass storage device mode.
A disk volume called RPI-RP2 will appear on your computer. Drag and drop the appropriate .uf2 file to that volume. RPI-RP2 will unmount and Pico will start the program.

62
v2-analog-rev1/cmake/pico_sdk_import.cmake
View File

@ -1,62 +0,0 @@
# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
# This can be dropped into an external project to help locate this SDK
# It should be include()ed prior to project()
if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
endif ()
set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
if (NOT PICO_SDK_PATH)
if (PICO_SDK_FETCH_FROM_GIT)
include(FetchContent)
set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
if (PICO_SDK_FETCH_FROM_GIT_PATH)
get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
endif ()
FetchContent_Declare(
pico_sdk
GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
GIT_TAG master
)
if (NOT pico_sdk)
message("Downloading Raspberry Pi Pico SDK")
FetchContent_Populate(pico_sdk)
set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
endif ()
set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
else ()
message(FATAL_ERROR
"SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
)
endif ()
endif ()
get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
if (NOT EXISTS ${PICO_SDK_PATH})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
endif ()
set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
endif ()
set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
include(${PICO_SDK_INIT_CMAKE_FILE})

88
v2-analog-rev1/common/abus.c
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#include <string.h>
#include <hardware/pio.h>
#include "common/config.h"
#include "common/abus.h"
#include "abus.pio.h"
#if CONFIG_PIN_APPLEBUS_PHI0 != PHI0_GPIO
#error CONFIG_PIN_APPLEBUS_PHI0 and PHI0_GPIO must be set to the same pin
#endif
#define CARD_SELECT ((value & (1u << CONFIG_PIN_APPLEBUS_DEVSEL-CONFIG_PIN_APPLEBUS_DATA_BASE)) == 0)
#define CARD_DEVSEL ((address & 0xcf80) == 0xc080)
#define CARD_IOSEL (((address & 0xcf00) >= 0xc100) && ((address & 0xcf00) < 0xc700))
#define CARD_IOSTROBE ((address & 0xc800) == 0xc800)
static void abus_device_read_setup(PIO pio, uint sm) {
uint program_offset = pio_add_program(pio, &abus_device_read_program);
pio_sm_claim(pio, sm);
pio_sm_config c = abus_device_read_program_get_default_config(program_offset);
// set the "device selected" pin as the jump pin
sm_config_set_jmp_pin(&c, CONFIG_PIN_APPLEBUS_DEVSEL);
// map the OUT pin group to the data signals
sm_config_set_out_pins(&c, CONFIG_PIN_APPLEBUS_DATA_BASE, 8);
// map the SET pin group to the Data transceiver control signals
sm_config_set_set_pins(&c, CONFIG_PIN_APPLEBUS_CONTROL_BASE, 2);
pio_sm_init(pio, sm, program_offset, &c);
// All the GPIOs are shared and setup by the main program
}
static void abus_main_setup(PIO pio, uint sm) {
uint program_offset = pio_add_program(pio, &abus_program);
pio_sm_claim(pio, sm);
pio_sm_config c = abus_program_get_default_config(program_offset);
// set the bus R/W pin as the jump pin
sm_config_set_jmp_pin(&c, CONFIG_PIN_APPLEBUS_RW);
// map the IN pin group to the data signals
sm_config_set_in_pins(&c, CONFIG_PIN_APPLEBUS_DATA_BASE);
// map the SET pin group to the bus transceiver enable signals
sm_config_set_set_pins(&c, CONFIG_PIN_APPLEBUS_CONTROL_BASE+1, 3);
// configure left shift into ISR & autopush every 26 bits
sm_config_set_in_shift(&c, false, true, 26);
pio_sm_init(pio, sm, program_offset, &c);
// configure the GPIOs
// Ensure all transceivers will start disabled, with Data transceiver direction set to 'in'
pio_sm_set_pins_with_mask(pio, sm,
(uint32_t)0xe << CONFIG_PIN_APPLEBUS_CONTROL_BASE,
(uint32_t)0xf << CONFIG_PIN_APPLEBUS_CONTROL_BASE);
pio_sm_set_pindirs_with_mask(pio, sm,
(0xf << CONFIG_PIN_APPLEBUS_CONTROL_BASE),
(1 << CONFIG_PIN_APPLEBUS_PHI0) | (0xf << CONFIG_PIN_APPLEBUS_CONTROL_BASE) | (0x3ff << CONFIG_PIN_APPLEBUS_DATA_BASE));
// Disable input synchronization on input pins that are sampled at known stable times
// to shave off two clock cycles of input latency
pio->input_sync_bypass |= (0x3ff << CONFIG_PIN_APPLEBUS_DATA_BASE);
pio_gpio_init(pio, CONFIG_PIN_APPLEBUS_PHI0);
gpio_set_pulls(CONFIG_PIN_APPLEBUS_PHI0, false, false);
for(int pin=CONFIG_PIN_APPLEBUS_CONTROL_BASE; pin < CONFIG_PIN_APPLEBUS_CONTROL_BASE+4; pin++) {
pio_gpio_init(pio, pin);
}
for(int pin=CONFIG_PIN_APPLEBUS_DATA_BASE; pin < CONFIG_PIN_APPLEBUS_DATA_BASE+10; pin++) {
pio_gpio_init(pio, pin);
gpio_set_pulls(pin, false, false);
}
}
void abus_init() {
abus_device_read_setup(CONFIG_ABUS_PIO, ABUS_DEVICE_READ_SM);
abus_main_setup(CONFIG_ABUS_PIO, ABUS_MAIN_SM);
pio_enable_sm_mask_in_sync(CONFIG_ABUS_PIO, (1 << ABUS_MAIN_SM) | (1 << ABUS_DEVICE_READ_SM));
}

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v2-analog-rev1/common/abus.h
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#pragma once
void abus_init();

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v2-analog-rev1/common/abus.pio
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.define public PHI0_GPIO 26
.define READ_DATA_TRIGGER_IRQ 4
.define DATA_BUSY_IRQ 5
; Apple II bus interface
; Ref: Understanding the Apple II, pages 4-7, 7-8
.program abus
; Prerequisites:
; * Bus clock used is PHI0, wired to GPIO 26
; * JMP pin is mapped to the R/W signal
; * IN pins are mapped to ~DEVSEL, R/W, and Data[7:0]
; * SET pins are mapped to the transceiver enable signals
; * input shift left & autopush @ 26 bits
; * run at about 125MHz (8ns/instruction)
;
; SET bits for tranceiver control:
; 0bxxx
; x - select AddrHi, active low
; x - select AddrLo, active low
; x - select Data, active low
.wrap_target
next_bus_cycle:
set PINS, 0b011 ; enable AddrHi tranceiver
wait 1 GPIO, PHI0_GPIO ; wait for PHI0 to rise. Data propagation through the transceiver should
; be complete by the time this happens.
in PINS, 8 ; read AddrHi[7:0]
set PINS, 0b101 [2] ; enable AddrLo tranceiver and delay for transceiver propagation delay
in PINS, 8 ; read AddrLo[7:0]
jmp PIN, read_cycle ; jump based on the state of the R/W pin
write_cycle:
; the current time is P0+88ns (P0 + 16ns + 2 clocks (input synchronizers) + 7 instructions)
set PINS, 0b110 [15] ; enable Data tranceiver & wait until both ~DEVSEL and the written data are valid (P0+200ns)
in PINS, 10 ; read R/W, ~DEVSEL, and Data[7:0], then autopush
wait 0 GPIO, PHI0_GPIO [7] ; wait for PHI0 to fall
jmp next_bus_cycle
read_cycle:
; the current time is P0+88ns (P0 + 16ns + 2 clocks (input synchronizers) + 7 instructions)
set PINS, 0b110 ; ensure AddrLo transceiver is disabled and delay for ~DEVSEL to become valid (P0+63ns+buffer delay)
in PINS, 10 ; read R/W, ~DEVSEL, and dontcare[7:0], then autopush
irq set READ_DATA_TRIGGER_IRQ ; trigger the data read state machine to put data on the data bus
wait 0 GPIO, PHI0_GPIO [7] ; wait for PHI0 to fall
wait 0 irq DATA_BUSY_IRQ ; wait for the data handling state machine to complete to avoid contention w/transceiver control
.wrap
.program abus_device_read
; Prerequisites:
; * Bus clock used is PHI0, wired to GPIO 26
; * JMP pin is the ~DEVSEL signal
; * OUT pins are the 8 data signals
; * SET pins are the Data transceiver control signals
;
; SET bits for tranceiver control:
; 0bxx
; x - select Data transceiver (active low)
; x - Data transceiver direction (0=input, 1=output)
.wrap_target
wait_loop:
wait 1 irq READ_DATA_TRIGGER_IRQ ; wait for the data portion of a read cycle (from the main SM)
jmp PIN, wait_loop ; skip if this device is not being addressed
; the current time is P0+136ns (P0 + 16ns + 2 clocks (input synchronizers) + 13 instructions) and
; this read cycle is addressed to this device.
;
; Phase 0 is typically 489 ns long.
; * Data from peripherals should be valid on the data bus by 45 nanoseconds before the end of phase 0
; * Data should be held for 40ns after phase 0 ends
; * Data bus should be tri-stated within 60ns after phase 0 ends
irq set DATA_BUSY_IRQ
pull noblock ; extra early pull to clear out any standing values from the FIFO
set PINS, 0b01 ; enable Data tranceiver with output direction
mov OSR, ~NULL [3]
out PINDIRS, 8 [31] ; set data pins as outputs
pull noblock ; pull value from the FIFO as late as possible
out PINS, 8
; the current time is P0+440ns (P0 + 16ns + 2 clocks (input synchronizers) + 51 instructions)
wait 0 GPIO, PHI0_GPIO [2] ; wait for PHI0 to fall then hold for 40ns (2 clocks (input synchronizers) + 2-3 instructions)
set PINS, 0b10 ; disable Data tranceiver to tri-state the data bus
mov OSR, NULL
out PINDIRS, 8 ; reset data pins as inputs
irq clear DATA_BUSY_IRQ
.wrap

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v2-analog-rev1/common/buffers.c
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#include "buffers.h"
volatile uint32_t soft_switches = 0;
volatile uint32_t internal_flags = 0;
volatile uint8_t reset_state = 0;
volatile uint8_t cardslot = 0;
volatile uint32_t busactive = 0;
volatile uint8_t apple_memory[64*1024];
volatile uint8_t private_memory[64*1024];
volatile uint8_t *text_p1 = apple_memory + 0x0400;
volatile uint8_t *text_p2 = apple_memory + 0x0800;
volatile uint8_t *text_p3 = private_memory + 0x0400;
volatile uint8_t *text_p4 = private_memory + 0x0800;
volatile uint8_t *hgr_p1 = apple_memory + 0x2000;
volatile uint8_t *hgr_p2 = apple_memory + 0x4000;
volatile uint8_t *hgr_p3 = private_memory + 0x2000;
volatile uint8_t *hgr_p4 = private_memory + 0x4000;
volatile uint8_t *baseio = apple_memory + 0xc000;
volatile uint8_t *slotio = apple_memory + 0xc080;
volatile uint8_t *slotrom = apple_memory + 0xc100;
volatile uint8_t *extdrom = apple_memory + 0xc800;
/* Slot 1: Grapper */
volatile uint8_t *slot1io = apple_memory + 0xc090;
volatile uint8_t *slot1rom = apple_memory + 0xc100;
/* Slot 2: Super Serial Card */
volatile uint8_t *slot2io = apple_memory + 0xc0a0;
volatile uint8_t *slot2rom = apple_memory + 0xc200;
/* Slot 3: 80 Column Card */
volatile uint8_t *slot3io = apple_memory + 0xc0b0;
volatile uint8_t *slot3rom = apple_memory + 0xc300;
/* Slot 4: PCPI Applicard */
volatile uint8_t *slot4io = apple_memory + 0xc0c0;
volatile uint8_t *slot4rom = apple_memory + 0xc400;
/* Slot 5: Uthernet */
volatile uint8_t *slot5io = apple_memory + 0xc0d0;
volatile uint8_t *slot5rom = apple_memory + 0xc500;
/* Slot 6: Disk II */
volatile uint8_t *slot6io = apple_memory + 0xc0e0;
volatile uint8_t *slot6rom = apple_memory + 0xc600;
/* Slot 7: ProDOS ROM Disk */
volatile uint8_t *slot7io = apple_memory + 0xc0f0;
volatile uint8_t *slot7rom = apple_memory + 0xc700;

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v2-analog-rev1/common/buffers.h
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#pragma once
#include <stdint.h>
extern volatile uint8_t reset_state;
extern volatile uint8_t cardslot;
extern volatile uint32_t busactive;
extern volatile uint8_t apple_memory[64*1024];
extern volatile uint8_t private_memory[64*1024];
#define config_cmdbuf ((uint8_t*)(apple_memory+0xC0F0+(cardslot<<8)))
#define config_errbuf ((uint8_t*)(apple_memory+0xC0F8+(cardslot<<8)))
extern volatile uint8_t *text_p1;
extern volatile uint8_t *text_p2;
extern volatile uint8_t *text_p3;
extern volatile uint8_t *text_p4;
extern volatile uint8_t *hgr_p1;
extern volatile uint8_t *hgr_p2;
extern volatile uint8_t *hgr_p3;
extern volatile uint8_t *hgr_p4;
extern volatile uint8_t *baseio;
extern volatile uint8_t *slotio;
extern volatile uint8_t *slotrom;
extern volatile uint8_t *extdrom;
/* Slot 1: Grapper */
extern volatile uint8_t *slot1io;
extern volatile uint8_t *slot1rom;
/* Slot 2: Super Serial Card */
extern volatile uint8_t *slot2io;
extern volatile uint8_t *slot2rom;
/* Slot 3: 80 Column Card */
extern volatile uint8_t *slot3io;
extern volatile uint8_t *slot3rom;
/* Slot 4: PCPI Applicard */
extern volatile uint8_t *slot4io;
extern volatile uint8_t *slot4rom;
/* Slot 5: Uthernet */
extern volatile uint8_t *slot5io;
extern volatile uint8_t *slot5rom;
/* Slot 6: Disk II */
extern volatile uint8_t *slot6io;
extern volatile uint8_t *slot6rom;
/* Slot 7: ProDOS ROM Disk */
extern volatile uint8_t *slot7io;
extern volatile uint8_t *slot7rom;
/* Videx VideoTerm */
extern volatile uint8_t *videx_page;
extern volatile uint32_t soft_switches;
extern volatile uint32_t internal_flags;
#define SOFTSW_TEXT_MODE 0x00000001
#define SOFTSW_MIX_MODE 0x00000002
#define SOFTSW_HIRES_MODE 0x00000004
#define SOFTSW_MODE_MASK 0x00000007
#define SOFTSW_PAGE_2 0x00000008
// Apple IIe/c/gs softswitches
#define SOFTSW_80STORE 0x00000100
#define SOFTSW_AUX_READ 0x00000200
#define SOFTSW_AUX_WRITE 0x00000400
#define SOFTSW_AUXZP 0x00000800
#define SOFTSW_SLOT3ROM 0x00001000
#define SOFTSW_80COL 0x00002000
#define SOFTSW_ALTCHAR 0x00004000
#define SOFTSW_DGR 0x00008000
#define SOFTSW_NEWVID_MASK 0xE0
#define SOFTSW_NEWVID_SHIFT 11
#define SOFTSW_MONOCHROME 0x00010000
#define SOFTSW_LINEARIZE 0x00020000
#define SOFTSW_SHR 0x00040000
#define SOFTSW_IOUDIS 0x00080000
#define SOFTSW_SHADOW_MASK 0x7F
#define SOFTSW_SHADOW_SHIFT 20
#define SOFTSW_SHADOW_TEXT 0x00100000
#define SOFTSW_SHADOW_HGR1 0x00200000
#define SOFTSW_SHADOW_HGR2 0x00400000
#define SOFTSW_SHADOW_SHR 0x00800000
#define SOFTSW_SHADOW_AUXHGR 0x01000000
#define SOFTSW_SHADOW_ALTDISP 0x02000000
#define SOFTSW_SHADOW_IO 0x04000000
// V2 Analog specific softswitches
#define SOFTSW_TERMINAL 0x10000000
#define IFLAGS_TEST 0x20000000
#define IFLAGS_IIE_REGS 0x40000000
#define IFLAGS_IIGS_REGS 0x80000000

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