Initial commit
This commit is contained in:
Renee Harke
commit
87715d5451
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|
@ -0,0 +1,798 @@
|
|||
(kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)")
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 70)
|
||||
(tracks 152)
|
||||
(zones 0)
|
||||
(modules 2)
|
||||
(nets 51)
|
||||
)
|
||||
|
||||
(page A4)
|
||||
(title_block
|
||||
(title "Apple II Breadboard Card")
|
||||
(date 2021-02-08)
|
||||
(rev 1.1)
|
||||
(company "Renee Harke")
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||||
(comment 1 "MIT license; see LICENSE file")
|
||||
)
|
||||
|
||||
(layers
|
||||
(0 F.Cu signal)
|
||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
|
||||
(35 F.Paste user)
|
||||
(36 B.SilkS user)
|
||||
(37 F.SilkS user)
|
||||
(38 B.Mask user)
|
||||
(39 F.Mask user)
|
||||
(40 Dwgs.User user)
|
||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
|
||||
(43 Eco2.User user)
|
||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
|
||||
(46 B.CrtYd user)
|
||||
(47 F.CrtYd user)
|
||||
(48 B.Fab user)
|
||||
(49 F.Fab user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.25)
|
||||
(user_trace_width 0.4)
|
||||
(user_trace_width 1)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.05)
|
||||
(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
(mod_edge_width 0.12)
|
||||
(mod_text_size 1 1)
|
||||
(mod_text_width 0.15)
|
||||
(pad_size 1.524 1.524)
|
||||
(pad_drill 0.762)
|
||||
(pad_to_mask_clearance 0.051)
|
||||
(solder_mask_min_width 0.25)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements FFFFFF7F)
|
||||
(pcbplotparams
|
||||
(layerselection 0x3ffff_ffffffff)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes false)
|
||||
(usegerberadvancedattributes false)
|
||||
(creategerberjobfile false)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.100000)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "gerber"))
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
(net 1 /+12V)
|
||||
(net 2 /D0)
|
||||
(net 3 /D1)
|
||||
(net 4 /D2)
|
||||
(net 5 /D3)
|
||||
(net 6 /D4)
|
||||
(net 7 /D5)
|
||||
(net 8 /D6)
|
||||
(net 9 /D7)
|
||||
(net 10 /~DEVSEL)
|
||||
(net 11 /PHI0)
|
||||
(net 12 /USER1)
|
||||
(net 13 /PHI1)
|
||||
(net 14 /Q3)
|
||||
(net 15 /7M)
|
||||
(net 16 /COLORREF)
|
||||
(net 17 /-5V)
|
||||
(net 18 /-12V)
|
||||
(net 19 /~INH)
|
||||
(net 20 /~RES)
|
||||
(net 21 /~IRQ)
|
||||
(net 22 /~NMI)
|
||||
(net 23 /INTIN)
|
||||
(net 24 /DMAIN)
|
||||
(net 25 /GND)
|
||||
(net 26 /~IOSEL)
|
||||
(net 27 /A0)
|
||||
(net 28 /A1)
|
||||
(net 29 /A2)
|
||||
(net 30 /A3)
|
||||
(net 31 /A4)
|
||||
(net 32 /A5)
|
||||
(net 33 /A6)
|
||||
(net 34 /A7)
|
||||
(net 35 /A8)
|
||||
(net 36 /A9)
|
||||
(net 37 /A10)
|
||||
(net 38 /A11)
|
||||
(net 39 /A12)
|
||||
(net 40 /A13)
|
||||
(net 41 /A14)
|
||||
(net 42 /A15)
|
||||
(net 43 /R~W)
|
||||
(net 44 /SYNC)
|
||||
(net 45 /~IOSTRB)
|
||||
(net 46 /RDY)
|
||||
(net 47 /~DMA)
|
||||
(net 48 /INTOUT)
|
||||
(net 49 /DMAOUT)
|
||||
(net 50 /+5V)
|
||||
|
||||
(net_class Default "This is the default net class."
|
||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(add_net /+12V)
|
||||
(add_net /+5V)
|
||||
(add_net /-12V)
|
||||
(add_net /-5V)
|
||||
(add_net /7M)
|
||||
(add_net /A0)
|
||||
(add_net /A1)
|
||||
(add_net /A10)
|
||||
(add_net /A11)
|
||||
(add_net /A12)
|
||||
(add_net /A13)
|
||||
(add_net /A14)
|
||||
(add_net /A15)
|
||||
(add_net /A2)
|
||||
(add_net /A3)
|
||||
(add_net /A4)
|
||||
(add_net /A5)
|
||||
(add_net /A6)
|
||||
(add_net /A7)
|
||||
(add_net /A8)
|
||||
(add_net /A9)
|
||||
(add_net /COLORREF)
|
||||
(add_net /D0)
|
||||
(add_net /D1)
|
||||
(add_net /D2)
|
||||
(add_net /D3)
|
||||
(add_net /D4)
|
||||
(add_net /D5)
|
||||
(add_net /D6)
|
||||
(add_net /D7)
|
||||
(add_net /DMAIN)
|
||||
(add_net /DMAOUT)
|
||||
(add_net /GND)
|
||||
(add_net /INTIN)
|
||||
(add_net /INTOUT)
|
||||
(add_net /PHI0)
|
||||
(add_net /PHI1)
|
||||
(add_net /Q3)
|
||||
(add_net /RDY)
|
||||
(add_net /R~W)
|
||||
(add_net /SYNC)
|
||||
(add_net /USER1)
|
||||
(add_net /~DEVSEL)
|
||||
(add_net /~DMA)
|
||||
(add_net /~INH)
|
||||
(add_net /~IOSEL)
|
||||
(add_net /~IOSTRB)
|
||||
(add_net /~IRQ)
|
||||
(add_net /~NMI)
|
||||
(add_net /~RES)
|
||||
)
|
||||
|
||||
(module pub:PinSocket_2x25_P2.54mm_Vertical_CCW_Mirrored_NoSilk (layer F.Cu) (tedit 6021F101) (tstamp 5E33EBBE)
|
||||
(at 170.18 116.84 90)
|
||||
(descr "Through hole straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated")
|
||||
(tags "Through hole socket strip THT 2x25 2.54mm double row")
|
||||
(path /5E39109E)
|
||||
(fp_text reference J2 (at -1.27 -2.77 90) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "HEADER BLOCK" (at -1.27 63.73 90) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user %R (at -1.27 30.48) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 1.8 62.7) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.3 62.7) (end 1.8 62.7) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.3 -1.8) (end -4.3 62.7) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.8 -1.8) (end -4.3 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.27 62.23) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.81 62.23) (end 1.27 62.23) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.81 -1.27) (end -3.81 62.23) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1.27 -1.27) (end -3.81 -1.27) (layer F.Fab) (width 0.1))
|
||||
(pad 26 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 25 /GND))
|
||||
(pad 25 thru_hole oval (at -2.54 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 50 /+5V))
|
||||
(pad 27 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 24 /DMAIN))
|
||||
(pad 24 thru_hole oval (at -2.54 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 49 /DMAOUT))
|
||||
(pad 28 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 23 /INTIN))
|
||||
(pad 23 thru_hole oval (at -2.54 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 48 /INTOUT))
|
||||
(pad 29 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 22 /~NMI))
|
||||
(pad 22 thru_hole oval (at -2.54 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 47 /~DMA))
|
||||
(pad 30 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 21 /~IRQ))
|
||||
(pad 21 thru_hole oval (at -2.54 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 46 /RDY))
|
||||
(pad 31 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 20 /~RES))
|
||||
(pad 20 thru_hole oval (at -2.54 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 45 /~IOSTRB))
|
||||
(pad 32 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 19 /~INH))
|
||||
(pad 19 thru_hole oval (at -2.54 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 44 /SYNC))
|
||||
(pad 33 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 18 /-12V))
|
||||
(pad 18 thru_hole oval (at -2.54 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 43 /R~W))
|
||||
(pad 34 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 17 /-5V))
|
||||
(pad 17 thru_hole oval (at -2.54 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 42 /A15))
|
||||
(pad 35 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 16 /COLORREF))
|
||||
(pad 16 thru_hole oval (at -2.54 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 41 /A14))
|
||||
(pad 36 thru_hole oval (at 0 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 15 /7M))
|
||||
(pad 15 thru_hole oval (at -2.54 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 40 /A13))
|
||||
(pad 37 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 14 /Q3))
|
||||
(pad 14 thru_hole oval (at -2.54 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 39 /A12))
|
||||
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|
||||
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|
||||
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|
||||
(net 38 /A11))
|
||||
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|
||||
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|
||||
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|
||||
(net 37 /A10))
|
||||
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|
||||
(net 11 /PHI0))
|
||||
(pad 11 thru_hole oval (at -2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 36 /A9))
|
||||
(pad 41 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 10 /~DEVSEL))
|
||||
(pad 10 thru_hole oval (at -2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 35 /A8))
|
||||
(pad 42 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 9 /D7))
|
||||
(pad 9 thru_hole oval (at -2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 34 /A7))
|
||||
(pad 43 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 8 /D6))
|
||||
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|
||||
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|
||||
(pad 44 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 7 /D5))
|
||||
(pad 7 thru_hole oval (at -2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 32 /A5))
|
||||
(pad 45 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(pad 3 thru_hole oval (at -2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
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|
||||
(pad 49 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
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|
||||
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|
||||
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|
||||
(pad 50 thru_hole oval (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 1 /+12V))
|
||||
(pad 1 thru_hole oval (at -2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 26 /~IOSEL))
|
||||
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x25_P2.54mm_Vertical.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module pub:AppleIIBus (layer F.Cu) (tedit 5E4F43C2) (tstamp 5E33EA12)
|
||||
(at 200.66 128.397)
|
||||
(path /5E339C7A)
|
||||
(fp_text reference J1 (at 0 -5.08) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "CARD EDGE" (at 25.4 -5.08) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer B.Mask) (width 0))
|
||||
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|
||||
(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer F.Mask) (width 0))
|
||||
(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer F.Mask) (width 0))
|
||||
(pad 26 smd rect (at 30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 25 /GND) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 27 smd rect (at 27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 24 /DMAIN) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 28 smd rect (at 25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 23 /INTIN) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 29 smd rect (at 22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 22 /~NMI) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 30 smd rect (at 20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 21 /~IRQ) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 31 smd rect (at 17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 20 /~RES) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 32 smd rect (at 15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 19 /~INH) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 33 smd rect (at 12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 18 /-12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 34 smd rect (at 10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 17 /-5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 35 smd rect (at 7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 16 /COLORREF) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 36 smd rect (at 5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 15 /7M) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 37 smd rect (at 2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 14 /Q3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 38 smd rect (at 0 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 13 /PHI1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 39 smd rect (at -2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 12 /USER1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 40 smd rect (at -5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 11 /PHI0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 41 smd rect (at -7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 10 /~DEVSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 42 smd rect (at -10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 9 /D7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 43 smd rect (at -12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 8 /D6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 44 smd rect (at -15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 7 /D5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 45 smd rect (at -17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 6 /D4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 46 smd rect (at -20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 5 /D3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 47 smd rect (at -22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 4 /D2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 48 smd rect (at -25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 3 /D1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 49 smd rect (at -27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 2 /D0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 50 smd rect (at -30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 1 /+12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 25 smd rect (at 30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 50 /+5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 24 smd rect (at 27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 49 /DMAOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 23 smd rect (at 25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 48 /INTOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 22 smd rect (at 22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 47 /~DMA) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 21 smd rect (at 20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 46 /RDY) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 20 smd rect (at 17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 45 /~IOSTRB) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 19 smd rect (at 15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 44 /SYNC) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 18 smd rect (at 12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 43 /R~W) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 17 smd rect (at 10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 42 /A15) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 16 smd rect (at 7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 41 /A14) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 15 smd rect (at 5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 40 /A13) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 14 smd rect (at 2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 39 /A12) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 13 smd rect (at 0 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 38 /A11) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 12 smd rect (at -2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 37 /A10) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 11 smd rect (at -5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 36 /A9) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 10 smd rect (at -7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 35 /A8) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 9 smd rect (at -10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 34 /A7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 8 smd rect (at -12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 33 /A6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 7 smd rect (at -15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 32 /A5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 6 smd rect (at -17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 31 /A4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 5 smd rect (at -20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 30 /A3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 4 smd rect (at -22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 29 /A2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 3 smd rect (at -25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 28 /A1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 2 smd rect (at -27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 27 /A0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 1 smd rect (at -30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 26 /~IOSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
)
|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
||||
(segment (start 228.6 128.397) (end 228.6 119.38) (width 0.4) (layer F.Cu) (net 49))
|
||||
(segment (start 231.14 128.397) (end 231.14 119.38) (width 1) (layer F.Cu) (net 50))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,240 @@
|
|||
update=Thursday, January 30, 2020 at 10:33:18 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.4
|
||||
TrackWidth3=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
|
@ -0,0 +1,438 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title "Apple II Breadboard Card"
|
||||
Date "2021-02-08"
|
||||
Rev "1.1"
|
||||
Comp "Renee Harke"
|
||||
Comment1 "MIT license; see LICENSE file"
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J1
|
||||
U 1 1 5E339C7A
|
||||
P 3350 3400
|
||||
F 0 "J1" H 3400 4817 50 0000 C CNN
|
||||
F 1 "CARD EDGE" H 3400 4726 50 0000 C CNN
|
||||
F 2 "pub:AppleIIBus" H 3350 3400 50 0001 C CNN
|
||||
F 3 "~" H 3350 3400 50 0001 C CNN
|
||||
1 3350 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 3100 2200 2 50 ~ 0
|
||||
~IOSEL
|
||||
Text Label 3100 2300 2 50 ~ 0
|
||||
A0
|
||||
Text Label 3100 2400 2 50 ~ 0
|
||||
A1
|
||||
Text Label 3100 2500 2 50 ~ 0
|
||||
A2
|
||||
Text Label 3100 2600 2 50 ~ 0
|
||||
A3
|
||||
Text Label 3100 2700 2 50 ~ 0
|
||||
A4
|
||||
Text Label 3100 2800 2 50 ~ 0
|
||||
A5
|
||||
Text Label 3100 2900 2 50 ~ 0
|
||||
A6
|
||||
Text Label 3100 3000 2 50 ~ 0
|
||||
A7
|
||||
Text Label 3100 3100 2 50 ~ 0
|
||||
A8
|
||||
Text Label 3100 3200 2 50 ~ 0
|
||||
A9
|
||||
Text Label 3100 3300 2 50 ~ 0
|
||||
A10
|
||||
Text Label 3100 3400 2 50 ~ 0
|
||||
A11
|
||||
Text Label 3100 3500 2 50 ~ 0
|
||||
A12
|
||||
Text Label 3100 3600 2 50 ~ 0
|
||||
A13
|
||||
Text Label 3100 3700 2 50 ~ 0
|
||||
A14
|
||||
Text Label 3100 3800 2 50 ~ 0
|
||||
A15
|
||||
Text Label 3100 3900 2 50 ~ 0
|
||||
R~W
|
||||
Text Label 3100 4000 2 50 ~ 0
|
||||
SYNC
|
||||
Text Label 3100 4100 2 50 ~ 0
|
||||
~IOSTRB
|
||||
Text Label 3100 4200 2 50 ~ 0
|
||||
RDY
|
||||
Text Label 3100 4300 2 50 ~ 0
|
||||
~DMA
|
||||
Text Label 3100 4400 2 50 ~ 0
|
||||
INTOUT
|
||||
Text Label 3100 4500 2 50 ~ 0
|
||||
DMAOUT
|
||||
Text Label 3100 4600 2 50 ~ 0
|
||||
+5V
|
||||
Text Label 3700 4600 0 50 ~ 0
|
||||
GND
|
||||
Text Label 3700 4500 0 50 ~ 0
|
||||
DMAIN
|
||||
Text Label 3700 4400 0 50 ~ 0
|
||||
INTIN
|
||||
Text Label 3700 4300 0 50 ~ 0
|
||||
~NMI
|
||||
Text Label 3700 4200 0 50 ~ 0
|
||||
~IRQ
|
||||
Text Label 3700 4100 0 50 ~ 0
|
||||
~RES
|
||||
Text Label 3700 4000 0 50 ~ 0
|
||||
~INH
|
||||
Text Label 3700 3900 0 50 ~ 0
|
||||
-12V
|
||||
Text Label 3700 3800 0 50 ~ 0
|
||||
-5V
|
||||
Text Label 3700 3600 0 50 ~ 0
|
||||
7M
|
||||
Text Label 3700 3500 0 50 ~ 0
|
||||
Q3
|
||||
Text Label 3700 3400 0 50 ~ 0
|
||||
PHI1
|
||||
Text Label 3700 3300 0 50 ~ 0
|
||||
USER1
|
||||
Text Label 3700 3200 0 50 ~ 0
|
||||
PHI0
|
||||
Text Label 3700 3100 0 50 ~ 0
|
||||
~DEVSEL
|
||||
Text Label 3700 2200 0 50 ~ 0
|
||||
+12V
|
||||
Text Label 3700 2300 0 50 ~ 0
|
||||
D0
|
||||
Text Label 3700 2400 0 50 ~ 0
|
||||
D1
|
||||
Text Label 3700 2500 0 50 ~ 0
|
||||
D2
|
||||
Text Label 3700 2600 0 50 ~ 0
|
||||
D3
|
||||
Text Label 3700 2700 0 50 ~ 0
|
||||
D4
|
||||
Text Label 3700 2800 0 50 ~ 0
|
||||
D5
|
||||
Text Label 3700 2900 0 50 ~ 0
|
||||
D6
|
||||
Text Label 3700 3000 0 50 ~ 0
|
||||
D7
|
||||
Wire Wire Line
|
||||
3650 2200 4150 2200
|
||||
Wire Wire Line
|
||||
3650 2300 4150 2300
|
||||
Wire Wire Line
|
||||
3650 2400 4150 2400
|
||||
Wire Wire Line
|
||||
3650 2500 4150 2500
|
||||
Wire Wire Line
|
||||
3650 2600 4150 2600
|
||||
Wire Wire Line
|
||||
3650 2700 4150 2700
|
||||
Wire Wire Line
|
||||
3650 2800 4150 2800
|
||||
Wire Wire Line
|
||||
3650 2900 4150 2900
|
||||
Wire Wire Line
|
||||
3650 3000 4150 3000
|
||||
Wire Wire Line
|
||||
3650 3100 4150 3100
|
||||
Wire Wire Line
|
||||
3650 3200 4150 3200
|
||||
Wire Wire Line
|
||||
3650 3300 4150 3300
|
||||
Wire Wire Line
|
||||
3650 3400 4150 3400
|
||||
Wire Wire Line
|
||||
3650 3500 4150 3500
|
||||
Wire Wire Line
|
||||
3650 3600 4150 3600
|
||||
Wire Wire Line
|
||||
3650 3700 4150 3700
|
||||
Wire Wire Line
|
||||
3650 3800 4150 3800
|
||||
Wire Wire Line
|
||||
3650 3900 4150 3900
|
||||
Wire Wire Line
|
||||
3650 4000 4150 4000
|
||||
Wire Wire Line
|
||||
3650 4100 4150 4100
|
||||
Wire Wire Line
|
||||
3650 4200 4150 4200
|
||||
Wire Wire Line
|
||||
3650 4300 4150 4300
|
||||
Wire Wire Line
|
||||
3650 4400 4150 4400
|
||||
Wire Wire Line
|
||||
3650 4500 4150 4500
|
||||
Wire Wire Line
|
||||
3650 4600 4150 4600
|
||||
Text Label 3700 3700 0 50 ~ 0
|
||||
COLORREF
|
||||
Wire Wire Line
|
||||
3150 2200 2650 2200
|
||||
Wire Wire Line
|
||||
3150 2300 2650 2300
|
||||
Wire Wire Line
|
||||
3150 2400 2650 2400
|
||||
Wire Wire Line
|
||||
3150 2500 2650 2500
|
||||
Wire Wire Line
|
||||
3150 2600 2650 2600
|
||||
Wire Wire Line
|
||||
3150 2700 2650 2700
|
||||
Wire Wire Line
|
||||
3150 2800 2650 2800
|
||||
Wire Wire Line
|
||||
3150 2900 2650 2900
|
||||
Wire Wire Line
|
||||
3150 3000 2650 3000
|
||||
Wire Wire Line
|
||||
3150 3100 2650 3100
|
||||
Wire Wire Line
|
||||
3150 3200 2650 3200
|
||||
Wire Wire Line
|
||||
3150 3300 2650 3300
|
||||
Wire Wire Line
|
||||
3150 3400 2650 3400
|
||||
Wire Wire Line
|
||||
3150 3500 2650 3500
|
||||
Wire Wire Line
|
||||
3150 3600 2650 3600
|
||||
Wire Wire Line
|
||||
3150 3700 2650 3700
|
||||
Wire Wire Line
|
||||
3150 3800 2650 3800
|
||||
Wire Wire Line
|
||||
3150 3900 2650 3900
|
||||
Wire Wire Line
|
||||
3150 4000 2650 4000
|
||||
Wire Wire Line
|
||||
3150 4100 2650 4100
|
||||
Wire Wire Line
|
||||
3150 4200 2650 4200
|
||||
Wire Wire Line
|
||||
3150 4300 2650 4300
|
||||
Wire Wire Line
|
||||
3150 4400 2650 4400
|
||||
Wire Wire Line
|
||||
3150 4500 2650 4500
|
||||
Wire Wire Line
|
||||
3150 4600 2650 4600
|
||||
$Comp
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J2
|
||||
U 1 1 5E39109E
|
||||
P 5350 3400
|
||||
F 0 "J2" H 5400 4817 50 0000 C CNN
|
||||
F 1 "HEADER BLOCK" H 5400 4726 50 0000 C CNN
|
||||
F 2 "pub:PinSocket_2x25_P2.54mm_Vertical_CCW_Mirrored_NoSilk" H 5350 3400 50 0001 C CNN
|
||||
F 3 "~" H 5350 3400 50 0001 C CNN
|
||||
1 5350 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 5100 2200 2 50 ~ 0
|
||||
~IOSEL
|
||||
Text Label 5100 2300 2 50 ~ 0
|
||||
A0
|
||||
Text Label 5100 2400 2 50 ~ 0
|
||||
A1
|
||||
Text Label 5100 2500 2 50 ~ 0
|
||||
A2
|
||||
Text Label 5100 2600 2 50 ~ 0
|
||||
A3
|
||||
Text Label 5100 2700 2 50 ~ 0
|
||||
A4
|
||||
Text Label 5100 2800 2 50 ~ 0
|
||||
A5
|
||||
Text Label 5100 2900 2 50 ~ 0
|
||||
A6
|
||||
Text Label 5100 3000 2 50 ~ 0
|
||||
A7
|
||||
Text Label 5100 3100 2 50 ~ 0
|
||||
A8
|
||||
Text Label 5100 3200 2 50 ~ 0
|
||||
A9
|
||||
Text Label 5100 3300 2 50 ~ 0
|
||||
A10
|
||||
Text Label 5100 3400 2 50 ~ 0
|
||||
A11
|
||||
Text Label 5100 3500 2 50 ~ 0
|
||||
A12
|
||||
Text Label 5100 3600 2 50 ~ 0
|
||||
A13
|
||||
Text Label 5100 3700 2 50 ~ 0
|
||||
A14
|
||||
Text Label 5100 3800 2 50 ~ 0
|
||||
A15
|
||||
Text Label 5100 3900 2 50 ~ 0
|
||||
R~W
|
||||
Text Label 5100 4000 2 50 ~ 0
|
||||
SYNC
|
||||
Text Label 5100 4100 2 50 ~ 0
|
||||
~IOSTRB
|
||||
Text Label 5100 4200 2 50 ~ 0
|
||||
RDY
|
||||
Text Label 5100 4300 2 50 ~ 0
|
||||
~DMA
|
||||
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||||
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||||
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
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|
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|
||||
; #@! TF.FileFunction,NonPlated,1,2,NPTH
|
||||
FMAT,2
|
||||
INCH
|
||||
%
|
||||
G90
|
||||
G05
|
||||
T0
|
||||
M30
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
M48
|
||||
; DRILL file {KiCad (5.1.5-0-10_14)} date Monday, February 08, 2021 at 09:24:17 PM
|
||||
; FORMAT={-:-/ absolute / inch / decimal}
|
||||
; #@! TF.CreationDate,2021-02-08T21:24:17-05:00
|
||||
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14)
|
||||
; #@! TF.FileFunction,Plated,1,2,PTH
|
||||
FMAT,2
|
||||
INCH
|
||||
T1C0.0394
|
||||
%
|
||||
G90
|
||||
G05
|
||||
T1
|
||||
X6.7Y-4.6
|
||||
X6.7Y-4.7
|
||||
X6.8Y-4.6
|
||||
X6.8Y-4.7
|
||||
X6.9Y-4.6
|
||||
X6.9Y-4.7
|
||||
X7.0Y-4.6
|
||||
X7.0Y-4.7
|
||||
X7.1Y-4.6
|
||||
X7.1Y-4.7
|
||||
X7.2Y-4.6
|
||||
X7.2Y-4.7
|
||||
X7.3Y-4.6
|
||||
X7.3Y-4.7
|
||||
X7.4Y-4.6
|
||||
X7.4Y-4.7
|
||||
X7.5Y-4.6
|
||||
X7.5Y-4.7
|
||||
X7.6Y-4.6
|
||||
X7.6Y-4.7
|
||||
X7.7Y-4.6
|
||||
X7.7Y-4.7
|
||||
X7.8Y-4.6
|
||||
X7.8Y-4.7
|
||||
X7.9Y-4.6
|
||||
X7.9Y-4.7
|
||||
X8.0Y-4.6
|
||||
X8.0Y-4.7
|
||||
X8.1Y-4.6
|
||||
X8.1Y-4.7
|
||||
X8.2Y-4.6
|
||||
X8.2Y-4.7
|
||||
X8.3Y-4.6
|
||||
X8.3Y-4.7
|
||||
X8.4Y-4.6
|
||||
X8.4Y-4.7
|
||||
X8.5Y-4.6
|
||||
X8.5Y-4.7
|
||||
X8.6Y-4.6
|
||||
X8.6Y-4.7
|
||||
X8.7Y-4.6
|
||||
X8.7Y-4.7
|
||||
X8.8Y-4.6
|
||||
X8.8Y-4.7
|
||||
X8.9Y-4.6
|
||||
X8.9Y-4.7
|
||||
X9.0Y-4.6
|
||||
X9.0Y-4.7
|
||||
X9.1Y-4.6
|
||||
X9.1Y-4.7
|
||||
T0
|
||||
M30
|
||||
Loading…
Reference in New Issue