mirror of
https://github.com/rharke/apple2-slot-riser.git
synced 2024-12-25 23:29:21 +00:00
1332 lines
88 KiB
Plaintext
1332 lines
88 KiB
Plaintext
(kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)")
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(general
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(thickness 1.6)
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(drawings 30)
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(tracks 381)
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(zones 0)
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(modules 6)
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(nets 61)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.4)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 0 0)
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(visible_elements FFFFF77F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "gerber/"))
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)
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(net 0 "")
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(net 1 "Net-(J1-Pad33)")
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(net 2 "Net-(J1-Pad34)")
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(net 3 "Net-(J1-Pad50)")
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(net 4 +5V)
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(net 5 "Net-(J2-Pad33)")
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(net 6 "Net-(J2-Pad34)")
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(net 7 "Net-(J2-Pad50)")
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(net 8 GND)
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(net 9 /DMA_IN)
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(net 10 /INT_IN)
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(net 11 /NMI)
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(net 12 /IRQ)
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(net 13 /RES)
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(net 14 /INH)
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(net 15 /NC35)
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(net 16 /7M)
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(net 17 /Q3)
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(net 18 /PHI1)
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(net 19 /USER1)
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(net 20 /PHI0)
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(net 21 /DEVSEL)
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(net 22 /D7)
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(net 23 /D6)
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(net 24 /D5)
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(net 25 /D4)
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(net 26 /D3)
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(net 27 /D2)
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(net 28 /D1)
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(net 29 /D0)
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(net 30 /DMA_OUT)
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(net 31 /INT_OUT)
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(net 32 /DMA)
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(net 33 /RDY)
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(net 34 /IOSTROBE)
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(net 35 /NC19)
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(net 36 /RW)
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(net 37 /A15)
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(net 38 /A14)
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(net 39 /A13)
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(net 40 /A12)
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(net 41 /A11)
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(net 42 /A10)
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(net 43 /A9)
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(net 44 /A8)
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(net 45 /A7)
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(net 46 /A6)
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(net 47 /A5)
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(net 48 /A4)
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(net 49 /A3)
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(net 50 /A2)
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(net 51 /A1)
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(net 52 /A0)
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(net 53 /IOSEL)
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(net 54 "Net-(J3-Pad33)")
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(net 55 "Net-(J3-Pad34)")
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(net 56 "Net-(J3-Pad50)")
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(net 57 "Net-(J4-Pad33)")
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(net 58 "Net-(J4-Pad34)")
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(net 59 "Net-(J4-Pad50)")
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(net 60 "Net-(D1-Pad1)")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.4)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net /7M)
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(add_net /A0)
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(add_net /A1)
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(add_net /A10)
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(add_net /A11)
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(add_net /A12)
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(add_net /A13)
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(add_net /A14)
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(add_net /A15)
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(add_net /A2)
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(add_net /A3)
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(add_net /A4)
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(add_net /A5)
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(add_net /A6)
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(add_net /A7)
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(add_net /A8)
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(add_net /A9)
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(add_net /D0)
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(add_net /D1)
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(add_net /D2)
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(add_net /D3)
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(add_net /D4)
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(add_net /D5)
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(add_net /D6)
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(add_net /D7)
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(add_net /DEVSEL)
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(add_net /DMA)
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(add_net /DMA_IN)
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(add_net /DMA_OUT)
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(add_net /INH)
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(add_net /INT_IN)
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(add_net /INT_OUT)
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(add_net /IOSEL)
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(add_net /IOSTROBE)
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(add_net /IRQ)
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(add_net /NC19)
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(add_net /NC35)
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(add_net /NMI)
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(add_net /PHI0)
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(add_net /PHI1)
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(add_net /Q3)
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(add_net /RDY)
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(add_net /RES)
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(add_net /RW)
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(add_net /USER1)
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(add_net "Net-(J1-Pad33)")
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(add_net "Net-(J1-Pad34)")
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(add_net "Net-(J1-Pad50)")
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(add_net "Net-(J2-Pad33)")
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(add_net "Net-(J2-Pad34)")
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(add_net "Net-(J2-Pad50)")
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(add_net "Net-(J3-Pad33)")
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(add_net "Net-(J3-Pad34)")
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(add_net "Net-(J3-Pad50)")
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(add_net "Net-(J4-Pad33)")
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(add_net "Net-(J4-Pad34)")
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(add_net "Net-(J4-Pad50)")
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)
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(net_class Power ""
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(clearance 0.2)
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(trace_width 1.524)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net +5V)
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(add_net GND)
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(add_net "Net-(D1-Pad1)")
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)
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(module footprint:IDC-Header_2x25_P2.54mm_Vertical_CCW (layer F.Cu) (tedit 5EA395F5) (tstamp 5EAFBAA4)
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(at 114.3 114.3 90)
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(descr "Through hole straight IDC box header, 2x25, 2.54mm pitch, double rows")
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(tags "Through hole IDC box header THT 2x25 2.54mm double row")
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(path /5EACBDF5)
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(fp_text reference J4 (at 1.27 -6.604 90) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value "EXTENDER / LOGIC ANALYZER" (at -4.445 30.48 180) (layer F.SilkS)
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(effects (font (size 0.8 0.8) (thickness 0.15)))
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)
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(fp_line (start -3.655 -5.6) (end -1.115 -5.6) (layer F.SilkS) (width 0.12))
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(fp_line (start -3.655 -5.6) (end -3.655 -3.06) (layer F.SilkS) (width 0.12))
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(fp_line (start -3.405 -5.35) (end 5.945 -5.35) (layer F.SilkS) (width 0.12))
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(fp_line (start -3.405 66.31) (end -3.405 -5.35) (layer F.SilkS) (width 0.12))
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(fp_line (start 5.945 66.31) (end -3.405 66.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 5.945 -5.35) (end 5.945 66.31) (layer F.SilkS) (width 0.12))
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(fp_line (start -3.41 -5.35) (end 5.95 -5.35) (layer F.CrtYd) (width 0.05))
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(fp_line (start -3.41 66.31) (end -3.41 -5.35) (layer F.CrtYd) (width 0.05))
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(fp_line (start 5.95 66.31) (end -3.41 66.31) (layer F.CrtYd) (width 0.05))
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(fp_line (start 5.95 -5.35) (end 5.95 66.31) (layer F.CrtYd) (width 0.05))
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(fp_line (start -3.155 66.06) (end -2.605 65.5) (layer F.Fab) (width 0.1))
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(fp_line (start -3.155 -5.1) (end -2.605 -4.56) (layer F.Fab) (width 0.1))
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(fp_line (start 5.695 66.06) (end 5.145 65.5) (layer F.Fab) (width 0.1))
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(fp_line (start 5.695 -5.1) (end 5.145 -4.56) (layer F.Fab) (width 0.1))
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(fp_line (start 5.145 65.5) (end -2.605 65.5) (layer F.Fab) (width 0.1))
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(fp_line (start 5.695 66.06) (end -3.155 66.06) (layer F.Fab) (width 0.1))
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(fp_line (start 5.145 -4.56) (end -2.605 -4.56) (layer F.Fab) (width 0.1))
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(fp_line (start 5.695 -5.1) (end -3.155 -5.1) (layer F.Fab) (width 0.1))
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(fp_line (start -2.605 32.73) (end -3.155 32.73) (layer F.Fab) (width 0.1))
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(fp_line (start -2.605 28.23) (end -3.155 28.23) (layer F.Fab) (width 0.1))
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(fp_line (start -2.605 32.73) (end -2.605 65.5) (layer F.Fab) (width 0.1))
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(fp_line (start -2.605 -4.56) (end -2.605 28.23) (layer F.Fab) (width 0.1))
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(fp_line (start -3.155 -5.1) (end -3.155 66.06) (layer F.Fab) (width 0.1))
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(fp_line (start 5.145 -4.56) (end 5.145 65.5) (layer F.Fab) (width 0.1))
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(fp_line (start 5.695 -5.1) (end 5.695 66.06) (layer F.Fab) (width 0.1))
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(fp_text user %R (at 1.27 30.48 90) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(pad 26 thru_hole oval (at 2.54 60.96 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 8 GND))
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(pad 25 thru_hole oval (at 0 60.96 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 4 +5V))
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(pad 27 thru_hole oval (at 2.54 58.42 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 9 /DMA_IN))
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(pad 24 thru_hole oval (at 0 58.42 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 30 /DMA_OUT))
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(pad 28 thru_hole oval (at 2.54 55.88 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 10 /INT_IN))
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(pad 23 thru_hole oval (at 0 55.88 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 31 /INT_OUT))
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(pad 29 thru_hole oval (at 2.54 53.34 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 11 /NMI))
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(pad 22 thru_hole oval (at 0 53.34 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 32 /DMA))
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(pad 30 thru_hole oval (at 2.54 50.8 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 12 /IRQ))
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(pad 21 thru_hole oval (at 0 50.8 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 33 /RDY))
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(pad 31 thru_hole oval (at 2.54 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 13 /RES))
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(pad 20 thru_hole oval (at 0 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 34 /IOSTROBE))
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(pad 32 thru_hole oval (at 2.54 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 14 /INH))
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(pad 19 thru_hole oval (at 0 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 35 /NC19))
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(pad 33 thru_hole oval (at 2.54 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 57 "Net-(J4-Pad33)"))
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(pad 18 thru_hole oval (at 0 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 36 /RW))
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(pad 34 thru_hole oval (at 2.54 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 58 "Net-(J4-Pad34)"))
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(pad 17 thru_hole oval (at 0 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 37 /A15))
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(pad 35 thru_hole oval (at 2.54 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 15 /NC35))
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(pad 16 thru_hole oval (at 0 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 38 /A14))
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(pad 36 thru_hole oval (at 2.54 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 16 /7M))
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(pad 15 thru_hole oval (at 0 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 39 /A13))
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(pad 37 thru_hole oval (at 2.54 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 17 /Q3))
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(pad 14 thru_hole oval (at 0 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 40 /A12))
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(pad 38 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 18 /PHI1))
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(pad 13 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 41 /A11))
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(pad 39 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 19 /USER1))
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(pad 12 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 42 /A10))
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(pad 40 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 20 /PHI0))
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(pad 11 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 43 /A9))
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(pad 41 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 21 /DEVSEL))
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(pad 10 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 44 /A8))
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(pad 42 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 22 /D7))
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(pad 9 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 45 /A7))
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(pad 43 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 23 /D6))
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(pad 8 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 46 /A6))
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(pad 44 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 24 /D5))
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(pad 7 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 47 /A5))
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(pad 45 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 25 /D4))
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(pad 6 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 48 /A4))
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(pad 46 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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|
(net 26 /D3))
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(pad 5 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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|
(net 49 /A3))
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|
(pad 47 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 27 /D2))
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(pad 4 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 50 /A2))
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|
(pad 48 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
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(net 28 /D1))
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|
(pad 3 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
|
|
(net 51 /A1))
|
|
(pad 49 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
|
|
(net 29 /D0))
|
|
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
|
|
(net 52 /A0))
|
|
(pad 50 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
|
|
(net 59 "Net-(J4-Pad50)"))
|
|
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
|
|
(net 53 /IOSEL))
|
|
(model ${KISYS3DMOD}/Connector_IDC.3dshapes/IDC-Header_2x25_P2.54mm_Vertical.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module footprint:AppleIIBus_TightMask (layer F.Cu) (tedit 5EA386E0) (tstamp 5EAFB52D)
|
|
(at 144.78 83.82)
|
|
(path /5EAAAC51)
|
|
(fp_text reference J2 (at 0 -5.08) (layer F.SilkS) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value "STRADDLE MOUNT" (at 0 4.445) (layer F.SilkS)
|
|
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
|
)
|
|
(pad 26 smd rect (at 30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 8 GND))
|
|
(pad 27 smd rect (at 27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 9 /DMA_IN))
|
|
(pad 28 smd rect (at 25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 10 /INT_IN))
|
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(pad 29 smd rect (at 22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 11 /NMI))
|
|
(pad 30 smd rect (at 20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 12 /IRQ))
|
|
(pad 31 smd rect (at 17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 13 /RES))
|
|
(pad 32 smd rect (at 15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 14 /INH))
|
|
(pad 33 smd rect (at 12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 5 "Net-(J2-Pad33)"))
|
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(pad 34 smd rect (at 10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 6 "Net-(J2-Pad34)"))
|
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(pad 35 smd rect (at 7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 15 /NC35))
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(pad 36 smd rect (at 5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 16 /7M))
|
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(pad 37 smd rect (at 2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 17 /Q3))
|
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(pad 38 smd rect (at 0 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 18 /PHI1))
|
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(pad 39 smd rect (at -2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 19 /USER1))
|
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(pad 40 smd rect (at -5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 20 /PHI0))
|
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(pad 41 smd rect (at -7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 21 /DEVSEL))
|
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(pad 42 smd rect (at -10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 22 /D7))
|
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(pad 43 smd rect (at -12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 23 /D6))
|
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(pad 44 smd rect (at -15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 24 /D5))
|
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(pad 45 smd rect (at -17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 25 /D4))
|
|
(pad 46 smd rect (at -20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 26 /D3))
|
|
(pad 47 smd rect (at -22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 27 /D2))
|
|
(pad 48 smd rect (at -25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
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(net 28 /D1))
|
|
(pad 49 smd rect (at -27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 29 /D0))
|
|
(pad 50 smd rect (at -30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
|
(net 7 "Net-(J2-Pad50)"))
|
|
(pad 25 smd rect (at 30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 4 +5V))
|
|
(pad 24 smd rect (at 27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 30 /DMA_OUT))
|
|
(pad 23 smd rect (at 25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 31 /INT_OUT))
|
|
(pad 22 smd rect (at 22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 32 /DMA))
|
|
(pad 21 smd rect (at 20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 33 /RDY))
|
|
(pad 20 smd rect (at 17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 34 /IOSTROBE))
|
|
(pad 19 smd rect (at 15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 35 /NC19))
|
|
(pad 18 smd rect (at 12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 36 /RW))
|
|
(pad 17 smd rect (at 10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 37 /A15))
|
|
(pad 16 smd rect (at 7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 38 /A14))
|
|
(pad 15 smd rect (at 5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 39 /A13))
|
|
(pad 14 smd rect (at 2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 40 /A12))
|
|
(pad 13 smd rect (at 0 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 41 /A11))
|
|
(pad 12 smd rect (at -2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 42 /A10))
|
|
(pad 11 smd rect (at -5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 43 /A9))
|
|
(pad 10 smd rect (at -7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 44 /A8))
|
|
(pad 9 smd rect (at -10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 45 /A7))
|
|
(pad 8 smd rect (at -12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 46 /A6))
|
|
(pad 7 smd rect (at -15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 47 /A5))
|
|
(pad 6 smd rect (at -17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 48 /A4))
|
|
(pad 5 smd rect (at -20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 49 /A3))
|
|
(pad 4 smd rect (at -22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 50 /A2))
|
|
(pad 3 smd rect (at -25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 51 /A1))
|
|
(pad 2 smd rect (at -27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 52 /A0))
|
|
(pad 1 smd rect (at -30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 53 /IOSEL))
|
|
)
|
|
|
|
(module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 5AE5139B) (tstamp 5EA46971)
|
|
(at 184.15 106.68 270)
|
|
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
|
|
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
|
|
(path /5EAF69CD)
|
|
(fp_text reference R1 (at 5.08 -2.37 90) (layer F.SilkS) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value 330 (at 5.08 0 90) (layer F.SilkS)
|
|
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 5.08 0 90) (layer F.Fab) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start 11.21 -1.5) (end -1.05 -1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 11.21 1.5) (end 11.21 -1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.05 1.5) (end 11.21 1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.05 -1.5) (end -1.05 1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 9.12 0) (end 8.35 0) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.04 0) (end 1.81 0) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 8.35 -1.37) (end 1.81 -1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 8.35 1.37) (end 8.35 -1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.81 1.37) (end 8.35 1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.81 -1.37) (end 1.81 1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
|
|
(pad 2 thru_hole oval (at 10.16 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 8 GND))
|
|
(pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 60 "Net-(D1-Pad1)"))
|
|
(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module LED_THT:LED_D5.0mm (layer F.Cu) (tedit 5995936A) (tstamp 5EA389EF)
|
|
(at 185.039 95.25 180)
|
|
(descr "LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf")
|
|
(tags "LED diameter 5.0mm 2 pins")
|
|
(path /5EAF5DCD)
|
|
(fp_text reference D1 (at 1.27 -3.96) (layer F.SilkS) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value POWER (at 1.27 3.96) (layer F.SilkS)
|
|
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 1.25 0) (layer F.Fab)
|
|
(effects (font (size 0.8 0.8) (thickness 0.2)))
|
|
)
|
|
(fp_line (start 4.5 -3.25) (end -1.95 -3.25) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 4.5 3.25) (end 4.5 -3.25) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.95 3.25) (end 4.5 3.25) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.95 -3.25) (end -1.95 3.25) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.29 -1.545) (end -1.29 1.545) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.23 -1.469694) (end -1.23 1.469694) (layer F.Fab) (width 0.1))
|
|
(fp_circle (center 1.27 0) (end 3.77 0) (layer F.SilkS) (width 0.12))
|
|
(fp_circle (center 1.27 0) (end 3.77 0) (layer F.Fab) (width 0.1))
|
|
(fp_arc (start 1.27 0) (end -1.29 1.54483) (angle -148.9) (layer F.SilkS) (width 0.12))
|
|
(fp_arc (start 1.27 0) (end -1.29 -1.54483) (angle 148.9) (layer F.SilkS) (width 0.12))
|
|
(fp_arc (start 1.27 0) (end -1.23 -1.469694) (angle 299.1) (layer F.Fab) (width 0.1))
|
|
(pad 2 thru_hole circle (at 2.54 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
|
(net 4 +5V))
|
|
(pad 1 thru_hole rect (at 0 0 180) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
|
|
(net 60 "Net-(D1-Pad1)"))
|
|
(model ${KISYS3DMOD}/LED_THT.3dshapes/LED_D5.0mm.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module footprint:CardEdge_EDEC_3x5-050_2x25_P2.54mm_CCW (layer F.Cu) (tedit 5EA3791B) (tstamp 5EAFB86A)
|
|
(at 114.3 101.6 90)
|
|
(descr "Through hole straight pin header, 2x25, 2.54mm pitch, double rows")
|
|
(tags "Through hole pin header THT 2x25 2.54mm double row")
|
|
(path /5EABB1C8)
|
|
(fp_text reference J3 (at 2.54 -5.57 90) (layer F.SilkS) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value "RIGHT ANGLE" (at -3.175 30.48 180) (layer F.SilkS)
|
|
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 2.54 30.48) (layer F.Fab) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start 7.72 -5.04) (end -2.63 -5.04) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 7.72 65.99) (end 7.72 -5.04) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -2.63 65.99) (end 7.72 65.99) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -2.63 -5.04) (end -2.63 65.99) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -2.16 -4.57) (end 7.24 -4.57) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 7.24 -4.57) (end 7.24 65.53) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -2.16 -4.57) (end -2.16 65.53) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -2.16 65.53) (end 7.24 65.53) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -2.1 -3.24) (end -0.83 -4.51) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -2.1 65.47) (end -2.1 -3.24) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 7.18 65.47) (end -2.1 65.47) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 7.18 -4.51) (end 7.18 65.47) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -0.83 -4.51) (end 7.18 -4.51) (layer F.Fab) (width 0.1))
|
|
(pad 26 thru_hole oval (at 5.08 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 8 GND))
|
|
(pad 25 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 4 +5V))
|
|
(pad 27 thru_hole oval (at 5.08 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 9 /DMA_IN))
|
|
(pad 24 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 30 /DMA_OUT))
|
|
(pad 28 thru_hole oval (at 5.08 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 10 /INT_IN))
|
|
(pad 23 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 31 /INT_OUT))
|
|
(pad 29 thru_hole oval (at 5.08 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 11 /NMI))
|
|
(pad 22 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 32 /DMA))
|
|
(pad 30 thru_hole oval (at 5.08 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 12 /IRQ))
|
|
(pad 21 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 33 /RDY))
|
|
(pad 31 thru_hole oval (at 5.08 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 13 /RES))
|
|
(pad 20 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 34 /IOSTROBE))
|
|
(pad 32 thru_hole oval (at 5.08 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 14 /INH))
|
|
(pad 19 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 35 /NC19))
|
|
(pad 33 thru_hole oval (at 5.08 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 54 "Net-(J3-Pad33)"))
|
|
(pad 18 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 36 /RW))
|
|
(pad 34 thru_hole oval (at 5.08 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 55 "Net-(J3-Pad34)"))
|
|
(pad 17 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 37 /A15))
|
|
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(net 15 /NC35))
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|
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(net 38 /A14))
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|
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(net 41 /A11))
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|
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(net 24 /D5) (solder_mask_margin 0.635) (clearance 0.254))
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(net 25 /D4) (solder_mask_margin 0.635) (clearance 0.254))
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(net 26 /D3) (solder_mask_margin 0.635) (clearance 0.254))
|
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(net 27 /D2) (solder_mask_margin 0.635) (clearance 0.254))
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(net 28 /D1) (solder_mask_margin 0.635) (clearance 0.254))
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(net 29 /D0) (solder_mask_margin 0.635) (clearance 0.254))
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|
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|
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|
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|
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