529 lines
15 KiB
C++
529 lines
15 KiB
C++
// μ6502 - Barebones 6502 Emulator By Damian Peckett
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// dpeckett.com, <damian@pecke.tt>
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// Address Modes
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#define AD_IMP 0x01
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#define AD_A 0x02
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#define AD_ABS 0x03
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#define AD_ABSX 0x04
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#define AD_ABSY 0x05
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#define AD_IMM 0x06
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#define AD_IND 0x07
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#define AD_INDX 0x08
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#define AD_INDY 0x09
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#define AD_REL 0x0A
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#define AD_ZPG 0x0B
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#define AD_ZPGX 0x0C
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#define AD_ZPGY 0x0D
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// SR Flag Modes
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#define FL_NONE 0x00
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#define FL_Z 0x20
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#define FL_ZN 0xA0
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#define FL_ZNC 0xB0
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#define FL_ZC 0x30
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#define FL_ALL 0xF0
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//Unimplemented ops
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#define UNDF 0x00
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//Other constants
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#define SR_FIXED_BITS 0x20
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#define SR_CARRY 0x01
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#define SR_ZERO 0x02
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#define SR_INT 0x04
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#define SR_DEC 0x08
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#define SR_BRK 0x10
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#define SR_OVER 0x40
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#define SR_NEG 0x80
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//Stack pointer base address
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#define STP_BASE 0x100
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//high nibble SR flags, low nibble address mode
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const unsigned char flags[] PROGMEM = {
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AD_IMP, AD_INDX, UNDF, UNDF, UNDF, FL_ZN|AD_ZPG, FL_ZNC|AD_ZPG, UNDF, AD_IMP, FL_ZN|AD_IMM, FL_ZNC|AD_A, UNDF, UNDF, FL_ZN|AD_ABS, FL_ZNC|AD_ABS, UNDF,
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AD_REL, FL_ZN|AD_INDY, UNDF, UNDF, UNDF, FL_ZN|AD_ZPGX, FL_ZNC|AD_ZPGX, UNDF, AD_IMP, FL_ZN|AD_ABSY, UNDF, UNDF, UNDF, FL_ZN|AD_ABSX, FL_ZNC|AD_ABSX, UNDF,
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AD_ABS, FL_ZN|AD_INDX, UNDF, UNDF, FL_Z|AD_ZPG, FL_ZN|AD_ZPG, FL_ZNC|AD_ZPG, UNDF, AD_IMP, FL_ZN|AD_IMM, FL_ZNC|AD_A, UNDF, FL_Z|AD_ABS, FL_ZN|AD_ABS, FL_ZNC|AD_ABS, UNDF,
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AD_REL, FL_ZN|AD_INDY, UNDF, UNDF, UNDF, FL_ZN|AD_ZPGX, FL_ZNC|AD_ZPGX, UNDF, AD_IMP, FL_ZN|AD_ABSY, UNDF, UNDF, UNDF, FL_ZN|AD_ABSX, FL_ZNC|AD_ABSX, UNDF,
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AD_IMP, FL_ZN|AD_INDX, UNDF, UNDF, UNDF, FL_ZN|AD_ZPG, FL_ZNC|AD_ZPG, UNDF, AD_IMP, FL_ZN|AD_IMM, FL_ZNC|AD_A, UNDF, AD_ABS, FL_ZN|AD_ABS, FL_ZNC|AD_ABS, UNDF,
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AD_REL, FL_ZN|AD_INDY, UNDF, UNDF, UNDF, FL_ZN|AD_ZPGX, FL_ZNC|AD_ZPGX, UNDF, AD_IMP, FL_ZN|AD_ABSY, UNDF, UNDF, UNDF, FL_ZN|AD_ABSX, FL_ZNC|AD_ABSX, UNDF,
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AD_IMP, FL_ALL|AD_INDX, UNDF, UNDF, UNDF, FL_ALL|AD_ZPG, FL_ZNC|AD_ZPG, UNDF, FL_ZN|AD_IMP, FL_ALL|AD_IMM, FL_ZNC|AD_A,UNDF, AD_IND, FL_ALL|AD_ABS, FL_ZNC|AD_ABS, UNDF,
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AD_REL, FL_ALL|AD_INDY, UNDF, UNDF, UNDF, FL_ALL|AD_ZPGX, FL_ZNC|AD_ZPGX, UNDF, AD_IMP, FL_ALL|AD_ABSY, UNDF, UNDF, UNDF, FL_ALL|AD_ABSX, FL_ZNC|AD_ABSX, UNDF,
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UNDF, AD_INDX, UNDF, UNDF, AD_ZPG, AD_ZPG, AD_ZPG, UNDF, FL_ZN|AD_IMP, UNDF, FL_ZN|AD_IMP, UNDF, AD_ABS, AD_ABS, AD_ABS, UNDF,
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AD_REL, AD_INDY, UNDF, UNDF, AD_ZPGX, AD_ZPGX, AD_ZPGY, UNDF, FL_ZN|AD_IMP, AD_ABSY, AD_IMP, UNDF, UNDF, AD_ABSX, UNDF, UNDF,
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FL_ZN|AD_IMM, FL_ZN|AD_INDX, FL_ZN|AD_IMM, UNDF, FL_ZN|AD_ZPG, FL_ZN|AD_ZPG, FL_ZN|AD_ZPG, UNDF, FL_ZN|AD_IMP, FL_ZN|AD_IMM, FL_ZN|AD_IMP, UNDF, FL_ZN|AD_ABS, FL_ZN|AD_ABS, FL_ZN|AD_ABS, UNDF,
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AD_REL, FL_ZN|AD_INDY, UNDF, UNDF, FL_ZN|AD_ZPGX, FL_ZN|AD_ZPGX, FL_ZN|AD_ZPGY, UNDF, AD_IMP, FL_ZN|AD_ABSY, FL_ZN|AD_IMP, UNDF, FL_ZN|AD_ABSX, FL_ZN|AD_ABSX, FL_ZN|AD_ABSY, UNDF,
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FL_ZNC|AD_IMM, FL_ZNC|AD_INDX, UNDF, UNDF, FL_ZNC|AD_ZPG, FL_ZNC|AD_ZPG, FL_ZN|AD_ZPG, UNDF, FL_ZN|AD_IMP, FL_ZNC|AD_IMM, FL_ZN|AD_IMP, UNDF, FL_ZNC|AD_ABS, FL_ZNC|AD_ABS, FL_ZN|AD_ABS, UNDF,
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AD_REL, FL_ZNC|AD_INDY, UNDF, UNDF, UNDF, FL_ZNC|AD_ZPGX, FL_ZN|AD_ZPGX, UNDF, AD_IMP, FL_ZNC|AD_ABSY, UNDF, UNDF, UNDF, FL_ZNC|AD_ABSX, FL_ZN|AD_ABSX, UNDF,
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FL_ZNC|AD_IMM, FL_ALL|AD_INDX, UNDF, UNDF, FL_ZNC|AD_ZPG, FL_ALL|AD_ZPG, FL_ZN|AD_ZPG, UNDF, FL_ZN|AD_IMP, FL_ALL|AD_IMM, AD_IMP, UNDF, FL_ZNC|AD_ABS, FL_ALL|AD_ABS, FL_ZN|AD_ABS, UNDF,
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AD_REL, FL_ALL|AD_INDY, UNDF, UNDF, UNDF, FL_ALL|AD_ZPGX, FL_ZN|AD_ZPGX, UNDF, AD_IMP, FL_ALL|AD_ABSY, UNDF, UNDF, UNDF, FL_ALL|AD_ABSX, FL_ZN|AD_ABSX, UNDF
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};
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// CPU registers
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unsigned short PC;
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unsigned char STP = 0xFD, A = 0x00, X = 0x00, Y = 0x00, SR = SR_FIXED_BITS;
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//Execution variables
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unsigned char opcode, opflags;
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unsigned short argument_addr;
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//Temporary variables for flag generation
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unsigned char value8;
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unsigned short value16, value16_2, result;
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void setflags() {
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// Mask out affected flags
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switch(opflags&0xF0) {
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case 0xA0: SR&=0x7D; break;
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case 0xB0: SR&=0x7C; break;
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case 0x30: SR&=0xFC; break;
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case 0xF0: SR&=0x3C; break;
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case 0x20: SR&=0xFD; break;
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}
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// Set various status flags
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if(opflags&0x80) SR |= (result&0x0080); //negative
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if(opflags&0x20) SR |= (((result&0xFF) == 0)?0x02:0); //zero
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if(opflags&0x10) SR |= ((result&0xFF00)?0x01:0); //carry
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if(opflags&0x40) SR |= ((result^((unsigned short)A))&(result^value16)&0x0080)>>1;
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}
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// Stack functions
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void push16(unsigned short pushval) {
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write8(STP_BASE + (STP--), (pushval>>8)&0xFF);
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write8(STP_BASE + (STP--), pushval&0xFF);
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}
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void push8(unsigned char pushval) {
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write8(STP_BASE + (STP--), pushval);
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}
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unsigned short pull16() {
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value16 = read8(STP_BASE + (++STP)) | ((unsigned short)read8(STP_BASE + (++STP))<< 8);
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return value16;
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}
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unsigned char pull8() {
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return read8(STP_BASE + (++STP));
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}
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void run() {
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// Load the reset vector
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PC = read16(0xFFFC);
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STP = 0xFD;
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for(;;) {
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// Routines for hooking apple ][ monitor routines
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program_hooks(PC);
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// Get opcode / addressing mode
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opcode = read8(PC++);
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opflags = pgm_read_byte_near(flags+opcode);
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// Addressing modes
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switch(opflags&0x0F) {
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case AD_IMP: case AD_A: argument_addr = 0xFFFF; break;
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case AD_ABS:
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argument_addr = read16(PC);
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PC += 2;
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break;
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case AD_ABSX:
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argument_addr = read16(PC) + (unsigned short)X;
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PC += 2;
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break;
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case AD_ABSY:
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argument_addr = read16(PC) + (unsigned short)Y;
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PC += 2;
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break;
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case AD_IMM:
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argument_addr = PC++;
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break;
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case AD_IND:
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argument_addr = read16(PC);
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value16 = (argument_addr&0xFF00) | ((argument_addr+1)&0x00FF); // Page wrap
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argument_addr = (unsigned short)read8(argument_addr) | ((unsigned short)read8(value16) << 8);
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PC+=2;
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break;
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case AD_INDX:
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argument_addr = ((unsigned short)read8(PC++) + (unsigned short)X)&0xFF;
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value16 = (argument_addr&0xFF00) | ((argument_addr+1)&0x00FF); // Page wrap
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argument_addr = (unsigned short)read8(argument_addr) | ((unsigned short)read8(value16) << 8);
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break;
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case AD_INDY:
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argument_addr = (unsigned short)read8(PC++);
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value16 = (argument_addr&0xFF00) | ((argument_addr+1)&0x00FF); // Page wrap
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argument_addr = (unsigned short)read8(argument_addr) | ((unsigned short)read8(value16) << 8);
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argument_addr += Y;
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break;
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case AD_REL:
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argument_addr = (unsigned short)read8(PC++);
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argument_addr |= ((argument_addr&0x80)?0xFF00:0);
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break;
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case AD_ZPG:
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argument_addr = (unsigned short)read8(PC++);
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break;
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case AD_ZPGX:
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argument_addr = ((unsigned short)read8(PC++) + (unsigned short)X)&0xFF;
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break;
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case AD_ZPGY:
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argument_addr = ((unsigned short)read8(PC++) + (unsigned short)Y)&0xFF;
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break;
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}
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//opcodes
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switch(opcode) {
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//ADC
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case 0x69: case 0x65: case 0x75:
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case 0x6D: case 0x7D: case 0x79:
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case 0x61: case 0x71:
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value16 = (unsigned short)read8(argument_addr);
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result = (unsigned short)A + value16 + (unsigned short)(SR&SR_CARRY);
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setflags();
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A = result&0xFF;
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break;
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//AND
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case 0x29: case 0x25: case 0x35:
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case 0x2D: case 0x3D: case 0x39:
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case 0x21: case 0x31:
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result = A&read8(argument_addr);
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A = result&0xFF;
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setflags();
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break;
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//ASL A
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case 0x0A:
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value16 = (unsigned short)A;
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result = value16<<1;
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setflags();
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A = result&0xFF;
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break;
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//ASL
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case 0x06: case 0x16: case 0x0E:
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case 0x1E:
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value16 = read8(argument_addr);
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result = value16<<1;
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setflags();
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write8(argument_addr, result&0xFF);
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break;
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//BCC
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case 0x90:
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if(!(SR&SR_CARRY)) PC += argument_addr;
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break;
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//BCS
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case 0xB0:
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if((SR&SR_CARRY)) PC += argument_addr;
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break;
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//BEQ
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case 0xF0:
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if((SR&SR_ZERO)) PC += argument_addr;
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break;
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//BNE
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case 0xD0:
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if(!(SR&SR_ZERO)) PC += argument_addr;
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break;
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//BIT
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case 0x24: case 0x2C:
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value8 = read8(argument_addr);
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result = A & value8;
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setflags();
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SR = (SR&0x3F) | (value8&0xC0);
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break;
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//BMI
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case 0x30:
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if((SR&SR_NEG)) PC += argument_addr;
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break;
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//BPL
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case 0x10:
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if(!(SR&SR_NEG)) PC += argument_addr;
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break;
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//BRK
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case 0x00:
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PC++;
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push16(PC);
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push8(SR|SR_BRK);
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SR|=SR_INT;
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PC = read16(0xFFFE);
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break;
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//BVC
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case 0x50:
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if(!(SR&SR_OVER)) PC += argument_addr;
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break;
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//BVS
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case 0x70:
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if(SR&SR_OVER) PC += argument_addr;
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break;
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//CLC
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case 0x18:
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SR&=0xFE;
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break;
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//CLD
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case 0xD8:
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SR&=0xF7;
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break;
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//CLI
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case 0x58:
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SR&=0xFB;
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break;
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//CLV
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case 0xB8:
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SR&=0xBF;
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break;
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//CMP
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case 0xC9: case 0xC5: case 0xD5:
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case 0xCD: case 0xDD: case 0xD9:
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case 0xC1: case 0xD1:
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value16 = ((unsigned short)read8(argument_addr)) ^ 0x00FF;
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result = (unsigned short)A + value16 + (unsigned short)1;
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setflags();
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break;
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//CPX
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case 0xE0: case 0xE4: case 0xEC:
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value16 = ((unsigned short)read8(argument_addr)) ^ 0x00FF;
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result = (unsigned short)X + value16 + (unsigned short)1;
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setflags();
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break;
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//CPY
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case 0xC0: case 0xC4: case 0xCC:
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value16 = ((unsigned short)read8(argument_addr)) ^ 0x00FF;
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result = (unsigned short)Y + value16 + (unsigned short)1;
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setflags();
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break;
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//DEC
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case 0xC6: case 0xD6: case 0xCE:
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case 0xDE:
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value16 = (unsigned short)read8(argument_addr);
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result = value16 - 1;
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setflags();
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write8(argument_addr, result&0xFF);
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break;
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//DEX
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case 0xCA:
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result = --X;
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setflags();
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break;
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//DEY
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case 0x88:
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result = --Y;
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setflags();
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break;
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//EOR
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case 0x49: case 0x45: case 0x55:
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case 0x4D: case 0x5D: case 0x59:
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case 0x41: case 0x51:
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value8 = read8(argument_addr);
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result = A^value8;
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setflags();
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A = result&0xFF;
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break;
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//INC
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case 0xE6: case 0xF6: case 0xEE:
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case 0xFE:
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value16 = (unsigned short)read8(argument_addr);
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result = value16 + 1;
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setflags();
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write8(argument_addr, result&0xFF);
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break;
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//INX
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case 0xE8:
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result = ++X;
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setflags();
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break;
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//INY
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case 0xC8:
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result = ++Y;
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setflags();
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break;
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//JMP
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case 0x4C: case 0x6C:
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PC = argument_addr;
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break;
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//JSR
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case 0x20:
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push16(PC-1);
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PC = argument_addr;
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break;
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//LDA
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case 0xA9: case 0xA5: case 0xB5:
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case 0xAD: case 0xBD: case 0xB9:
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case 0xA1: case 0xB1:
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A = read8(argument_addr);
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result = A;
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setflags();
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break;
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//LDX
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case 0xA2: case 0xA6: case 0xB6:
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case 0xAE: case 0xBE:
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X = read8(argument_addr);
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result = X;
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setflags();
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break;
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//LDY
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case 0xA0: case 0xA4: case 0xB4:
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case 0xAC: case 0xBC:
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Y = read8(argument_addr);
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result = Y;
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setflags();
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break;
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//LSR A
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case 0x4A:
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value8 = A;
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result = value8 >> 1;
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result |= (value8&0x1)?0x8000:0;
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setflags();
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A = result&0xFF;
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break;
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//LSR
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case 0x46: case 0x56: case 0x4E:
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case 0x5E:
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value8 = read8(argument_addr);
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result = value8 >> 1;
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result |= (value8&0x1)?0x8000:0;
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setflags();
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write8(argument_addr, result&0xFF);
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break;
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//NOP
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case 0xEA:
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break;
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//ORA
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case 0x09: case 0x05: case 0x15:
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case 0x0D: case 0x1D: case 0x19:
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case 0x01: case 0x11:
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value8 = read8(argument_addr);
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result = A | value8;
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setflags();
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A = result&0xFF;
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break;
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//PHA
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case 0x48:
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push8(A);
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break;
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//PHP
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case 0x08:
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push8(SR|SR_BRK);
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break;
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//PLA
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case 0x68:
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result = pull8();
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setflags();
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A = result;
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break;
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//PLP
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case 0x28:
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SR = pull8() | SR_FIXED_BITS;
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break;
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//ROL A
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case 0x2A:
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value16 = (unsigned short)A;
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result = (value16 << 1) | (SR&SR_CARRY);
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setflags();
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A = result&0xFF;
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break;
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//ROL
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case 0x26: case 0x36: case 0x2E:
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case 0x3E:
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value16 = (unsigned short)read8(argument_addr);
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result = (value16 << 1) | (SR&SR_CARRY);
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setflags();
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write8(argument_addr, result&0xFF);
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break;
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//ROR A
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case 0x6A:
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value16 = (unsigned short)A;
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result = (value16 >> 1) | ((SR&SR_CARRY) << 7);
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result |= (value16&0x1)?0x8000:0;
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setflags();
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A = result&0xFF;
|
|
break;
|
|
//ROR
|
|
case 0x66: case 0x76: case 0x6E:
|
|
case 0x7E:
|
|
value16 = (unsigned short)read8(argument_addr);
|
|
result = (value16 >> 1) | ((SR&SR_CARRY) << 7);
|
|
result |= (value16&0x1)?0x8000:0;
|
|
setflags();
|
|
write8(argument_addr, result&0xFF);
|
|
break;
|
|
//RTI
|
|
case 0x40:
|
|
SR = pull8();
|
|
PC = pull16();
|
|
break;
|
|
//RTS
|
|
case 0x60:
|
|
PC = pull16() + 1;
|
|
break;
|
|
//SBC
|
|
case 0xE9: case 0xE5: case 0xF5:
|
|
case 0xED: case 0xFD: case 0xF9:
|
|
case 0xE1: case 0xF1:
|
|
value16 = ((unsigned short)read8(argument_addr)) ^ 0x00FF;
|
|
result = (unsigned short)A + value16 + (unsigned short)(SR&SR_CARRY);
|
|
setflags();
|
|
A = result&0xFF;
|
|
break;
|
|
//SEC
|
|
case 0x38:
|
|
SR |= SR_CARRY;
|
|
break;
|
|
//SED
|
|
case 0xF8:
|
|
SR |= SR_DEC;
|
|
break;
|
|
//SEI
|
|
case 0x78:
|
|
SR |= SR_INT;
|
|
break;
|
|
//STA
|
|
case 0x85: case 0x95: case 0x8D:
|
|
case 0x9D: case 0x99: case 0x81:
|
|
case 0x91:
|
|
write8(argument_addr, A);
|
|
break;
|
|
//STX
|
|
case 0x86: case 0x96: case 0x8E:
|
|
write8(argument_addr, X);
|
|
break;
|
|
//STY
|
|
case 0x84: case 0x94: case 0x8C:
|
|
write8(argument_addr, Y);
|
|
break;
|
|
//TAX
|
|
case 0xAA:
|
|
X = A;
|
|
result = A;
|
|
setflags();
|
|
break;
|
|
//TAY
|
|
case 0xA8:
|
|
Y = A;
|
|
result = A;
|
|
setflags();
|
|
break;
|
|
//TSX
|
|
case 0xBA:
|
|
X = STP;
|
|
result = STP;
|
|
setflags();
|
|
break;
|
|
//TXA
|
|
case 0x8A:
|
|
A = X;
|
|
result = X;
|
|
setflags();
|
|
break;
|
|
//TXS
|
|
case 0x9A:
|
|
STP = X;
|
|
result = X;
|
|
setflags();
|
|
break;
|
|
//TYA
|
|
case 0x98:
|
|
A = Y;
|
|
result = Y;
|
|
setflags();
|
|
break;
|
|
}
|
|
}
|
|
}
|