[ START MERGED ]
[ END MERGED ]
[ START CLIPPED ]
GND_net
led_timer_9_10_add_4_1/S0
led_timer_9_10_add_4_1/CI
led_timer_9_10_add_4_21/CO
[ END CLIPPED ]
[ START OSC ]
clk 2.08
[ END OSC ]
[ START DESIGN PREFS ]
SCHEMATIC START ;
# map:  version Diamond (64-bit) 3.9.0.99.2 -- WARNING: Map write only section -- Thu Oct 05 12:20:37 2017

SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE BACKGROUND_RECONFIG=OFF INBUF=ON ;
LOCATE COMP "pin_led" SITE "25" ;
LOCATE COMP "en_245" SITE "30" ;
FREQUENCY NET "clk" 2.080000 MHz ;
SCHEMATIC END ;
[ END DESIGN PREFS ]