fpga-disk-controller/lattice/fpgatop/liron_fpgatop_map.asd

70 lines
1.4 KiB
Common Lisp

[ActiveSupport MAP]
Device = LCMXO2-1200HC;
Package = TQFP100;
Performance = 4;
LUTS_avail = 1280;
LUTS_used = 113;
FF_avail = 1360;
FF_used = 43;
INPUT_LVCMOS33 = 22;
OUTPUT_LVCMOS33 = 22;
BIDI_LVCMOS33 = 8;
IO_avail = 80;
IO_used = 52;
EBR_avail = 7;
EBR_used = 4;
; Begin EBR Section
Instance_Name = myROM/codeROM_0_0_3_0;
Type = DP8KC;
Width_A = 2;
Depth_A = 4096;
REGMODE_A = OUTREG;
REGMODE_B = NOREG;
RESETMODE = SYNC;
ASYNC_RESET_RELEASE = SYNC;
WRITEMODE_A = NORMAL;
WRITEMODE_B = NORMAL;
GSR = ENABLED;
MEM_INIT_FILE = rom-full-4k.mem;
MEM_LPC_FILE = codeROM.lpc;
Instance_Name = myROM/codeROM_0_0_1_2;
Type = DP8KC;
Width_A = 2;
Depth_A = 4096;
REGMODE_A = OUTREG;
REGMODE_B = NOREG;
RESETMODE = SYNC;
ASYNC_RESET_RELEASE = SYNC;
WRITEMODE_A = NORMAL;
WRITEMODE_B = NORMAL;
GSR = ENABLED;
MEM_INIT_FILE = rom-full-4k.mem;
MEM_LPC_FILE = codeROM.lpc;
Instance_Name = myROM/codeROM_0_0_0_3;
Type = DP8KC;
Width_A = 2;
Depth_A = 4096;
REGMODE_A = OUTREG;
REGMODE_B = NOREG;
RESETMODE = SYNC;
ASYNC_RESET_RELEASE = SYNC;
WRITEMODE_A = NORMAL;
WRITEMODE_B = NORMAL;
GSR = ENABLED;
MEM_INIT_FILE = rom-full-4k.mem;
MEM_LPC_FILE = codeROM.lpc;
Instance_Name = myROM/codeROM_0_0_2_1;
Type = DP8KC;
Width_A = 2;
Depth_A = 4096;
REGMODE_A = OUTREG;
REGMODE_B = NOREG;
RESETMODE = SYNC;
ASYNC_RESET_RELEASE = SYNC;
WRITEMODE_A = NORMAL;
WRITEMODE_B = NORMAL;
GSR = ENABLED;
MEM_INIT_FILE = rom-full-4k.mem;
MEM_LPC_FILE = codeROM.lpc;
; End EBR Section