diff --git a/firmware/util.s b/firmware/util.s index 6e911c0..8020ec3 100644 --- a/firmware/util.s +++ b/firmware/util.s @@ -43,7 +43,7 @@ LC604: jsr BELL LC607: jsr GETLNZ ; start new line and take input lda #$00 sta $F2 -LC60E: sta KBDSTRB ; clear keyboard strobe +PARSER: sta KBDSTRB ; clear keyboard strobe sta $F3 ldy $F2 jsr GETNUM ; parse hex into A2, A has last char xor $b0 @@ -70,13 +70,13 @@ LC60E: sta KBDSTRB ; clear keyboard strobe bne LC604 ; BEEP and prompt for new input brk ; 'Q' exits out -; 'R': recalibrate by seeking track $00 from track $50 -CMD_R: lda #$50 ; set starting track to #$50 +; 'R': recalibrate by seeking track 0 from track 80 +CMD_R: lda #80 ; set starting track sta $FC ; store accumulator as 'current' track at $FC txa ; set accumulator to 0 adc #$00 ; inc A (carry still set from CMP #$EB) sta $F3 ; set ($F3)=01 - lda #$00 ; pass target track #$00 through accumulator + lda #$00 ; pass target track 0 through accumulator beq LC651 ; branch to end of 'S' command to finish ; 'S': seek logical-track index in A2L ('22S' seeks logical track $22) @@ -92,8 +92,9 @@ CMD_Z: lda A2L ; load logical track-index from A2L sta $F1 ; store as target track in $F1 ldy #$00 ; value to stored at $09 = #$00 beq CMD_MX ; branch to 'M' command for next step + ; temporarily stop motor, then branch to turn it on again -LC660: lda #$50 +STOP_MOTOR: lda #$50 jsr MON_WAIT sta MOTOROFF,x ldy A2L @@ -103,11 +104,11 @@ LC66A: jsr MON_WAIT bmi LC68E ; EXIT THRU GIFT SHOP, current command finished, go back to parser -LC672: lda #$00 - beq LC60E +DONE: lda #$00 + beq PARSER ; 'W' command, write nibble-pattern in A2L (eg: "96W" writes 96 96 96...) -CMD_W: lda A2L +CMD_W: lda A2L ; pattern to write sta $FF ldy #$0F @@ -134,27 +135,29 @@ LC68E: sta MOTORON,x sta Q7ON,x ; start writing/erasing LC69D: lda $09 ; [3 cycles] reload saved Y byte asl a ; [2] shift-left to test second bit - bmi LC660 ; [2] branch to stop motor for 'M' and 'X' and 'S' commands + bmi STOP_MOTOR ; [2] branch to stop motor for M/X/S commands nop nop lda $FF ; byte value to be written - sta Q6ON,x ; store into data register (wrong timing for Disk II, it would probably write $DD instead) + sta Q6ON,x ; store into data register + ; (wrong timing for Disk II, it would probably + ; write $DD instead) cmp Q6OFF,x ; [4] shift data-out LC6AC: lda KBD ; get keypress eor #$9B ; ESC? bne LC69D ; if not, continue loop ldx SLOTx16 sta Q7OFF,x -LC6B8: beq LC672 ; all done, branch to branch-to-parser +LC6B8: beq DONE ; all done, branch to branch-to-parser LC6BA: ldx SLOTx16 sta MOTORON,x LC6BF: ldy $FC LC6C1: cpy $F0 ; compare track index in Y to target track (result in carry flag) bne LC6E3 ; track doesn't match, go to stepper routine - lda $F0 ; load current track into accumulator (redundant, same value is already in Y reg) + lda $F0 ; load current track into A (why not tya?) sta $FC ; store current track lda $09 - bne LC672 ; Y=00, branch for 'Z' + bne DONE ; Y=00, branch for 'Z' lda $F0 ; exchange target track indexes in $F0 vs $F1 ldy $F1 sta $F1 @@ -172,14 +175,14 @@ LC6E7: dey tya and #$03 ; mask track to just 4 low bits, numbers 00-01-02-03 asl a ; shift left, convert to stepper-motor phases 02-04-06-08 - ora SLOTx16 ; bitwise-OR to make it into a DEVSEL-relative IO address - tax ; move it into X reg for IO + ora SLOTx16 ; bitwise-OR for DEVSEL-relative IO address + tax ; move it into X for IO lsr a ; shift right to make track number again - lsr a ; now shift low-bit into carry flag (odd vs even) - sta STEPON,x ; turn on stepper motor phase indicated in X reg + lsr a ; shift low-bit into carry flag (odd vs even) + sta STEPON,x ; turn on stepper motor phase indicated in X nop ; dead code nop lda #$56 - jsr MON_WAIT ; wait stepper delay (returns with A=00, carry set) - sta STEPOFF,x ; turn off stepper motor phase indicated in X reg + jsr MON_WAIT ; wait stepper delay (returns A=00, carry set) + sta STEPOFF,x ; turn off stepper motor phase indicated in X bcs LC6C1 ; branch always