From 663561c9f73fa15f209224a89ee9fadc23db5bee Mon Sep 17 00:00:00 2001 From: Dave Date: Fri, 21 Apr 2023 17:12:05 -0500 Subject: [PATCH] add osi mounting holes to ECO2 layer In unikbd library, add eco2 layer holes to the OSI mounting holes part. Since the osi keyboard cutout is on the eco2 layer, this allows the mounting holes to be exported along with the cutout for case design. --- .../keyboard-classic/kbd-classic.kicad_pro | 102 +++++++++++++++--- 1 file changed, 87 insertions(+), 15 deletions(-) diff --git a/hardware/keyboard-classic/kbd-classic.kicad_pro b/hardware/keyboard-classic/kbd-classic.kicad_pro index bb2e620..e98964e 100644 --- a/hardware/keyboard-classic/kbd-classic.kicad_pro +++ b/hardware/keyboard-classic/kbd-classic.kicad_pro @@ -1,5 +1,6 @@ { "board": { + "3dviewports": [], "design_settings": { "defaults": { "board_outline_line_width": 0.049999999999999996, @@ -57,20 +58,26 @@ "rule_severities": { "annular_width": "error", "clearance": "error", + "connection_width": "warning", "copper_edge_clearance": "error", + "copper_sliver": "warning", "courtyards_overlap": "error", "diff_pair_gap_out_of_range": "error", "diff_pair_uncoupled_length_too_long": "error", "drill_out_of_range": "error", "duplicate_footprints": "warning", "extra_footprint": "warning", + "footprint": "error", "footprint_type_mismatch": "error", "hole_clearance": "error", "hole_near_hole": "error", "invalid_outline": "error", + "isolated_copper": "warning", "item_on_disabled_layer": "error", "items_not_allowed": "error", "length_out_of_range": "error", + "lib_footprint_issues": "warning", + "lib_footprint_mismatch": "warning", "malformed_courtyard": "error", "microvia_drill_out_of_range": "error", "missing_courtyard": "ignore", @@ -80,9 +87,14 @@ "padstack": "error", "pth_inside_courtyard": "ignore", "shorting_items": "error", + "silk_edge_clearance": "warning", "silk_over_copper": "warning", "silk_overlap": "warning", "skew_out_of_range": "error", + "solder_mask_bridge": "error", + "starved_thermal": "error", + "text_height": "warning", + "text_thickness": "warning", "through_hole_pad_without_hole": "error", "too_many_vias": "error", "track_dangling": "warning", @@ -91,7 +103,6 @@ "unconnected_items": "error", "unresolved_variable": "error", "via_dangling": "warning", - "zone_has_empty_net": "error", "zones_intersect": "error" }, "rules": { @@ -99,18 +110,63 @@ "allow_microvias": false, "max_error": 0.005, "min_clearance": 0.0, + "min_connection": 0.0, "min_copper_edge_clearance": 0.0508, "min_hole_clearance": 0.25, "min_hole_to_hole": 0.25, "min_microvia_diameter": 0.19999999999999998, "min_microvia_drill": 0.09999999999999999, + "min_resolved_spokes": 2, "min_silk_clearance": 0.0, + "min_text_height": 0.7999999999999999, + "min_text_thickness": 0.08, "min_through_hole_diameter": 0.3, "min_track_width": 0.19999999999999998, "min_via_annular_width": 0.049999999999999996, "min_via_diameter": 0.39999999999999997, + "solder_mask_to_copper_clearance": 0.0, "use_height_for_length_calcs": true }, + "teardrop_options": [ + { + "td_allow_use_two_tracks": true, + "td_curve_segcount": 5, + "td_on_pad_in_zone": false, + "td_onpadsmd": true, + "td_onroundshapesonly": false, + "td_ontrackend": false, + "td_onviapad": true + } + ], + "teardrop_parameters": [ + { + "td_curve_segcount": 0, + "td_height_ratio": 1.0, + "td_length_ratio": 0.5, + "td_maxheight": 2.0, + "td_maxlen": 1.0, + "td_target_name": "td_round_shape", + "td_width_to_size_filter_ratio": 0.9 + }, + { + "td_curve_segcount": 0, + "td_height_ratio": 1.0, + "td_length_ratio": 0.5, + "td_maxheight": 2.0, + "td_maxlen": 1.0, + "td_target_name": "td_rect_shape", + "td_width_to_size_filter_ratio": 0.9 + }, + { + "td_curve_segcount": 0, + "td_height_ratio": 1.0, + "td_length_ratio": 0.5, + "td_maxheight": 2.0, + "td_maxlen": 1.0, + "td_target_name": "td_track_end", + "td_width_to_size_filter_ratio": 0.9 + } + ], "track_widths": [ 0.0, 0.254, @@ -130,7 +186,8 @@ "zones_allow_external_fillets": false, "zones_use_no_outline": true }, - "layer_presets": [] + "layer_presets": [], + "viewports": [] }, "boards": [], "cvpcb": { @@ -314,18 +371,23 @@ "rule_severities": { "bus_definition_conflict": "error", "bus_entry_needed": "error", - "bus_label_syntax": "error", "bus_to_bus_conflict": "error", "bus_to_net_conflict": "error", + "conflicting_netclasses": "error", "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", + "endpoint_off_grid": "warning", "extra_units": "error", "global_label_dangling": "warning", "hier_label_mismatch": "error", "label_dangling": "error", "lib_symbol_issues": "warning", + "missing_bidi_pin": "warning", + "missing_input_pin": "warning", + "missing_power_pin": "error", + "missing_unit": "warning", "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", @@ -335,6 +397,7 @@ "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", + "simulation_model_issue": "error", "unannotated": "error", "unit_value_mismatch": "error", "unresolved_variable": "error", @@ -352,7 +415,7 @@ "net_settings": { "classes": [ { - "bus_width": 12.0, + "bus_width": 12, "clearance": 0.2, "diff_pair_gap": 0.254, "diff_pair_via_gap": 0.25, @@ -366,10 +429,10 @@ "track_width": 0.254, "via_diameter": 0.8128, "via_drill": 0.4064, - "wire_width": 6.0 + "wire_width": 6 }, { - "bus_width": 12.0, + "bus_width": 12, "clearance": 0.254, "diff_pair_gap": 0.254, "diff_pair_via_gap": 0.25, @@ -378,16 +441,15 @@ "microvia_diameter": 0.3048, "microvia_drill": 0.1016, "name": "power1", - "nets": [], "pcb_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "track_width": 1.27, "via_diameter": 1.27, "via_drill": 0.7112, - "wire_width": 6.0 + "wire_width": 6 }, { - "bus_width": 12.0, + "bus_width": 12, "clearance": 0.2032, "diff_pair_gap": 0.254, "diff_pair_via_gap": 0.25, @@ -396,21 +458,25 @@ "microvia_diameter": 0.3048, "microvia_drill": 0.1016, "name": "signal", - "nets": [ - "/Col0" - ], "pcb_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.254, "via_diameter": 0.8128, "via_drill": 0.4064, - "wire_width": 6.0 + "wire_width": 6 } ], "meta": { - "version": 2 + "version": 3 }, - "net_colors": null + "net_colors": null, + "netclass_assignments": null, + "netclass_patterns": [ + { + "netclass": "signal", + "pattern": "/Col0" + } + ] }, "pcbnew": { "last_paths": { @@ -426,6 +492,8 @@ "schematic": { "annotate_start_num": 0, "drawing": { + "dashed_lines_dash_length_ratio": 12.0, + "dashed_lines_gap_length_ratio": 3.0, "default_line_thickness": 6.0, "default_text_size": 50.0, "field_names": [], @@ -457,7 +525,11 @@ "page_layout_descr_file": "", "plot_directory": "", "spice_adjust_passive_values": false, + "spice_current_sheet_as_root": false, "spice_external_command": "spice \"%I\"", + "spice_model_current_sheet_as_root": true, + "spice_save_all_currents": false, + "spice_save_all_voltages": false, "subpart_first_id": 65, "subpart_id_separator": 0 },