From 08ce1e0c8380308a6ad9bcb2efaba6dcb1a5bb25 Mon Sep 17 00:00:00 2001 From: Peter Ferrie Date: Thu, 22 Oct 2015 08:38:56 -0700 Subject: [PATCH] initial checkin --- 0BOOT.S | 291 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ readme.md | 9 ++ 2 files changed, 300 insertions(+) create mode 100644 0BOOT.S create mode 100644 readme.md diff --git a/0BOOT.S b/0BOOT.S new file mode 100644 index 0000000..df93393 --- /dev/null +++ b/0BOOT.S @@ -0,0 +1,291 @@ +;bootable zpage seek/read +;copyright (c) Peter Ferrie 2015 +;thanks to 4am for inspiration and testing +;assemble using ACME +!cpu 6502 +!to "0boot",plain +*=$800 + tracks = $d1 ;user-defined + address = $d1 ;user-defined + entry = $d1d1 ;user-defined + version = 1 + + ;memory usage: + ;256 bytes ($200-2FF) static table + grouped = $200 + ;106 bytes ($300-369) static table + preshift = $300 + ;86 bytes ($36A-3BF) dynamic table (2-bit array) + bit2tbl = $36a + + !byte 1 ;we'll read the other one ourselves + lsr ;check sector number + bne + ;branch if not 1 + inc $3d ;increment sector (faster to find) + txa + lsr + lsr + lsr + lsr + ora #$c0 ;slot to PROM base + pha + lda #$5b ;read-1 + pha + rts + + ;the following TAY is a workaround for a CFFA bug + ;the bug is that Y isn't zero on entry + ;the workaround sets it to one instead + ;it's not zero, but it's better than #$10 + ++ tay + txa + ora #$8c ;slot to Q6L +- ldx $900, y + stx $0, y ;copy RTS to zpage + iny + bne - +- iny + ldx <(patchtbl-1), y + sta $0, x ;replace placeholders with Q6L + bne - + and #$f0 ;PHASEOFF + sta <(slotpatch6+1) + ora #8 ;MOTOROFF + sta <(slotpatch8+1) + ldx #(stackend-addrtbl) +- lda <(addrtbl-1), x + pha ;copy stack frame + dex + bne - + ldy #<(tracks*2) + bne + ;branch always +*=$839 + jsr preread + jmp $bf00 ;DOS 3.3 launcher entrypoint + + ;build read/seek call-sequence per track + ++ +- txa + bcc + ;set initially by LSR above + pha + pha + !byte $c9 ;CMP masks SEC, clears carry on even rounds ++ sec ;SEC is reached on odd rounds + pha + lda #<(seek-1) + pha ;push seek twice for two phases + dey + bne - + + ;construct denibbilisation table + ;pre-shifted for interleave read + + ldx #$40 +-- ldy <(tmpval+1) + tya + asl + bit <(tmpval+1) + beq + + ora <(tmpval+1) + eor #$ff + and #$7e +- bcs + + lsr + bne - + dex + txa + asl + asl + sta preshift-$16, y ++ dec <(tmpval+1) + bne -- + + ;construct 2-bit group table + +-- lsr <(curtrk+1) + lsr <(curtrk+1) +- lda