2015-03-14 21:48:35 +00:00
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PR#3
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2017-03-29 15:48:15 +00:00
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PREFIX /A2OSX.BUILD
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2015-03-14 21:48:35 +00:00
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NEW
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INC 1
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AUTO 6
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.LIST OFF
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*--------------------------------------
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* Software Switches
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*--------------------------------------
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KBD .EQ $C000 R
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CLR80STORE .EQ $C000 W
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SET80STORE .EQ $C001 W
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CLRREADAUX .EQ $C002 W
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SETREADAUX .EQ $C003 W
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CLRWRITEAUX .EQ $C004 W
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SETWRITEAUX .EQ $C005 W
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2017-01-12 17:43:45 +00:00
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*CLRCXROM .EQ $C006 W
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*SETCXROM .EQ $C007 W
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2015-03-14 21:48:35 +00:00
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CLRALTZP .EQ $C008 W
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SETALTZP .EQ $C009 W
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2017-01-12 17:43:45 +00:00
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*CLRC3ROM .EQ $C00A W
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*SETC3ROM .EQ $C00B W
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2015-03-14 21:48:35 +00:00
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CLR80DISP .EQ $C00C W
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SET80DISP .EQ $C00D W
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CLRALTCHAR .EQ $C00E W
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SETALTCHAR .EQ $C00F W
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KBDSTROBE .EQ $C010 W
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2016-09-05 16:00:11 +00:00
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RDLCBNK2 .EQ $C011 R
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2015-03-14 21:48:35 +00:00
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RDLCRAM .EQ $C012 R
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RDREADAUX .EQ $C013 R
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RDWRITEAUX .EQ $C014 R
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2017-01-12 17:43:45 +00:00
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*RDCXROM .EQ $C015 R
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2015-03-14 21:48:35 +00:00
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RDALTZP .EQ $C016 R
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2017-01-12 17:43:45 +00:00
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*RDC3ROM .EQ $C017 R
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2015-03-14 21:48:35 +00:00
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RD80STORE .EQ $C018 R
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VBL .EQ $C019 R
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RDTEXT .EQ $C01A R
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RDMIXED .EQ $C01B R
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RDPAGE2 .EQ $C01C R
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RDHIRES .EQ $C01D R
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RDALTCHAR .EQ $C01E R
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RD80DISP .EQ $C01F R
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2017-01-12 17:43:45 +00:00
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*TAPEOUT .EQ $C020 W
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2015-03-14 21:48:35 +00:00
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SPEAKER .EQ $C030 W, toggle speaker diaphragm
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2017-01-12 17:43:45 +00:00
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*STROBE .EQ $C040 R, generate .5 uS low pulse @ Game pin 5
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2015-03-14 21:48:35 +00:00
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EMUBYTE .EQ $C04F WRR, Write once then Read EMUL, Read Version
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CLRTEXT .EQ $C050 W
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SETTEXT .EQ $C051 W
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CLRMIXED .EQ $C052 W
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SETMIXED .EQ $C053 W
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CLRPAGE2 .EQ $C054 W
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SETPAGE2 .EQ $C055 W
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CLRHIRES .EQ $C056 W
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SETHIRES .EQ $C057 W
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2017-01-12 17:43:45 +00:00
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*SETAN0 .EQ $C058 W, Set annunciator-0 output to 0
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*CLRAN0 .EQ $C059 W, Set annunciator-0 output to 1
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*SETAN1 .EQ $C05A W, Set annunciator-1 output to 0
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*CLRAN1 .EQ $C05B W, Set annunciator-1 output to 1
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*SETAN2 .EQ $C05C W, Set annunciator-2 output to 0
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2017-11-20 16:45:12 +00:00
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CLRAN2 .EQ $C05D W, Set annunciator-2 output to 1
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2017-01-12 17:43:45 +00:00
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*SETAN3 .EQ $C05E W, Set annunciator-3 output to 0
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*CLRAN3 .EQ $C05F W, Set annunciator-3 output to 1
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2017-11-20 16:45:12 +00:00
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*ENBVBLIIC .EQ $C05B W, Enable VBL switch (IIc)
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SETDHIRES .EQ $C05E W, if IOUDIS Set, turn on double-hires
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2015-03-14 21:48:35 +00:00
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CLRDHIRES .EQ $C05F W, if IOUDIS Set, turn off double-hires
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2017-01-12 17:43:45 +00:00
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*TAPEIN .EQ $C060 R
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2015-03-14 21:48:35 +00:00
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OPENAPPLE .EQ $C061 R
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SOLIDAPPLE .EQ $C062 R
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2017-01-12 17:43:45 +00:00
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*PB2 .EQ $C063 R
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2015-03-14 21:48:35 +00:00
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2017-01-12 17:43:45 +00:00
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*PADDLE0 .EQ $C064 R, bit 7 = status of pdl-0 timer
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*PADDLE1 .EQ $C065 R, bit 7 = status of pdl-1 timer
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*PADDLE2 .EQ $C066 R, bit 7 = status of pdl-2 timer
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*PADDLE3 .EQ $C067 R, bit 7 = status of pdl-3 timer
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*PDLTRIG .EQ $C070 W, trigger paddles
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2015-03-14 21:48:35 +00:00
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SETIOUDIS .EQ $C07E W, enable DHIRES & disable $C058-5F
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2016-02-24 20:02:55 +00:00
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RDIOUDIS .EQ $C07E R, bit 7 = IOUDIS status
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2015-03-14 21:48:35 +00:00
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CLRIOUDIS .EQ $C07F W, disable DHIRES & enable $C058-5F
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*--------------------------------------
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RRAMBNK2 .EQ $C080 R
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RROMWRAMBNK2 .EQ $C081 RR
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RROMBNK2 .EQ $C082 R
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RRAMWRAMBNK2 .EQ $C083 RR
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RRAMBNK1 .EQ $C088 R
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RROMWRAMBNK1 .EQ $C089 RR
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RROMBNK1 .EQ $C08A R
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RRAMWRAMBNK1 .EQ $C08B RR
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2016-09-05 16:00:11 +00:00
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*--------------------------------------
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2017-01-12 17:43:45 +00:00
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*CLRC8ROM .EQ $CFFF R, Release C800-CFFF Rom Space for all cards
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2015-03-14 21:48:35 +00:00
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MAN
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2017-03-29 15:48:15 +00:00
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SAVE /A2OSX.BUILD/INC/IO.I
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