A2osX/ProDOS.FX/ProDOS.S.LDR.txt

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2019-10-16 06:09:13 +00:00
NEW
AUTO 3,1
2023-11-04 14:42:28 +00:00
*--------------------------------------
idapple .EQ $0C model machine id
idxl .EQ $10 general use 16 bit index pointer
*--------------------------------------
auxsp .EQ $0101
*--------------------------------------
LDR.PBuf .EQ $0280
2019-11-05 07:29:49 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
.MA DEBUG
:1 bit $C000
bpl :1
sta $C010
.EM
2020-01-13 11:05:11 +00:00
*--------------------------------------
.MA DEBUGOA
bit $C061
bpl :1
>DEBUG
:1 .EQ *
.EM
2019-11-05 07:29:49 +00:00
*--------------------------------------
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LDR.START jmp LDR.START8
jmp LDR.STARTATK
jmp LDR.START8
2019-11-05 07:29:49 +00:00
*--------------------------------------
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LDR.MSG.PRODOS .AT "PRODOS FX 0.95"
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LDR.MSG.UNSUPP .AT "UNSUPPORTED HARDWARE"
LDR.MSG.IIe .AT "//e"
LDR.MSG.IIc .AT "//c"
LDR.MSG.IIgs .AT "IIgs"
LDR.MSG.Unknown .AT "Unknown"
2022-04-19 18:24:34 +00:00
LDR.MSG.CLK .AT "?Clk"
2019-11-07 14:27:24 +00:00
LDR.MSG.RAM .AT "/RAM"
LDR.MSG.PFXERR .AT "ERR setting prefix"
2019-11-05 07:29:49 +00:00
*--------------------------------------
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LDR.START16 inc LDR.BootFlag set = 2 for GQuit rts
LDR.STARTATK inc LDR.BootFlag set = 1 for appletalk rts
LDR.START8 lda ZP.UNITNUM
2019-11-01 20:06:04 +00:00
sta LDR.MLIOL.P+1
cld
2023-11-04 14:42:28 +00:00
bit IO.RROMBNK2
2023-11-04 14:42:28 +00:00
sta IO.CLR80DISP
sta IO.CLR80STORE
2020-08-30 17:50:57 +00:00
2023-11-04 14:42:28 +00:00
jsr ROM.INIT
jsr ROM.SETVID
jsr ROM.SETKBD
jsr ROM.HOME
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
lda #32
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
ldx #39
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
.1 sta $400,x
dex
bpl .1
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
ldx #LDR.MSG.PRODOS
jsr LDR.PrintX
2019-11-01 20:06:04 +00:00
sec
2023-11-04 14:42:28 +00:00
jsr ROM.IDROUTINE returns system info
2019-11-01 20:06:04 +00:00
bcs .2 taken if not a //gs
lda #$80
2023-11-04 14:42:28 +00:00
trb IO.GS.NEWVIDEO video mode select
2019-11-01 20:06:04 +00:00
2019-10-16 06:09:13 +00:00
* test for at least a 65c02
2019-11-01 20:06:04 +00:00
.2 sed
lda #$99
2019-10-16 06:09:13 +00:00
clc
2019-11-01 20:06:04 +00:00
adc #$01
2019-10-16 06:09:13 +00:00
cld
2019-11-01 20:06:04 +00:00
bmi LDR.UNSUPP.HW
2019-11-05 07:29:49 +00:00
stz auxsp
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
sta IO.SETALTZP
2019-11-05 07:29:49 +00:00
stz auxsp
lda auxsp
bne LDR.UNSUPP.HW
dec auxsp init aux sp to $FF
lda auxsp
beq LDR.UNSUPP.HW
2023-11-04 14:42:28 +00:00
sta IO.CLRALTZP
2019-11-05 07:29:49 +00:00
lda auxsp
bne LDR.UNSUPP.HW NO 128k
2019-11-08 07:35:08 +00:00
LDR.CheckROM ldx #LDR.MSG.IIE
2019-11-06 20:48:15 +00:00
lda #MACHID.T.IIe+MACHID.M.128+MACHID.COL80
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
ldy ROM.VERSION check hardware id
2019-11-07 14:27:24 +00:00
cpy #$06 apple //e?
2019-11-01 20:06:04 +00:00
beq .1 if yes
2019-11-07 14:27:24 +00:00
cpy #$EA apple //+ or ///?
2019-11-01 20:06:04 +00:00
beq LDR.UNSUPP.HW
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.UNKNOWN
2019-11-05 07:29:49 +00:00
bra m128k machine is unknown, Assume //e Enh 128k
2019-11-01 20:06:04 +00:00
2023-11-04 14:42:28 +00:00
.1 ldy ROM.ZIDBYTE //c ?
2019-11-01 20:06:04 +00:00
bne .2
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
ldy IO.KBD //c, check for keypress
2019-11-05 07:29:49 +00:00
cpy #$9B escape? (to disable accelerator)
bne .11
2023-11-04 14:42:28 +00:00
sta IO.KBDSTROBE clear keyboard
2020-12-15 13:23:22 +00:00
2019-11-05 07:29:49 +00:00
.11 lda #MACHID.T.IIc+MACHID.M.128+MACHID.COL80
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.IIC
2019-11-01 20:06:04 +00:00
bra m128k
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
.2 cpy #$EA
2019-11-01 20:06:04 +00:00
beq LDR.UNSUPP.HW //e UNenh....
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
cpy #$E0
beq .3
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.UNKNOWN
bra m128k not a //e Enh....
2019-10-16 06:09:13 +00:00
2019-11-07 14:27:24 +00:00
.3 sec
2023-11-04 14:42:28 +00:00
jsr ROM.IDROUTINE //gs ????
2019-11-05 07:29:49 +00:00
bcs m128k no.....
2020-12-15 13:23:22 +00:00
2019-11-08 07:35:08 +00:00
inc LDR.cortland
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.IIGS
2019-11-01 20:06:04 +00:00
lda #MACHID.T.IIe+MACHID.M.128+MACHID.COL80+MACHID.CLK
bra m128k
2019-11-07 14:27:24 +00:00
LDR.UNSUPP.HW ldx #LDR.MSG.UNSUPP
jsr LDR.PrintX
2020-04-23 15:36:51 +00:00
bne * no BRA !!! (6502)
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-05 07:29:49 +00:00
m128k sta idapple Save MACHID in temp location
2019-11-01 20:06:04 +00:00
2020-08-29 17:25:43 +00:00
lda #$20 "PRODOS" -> "ProDOS"
tsb LDR.MSG.PRODOS+1
tsb LDR.MSG.PRODOS+2
2021-07-28 16:50:59 +00:00
jsr LDR.Scr80Init X = LDR.MSG.machine type
2019-11-01 20:06:04 +00:00
ldx #$F
2020-12-15 13:23:22 +00:00
2019-11-01 20:06:04 +00:00
.2 lda LDR.3F0,x
sta $3F0,x
dex
bpl .2
2020-12-15 13:23:22 +00:00
2019-11-01 20:06:04 +00:00
lda #$01 patch for the gs rom
2023-11-04 14:42:28 +00:00
trb IO.GS.STATEREG to force off intcxrom
2019-10-16 06:09:13 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.GP.ID
ldy #GP
lda /GP
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-11-01 20:06:04 +00:00
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-04 07:21:40 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.XRW.ID
ldy #XRW
lda /XRW
jsr X.Unpak.XatYAX
2019-11-01 20:06:04 +00:00
ldx #0
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
.1 stz XDOS.FCBs,x
stz XDOS.VCBs,x
2019-11-01 20:06:04 +00:00
inx
bne .1
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.XDOS.ID
ldy #XDOS
lda /XDOS
jsr X.Unpak.XatYAX
2019-11-01 20:06:04 +00:00
2020-04-23 15:36:51 +00:00
ldx #XDOS.DATA.LEN
2020-12-15 13:23:22 +00:00
2019-11-04 07:21:40 +00:00
.3 stz XDOS.DATA-1,x
dex
bne .3
2023-11-04 14:42:28 +00:00
ldx #PAKME.IRQ.ID
ldy #IRQ
lda /IRQ
jsr X.Unpak.XatYAX
2019-10-16 06:09:13 +00:00
2023-11-04 14:42:28 +00:00
LDR.IRQ lda IO.RROMWRAMBNK2
2019-11-06 20:48:15 +00:00
ldy irqv interrupt vector
ldx irqv+1 x = high byte
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-06 20:48:15 +00:00
2023-11-04 14:42:28 +00:00
sta IO.SETALTZP
2019-11-06 20:48:15 +00:00
sty irqv save irq vector in aux lc
2021-06-11 17:20:35 +00:00
stx irqv+1
2019-11-06 20:48:15 +00:00
2023-11-04 14:42:28 +00:00
sta IO.CLRALTZP
2019-11-06 20:48:15 +00:00
sty irqv
2021-06-11 17:20:35 +00:00
stx irqv+1 save irq vector in main lc
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
lda #XDOS.CallDisp
sta GP.DISPATCH+1 P8 system death vector
lda /XDOS.CallDisp
sta GP.DISPATCH+2
2019-11-23 15:24:55 +00:00
.DO LOWERCASE=0
2023-11-04 14:42:28 +00:00
lda GP.KVER
2019-10-16 06:09:13 +00:00
sta xdosver save current version for dir use
2019-11-23 15:24:55 +00:00
.FIN
2019-11-04 07:21:40 +00:00
lda idapple
2023-11-04 14:42:28 +00:00
sta GP.MACHID
2019-11-04 07:21:40 +00:00
2019-11-08 07:35:08 +00:00
lda LDR.cortland
2019-11-01 20:06:04 +00:00
beq LDR.II branch if // family
2019-11-08 07:35:08 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.IIGS sta XDOS.CortFlag
2019-11-01 20:06:04 +00:00
2023-11-04 14:42:28 +00:00
lda #XDOS.CallDisp
sta XDOS.CortDisp
lda /XDOS.CallDisp
sta XDOS.CortDisp+1
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
* lda IO.RROMWRAMBNK2
2019-11-08 07:35:08 +00:00
2023-11-04 14:42:28 +00:00
* stz ROM.MODE force setvid to reset cursor
2019-11-08 07:35:08 +00:00
* jsr setvid reset output to screen
2021-06-11 17:20:35 +00:00
* jsr LDR.LCBNK1
2019-11-07 14:27:24 +00:00
lda #'C'
2023-11-04 14:42:28 +00:00
ldx #PAKME.CCLK.ID
2019-11-04 07:21:40 +00:00
jsr LDR.SetupCLK
2023-11-12 13:20:15 +00:00
.DO M.SEL
2023-11-04 14:42:28 +00:00
* ldx #PAKME.SEL2.ID
2019-11-10 18:28:06 +00:00
* ldy #$1000
* lda /$1000
2023-11-04 14:42:28 +00:00
* jsr X.Unpak.XatYAX
2019-11-01 20:06:04 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.SEL2.ID
jsr LDR.SetupSEL
2023-11-12 13:20:15 +00:00
.FIN
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
lda LDR.BootFlag
2019-11-01 20:06:04 +00:00
bne .1 branch if prodos 8 alone
2019-10-16 06:09:13 +00:00
* running from gs/os shell so zero out os_boot for appletalk
2019-11-08 16:11:49 +00:00
sta OS_BOOT indicates O/S initially booted.
2019-10-16 06:09:13 +00:00
jsr patch101 patch for gs/os - rev note #101
2019-11-08 07:35:08 +00:00
.1 bra LDR.Common
2019-11-07 14:27:24 +00:00
*--------------------------------------
2023-11-12 13:20:15 +00:00
LDR.II .DO M.SEL
ldx #PAKME.SEL1.ID
2023-11-04 14:42:28 +00:00
jsr LDR.SetupSEL
2023-11-12 13:20:15 +00:00
.FIN
2019-11-05 16:31:29 +00:00
2019-11-08 07:35:08 +00:00
jsr LDR.ClkDevScan
2019-11-07 14:27:24 +00:00
*--------------------------------------
2019-11-08 07:35:08 +00:00
LDR.Common jsr LDR.BlkDevScan
2019-11-01 20:06:04 +00:00
2023-11-04 14:42:28 +00:00
.DO M.RAM=1
2019-11-08 07:35:08 +00:00
jsr LDR.SetupRAM
2023-11-04 14:42:28 +00:00
.FIN
2019-11-07 14:27:24 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
lda LDR.MLIOL.P+1 Boot ZP.UNITNUM
sta GP.DEVNUM
2023-11-04 14:42:28 +00:00
ldx GP.DEVCNT
2023-11-04 14:42:28 +00:00
.1 lda GP.DEVLST,x
eor GP.DEVNUM
and #$f0
beq .2
dex
bpl .1
brk
2023-11-04 14:42:28 +00:00
.2 lda GP.DEVLST,x
pha
2023-11-04 14:42:28 +00:00
.3 lda GP.DEVLST+1,x
sta GP.DEVLST,x
cpx GP.DEVCNT
inx
bcc .3
pla
2023-11-04 14:42:28 +00:00
ldx GP.DEVCNT
sta GP.DEVLST,x
2019-11-04 07:21:40 +00:00
lda LDR.BootFlag get setup entry point flag
beq LDR.SetPrefix taken if normal boot.
2021-05-12 14:43:03 +00:00
2023-11-04 14:42:28 +00:00
bit IO.RROMBNK2
2019-10-16 06:09:13 +00:00
rts return to caller at setup entry point.
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.SetPrefix jsr MLI
2023-11-04 14:42:28 +00:00
.DA #MLI.ONLINE
2019-11-01 20:06:04 +00:00
.DA LDR.MLIOL.P
2019-11-04 07:21:40 +00:00
bcs .9
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
lda LDR.PBuf+1 get volume name length.
and #$0F strip SDDDxxxx
2019-11-04 07:21:40 +00:00
beq .9
2019-11-08 07:35:08 +00:00
2019-10-16 06:09:13 +00:00
inc add 1 for leading '/'
2023-11-04 14:42:28 +00:00
sta LDR.PBuf save prefix length.
2019-10-16 06:09:13 +00:00
lda #'/' place leading '/' in prefix buffer
2023-11-04 14:42:28 +00:00
sta LDR.PBuf+1
2020-12-15 13:23:22 +00:00
2019-10-16 06:09:13 +00:00
jsr MLI
2023-11-04 14:42:28 +00:00
.DA #MLI.SETPREFIX
2019-11-01 20:06:04 +00:00
.DA LDR.MLISETP.P
2019-11-04 07:21:40 +00:00
bcs .9
2023-11-04 14:42:28 +00:00
jsr ROM.CROUT
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.ILDR.ID
ldy #ILDR
lda /ILDR
jsr X.Unpak.XatYA
2023-11-04 14:42:28 +00:00
jmp ILDR
2019-10-16 06:09:13 +00:00
.9 ldx #LDR.MSG.PFXERR
2019-11-08 07:35:08 +00:00
jsr LDR.PrintX
2019-11-10 18:28:06 +00:00
bra *
2019-11-07 14:27:24 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.SetupSEL bit IO.RRAMWRAMBNK2 read/write RAM bank 2
bit IO.RRAMWRAMBNK2
2019-10-16 06:09:13 +00:00
2019-11-10 18:28:06 +00:00
ldy #$D100
2019-11-04 07:21:40 +00:00
lda /$D100
2023-11-04 14:42:28 +00:00
jsr X.Unpak.XatYAX
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #$EE byte to distinguish LC bank 2
sta $D000
2021-06-11 17:20:35 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.LCBNK1 lda IO.RRAMWRAMBNK1 switch in LC bank 1
lda IO.RRAMWRAMBNK1
2021-06-11 17:20:35 +00:00
rts
2019-11-04 07:21:40 +00:00
*--------------------------------------
DS121x.DATA1 .EQ idxl
2023-11-04 14:42:28 +00:00
DS121x.DATA2 .EQ ZP.A1L
2019-11-05 16:31:29 +00:00
*--------------------------------------
LDR.ClkDevScan jsr LDR.IsIIc
bcc LDR.ClkDevNCLK //c only
LDR.ClkDevDCLK php
sei
lda $CFFF
lda $C400
2021-07-28 16:50:59 +00:00
2021-08-05 11:35:37 +00:00
ldx #8
stz $C0C0
stz $C0C1
2021-08-05 11:35:37 +00:00
stx $C0C2
lda $C0C3
pha
2021-08-05 11:35:37 +00:00
.1 lda DS121x.SIG-1,x
2021-08-05 11:35:37 +00:00
ldy #8
2021-07-28 16:50:59 +00:00
2021-08-05 11:35:37 +00:00
.2 sta $C0C3
stz $C0C0
lsr
2021-08-05 11:35:37 +00:00
dey
bne .2
2021-08-05 11:35:37 +00:00
dex
bne .1
ldx #8
.4 ldy #8
stz $C0C0
.5 lda $C0C3
lsr
ror DS121x.DATA1-1,x
dey
bne .5
dex
bne .4
stz $C0C0
pla
sta $C0C3
2021-07-28 16:50:59 +00:00
plp
2021-08-05 11:35:37 +00:00
sed
ldx #DS121x.ValidHI-DS121x.ValidLO
2021-07-28 16:50:59 +00:00
.6 lda DS121x.DATA1-1,x
cmp DS121x.ValidLO-1,x
bcc .9
cmp DS121x.ValidHI-1,x
bcc .7
2021-07-28 16:50:59 +00:00
bne .9
.7 dex
bne .6
2021-07-28 16:50:59 +00:00
cld
lda #'D'
2023-11-04 14:42:28 +00:00
ldx #PAKME.DCLK.ID
jmp LDR.SetupCLK
2022-04-19 18:24:34 +00:00
.9 cld
*--------------------------------------
2023-11-04 14:42:28 +00:00
NSC.IOBASE .EQ $C300
*--------------------------------------
LDR.ClkDevNCLK php
2021-06-22 18:59:02 +00:00
sei
2021-07-25 14:03:41 +00:00
2023-11-04 14:42:28 +00:00
lda IO.RDCXROM
2021-05-30 20:34:03 +00:00
php
2021-07-25 14:03:41 +00:00
2023-11-04 14:42:28 +00:00
sta IO.SETCXROM
2021-05-30 20:34:03 +00:00
sta NSC.IOBASE
* lda $C00B Workaround for Ultrawarp bug
2019-11-05 16:31:29 +00:00
2021-05-30 20:34:03 +00:00
ldx #8
2019-11-05 16:31:29 +00:00
.1 ldy #8
.2 lda NSC.IOBASE+4
2019-11-05 16:31:29 +00:00
lsr
ror DS121x.DATA1-1,x
2019-11-05 16:31:29 +00:00
dey
bne .2
dex
2021-05-30 20:34:03 +00:00
bne .1
2021-06-22 18:59:02 +00:00
*--------------------------------------
sta NSC.IOBASE
2021-07-24 20:42:23 +00:00
* lda $C00B Workaround for Ultrawarp bug
2021-06-11 17:20:35 +00:00
lda NSC.IOBASE+4 Reset DS1216E comparison register with READ A2=1
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
ldy #8 Read 8 bytes...
2020-04-08 06:13:31 +00:00
.3 lda DS121x.SIG-1,y
2021-06-22 18:59:02 +00:00
phy
2021-07-25 14:03:41 +00:00
2021-06-22 18:59:02 +00:00
ldy #8 ....of 8 bits
2021-07-25 14:03:41 +00:00
2021-06-22 18:59:02 +00:00
.4 ldx #0
lsr
bcc .5
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
inx
2021-05-30 20:34:03 +00:00
.5 bit NSC.IOBASE,x Write Pattern bit in A0, with A2=0
2021-05-30 20:34:03 +00:00
2021-06-22 18:59:02 +00:00
dey
2019-11-05 16:31:29 +00:00
bne .4
2021-06-22 18:59:02 +00:00
ply
dey
2021-05-30 20:34:03 +00:00
bne .3
2021-06-22 18:59:02 +00:00
*--------------------------------------
2021-05-30 20:34:03 +00:00
ldx #8
2019-11-05 16:31:29 +00:00
.6 ldy #8
.7 lda NSC.IOBASE+4
2019-11-05 16:31:29 +00:00
lsr
ror DS121x.DATA2-1,x
2019-11-05 16:31:29 +00:00
dey
bne .7
dex
2021-05-30 20:34:03 +00:00
bne .6
2019-11-05 16:31:29 +00:00
2021-05-30 20:34:03 +00:00
plp
2021-06-03 17:43:28 +00:00
bmi .8
2021-07-25 14:03:41 +00:00
2023-11-04 14:42:28 +00:00
sta IO.CLRCXROM
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
.8 plp
*--------------------------------------
2021-06-22 18:59:02 +00:00
ldx #8
2020-12-15 13:23:22 +00:00
.9 lda DS121x.DATA1-1,x
cmp DS121x.DATA2-1,x
2020-01-06 07:03:37 +00:00
bne .90
2019-11-05 16:31:29 +00:00
dex
2021-05-30 20:34:03 +00:00
bne .9
2020-12-15 13:23:22 +00:00
2020-01-06 07:03:37 +00:00
bra LDR.ClkDevTCLK
2019-11-05 16:31:29 +00:00
2020-01-06 07:03:37 +00:00
.90 lda #'N'
2023-11-04 14:42:28 +00:00
ldx #PAKME.NCLK.ID
2019-11-08 07:35:08 +00:00
bra LDR.SetupCLK
*--------------------------------------
LDR.ClkDevTCLK jsr LDR.IsIIc
2022-04-19 18:24:34 +00:00
bcs LDR.ClkDevXCLK
stz idxl
2019-11-05 16:31:29 +00:00
lda #$C1
sta idxl+1
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
lda #1
sta LDR.SlotIdx
2020-12-15 13:23:22 +00:00
2021-05-12 14:43:03 +00:00
.1 jsr LDR.CheckTClkID
bcs .7
2021-04-15 14:03:04 +00:00
2020-12-15 13:23:22 +00:00
stz $478,x
stz $7f8,x
lda idxl+1
asl
asl
asl
asl
tax
stz $c080,x
lda $c088,x
lda $c080,x
2019-11-05 16:31:29 +00:00
2019-11-07 14:27:24 +00:00
lda #'T'
2023-11-04 14:42:28 +00:00
ldx #PAKME.TCLK.ID
2019-11-05 16:31:29 +00:00
jsr LDR.SetupCLK
2020-12-15 13:23:22 +00:00
2019-11-05 16:31:29 +00:00
lda idxl+1
sta TCLK.Cx1+2
2020-12-15 13:23:22 +00:00
sta TCLK.Cx2+2
2019-11-05 16:31:29 +00:00
rts
2021-05-12 14:43:03 +00:00
.7 inc LDR.SlotIdx
inc idxl+1
2019-11-05 16:31:29 +00:00
lda idxl+1
cmp #$C8
bne .1
2022-04-19 18:24:34 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.ClkDevXCLK bit IO.RROMBNK2
2022-04-19 18:24:34 +00:00
sta $C070
bit $FACA
bit $FACA
bit $FAFE
lda $DFFE
cmp #$4A
bne .9
lda $DFFF
cmp #$CD
beq .1
2021-05-12 14:43:03 +00:00
.9 bit $F851
rts
2022-04-19 18:24:34 +00:00
.1 bit $F851
lda #'X'
2023-11-04 14:42:28 +00:00
ldx #PAKME.XCLK.ID
2019-11-04 07:21:40 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.SetupCLK sta LDR.MSG.CLK
2020-08-29 17:25:43 +00:00
2023-11-04 14:42:28 +00:00
phx
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.CLK
jsr LDR.PrintX
2020-12-15 13:23:22 +00:00
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2023-11-04 14:42:28 +00:00
plx
2020-12-15 13:23:22 +00:00
2023-11-04 14:42:28 +00:00
ldy #CLK
lda /CLK
jsr X.Unpak.XatYAX
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #$4C enable clock routine by putting a jmp
2023-11-04 14:42:28 +00:00
sta GP.CLOCK in front of clock vector
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #MACHID.CLK
2023-11-04 14:42:28 +00:00
tsb GP.MACHID
2019-11-07 14:27:24 +00:00
LDR.SetupCLK.RTS
2019-11-04 07:21:40 +00:00
rts
*--------------------------------------
2023-11-04 14:42:28 +00:00
.DO M.RAM=1
LDR.SetupRAM lda GP.DEVCNT
2019-11-08 16:11:49 +00:00
cmp #13
bcs LDR.SetupCLK.RTS
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-08 07:35:08 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.RAM.ID
ldy #RAM
lda /RAM
jsr X.Unpak.XatYAX
2019-11-08 07:35:08 +00:00
lda RAMX.PAK
bne .1
2023-11-04 14:42:28 +00:00
sta IO.SETWRITEAUX
2019-11-08 07:35:08 +00:00
2023-11-04 14:42:28 +00:00
ldx #PAKME.RAMX.ID
ldy #RAMX
lda /RAMX
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
bra .7
2023-11-04 14:42:28 +00:00
.1 ldx #PAKME.RAMX.ID
ldy #$0800
lda /$0800
jsr X.Unpak.XatYA
2023-11-04 14:42:28 +00:00
sta IO.SETWRITEAUX
2019-10-31 06:54:28 +00:00
ldx #$FE
.2 lda $900,x
2023-11-04 14:42:28 +00:00
sta RAMX+$100,x
dex
txa
bne .2
.3 lda $800,x
2023-11-04 14:42:28 +00:00
sta RAMX,x
inx
bne .3
2023-11-04 14:42:28 +00:00
.7 sta IO.CLRWRITEAUX
2019-11-04 07:21:40 +00:00
2023-11-04 14:42:28 +00:00
lda #RAM put driver address into
sta GP.DEVPTRS3D2
lda /RAM
sta GP.DEVPTRS3D2+1
2019-11-08 07:35:08 +00:00
2023-11-04 14:42:28 +00:00
inc GP.DEVCNT count (-1) active devices
ldx GP.DEVCNT
2019-11-08 07:35:08 +00:00
lda #$BF unit num of /RAM
2023-11-04 14:42:28 +00:00
sta GP.DEVLST,x
2020-12-15 13:23:22 +00:00
2019-11-08 07:35:08 +00:00
ldx #LDR.MSG.RAM
jmp LDR.PrintX
2023-11-04 14:42:28 +00:00
.FIN
2019-11-08 07:35:08 +00:00
*--------------------------------------
* find all disk devices in system slots and set up address
2020-12-15 13:23:22 +00:00
* and device table in prodos global page.
2019-11-08 07:35:08 +00:00
*--------------------------------------
2023-11-04 14:42:28 +00:00
LDR.BlkDevScan bit IO.RROMBNK2 write protect lc ram.
stz idxl
2019-10-31 06:54:28 +00:00
lda #$C7 search slots from high to low
sta idxl+1
2019-11-04 07:21:40 +00:00
2019-11-08 16:11:49 +00:00
lda #7
sta LDR.SlotIdx
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
.1 ldx LDR.SlotIdx
stz LDR.SlotDevType-1,x
2020-12-15 13:23:22 +00:00
2019-11-09 12:19:41 +00:00
jsr LDR.CheckDiskID
bcs .4 if no ProDOS device in this slot.
2019-11-08 07:35:08 +00:00
ldy #$ff
2019-10-31 06:54:28 +00:00
lda (idxl),y check last byte of $Cn rom (y = $ff)
2019-11-08 07:35:08 +00:00
bne .2 branch if 16 sector disk II.
sta devid =0 since disk ii's have null attributes
2023-11-04 14:42:28 +00:00
lda #XRW
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2023-11-04 14:42:28 +00:00
lda /XRW
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
2019-11-08 07:35:08 +00:00
sec 2 devices
2019-11-08 16:11:49 +00:00
jsr LDR.AddBlkDevs
bra .4
2019-11-08 07:35:08 +00:00
.2 cmp #$FF if = $FF then 13 sector disk II.
beq .4 ignore if 13 sector boot ROM
2019-11-08 07:35:08 +00:00
2019-10-31 06:54:28 +00:00
ldy #$07 check for a smartport device.
lda (idxl),y
2019-11-08 16:11:49 +00:00
bne .3 no smartport
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
jsr LDR.AddSPDevs
bra .4
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
.3 ldy #$FE BLK device...
2019-10-31 06:54:28 +00:00
lda (idxl),y get attributes.
and #$03 verify it provides read and status calls.
cmp #$03
bne .4 assume it's an off-brand disk
2020-12-15 13:23:22 +00:00
jsr LDR.SetDevID
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
and #$3 Device count minus 1
inc
ldx LDR.SlotIdx
2019-11-09 12:19:41 +00:00
sta LDR.SlotDevCnt-1,x
dec LDR.SlotDevType-1,x set as BlockDeb
2019-11-08 16:11:49 +00:00
tax
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
iny $CnFF
lda (idxl),y
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2019-11-08 16:11:49 +00:00
lda idxl+1 store hi entry addr (low already done)
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
cpx #2 CS if 2 devs or more
jsr LDR.AddBlkDevs install 1 or 2 devices from this slot.
2019-11-04 07:21:40 +00:00
.4 dec idxl+1 next lower slot.
2019-11-08 16:11:49 +00:00
dec LDR.SlotIdx have all slots been checked ?
2019-11-08 07:35:08 +00:00
bne .1
2019-11-08 16:11:49 +00:00
*--------------------------------------
2020-01-13 11:05:11 +00:00
* stz idxl
2019-11-09 12:19:41 +00:00
lda #$C7
sta idxl+1
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
lda #7
sta LDR.SlotIdx
2019-10-31 06:54:28 +00:00
.5 ldx LDR.SlotIdx
2020-01-29 12:33:33 +00:00
lda LDR.SlotDevType-1,x
beq .8
2020-01-28 16:42:51 +00:00
2019-11-09 12:19:41 +00:00
lda LDR.SlotDevCnt-1,x
2019-11-08 16:11:49 +00:00
cmp #3
bcc .8
2019-10-31 06:54:28 +00:00
bit LDR.SlotDevType-1,x
bpl .6 type = smartport
jsr LDR.AddExtraBLKDevs
bra .8
.6 jsr LDR.AddExtraSPDevs
2019-11-04 07:21:40 +00:00
2020-04-13 17:04:02 +00:00
.8 dec idxl+1
dec LDR.SlotIdx
bne .5
2020-04-13 17:04:02 +00:00
2019-11-09 12:19:41 +00:00
LDR.AddExtraDevs.RTS
2019-10-31 06:54:28 +00:00
rts
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddSPDevs jsr LDR.SetDevID setup the devid byte from attributes
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
iny #$ff
lda (idxl),y
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2019-11-09 12:19:41 +00:00
sta .1+1 modify operand
2019-10-31 06:54:28 +00:00
clc
adc #$03
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+1
2019-11-08 16:11:49 +00:00
lda idxl+1
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
sta LDR.SPVect+2
2019-11-09 12:19:41 +00:00
sta .1+2 modify operand
2019-11-08 16:11:49 +00:00
2019-11-01 20:06:04 +00:00
asl convert $Cn to $n0
2019-10-31 06:54:28 +00:00
asl
asl
asl
2023-11-04 14:42:28 +00:00
sta ZP.UNITNUM
2019-11-08 16:11:49 +00:00
2023-11-04 14:42:28 +00:00
stz ZP.CMDNUM force a prodos status call
2019-11-08 16:11:49 +00:00
2023-11-04 14:42:28 +00:00
stz ZP.BUFPTR dummy pointer
2019-10-31 06:54:28 +00:00
lda #$10
2023-11-04 14:42:28 +00:00
sta ZP.BUFPTR+1 dummy pointer should be <> 0
2019-10-31 06:54:28 +00:00
2023-11-04 14:42:28 +00:00
stz ZP.BLKNUM # of bytes to transfer
stz ZP.BLKNUM+1
2019-11-08 16:11:49 +00:00
2019-11-09 12:19:41 +00:00
.1 jsr $0000 SELF MODIFIED
2020-12-15 13:23:22 +00:00
ldy #$FB
2020-04-13 17:04:02 +00:00
lda (idxl),y check device id
and #$02 SCSI ?
beq .2 no, no need to init Cocoon
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
jsr LDR.SPStatusCall status of Cocoon : A = device = 2 for SCSI
2019-10-31 06:54:28 +00:00
lda #0 set unit# = 0
.2 jsr LDR.SPStatusCall
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf Device count
2019-11-09 12:19:41 +00:00
beq LDR.AddExtraDevs.RTS no devices, so done.
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
sta LDR.DevCnt
2019-11-08 16:11:49 +00:00
ldx LDR.SlotIdx
2019-11-09 12:19:41 +00:00
inc LDR.SlotDevType-1,x set as smartport
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
.3 inc LDR.SPStatus.U
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
jsr LDR.SPStatusCall.U call to get the device status
bcs .7
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
lda LDR.SPStatusBuf
bpl .7 not a block device
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
ldx LDR.SlotIdx
inc LDR.SlotDevCnt-1,x
2019-11-08 16:11:49 +00:00
2022-01-30 21:47:08 +00:00
.7 dec LDR.DevCnt
bne .3
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
ldx LDR.SlotIdx
lda LDR.SlotDevCnt-1,x
beq LDR.AddBlkDevs.RTS
2019-11-09 12:19:41 +00:00
2020-01-29 12:33:33 +00:00
sta LDR.SlotDevCnt-1,x
2019-11-09 12:19:41 +00:00
cmp #2 CC/CS, add 1 or 2 devs
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddBlkDevs php how many drives (carry).
lda idxl+1 get index to global device table
and #$07 for this slot...
asl
tay into y reg.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
asl
asl now form device # = slot #
asl in high nibble.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
ora devid combine with attributes.
2023-11-04 14:42:28 +00:00
ldx GP.DEVCNT
2019-11-08 16:11:49 +00:00
inx put device # into device list.
2023-11-04 14:42:28 +00:00
sta GP.DEVLST,x
2019-11-08 16:11:49 +00:00
asl now form drive 2 device number, if any.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
plp restore # of devices in carry.
ror if 2 drives, then bit 7=1.
bpl .1 branch if a 1 drive device (e.g. hard drive)
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
inx else presume that 2nd drive is present.
2023-11-04 14:42:28 +00:00
sta GP.DEVLST,x active device list.
2019-11-08 16:11:49 +00:00
2023-11-04 14:42:28 +00:00
.1 stx GP.DEVCNT save updated device count.
2019-11-08 16:11:49 +00:00
asl shift # of drives back into carry.
2020-04-13 17:04:02 +00:00
lda LDR.driveradr get high address of device driver.
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS,y device driver table 1.
2019-11-08 16:11:49 +00:00
bcc .2 branch if single drive.
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS+16,y device driver table 2.
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
.2 lda LDR.driveradr+1
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS+1,y
2019-11-08 16:11:49 +00:00
bcc .3
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS+17,y
2019-11-08 16:11:49 +00:00
2019-11-09 12:19:41 +00:00
.3
2020-12-15 13:23:22 +00:00
LDR.AddBlkDevs.RTS
2019-11-09 12:19:41 +00:00
rts
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.AddExtraBLKDevs
dec
dec
sta LDR.DevCnt
jsr LDR.SetDevID set up device attributes
jsr LDR.FindFreeDevPtr
bcs .9
.1 cpy #$10
bcc .2 must be Drive 1
.10 jsr LDR.FindFreeDevPtrNext
bcc .1
rts
.2 lda LDR.DevCnt
dec
beq .4 only one to add
tya
ora #$10
tay
2023-11-04 14:42:28 +00:00
lda GP.DEVPTRS,y device driver table 1
cmp #XDOS.NoDevice
bne .10
2023-11-04 14:42:28 +00:00
lda GP.DEVPTRS+1,y
cmp /XDOS.NoDevice
bne .10 Drive 1 & 2 free
2023-11-04 14:42:28 +00:00
jsr LDR.AddY2DEVLST Y = index in GP.DEVPTRS
jsr .8
tya
and #$F
tay
2023-11-04 14:42:28 +00:00
.4 jsr LDR.AddY2DEVLST Y = index in GP.DEVPTRS
.8 phy
ldy #$ff
lda (idxl),y BLK entry point
ply
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS,y
lda idxl+1
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS+1,y
* clc
.9 rts
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddExtraSPDevs
jsr LDR.SetDevID set up device attributes
iny ldy #$fe from SetDevID
* ldy #$FF
2019-10-31 06:54:28 +00:00
lda (idxl),y
clc
adc #$03 add 3 for smartport call
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+1
2019-10-31 06:54:28 +00:00
lda idxl+1
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+2
2019-10-31 06:54:28 +00:00
2020-04-13 17:04:02 +00:00
lda #0
jsr LDR.SPStatusCall do a status call on smartport itself
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf # of devices on smartport
2019-11-09 12:19:41 +00:00
2019-10-31 06:54:28 +00:00
cmp #$03
2019-11-08 16:11:49 +00:00
bcc .8 only 2 devices,skip to next one.
2019-10-31 06:54:28 +00:00
2019-11-09 12:19:41 +00:00
dec
dec
sta LDR.DevCnt
2019-10-31 06:54:28 +00:00
2019-11-09 12:19:41 +00:00
lda #3
sta LDR.SPStatus.U
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
.1 jsr LDR.SPStatusCall.U do status call
2019-10-31 06:54:28 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf is this a block device?
2020-01-29 12:33:33 +00:00
bpl .2
2019-10-31 06:54:28 +00:00
jsr LDR.FindFreeDevPtr
2019-11-09 12:19:41 +00:00
bcs .8
2020-12-15 13:23:22 +00:00
jsr LDR.LCBNK1
2019-11-09 12:19:41 +00:00
tya divide index by 2
2019-10-31 06:54:28 +00:00
lsr
tax
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
lda LDR.SPStatus.U
2020-04-13 17:04:02 +00:00
sta XDOS.SPUnit-1,x store the smartport unit #
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPVect+1 and entry address.
sta XDOS.SPVectLo-1,x
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPVect+2
sta XDOS.SPVectHi-1,x
2019-11-08 16:11:49 +00:00
2023-11-04 14:42:28 +00:00
bit IO.RROMBNK2 write protect lc ram.
2019-11-08 16:11:49 +00:00
jsr LDR.AddY2DEVLST
2019-11-08 16:11:49 +00:00
2019-11-09 12:19:41 +00:00
lda #XDOS.SPREMAP
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS,y
2019-11-09 12:19:41 +00:00
lda /XDOS.SPREMAP
2023-11-04 14:42:28 +00:00
sta GP.DEVPTRS+1,y
.2 inc LDR.SPStatus.U
dec LDR.DevCnt
bne .1
.8 rts
2019-11-08 16:11:49 +00:00
*--------------------------------------
2020-04-13 17:04:02 +00:00
LDR.SPStatusCall
2022-01-30 21:47:08 +00:00
sta LDR.SPStatus.U
2020-12-15 13:23:22 +00:00
LDR.SPStatusCall.U
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LDR.SPVect jsr $0000 self modifying
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.HS 00
.DA LDR.SPStatus.P
rts
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*--------------------------------------
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LDR.CheckTClkID ldy #6
.HS 2C BIT ABS
LDR.CheckDiskID ldy #5
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lda IO.CLRC8ROM switch out $C8 ROMs
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.1 lda (idxl),y compare id bytes
cmp dskid,y
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bne .3
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dey
dey
bpl .1 loop until all 4 id bytes match.
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clc
php
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.8 ldx LDR.SlotIdx
lda sltbit-1,x
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tsb GP.SLTBYT mark bit to flag rom present
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.9 plp
rts
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.3 sec
php
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ldx #0
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.4 cmp (idxl),y
bne .9
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inx
bne .4
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bra .8
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*--------------------------------------
LDR.FindFreeDevPtr
ldx #LDR.DEVPTRS.CNT-1
LDR.FindFreeDevPtrNext
.1 ldy LDR.DEVPTRS.IDX,x
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lda GP.DEVPTRS,y device driver table 1
cmp #XDOS.NoDevice
bne .2
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lda GP.DEVPTRS+1,y
cmp /XDOS.NoDevice
beq .8
.2 dex
bpl .1
sec
rts
.8 clc
rts
*--------------------------------------
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LDR.SetDevID ldy #$FE check attributes byte.
lda (idxl),y
lsr move hi nibble to lo nibble for
lsr device table entries.
lsr
lsr
sta devid
rts
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*--------------------------------------
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LDR.AddY2DEVLST inc GP.DEVCNT
ldx GP.DEVCNT
tya
asl convert to DSSS0000
asl
asl
ora devid include device attributes
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sta GP.DEVLST,x in the active device list.
rts
*--------------------------------------
LDR.Scr80Init phx Save LDR.MSG
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jsr LDR.IsIIc
bcs LDR.Scr80Init2
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php
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sei
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sta IO.SETC3ROM
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ldx #COL80IDX.Cnt-1
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.1 ldy COL80IDX,x
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lda $C300,y
cmp COL80VAL,x
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bne .2
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dex
bpl .1
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lda $C30C is it an apple 80 col compatible card?
and #$F0
cmp #$80
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beq .3
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.2 sta IO.CLRC3ROM
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.3 plp
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*--------------------------------------
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LDR.Scr80Init2 lda #$8C Reset 80 col screen ($0C:HOME)
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jsr $C300
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jsr ROM.SETNORM
jsr ROM.HOME
jsr ROM.SETINV
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.DO LOGO=1
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lda #20
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sta ZP.CV
inc
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sta ZP.WNDTOP
jsr ROM.TABV
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lda #LOGO.PAKED
sta ZPInBufPtr
lda /LOGO.PAKED
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sta ZPInBufPtr+1
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stz ZPOutBufPtr
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lda #$A0
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sta ZPOutBufPtr+1
jsr X.Unpak
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sta IO.CLRHIRES
sta IO.SETMIXED
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bit IO.RDIOUDIS
sta IO.SETIOUDIS
sta IO.SETDHIRES
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bmi .10
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sta IO.CLRIOUDIS
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.10 sta IO.CLRTEXT
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stz ZPPtr1
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lda #$A0
sta ZPPtr1+1
lda #0
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.1 pha
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jsr ROM.GBSCALC
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ldy #0
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.2 lda (ZPPtr1),y
pha
and #$f
tax
lda PALETTE.AUX,x
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sta IO.SETPAGE2
sta (ZP.GBASL),y
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pla
lsr
lsr
lsr
lsr
tax
lda PALETTE.MAIN,x
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sta IO.CLRPAGE2
sta (ZP.GBASL),y
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iny
cpy #40
bne .2
lda ZPPtr1
clc
adc #40
sta ZPPtr1
bcc .3
inc ZPPtr1+1
.3 ldy #0
.4 lda (ZPPtr1),y
pha
and #$f
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tax
lda PALETTE.AUX,x
asl
asl
asl
asl
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sta IO.SETPAGE2
ora (ZP.GBASL),y
sta (ZP.GBASL),y
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pla
lsr
lsr
lsr
lsr
tax
lda PALETTE.MAIN,x
asl
asl
asl
asl
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sta IO.CLRPAGE2
ora (ZP.GBASL),y
sta (ZP.GBASL),y
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iny
cpy #40
bne .4
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lda ZPPtr1
clc
adc #40
sta ZPPtr1
bcc .7
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inc ZPPtr1+1
.7 pla
inc
cmp #20
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bne .1
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.FIN
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jsr ROM.CLREOL
jsr ROM.SETNORM
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ldx #LDR.MSG.PRODOS
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jsr LDR.PrintX
plx get back LDR.MSG.machine type
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*--------------------------------------
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LDR.PrintX bit IO.RROMBNK2
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lda ZP.INVFLG
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pha
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jsr ROM.SETINV
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.1 lda $2000,x
pha
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ora #$80
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jsr ROM.COUT
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inx
pla
bpl .1
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lda #$A0
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jsr ROM.COUT
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pla
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sta ZP.INVFLG
sta IO.CLRPAGE2 for screen holes proper access
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rts
*--------------------------------------
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LDR.IsIIc lda GP.MACHID
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and #MACHID.T
cmp #MACHID.T.IIc
beq .9
clc
.9 rts
*--------------------------------------
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PALETTE.MAIN .HS 00.02.04.06.08.0A.0C.0E
.HS 01.03.05.07.09.0B.0D.0F
PALETTE.AUX .HS 00.01.02.03.04.05.06.07
.HS 08.09.0A.0B.0C.0D.0E.0F
*--------------------------------------
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* 16 bytes moved to $03F0 vectors
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*--------------------------------------
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LDR.3F0 .DA ROM.BREAKV
.DA ROM.OLDRST
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.DA #$5A powerup byte
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jmp ROM.OLDRST '&' vector
jmp ROM.OLDRST ctrl-y vector
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.HS 004000
.DA GP.IRQV global page interrupt vector
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*--------------------------------------
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* patch to gsos vectors so error is returned for os calls - rev note #101
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*--------------------------------------
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patch101 php
sei disable interrupts
clc
xce full native mode
>LONGMX
phb save DBR
pha
pha
pea $0000 length of patch
pea $0010 0000/0010 = 16 bytes
pea $3101 user id for prodos 8
pea $8018 attributes (locked/nospec/nocross)
pha
pha
>IIGS NewHandle
lda $01,s retrieve handle
tax
lda $03,s
tay
pea $0000 copy the code into the handle
pea L2C4D
phy
phx
pea $0000 length of patch = 0000/0010
pea $0010
>IIGS PtrToHand
plx low word of handle
plb set DBR to handle's bank
lda >1,x get upper 16 bits of 24 bit address
tay save in y
lda >0,x get low 8 bits of address
and ##$00FF clear high byte
xba put address in high byte
ora ##$005C include JML opcode
sta GSOS2 store in gsos vectors
clc
adc ##$000B
sta GSOS
tya store upper 16 bits too
sta GSOS2+2
adc ##$0000 adj for possible page crossing
sta GSOS+2
plb remove garbage byte from stack
plb restore DBR.
sec
xce back to emulation mode
plp
rts
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*--------------------------------------
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* copy of the code that goes in the handle
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*--------------------------------------
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L2C4D lda 1,s
sta 7,s
lda 2,s
sta 8,s
pla
pla
pla
lda ##$00FF #NoOS
sec
rtl
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*--------------------------------------
DS121x.SIG .HS 5CA33AC55CA33AC5 Reverted 7->0
DS121x.ValidLO .HS 00010101 Y,M,D,DoW
DS121x.ValidHI .HS 990C1F07
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*--------------------------------------
* id bytes: evens for clock, odds for disk
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dskid .HS 08.20.28.00.58.03.70
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sltbit .HS 02040810204080
*--------------------------------------
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COL80IDX .HS 05070BFA + $C30C and $80 = $80
COL80IDX.Cnt .EQ *-COL80IDX
COL80VAL .HS 3818012C
*--------------------------------------
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LDR.MLIOL.P .DA #2
.DA #$60
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.DA LDR.PBuf+1
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LDR.MLISETP.P .DA #1
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.DA LDR.PBuf
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LDR.SPStatus.P .DA #$03 # of parms
LDR.SPStatus.U .DA #$00 unit number (code for smartport stat)
.DA LDR.SPStatusBuf
.DA #00 status code (0 = general status)
LDR.DEVPTRS.CNT .EQ 14
LDR.DEVPTRS.IDX .DA #$16 S3D2 /RAM
.DA #$06 S3D1
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.DA #$12 S1D2
.DA #$02 S1D1
.DA #$14 S2D2
.DA #$04 S2D1
.DA #$18 S4D2
.DA #$08 S4D1
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.DA #$1A S5D2
.DA #$0A S5D1
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.DA #$1C S6D2
.DA #$0C S6D1
.DA #$1E S7D2
.DA #$0E S7D1
2020-04-13 17:04:02 +00:00
*--------------------------------------
LDR.cortland .DA #0 cortland loader flag (1 = Cortland)
LDR.BootFlag .DA #0 0 = normal boot, <>0 = return
*--------------------------------------
LDR.SPStatusBuf .BS 8 8 bytes for smartport call
LDR.driveradr .BS 2
LDR.SlotIdx .BS 1
LDR.DevCnt .BS 1
LDR.SlotDevType .BS 7
LDR.SlotDevCnt .BS 7
*--------------------------------------
2019-10-16 06:09:13 +00:00
MAN
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SAVE usr/src/prodos.fx/prodos.s.ldr
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LOAD usr/src/prodos.fx/pdos8m.s
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ASM