A2osX/ProDOS.FX/ProDOS.S.LDR.txt

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2019-10-16 06:09:13 +00:00
NEW
AUTO 3,1
2019-11-05 07:29:49 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
.MA DEBUG
:1 bit $C000
bpl :1
sta $C010
.EM
2020-01-13 11:05:11 +00:00
*--------------------------------------
.MA DEBUGOA
bit $C061
bpl :1
>DEBUG
:1 .EQ *
.EM
2019-11-05 07:29:49 +00:00
*--------------------------------------
2019-10-16 06:09:13 +00:00
H2000 jmp prostart
2019-11-01 20:06:04 +00:00
jmp atalkset
jmp p16start
2019-11-05 07:29:49 +00:00
*--------------------------------------
2020-08-29 17:25:43 +00:00
LDR.MSG.PRODOS .AT "PRODOS FX 0.94"
2019-11-07 14:27:24 +00:00
LDR.MSG.UNSUPP .AT "UNSUPPORTED HARDWARE"
LDR.MSG.IIe .AT "//e"
LDR.MSG.IIc .AT "//c"
LDR.MSG.IIgs .AT "IIgs"
LDR.MSG.Unknown .AT "Unknown"
2022-04-19 18:24:34 +00:00
LDR.MSG.CLK .AT "?Clk"
2019-11-07 14:27:24 +00:00
LDR.MSG.RAM .AT "/RAM"
LDR.MSG.PFXERR .AT "ERR setting prefix"
2019-11-05 07:29:49 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
p16start inc LDR.BootFlag set = 2 for GQuit rts
atalkset inc LDR.BootFlag set = 1 for appletalk rts
2019-10-16 06:09:13 +00:00
prostart lda unitnum
2019-11-01 20:06:04 +00:00
sta LDR.MLIOL.P+1
cld
bit RROMBNK2
2019-11-01 20:06:04 +00:00
sta CLR80DISP
sta CLR80STORE
2020-08-30 17:50:57 +00:00
2019-11-01 20:06:04 +00:00
jsr init
jsr setvid
jsr setkbd
2020-08-30 17:50:57 +00:00
jsr home
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
lda #32
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
ldx #39
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
.1 sta $400,x
dex
bpl .1
2020-12-15 13:23:22 +00:00
2020-08-30 17:50:57 +00:00
ldx #LDR.MSG.PRODOS
jsr LDR.PrintX
2019-11-01 20:06:04 +00:00
sec
jsr idroutine returns system info
bcs .2 taken if not a //gs
lda #$80
trb newvideo video mode select
2019-10-16 06:09:13 +00:00
* test for at least a 65c02
2019-11-01 20:06:04 +00:00
.2 sed
lda #$99
2019-10-16 06:09:13 +00:00
clc
2019-11-01 20:06:04 +00:00
adc #$01
2019-10-16 06:09:13 +00:00
cld
2019-11-01 20:06:04 +00:00
bmi LDR.UNSUPP.HW
2019-11-05 07:29:49 +00:00
stz auxsp
2020-12-15 13:23:22 +00:00
2019-11-05 07:29:49 +00:00
sta SETALTZP
stz auxsp
lda auxsp
bne LDR.UNSUPP.HW
dec auxsp init aux sp to $FF
lda auxsp
beq LDR.UNSUPP.HW
sta CLRALTZP
lda auxsp
bne LDR.UNSUPP.HW NO 128k
2019-11-08 07:35:08 +00:00
LDR.CheckROM ldx #LDR.MSG.IIE
2019-11-06 20:48:15 +00:00
lda #MACHID.T.IIe+MACHID.M.128+MACHID.COL80
2020-12-15 13:23:22 +00:00
2020-08-29 17:25:43 +00:00
ldy version check hardware id
2019-11-07 14:27:24 +00:00
cpy #$06 apple //e?
2019-11-01 20:06:04 +00:00
beq .1 if yes
2019-11-07 14:27:24 +00:00
cpy #$EA apple //+ or ///?
2019-11-01 20:06:04 +00:00
beq LDR.UNSUPP.HW
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.UNKNOWN
2019-11-05 07:29:49 +00:00
bra m128k machine is unknown, Assume //e Enh 128k
2019-11-01 20:06:04 +00:00
2020-08-29 17:25:43 +00:00
.1 ldy zidbyte //c ?
2019-11-01 20:06:04 +00:00
bne .2
2020-12-15 13:23:22 +00:00
2019-11-05 07:29:49 +00:00
ldy kbd //c, check for keypress
cpy #$9B escape? (to disable accelerator)
bne .11
sta KBDSTROBE clear keyboard
2020-12-15 13:23:22 +00:00
2019-11-05 07:29:49 +00:00
.11 lda #MACHID.T.IIc+MACHID.M.128+MACHID.COL80
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.IIC
2019-11-01 20:06:04 +00:00
bra m128k
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
.2 cpy #$EA
2019-11-01 20:06:04 +00:00
beq LDR.UNSUPP.HW //e UNenh....
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
cpy #$E0
beq .3
2020-12-15 13:23:22 +00:00
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.UNKNOWN
bra m128k not a //e Enh....
2019-10-16 06:09:13 +00:00
2019-11-07 14:27:24 +00:00
.3 sec
2020-08-29 17:25:43 +00:00
jsr idroutine //gs ????
2019-11-05 07:29:49 +00:00
bcs m128k no.....
2020-12-15 13:23:22 +00:00
2019-11-08 07:35:08 +00:00
inc LDR.cortland
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.IIGS
2019-11-01 20:06:04 +00:00
lda #MACHID.T.IIe+MACHID.M.128+MACHID.COL80+MACHID.CLK
bra m128k
2019-11-07 14:27:24 +00:00
LDR.UNSUPP.HW ldx #LDR.MSG.UNSUPP
jsr LDR.PrintX
2020-04-23 15:36:51 +00:00
bne * no BRA !!! (6502)
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-05 07:29:49 +00:00
m128k sta idapple Save MACHID in temp location
2019-11-01 20:06:04 +00:00
2020-08-29 17:25:43 +00:00
lda #$20 "PRODOS" -> "ProDOS"
tsb LDR.MSG.PRODOS+1
tsb LDR.MSG.PRODOS+2
2021-07-28 16:50:59 +00:00
jsr LDR.Scr80Init X = LDR.MSG.machine type
2019-11-01 20:06:04 +00:00
ldx #$F
2020-12-15 13:23:22 +00:00
2019-11-01 20:06:04 +00:00
.2 lda LDR.3F0,x
sta $3F0,x
dex
bpl .2
2020-12-15 13:23:22 +00:00
2019-11-01 20:06:04 +00:00
lda #$01 patch for the gs rom
trb statereg to force off intcxrom
2019-10-16 06:09:13 +00:00
2019-11-10 18:28:06 +00:00
ldx #PAKME.GP-PAKME.Table
ldy #MLI
2019-11-01 20:06:04 +00:00
lda /MLI
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-11-01 20:06:04 +00:00
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-04 07:21:40 +00:00
2019-11-10 18:28:06 +00:00
ldx #PAKME.XRW-PAKME.Table
ldy #$D000
2019-11-01 20:06:04 +00:00
lda /$D000
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-11-01 20:06:04 +00:00
ldx #0
2020-12-15 13:23:22 +00:00
2020-08-29 17:25:43 +00:00
.1 stz FCBs,x
2020-05-23 18:45:32 +00:00
stz VCBs,x
2019-11-01 20:06:04 +00:00
inx
bne .1
2020-12-15 13:23:22 +00:00
2019-11-10 18:28:06 +00:00
ldx #PAKME.XDOS-PAKME.Table
ldy #$DE00
2019-11-01 20:06:04 +00:00
lda /$DE00
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-11-01 20:06:04 +00:00
2020-04-23 15:36:51 +00:00
ldx #XDOS.DATA.LEN
2020-12-15 13:23:22 +00:00
2019-11-04 07:21:40 +00:00
.3 stz XDOS.DATA-1,x
dex
bne .3
2019-11-10 18:28:06 +00:00
ldx #PAKME.IRQ-PAKME.Table
ldy #$FF9B
2019-11-01 20:06:04 +00:00
lda /$FF9B
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-10-16 06:09:13 +00:00
2019-11-06 20:48:15 +00:00
LDR.IRQ lda RROMWRAMBNK2
ldy irqv interrupt vector
ldx irqv+1 x = high byte
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-06 20:48:15 +00:00
sta SETALTZP
sty irqv save irq vector in aux lc
2021-06-11 17:20:35 +00:00
stx irqv+1
2019-11-06 20:48:15 +00:00
sta CLRALTZP
sty irqv
2021-06-11 17:20:35 +00:00
stx irqv+1 save irq vector in main lc
2020-12-15 13:23:22 +00:00
2019-11-06 20:48:15 +00:00
lda #calldisp
sta jspare+1 P8 system death vector
lda /calldisp
sta jspare+2
2019-11-23 15:24:55 +00:00
.DO LOWERCASE=0
2019-10-16 06:09:13 +00:00
lda kversion
sta xdosver save current version for dir use
2019-11-23 15:24:55 +00:00
.FIN
2019-11-04 07:21:40 +00:00
lda idapple
sta MACHID
2019-11-08 07:35:08 +00:00
lda LDR.cortland
2019-11-01 20:06:04 +00:00
beq LDR.II branch if // family
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.IIGS sta cortflag
2019-11-01 20:06:04 +00:00
2019-11-06 16:25:00 +00:00
lda #calldisp
sta cortdisp
lda /calldisp
sta cortdisp+1
2020-12-15 13:23:22 +00:00
2019-11-08 07:35:08 +00:00
* lda RROMWRAMBNK2
* stz vmode force setvid to reset cursor
* jsr setvid reset output to screen
2021-06-11 17:20:35 +00:00
* jsr LDR.LCBNK1
2019-11-07 14:27:24 +00:00
lda #'C'
2019-11-04 07:21:40 +00:00
ldx PAKME.CCLK
ldy PAKME.CCLK+1
jsr LDR.SetupCLK
2019-11-10 18:28:06 +00:00
* ldx #PAKME.SEL2-PAKME.Table
* ldy #$1000
* lda /$1000
* jsr X.Unpak.XatYA
2019-11-01 20:06:04 +00:00
2019-11-10 18:28:06 +00:00
ldx #PAKME.SEL2-PAKME.Table
2019-11-04 07:21:40 +00:00
jsr LDR.SetupQC
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
lda LDR.BootFlag
2019-11-01 20:06:04 +00:00
bne .1 branch if prodos 8 alone
2019-10-16 06:09:13 +00:00
* running from gs/os shell so zero out os_boot for appletalk
2019-11-08 16:11:49 +00:00
sta OS_BOOT indicates O/S initially booted.
2019-10-16 06:09:13 +00:00
jsr patch101 patch for gs/os - rev note #101
2019-11-08 07:35:08 +00:00
.1 bra LDR.Common
2019-11-07 14:27:24 +00:00
*--------------------------------------
2019-11-10 18:28:06 +00:00
LDR.II ldx #PAKME.SEL1-PAKME.Table
2019-11-04 07:21:40 +00:00
jsr LDR.SetupQC
2019-11-05 16:31:29 +00:00
2019-11-08 07:35:08 +00:00
jsr LDR.ClkDevScan
2019-11-07 14:27:24 +00:00
*--------------------------------------
2019-11-08 07:35:08 +00:00
LDR.Common jsr LDR.BlkDevScan
2019-11-01 20:06:04 +00:00
2019-11-08 07:35:08 +00:00
jsr LDR.SetupRAM
2019-11-07 14:27:24 +00:00
*--------------------------------------
lda LDR.MLIOL.P+1 Boot unitnum
sta DEVNUM
ldx DEVCNT
.1 lda DEVLST,x
eor DEVNUM
and #$f0
beq .2
dex
bpl .1
brk
.2 lda DEVLST,x
pha
.3 lda DEVLST+1,x
sta DEVLST,x
cpx DEVCNT
inx
bcc .3
pla
ldx DEVCNT
sta DEVLST,x
2019-11-04 07:21:40 +00:00
lda LDR.BootFlag get setup entry point flag
beq LDR.SetPrefix taken if normal boot.
2021-05-12 14:43:03 +00:00
bit RROMBNK2
2019-10-16 06:09:13 +00:00
rts return to caller at setup entry point.
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.SetPrefix jsr MLI
2019-10-16 06:09:13 +00:00
.DA #MLIONLINE
2019-11-01 20:06:04 +00:00
.DA LDR.MLIOL.P
2019-11-04 07:21:40 +00:00
bcs .9
2020-12-15 13:23:22 +00:00
2019-10-16 06:09:13 +00:00
lda pbuf+1 get volume name length.
and #$0F strip SDDDxxxx
2019-11-04 07:21:40 +00:00
beq .9
2019-11-08 07:35:08 +00:00
2019-10-16 06:09:13 +00:00
inc add 1 for leading '/'
sta pbuf save prefix length.
lda #'/' place leading '/' in prefix buffer
sta pbuf+1
2020-12-15 13:23:22 +00:00
2019-10-16 06:09:13 +00:00
jsr MLI
.DA #MLISETPREFIX
2019-11-01 20:06:04 +00:00
.DA LDR.MLISETP.P
2019-11-04 07:21:40 +00:00
bcs .9
jsr CROUT
2020-12-15 13:23:22 +00:00
ldx #PAKME.ILDR-PAKME.Table
ldy #ILDR.START
lda /ILDR.START
jsr X.Unpak.XatYA
jmp ILDR.START
2019-10-16 06:09:13 +00:00
.9 ldx #LDR.MSG.PFXERR
2019-11-08 07:35:08 +00:00
jsr LDR.PrintX
2019-11-10 18:28:06 +00:00
bra *
2019-11-07 14:27:24 +00:00
*--------------------------------------
2019-11-04 07:21:40 +00:00
LDR.SetupQC bit RRAMWRAMBNK2 read/write RAM bank 2
bit RRAMWRAMBNK2
2019-10-16 06:09:13 +00:00
2019-11-10 18:28:06 +00:00
ldy #$D100
2019-11-04 07:21:40 +00:00
lda /$D100
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #$EE byte to distinguish LC bank 2
sta $D000
2021-06-11 17:20:35 +00:00
*--------------------------------------
LDR.LCBNK1 lda RRAMWRAMBNK1 switch in LC bank 1
lda RRAMWRAMBNK1
rts
2019-11-04 07:21:40 +00:00
*--------------------------------------
DS121x.DATA1 .EQ idxl
DS121x.DATA2 .EQ A1L
2019-11-05 16:31:29 +00:00
*--------------------------------------
LDR.ClkDevScan jsr LDR.IsIIc
bcc LDR.ClkDevNCLK //c only
LDR.ClkDevDCLK php
sei
lda $CFFF
lda $C400
2021-07-28 16:50:59 +00:00
2021-08-05 11:35:37 +00:00
ldx #8
stz $C0C0
stz $C0C1
2021-08-05 11:35:37 +00:00
stx $C0C2
lda $C0C3
pha
2021-08-05 11:35:37 +00:00
.1 lda DS121x.SIG-1,x
2021-08-05 11:35:37 +00:00
ldy #8
2021-07-28 16:50:59 +00:00
2021-08-05 11:35:37 +00:00
.2 sta $C0C3
stz $C0C0
lsr
2021-08-05 11:35:37 +00:00
dey
bne .2
2021-08-05 11:35:37 +00:00
dex
bne .1
ldx #8
.4 ldy #8
stz $C0C0
.5 lda $C0C3
lsr
ror DS121x.DATA1-1,x
dey
bne .5
dex
bne .4
stz $C0C0
pla
sta $C0C3
2021-07-28 16:50:59 +00:00
plp
2021-08-05 11:35:37 +00:00
sed
ldx #DS121x.ValidHI-DS121x.ValidLO
2021-07-28 16:50:59 +00:00
.6 lda DS121x.DATA1-1,x
cmp DS121x.ValidLO-1,x
bcc .9
cmp DS121x.ValidHI-1,x
bcc .7
2021-07-28 16:50:59 +00:00
bne .9
.7 dex
bne .6
2021-07-28 16:50:59 +00:00
cld
lda #'D'
ldx PAKME.DCLK
ldy PAKME.DCLK+1
jmp LDR.SetupCLK
2022-04-19 18:24:34 +00:00
.9 cld
*--------------------------------------
LDR.ClkDevNCLK php
2021-06-22 18:59:02 +00:00
sei
2021-07-25 14:03:41 +00:00
2021-06-22 18:59:02 +00:00
lda RDCXROM
2021-05-30 20:34:03 +00:00
php
2021-07-25 14:03:41 +00:00
2021-06-03 17:43:28 +00:00
sta SETCXROM
2021-05-30 20:34:03 +00:00
sta NSC.IOBASE
* lda $C00B Workaround for Ultrawarp bug
2019-11-05 16:31:29 +00:00
2021-05-30 20:34:03 +00:00
ldx #8
2019-11-05 16:31:29 +00:00
.1 ldy #8
.2 lda NSC.IOBASE+4
2019-11-05 16:31:29 +00:00
lsr
ror DS121x.DATA1-1,x
2019-11-05 16:31:29 +00:00
dey
bne .2
dex
2021-05-30 20:34:03 +00:00
bne .1
2021-06-22 18:59:02 +00:00
*--------------------------------------
sta NSC.IOBASE
2021-07-24 20:42:23 +00:00
* lda $C00B Workaround for Ultrawarp bug
2021-06-11 17:20:35 +00:00
lda NSC.IOBASE+4 Reset DS1216E comparison register with READ A2=1
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
ldy #8 Read 8 bytes...
2020-04-08 06:13:31 +00:00
.3 lda DS121x.SIG-1,y
2021-06-22 18:59:02 +00:00
phy
2021-07-25 14:03:41 +00:00
2021-06-22 18:59:02 +00:00
ldy #8 ....of 8 bits
2021-07-25 14:03:41 +00:00
2021-06-22 18:59:02 +00:00
.4 ldx #0
lsr
bcc .5
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
inx
2021-05-30 20:34:03 +00:00
.5 bit NSC.IOBASE,x Write Pattern bit in A0, with A2=0
2021-05-30 20:34:03 +00:00
2021-06-22 18:59:02 +00:00
dey
2019-11-05 16:31:29 +00:00
bne .4
2021-06-22 18:59:02 +00:00
ply
dey
2021-05-30 20:34:03 +00:00
bne .3
2021-06-22 18:59:02 +00:00
*--------------------------------------
2021-05-30 20:34:03 +00:00
ldx #8
2019-11-05 16:31:29 +00:00
.6 ldy #8
.7 lda NSC.IOBASE+4
2019-11-05 16:31:29 +00:00
lsr
ror DS121x.DATA2-1,x
2019-11-05 16:31:29 +00:00
dey
bne .7
dex
2021-05-30 20:34:03 +00:00
bne .6
2019-11-05 16:31:29 +00:00
2021-05-30 20:34:03 +00:00
plp
2021-06-03 17:43:28 +00:00
bmi .8
2021-07-25 14:03:41 +00:00
2021-06-03 17:43:28 +00:00
sta CLRCXROM
2019-11-05 16:31:29 +00:00
2021-06-22 18:59:02 +00:00
.8 plp
*--------------------------------------
2021-06-22 18:59:02 +00:00
ldx #8
2020-12-15 13:23:22 +00:00
.9 lda DS121x.DATA1-1,x
cmp DS121x.DATA2-1,x
2020-01-06 07:03:37 +00:00
bne .90
2019-11-05 16:31:29 +00:00
dex
2021-05-30 20:34:03 +00:00
bne .9
2020-12-15 13:23:22 +00:00
2020-01-06 07:03:37 +00:00
bra LDR.ClkDevTCLK
2019-11-05 16:31:29 +00:00
2020-01-06 07:03:37 +00:00
.90 lda #'N'
2019-11-05 16:31:29 +00:00
ldx PAKME.NCLK
ldy PAKME.NCLK+1
2019-11-08 07:35:08 +00:00
bra LDR.SetupCLK
*--------------------------------------
LDR.ClkDevTCLK jsr LDR.IsIIc
2022-04-19 18:24:34 +00:00
bcs LDR.ClkDevXCLK
stz idxl
2019-11-05 16:31:29 +00:00
lda #$C1
sta idxl+1
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
lda #1
sta LDR.SlotIdx
2020-12-15 13:23:22 +00:00
2021-05-12 14:43:03 +00:00
.1 jsr LDR.CheckTClkID
bcs .7
2021-04-15 14:03:04 +00:00
2020-12-15 13:23:22 +00:00
stz $478,x
stz $7f8,x
lda idxl+1
asl
asl
asl
asl
tax
stz $c080,x
lda $c088,x
lda $c080,x
2019-11-05 16:31:29 +00:00
2019-11-07 14:27:24 +00:00
lda #'T'
2019-11-05 16:31:29 +00:00
ldx PAKME.TCLK
ldy PAKME.TCLK+1
jsr LDR.SetupCLK
2020-12-15 13:23:22 +00:00
2019-11-05 16:31:29 +00:00
lda idxl+1
sta TCLK.Cx1+2
2020-12-15 13:23:22 +00:00
sta TCLK.Cx2+2
2019-11-05 16:31:29 +00:00
rts
2021-05-12 14:43:03 +00:00
.7 inc LDR.SlotIdx
inc idxl+1
2019-11-05 16:31:29 +00:00
lda idxl+1
cmp #$C8
bne .1
2022-04-19 18:24:34 +00:00
*--------------------------------------
LDR.ClkDevXCLK bit RROMBNK2
sta $C070
bit $FACA
bit $FACA
bit $FAFE
lda $DFFE
cmp #$4A
bne .9
lda $DFFF
cmp #$CD
beq .1
2021-05-12 14:43:03 +00:00
.9 bit $F851
rts
2022-04-19 18:24:34 +00:00
.1 bit $F851
lda #'X'
2022-04-19 18:24:34 +00:00
ldx PAKME.XCLK
ldy PAKME.XCLK+1
2019-11-04 07:21:40 +00:00
*--------------------------------------
LDR.SetupCLK stx ZPInBufPtr
sty ZPInBufPtr+1
2020-12-15 13:23:22 +00:00
2020-08-29 17:25:43 +00:00
sta LDR.MSG.CLK
2019-11-07 14:27:24 +00:00
ldx #LDR.MSG.CLK
jsr LDR.PrintX
2020-12-15 13:23:22 +00:00
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2020-12-15 13:23:22 +00:00
2019-11-04 07:21:40 +00:00
lda #$D742
sta ZPOutBufPtr
lda /$D742
sta ZPOutBufPtr+1
jsr X.Unpak
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #$4C enable clock routine by putting a jmp
sta clockv in front of clock vector
2019-10-16 06:09:13 +00:00
2019-11-04 07:21:40 +00:00
lda #MACHID.CLK
tsb MACHID
2019-11-07 14:27:24 +00:00
LDR.SetupCLK.RTS
2019-11-04 07:21:40 +00:00
rts
*--------------------------------------
2019-11-09 12:19:41 +00:00
LDR.SetupRAM lda DEVCNT
2019-11-08 16:11:49 +00:00
cmp #13
bcs LDR.SetupCLK.RTS
2021-06-11 17:20:35 +00:00
jsr LDR.LCBNK1
2019-11-08 07:35:08 +00:00
2019-11-10 18:28:06 +00:00
ldx #PAKME.RAM-PAKME.Table
ldy #$FF00
2019-11-08 07:35:08 +00:00
lda /$FF00
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
2019-11-08 07:35:08 +00:00
lda RAMX.PAK
bne .1
2019-11-08 07:35:08 +00:00
sta SETWRITEAUX
2019-11-10 18:28:06 +00:00
ldx #PAKME.RAMX-PAKME.Table
ldy #$0200
2019-11-08 07:35:08 +00:00
lda /$0200
2019-11-10 18:28:06 +00:00
jsr X.Unpak.XatYA
bra .7
.1 ldx #PAKME.RAMX-PAKME.Table
ldy #$0800
lda /$0800
jsr X.Unpak.XatYA
sta SETWRITEAUX
2019-10-31 06:54:28 +00:00
ldx #$FE
.2 lda $900,x
sta $300,x
dex
txa
bne .2
.3 lda $800,x
sta $200,x
inx
bne .3
.7 sta CLRWRITEAUX
2019-11-04 07:21:40 +00:00
2019-11-08 07:35:08 +00:00
lda #RAMDRV put driver address into
2019-11-08 16:11:49 +00:00
sta DEVPTRS3D2
2019-11-08 07:35:08 +00:00
lda /RAMDRV
2019-11-08 16:11:49 +00:00
sta DEVPTRS3D2+1
2019-11-08 07:35:08 +00:00
2019-11-09 12:19:41 +00:00
inc DEVCNT count (-1) active devices
ldx DEVCNT
2019-11-08 07:35:08 +00:00
lda #$BF unit num of /RAM
2019-11-09 12:19:41 +00:00
sta DEVLST,x
2020-12-15 13:23:22 +00:00
2019-11-08 07:35:08 +00:00
ldx #LDR.MSG.RAM
jmp LDR.PrintX
*--------------------------------------
* find all disk devices in system slots and set up address
2020-12-15 13:23:22 +00:00
* and device table in prodos global page.
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.BlkDevScan bit RROMBNK2 write protect lc ram.
stz idxl
2019-10-31 06:54:28 +00:00
lda #$C7 search slots from high to low
sta idxl+1
2019-11-04 07:21:40 +00:00
2019-11-08 16:11:49 +00:00
lda #7
sta LDR.SlotIdx
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
.1 ldx LDR.SlotIdx
stz LDR.SlotDevType-1,x
2020-12-15 13:23:22 +00:00
2019-11-09 12:19:41 +00:00
jsr LDR.CheckDiskID
bcs .4 if no ProDOS device in this slot.
2019-11-08 07:35:08 +00:00
ldy #$ff
2019-10-31 06:54:28 +00:00
lda (idxl),y check last byte of $Cn rom (y = $ff)
2019-11-08 07:35:08 +00:00
bne .2 branch if 16 sector disk II.
sta devid =0 since disk ii's have null attributes
2020-08-30 17:50:57 +00:00
lda #XRW.START
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2020-08-30 17:50:57 +00:00
lda /XRW.START
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
2019-11-08 07:35:08 +00:00
sec 2 devices
2019-11-08 16:11:49 +00:00
jsr LDR.AddBlkDevs
bra .4
2019-11-08 07:35:08 +00:00
.2 cmp #$FF if = $FF then 13 sector disk II.
beq .4 ignore if 13 sector boot ROM
2019-11-08 07:35:08 +00:00
2019-10-31 06:54:28 +00:00
ldy #$07 check for a smartport device.
lda (idxl),y
2019-11-08 16:11:49 +00:00
bne .3 no smartport
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
jsr LDR.AddSPDevs
bra .4
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
.3 ldy #$FE BLK device...
2019-10-31 06:54:28 +00:00
lda (idxl),y get attributes.
and #$03 verify it provides read and status calls.
cmp #$03
bne .4 assume it's an off-brand disk
2020-12-15 13:23:22 +00:00
jsr LDR.SetDevID
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
and #$3 Device count minus 1
inc
ldx LDR.SlotIdx
2019-11-09 12:19:41 +00:00
sta LDR.SlotDevCnt-1,x
dec LDR.SlotDevType-1,x set as BlockDeb
2019-11-08 16:11:49 +00:00
tax
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
iny $CnFF
lda (idxl),y
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2019-11-08 16:11:49 +00:00
lda idxl+1 store hi entry addr (low already done)
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
cpx #2 CS if 2 devs or more
jsr LDR.AddBlkDevs install 1 or 2 devices from this slot.
2019-11-04 07:21:40 +00:00
.4 dec idxl+1 next lower slot.
2019-11-08 16:11:49 +00:00
dec LDR.SlotIdx have all slots been checked ?
2019-11-08 07:35:08 +00:00
bne .1
2019-11-08 16:11:49 +00:00
*--------------------------------------
2020-01-13 11:05:11 +00:00
* stz idxl
2019-11-09 12:19:41 +00:00
lda #$C7
sta idxl+1
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
lda #7
sta LDR.SlotIdx
2019-10-31 06:54:28 +00:00
.5 ldx LDR.SlotIdx
2020-01-29 12:33:33 +00:00
lda LDR.SlotDevType-1,x
beq .8
2020-01-28 16:42:51 +00:00
2019-11-09 12:19:41 +00:00
lda LDR.SlotDevCnt-1,x
2019-11-08 16:11:49 +00:00
cmp #3
bcc .8
2019-10-31 06:54:28 +00:00
bit LDR.SlotDevType-1,x
bpl .6 type = smartport
jsr LDR.AddExtraBLKDevs
bra .8
.6 jsr LDR.AddExtraSPDevs
2019-11-04 07:21:40 +00:00
2020-04-13 17:04:02 +00:00
.8 dec idxl+1
dec LDR.SlotIdx
bne .5
2020-04-13 17:04:02 +00:00
2019-11-09 12:19:41 +00:00
LDR.AddExtraDevs.RTS
2019-10-31 06:54:28 +00:00
rts
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddSPDevs jsr LDR.SetDevID setup the devid byte from attributes
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
iny #$ff
lda (idxl),y
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
sta LDR.driveradr
2019-11-09 12:19:41 +00:00
sta .1+1 modify operand
2019-10-31 06:54:28 +00:00
clc
adc #$03
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+1
2019-11-08 16:11:49 +00:00
lda idxl+1
2020-04-13 17:04:02 +00:00
sta LDR.driveradr+1
sta LDR.SPVect+2
2019-11-09 12:19:41 +00:00
sta .1+2 modify operand
2019-11-08 16:11:49 +00:00
2019-11-01 20:06:04 +00:00
asl convert $Cn to $n0
2019-10-31 06:54:28 +00:00
asl
asl
asl
sta unitnum unit number
2019-11-08 16:11:49 +00:00
2019-10-31 06:54:28 +00:00
stz A4L force a prodos status call
2019-11-08 16:11:49 +00:00
2019-10-31 06:54:28 +00:00
stz buf dummy pointer
lda #$10
sta buf+1 dummy pointer should be <> 0
2019-11-08 16:11:49 +00:00
stz bloknml # of bytes to transfer
stz bloknml+1
2019-11-09 12:19:41 +00:00
.1 jsr $0000 SELF MODIFIED
2020-12-15 13:23:22 +00:00
ldy #$FB
2020-04-13 17:04:02 +00:00
lda (idxl),y check device id
and #$02 SCSI ?
beq .2 no, no need to init Cocoon
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
jsr LDR.SPStatusCall status of Cocoon : A = device = 2 for SCSI
2019-10-31 06:54:28 +00:00
lda #0 set unit# = 0
.2 jsr LDR.SPStatusCall
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf Device count
2019-11-09 12:19:41 +00:00
beq LDR.AddExtraDevs.RTS no devices, so done.
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
sta LDR.DevCnt
2019-11-08 16:11:49 +00:00
ldx LDR.SlotIdx
2019-11-09 12:19:41 +00:00
inc LDR.SlotDevType-1,x set as smartport
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
.3 inc LDR.SPStatus.U
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
jsr LDR.SPStatusCall.U call to get the device status
bcs .7
2019-10-31 06:54:28 +00:00
2022-01-30 21:47:08 +00:00
lda LDR.SPStatusBuf
bpl .7 not a block device
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
ldx LDR.SlotIdx
inc LDR.SlotDevCnt-1,x
2019-11-08 16:11:49 +00:00
2022-01-30 21:47:08 +00:00
.7 dec LDR.DevCnt
bne .3
2020-12-15 13:23:22 +00:00
2022-01-30 21:47:08 +00:00
ldx LDR.SlotIdx
lda LDR.SlotDevCnt-1,x
beq LDR.AddBlkDevs.RTS
2019-11-09 12:19:41 +00:00
2020-01-29 12:33:33 +00:00
sta LDR.SlotDevCnt-1,x
2019-11-09 12:19:41 +00:00
cmp #2 CC/CS, add 1 or 2 devs
2019-11-08 07:35:08 +00:00
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddBlkDevs php how many drives (carry).
lda idxl+1 get index to global device table
and #$07 for this slot...
asl
tay into y reg.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
asl
asl now form device # = slot #
asl in high nibble.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
ora devid combine with attributes.
2020-12-15 13:23:22 +00:00
ldx DEVCNT
2019-11-08 16:11:49 +00:00
inx put device # into device list.
2019-11-09 12:19:41 +00:00
sta DEVLST,x
2019-11-08 16:11:49 +00:00
asl now form drive 2 device number, if any.
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
plp restore # of devices in carry.
ror if 2 drives, then bit 7=1.
bpl .1 branch if a 1 drive device (e.g. hard drive)
2019-11-08 07:35:08 +00:00
2019-11-08 16:11:49 +00:00
inx else presume that 2nd drive is present.
2019-11-09 12:19:41 +00:00
sta DEVLST,x active device list.
2019-11-08 16:11:49 +00:00
2020-01-13 11:05:11 +00:00
.1 stx DEVCNT save updated device count.
2019-11-08 16:11:49 +00:00
asl shift # of drives back into carry.
2020-04-13 17:04:02 +00:00
lda LDR.driveradr get high address of device driver.
2019-11-09 12:19:41 +00:00
sta DEVPTRS,y device driver table 1.
2019-11-08 16:11:49 +00:00
bcc .2 branch if single drive.
2019-11-09 12:19:41 +00:00
sta DEVPTRS+16,y device driver table 2.
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
.2 lda LDR.driveradr+1
2019-11-09 12:19:41 +00:00
sta DEVPTRS+1,y
2019-11-08 16:11:49 +00:00
bcc .3
2019-11-09 12:19:41 +00:00
sta DEVPTRS+17,y
2019-11-08 16:11:49 +00:00
2019-11-09 12:19:41 +00:00
.3
2020-12-15 13:23:22 +00:00
LDR.AddBlkDevs.RTS
2019-11-09 12:19:41 +00:00
rts
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.AddExtraBLKDevs
dec
dec
sta LDR.DevCnt
jsr LDR.SetDevID set up device attributes
jsr LDR.FindFreeDevPtr
bcs .9
.1 cpy #$10
bcc .2 must be Drive 1
.10 jsr LDR.FindFreeDevPtrNext
bcc .1
rts
.2 lda LDR.DevCnt
dec
beq .4 only one to add
tya
ora #$10
tay
lda DEVPTRS,y device driver table 1
cmp #nodevice
bne .10
lda DEVPTRS+1,y
cmp /nodevice
bne .10 Drive 1 & 2 free
jsr LDR.AddY2DEVLST Y = index in DEVPTRS
jsr .8
tya
and #$F
tay
.4 jsr LDR.AddY2DEVLST Y = index in DEVPTRS
.8 phy
ldy #$ff
lda (idxl),y BLK entry point
ply
sta DEVPTRS,y
lda idxl+1
sta DEVPTRS+1,y
* clc
.9 rts
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.AddExtraSPDevs
jsr LDR.SetDevID set up device attributes
iny ldy #$fe from SetDevID
* ldy #$FF
2019-10-31 06:54:28 +00:00
lda (idxl),y
clc
adc #$03 add 3 for smartport call
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+1
2019-10-31 06:54:28 +00:00
lda idxl+1
2020-04-13 17:04:02 +00:00
sta LDR.SPVect+2
2019-10-31 06:54:28 +00:00
2020-04-13 17:04:02 +00:00
lda #0
jsr LDR.SPStatusCall do a status call on smartport itself
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf # of devices on smartport
2019-11-09 12:19:41 +00:00
2019-10-31 06:54:28 +00:00
cmp #$03
2019-11-08 16:11:49 +00:00
bcc .8 only 2 devices,skip to next one.
2019-10-31 06:54:28 +00:00
2019-11-09 12:19:41 +00:00
dec
dec
sta LDR.DevCnt
2019-10-31 06:54:28 +00:00
2019-11-09 12:19:41 +00:00
lda #3
sta LDR.SPStatus.U
2020-12-15 13:23:22 +00:00
2020-04-13 17:04:02 +00:00
.1 jsr LDR.SPStatusCall.U do status call
2019-10-31 06:54:28 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPStatusBuf is this a block device?
2020-01-29 12:33:33 +00:00
bpl .2
2019-10-31 06:54:28 +00:00
jsr LDR.FindFreeDevPtr
2019-11-09 12:19:41 +00:00
bcs .8
2020-12-15 13:23:22 +00:00
jsr LDR.LCBNK1
2019-11-09 12:19:41 +00:00
tya divide index by 2
2019-10-31 06:54:28 +00:00
lsr
tax
2020-12-15 13:23:22 +00:00
2019-11-08 16:11:49 +00:00
lda LDR.SPStatus.U
2020-04-13 17:04:02 +00:00
sta XDOS.SPUnit-1,x store the smartport unit #
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPVect+1 and entry address.
sta XDOS.SPVectLo-1,x
2019-11-08 16:11:49 +00:00
2020-04-13 17:04:02 +00:00
lda LDR.SPVect+2
sta XDOS.SPVectHi-1,x
2019-11-08 16:11:49 +00:00
bit RROMBNK2 write protect lc ram.
2019-11-08 16:11:49 +00:00
jsr LDR.AddY2DEVLST
2019-11-08 16:11:49 +00:00
2019-11-09 12:19:41 +00:00
lda #XDOS.SPREMAP
sta DEVPTRS,y
2019-11-09 12:19:41 +00:00
lda /XDOS.SPREMAP
sta DEVPTRS+1,y
.2 inc LDR.SPStatus.U
dec LDR.DevCnt
bne .1
.8 rts
2019-11-08 16:11:49 +00:00
*--------------------------------------
2020-04-13 17:04:02 +00:00
LDR.SPStatusCall
2022-01-30 21:47:08 +00:00
sta LDR.SPStatus.U
2020-12-15 13:23:22 +00:00
LDR.SPStatusCall.U
2020-07-23 16:48:45 +00:00
LDR.SPVect jsr $0000 self modifying
2020-04-13 17:04:02 +00:00
.HS 00
.DA LDR.SPStatus.P
rts
2019-11-08 16:11:49 +00:00
*--------------------------------------
2021-05-12 14:43:03 +00:00
LDR.CheckTClkID ldy #6
.HS 2C BIT ABS
LDR.CheckDiskID ldy #5
2019-11-08 16:11:49 +00:00
2021-05-12 14:43:03 +00:00
lda CLRC8ROM switch out $C8 ROMs
2019-11-08 16:11:49 +00:00
.1 lda (idxl),y compare id bytes
cmp dskid,y
2021-05-12 14:43:03 +00:00
bne .3
2019-10-31 06:54:28 +00:00
2019-11-08 16:11:49 +00:00
dey
dey
bpl .1 loop until all 4 id bytes match.
2021-05-12 14:43:03 +00:00
clc
php
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
.8 ldx LDR.SlotIdx
lda sltbit-1,x
tsb rommap mark bit to flag rom present
.9 plp
rts
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
.3 sec
php
2021-07-25 14:03:41 +00:00
ldx #0
2021-05-12 14:43:03 +00:00
.4 cmp (idxl),y
bne .9
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
inx
bne .4
2021-07-25 14:03:41 +00:00
2021-05-12 14:43:03 +00:00
bra .8
2019-11-08 16:11:49 +00:00
*--------------------------------------
LDR.FindFreeDevPtr
ldx #LDR.DEVPTRS.CNT-1
LDR.FindFreeDevPtrNext
.1 ldy LDR.DEVPTRS.IDX,x
lda DEVPTRS,y device driver table 1
cmp #nodevice
bne .2
lda DEVPTRS+1,y
cmp /nodevice
beq .8
.2 dex
bpl .1
sec
rts
.8 clc
rts
*--------------------------------------
2019-11-08 16:11:49 +00:00
LDR.SetDevID ldy #$FE check attributes byte.
lda (idxl),y
lsr move hi nibble to lo nibble for
lsr device table entries.
lsr
lsr
sta devid
rts
2019-11-08 07:35:08 +00:00
*--------------------------------------
LDR.AddY2DEVLST inc DEVCNT
ldx DEVCNT
tya
asl convert to DSSS0000
asl
asl
ora devid include device attributes
sta DEVLST,x in the active device list.
rts
*--------------------------------------
LDR.Scr80Init phx Save LDR.MSG
2021-07-28 16:50:59 +00:00
jsr LDR.IsIIc
bcs LDR.Scr80Init2
2021-07-25 14:03:41 +00:00
php
2021-06-06 19:06:49 +00:00
sei
2021-07-25 14:03:41 +00:00
2021-06-06 19:06:49 +00:00
sta SETC3ROM
ldx #COL80IDX.Cnt-1
2021-07-25 14:03:41 +00:00
.1 ldy COL80IDX,x
2021-06-06 19:06:49 +00:00
lda $C300,y
cmp COL80VAL,x
2021-07-28 16:50:59 +00:00
bne .2
2021-06-06 19:06:49 +00:00
dex
bpl .1
2021-07-25 14:03:41 +00:00
2021-06-06 19:06:49 +00:00
lda $C30C is it an apple 80 col compatible card?
and #$F0
cmp #$80
2021-07-28 16:50:59 +00:00
beq .3
2021-06-06 19:06:49 +00:00
2021-07-28 16:50:59 +00:00
.2 sta CLRC3ROM
2020-08-30 17:50:57 +00:00
2021-07-28 16:50:59 +00:00
.3 plp
2021-06-06 19:06:49 +00:00
*--------------------------------------
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LDR.Scr80Init2 lda #$8C Reset 80 col screen ($0C:HOME)
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jsr $C300
jsr setnorm
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jsr home
jsr SETINV
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.DO LOGO
lda #20
sta CV
inc
sta WNDTOP
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jsr VTAB
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lda #LOGO.PAKED
sta ZPInBufPtr
lda /LOGO.PAKED
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sta ZPInBufPtr+1
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stz ZPOutBufPtr
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lda #$A0
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sta ZPOutBufPtr+1
jsr X.Unpak
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sta CLRHIRES
sta SETMIXED
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bit RDIOUDIS
sta SETIOUDIS
sta SETDHIRES
bmi .10
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sta CLRIOUDIS
.10 sta CLRTEXT
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stz ZPPtr1
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lda #$A0
sta ZPPtr1+1
lda #0
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.1 pha
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jsr GBSCALC
ldy #0
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.2 lda (ZPPtr1),y
pha
and #$f
tax
lda PALETTE.AUX,x
sta SETPAGE2
sta (GBASL),y
pla
lsr
lsr
lsr
lsr
tax
lda PALETTE.MAIN,x
sta CLRPAGE2
sta (GBASL),y
iny
cpy #40
bne .2
lda ZPPtr1
clc
adc #40
sta ZPPtr1
bcc .3
inc ZPPtr1+1
.3 ldy #0
.4 lda (ZPPtr1),y
pha
and #$f
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tax
lda PALETTE.AUX,x
asl
asl
asl
asl
sta SETPAGE2
ora (GBASL),y
sta (GBASL),y
pla
lsr
lsr
lsr
lsr
tax
lda PALETTE.MAIN,x
asl
asl
asl
asl
sta CLRPAGE2
ora (GBASL),y
sta (GBASL),y
iny
cpy #40
bne .4
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lda ZPPtr1
clc
adc #40
sta ZPPtr1
bcc .7
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inc ZPPtr1+1
.7 pla
inc
cmp #20
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bne .1
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.FIN
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jsr CLREOL
jsr setnorm
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ldx #LDR.MSG.PRODOS
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jsr LDR.PrintX
plx get back LDR.MSG.machine type
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*--------------------------------------
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LDR.PrintX bit RROMBNK2
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lda INVFLG
pha
jsr SETINV
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.1 lda $2000,x
pha
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ora #$80
jsr COUT
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inx
pla
bpl .1
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lda #$A0
jsr COUT
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pla
sta INVFLG
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sta CLRPAGE2 for screen holes proper access
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rts
*--------------------------------------
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LDR.IsIIc lda MACHID
and #MACHID.T
cmp #MACHID.T.IIc
beq .9
clc
.9 rts
*--------------------------------------
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PALETTE.MAIN .HS 00.02.04.06.08.0A.0C.0E
.HS 01.03.05.07.09.0B.0D.0F
PALETTE.AUX .HS 00.01.02.03.04.05.06.07
.HS 08.09.0A.0B.0C.0D.0E.0F
*--------------------------------------
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* 16 bytes moved to $03F0 vectors
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*--------------------------------------
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LDR.3F0 .DA breakv
.DA oldrst
.DA #$5A powerup byte
jmp oldrst '&' vector
jmp oldrst ctrl-y vector
.HS 004000
.DA GP.IRQV global page interrupt vector
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*--------------------------------------
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* patch to gsos vectors so error is returned for os calls - rev note #101
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*--------------------------------------
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patch101 php
sei disable interrupts
clc
xce full native mode
>LONGMX
phb save DBR
pha
pha
pea $0000 length of patch
pea $0010 0000/0010 = 16 bytes
pea $3101 user id for prodos 8
pea $8018 attributes (locked/nospec/nocross)
pha
pha
>IIGS NewHandle
lda $01,s retrieve handle
tax
lda $03,s
tay
pea $0000 copy the code into the handle
pea L2C4D
phy
phx
pea $0000 length of patch = 0000/0010
pea $0010
>IIGS PtrToHand
plx low word of handle
plb set DBR to handle's bank
lda >1,x get upper 16 bits of 24 bit address
tay save in y
lda >0,x get low 8 bits of address
and ##$00FF clear high byte
xba put address in high byte
ora ##$005C include JML opcode
sta GSOS2 store in gsos vectors
clc
adc ##$000B
sta GSOS
tya store upper 16 bits too
sta GSOS2+2
adc ##$0000 adj for possible page crossing
sta GSOS+2
plb remove garbage byte from stack
plb restore DBR.
sec
xce back to emulation mode
plp
rts
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*--------------------------------------
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* copy of the code that goes in the handle
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*--------------------------------------
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L2C4D lda 1,s
sta 7,s
lda 2,s
sta 8,s
pla
pla
pla
lda ##$00FF #NoOS
sec
rtl
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*--------------------------------------
DS121x.SIG .HS 5CA33AC55CA33AC5 Reverted 7->0
DS121x.ValidLO .HS 00010101 Y,M,D,DoW
DS121x.ValidHI .HS 990C1F07
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*--------------------------------------
* id bytes: evens for clock, odds for disk
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dskid .HS 08.20.28.00.58.03.70
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sltbit .HS 02040810204080
*--------------------------------------
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COL80IDX .HS 05070BFA + $C30C and $80 = $80
COL80IDX.Cnt .EQ *-COL80IDX
COL80VAL .HS 3818012C
*--------------------------------------
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LDR.MLIOL.P .DA #2
.DA #$60
.DA pbuf+1
LDR.MLISETP.P .DA #1
.DA pbuf
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LDR.SPStatus.P .DA #$03 # of parms
LDR.SPStatus.U .DA #$00 unit number (code for smartport stat)
.DA LDR.SPStatusBuf
.DA #00 status code (0 = general status)
LDR.DEVPTRS.CNT .EQ 14
LDR.DEVPTRS.IDX .DA #$16 S3D2 /RAM
.DA #$06 S3D1
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.DA #$12 S1D2
.DA #$02 S1D1
.DA #$14 S2D2
.DA #$04 S2D1
.DA #$18 S4D2
.DA #$08 S4D1
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.DA #$1A S5D2
.DA #$0A S5D1
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.DA #$1C S6D2
.DA #$0C S6D1
.DA #$1E S7D2
.DA #$0E S7D1
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*--------------------------------------
LDR.cortland .DA #0 cortland loader flag (1 = Cortland)
LDR.BootFlag .DA #0 0 = normal boot, <>0 = return
*--------------------------------------
LDR.SPStatusBuf .BS 8 8 bytes for smartport call
LDR.driveradr .BS 2
LDR.SlotIdx .BS 1
LDR.DevCnt .BS 1
LDR.SlotDevType .BS 7
LDR.SlotDevCnt .BS 7
*--------------------------------------
2019-10-16 06:09:13 +00:00
MAN
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SAVE usr/src/prodos.fx/prodos.s.ldr
LOAD usr/src/prodos.fx/prodos.s
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ASM