A2osX/DRV/DHGR.DRV.S.txt

549 lines
11 KiB
Plaintext
Raw Normal View History

2017-12-22 21:24:30 +00:00
NEW
2019-07-25 15:10:59 +00:00
AUTO 3,1
2015-03-14 21:48:35 +00:00
.LIST OFF
.OP 65C02
.OR $2000
2018-12-18 14:37:07 +00:00
.TF DRV/GUI/DHGR.DRV
2015-03-14 21:48:35 +00:00
*--------------------------------------
2018-07-23 15:28:42 +00:00
.INB INC/MACROS.I
.INB INC/A2OSX.I
2018-10-02 15:52:30 +00:00
.INB INC/MLI.I
2018-12-19 07:12:58 +00:00
.INB INC/MLI.E.I
2018-07-23 15:28:42 +00:00
.INB INC/IO.I
.INB INC/GFX.I
.INB INC/GFX.EVE.I
2015-03-14 21:48:35 +00:00
*--------------------------------------
2019-01-10 16:26:58 +00:00
ZPPtr .EQ ZPDRV
*--------------------------------------
2015-06-03 18:30:57 +00:00
* File Header (16 Bytes)
2015-03-14 21:48:35 +00:00
*--------------------------------------
CS.START cld
2015-06-03 18:30:57 +00:00
jmp Dev.Detect cld,jmp abs=DRV
.DA #$61 6502,Level 1 (65c02)
.DA #1 DRV Layout Version 1
.DA 0
.DA CS.END-CS.START Code Length
2018-12-19 07:12:58 +00:00
.DA 0
.DA 0
.DA 0
2015-06-03 18:30:57 +00:00
*--------------------------------------
* Relocation Table
*--------------------------------------
L.MSG.DETECT .DA MSG.DETECT
L.MSG.DETECT.IIC .DA MSG.DETECT.IIC
L.MSG.DETECT.EVE .DA MSG.DETECT.EVE
L.MSG.DETECT.80C .DA MSG.DETECT.80C
2018-12-19 07:12:58 +00:00
L.DRV.CS.START .DA DRV.CS.START
L.FD.DEV .DA FD.DEV
L.FD.DEV.NAME .DA FD.DEV.NAME
2015-06-03 18:30:57 +00:00
.DA 0 End Of Reloc Table
*--------------------------------------
Dev.Detect >LDYA L.MSG.DETECT
2018-08-22 15:23:27 +00:00
>SYSCALL puts
2015-06-03 18:30:57 +00:00
lda MACHID
and #MACHID.T
cmp #MACHID.T.IIc
bne .1
2019-08-26 06:29:18 +00:00
* stz DCB+S.DCB.GFX.S //c : 80c Mode
>LDYA L.MSG.DETECT.IIC
bra .3
.1 php
sei
2019-01-10 16:26:58 +00:00
sta SET80STORE
sta SETPAGE2
ldx $400 Save Aux $400
lda #$ff Make sure !=1 for comparing later
sta $400
sta CLRPAGE2
ldy $400 Save Main $400
lda #$01 Select Foreground/BKgrnd Colors
sta TXT16.ON Activate 16 color mode
sta $400 Store something in Main
sta SETPAGE2
eor $400 read back AUX, If EVE, must be F/BG colors
bne .2
dec
2018-12-19 07:12:58 +00:00
sta DCB+S.DCB.GFX.S 0=80C,$ff=EVE
.2 stx $400 Set back Aux $400
sta CLRPAGE2
sty $400 Set back Main $400
2019-08-26 06:29:18 +00:00
sta TXT16.OFF
plp
>LDYA L.MSG.DETECT.EVE
2018-12-19 07:12:58 +00:00
bit DCB+S.DCB.GFX.S
bmi .3
>LDYA L.MSG.DETECT.80C
2018-08-22 15:23:27 +00:00
.3 >SYSCALL puts
2018-12-19 07:12:58 +00:00
>PUSHWI DRV.END
2019-07-22 06:31:01 +00:00
>PUSHWI DRV.CS.END-DRV.CS.START
2018-12-19 07:12:58 +00:00
>PUSHWI DRV.CS.START
>LDYA L.DRV.CS.START
>SYSCALL InsDrv
bcs .9
>STYA FD.DEV+S.FD.DEV.DRVPTR
>PUSHW L.FD.DEV.NAME
>LDYA L.FD.DEV
>SYSCALL MKDEV
2019-01-10 16:26:58 +00:00
bcs .9
php
sei
>LDYAI $4000
>STYA $800
sta SETWRITEAUX
>STYA $800
sta CLRWRITEAUX
2019-01-11 16:06:05 +00:00
sta SETHIRES
2019-01-10 16:26:58 +00:00
sta SET80STORE
2019-01-11 16:06:05 +00:00
jsr ClrScr
plp
.9 rts
*--------------------------------------
2019-07-30 15:35:42 +00:00
ClrScr ldx #0
2019-08-26 06:29:18 +00:00
txa lda #0
2019-01-10 16:26:58 +00:00
2019-07-30 15:35:42 +00:00
.1 ldy BASEL,x
2019-01-10 16:26:58 +00:00
sty ZPPtr
ldy BASEH,x
sty ZPPtr+1
sta SETPAGE2
2019-07-30 15:35:42 +00:00
jsr .2
2019-01-10 16:26:58 +00:00
sta CLRPAGE2
2019-07-30 15:35:42 +00:00
jsr .2
inx
cpx #192
bne .1
rts
.2 ldy #39
2019-01-10 16:26:58 +00:00
2019-07-30 15:35:42 +00:00
.3 sta (ZPPtr),y
2019-01-10 16:26:58 +00:00
dey
2019-07-30 15:35:42 +00:00
bpl .3
2019-01-10 16:26:58 +00:00
2019-01-11 16:06:05 +00:00
rts
2017-11-14 16:57:34 +00:00
*--------------------------------------
2015-06-03 18:30:57 +00:00
CS.END
2018-08-22 15:23:27 +00:00
MSG.DETECT .AZ "Apple IIe/IIc DHGR Driver."
2019-08-26 06:29:18 +00:00
MSG.DETECT.IIC .AZ "Apple //c : 'LCM Feline/80c' Mode."
MSG.DETECT.EVE .AZ "Apple //e : 'LCM Eve' Board Detected."
MSG.DETECT.80C .AZ "No Specific H/W Found, 'Video7 80c' Mode."
2015-06-03 18:30:57 +00:00
*--------------------------------------
* Device Header (16 Bytes)
*--------------------------------------
2018-12-19 07:12:58 +00:00
FD.DEV .DA #S.FD.T.CDEV
.DA #0 HANDLER
.DA #0 BUSID
.DA #0 DEVID
.DA 0 BUSPTR
.BS 2 DRVPTR
.DA 0 DCBPTR
.DA 0 BUFPTR
FD.DEV.NAME .AZ "GFX"
2015-06-03 18:30:57 +00:00
*--------------------------------------
* Driver Code
*--------------------------------------
2018-12-19 07:12:58 +00:00
ZPIOCTL .EQ ZPDRV
ZPBasePtr .EQ ZPDRV+2
ZPBMShiftPtr .EQ ZPDRV+4
ZPScrShiftPtr .EQ ZPDRV+6
ZPBMDataPtr .EQ ZPDRV+8
ZPBMMaskPtr .EQ ZPDRV+10
ZPBMSavePtr .EQ ZPDRV+12
*--------------------------------------
ZPTmpWord .EQ ZPDRV+14
*--------------------------------------
LBUF.C1 .EQ ZPDRV+16
LBUF.C1.MASK .EQ ZPDRV+17 Bits to CLR in VMEM : 11100000 00000000 00111111
LBUF.C1.DATA .EQ ZPDRV+18 Bits to SET/ORA/XOR : 000ccccc cccccccc cc000000
LBUF.C2 .EQ ZPDRV+19 C1 C2
LBUF.C2.MASK .EQ ZPDRV+20
LBUF.C2.DATA .EQ ZPDRV+21
*--------------------------------------
BLT.BMMaskPtr .EQ ZPDRV+22
BLT.BMDataPtr .EQ ZPDRV+24
BLT.BMBitOfs .EQ ZPDRV+26
BLT.BMBitOfsL .EQ ZPDRV+27
BLT.ScrBitOfs .EQ ZPDRV+28
BLT.ScrColIdx .EQ ZPDRV+29
BLT.CMASK .EQ ZPDRV+30
*--------------------------------------
ZPTmpByte .EQ ZPDRV+31
*--------------------------------------
DRV.CS.START cld
jmp (.1,x)
.1 .DA STATUS
.DA A2osX.BADCALL
.DA A2osX.BADCALL
.DA A2osX.BADCALL
.DA CONTROL
.DA A2osX.BADCALL
.DA OPEN
2015-03-14 21:48:35 +00:00
.DA CLOSE
.DA A2osX.BADCALL
2017-11-14 16:57:34 +00:00
.DA WRITE
*--------------------------------------
2017-11-14 16:57:34 +00:00
J.Cmds .DA SETPIXEL
2015-03-14 21:48:35 +00:00
.DA GETPIXEL
.DA HLINE
.DA VLINE
.DA FILLRECT
2015-03-14 21:48:35 +00:00
.DA BITBLT
.DA GETRECTBUFSIZE
*--------------------------------------
J.LBUF.DrawAtY .DA LBUF.DrawAtY.XOR
.DA LBUF.DrawAtY.SET
.DA LBUF.DrawAtY.ORA
.DA $ffff
.DA LBUF.DrawAtY.AND.XOR
.DA LBUF.DrawAtY.AND.SET
.DA LBUF.DrawAtY.AND.ORA
2017-11-23 16:51:52 +00:00
L.SHIFT .DA SHIFT.L1
.DA SHIFT.L2
.DA SHIFT.L3
.DA SHIFT.L4
.DA SHIFT.L5
.DA SHIFT.L6
2017-11-15 07:27:12 +00:00
L.Color.Pixels .DA Color.Pixels
2015-03-14 21:48:35 +00:00
.DA 0 end or relocation
*--------------------------------------
2018-12-19 07:12:58 +00:00
STATUS >STYA ZPIOCTL
2019-01-09 16:42:20 +00:00
ldy #S.IOCTL.BUFPTR
lda (ZPIOCTL),y
sta ZPBasePtr
iny
lda (ZPIOCTL),y
sta ZPBasePtr+1
2018-12-19 07:12:58 +00:00
ldy #S.IOCTL.STATCODE
lda (ZPIOCTL),y
beq .1
cmp #S.IOCTL.STATCODE.GETDIB
bne STATUS.DCB
2019-01-09 16:42:20 +00:00
ldy #S.DIB-1
2018-12-19 07:12:58 +00:00
.HS 2C bit abs
2019-01-09 16:42:20 +00:00
.1 ldy #3
2018-12-19 07:12:58 +00:00
2019-01-09 16:42:20 +00:00
.2 lda DIB,y
sta (ZPBasePtr),y
dey
2018-12-19 07:12:58 +00:00
bpl .2
clc
rts
2018-12-19 07:12:58 +00:00
2019-01-09 16:42:20 +00:00
STATUS.DCB cmp #S.IOCTL.STATCODE.GETDCB
bne STATUS.9
ldy #S.DCB.GFX-1
.2 lda DCB,y
sta (ZPBasePtr),y
dey
bpl .2
clc
rts
2018-12-19 07:12:58 +00:00
STATUS.9 lda #MLI.E.BADCTL
sec
rts
*--------------------------------------
2019-08-02 14:36:49 +00:00
OPEN tax DEV.ID in A
2019-08-02 14:36:49 +00:00
lda #S.DIB.S.OPENED
bit DIB+S.DIB.S
bne CLOSE.IOE
txa
ldx #0
2018-12-20 16:23:43 +00:00
.10 ldy A2osX.SCRNDEVS,x
beq .20
inx
cpx #K.SCR.MAX
bne .10
lda #E.OOH
sec
rts
.20 sta A2osX.SCRNDEVS,x
sta DCB+S.DCB.GFX.DEVID
2019-01-09 16:42:20 +00:00
2018-12-20 16:23:43 +00:00
lda #S.DIB.S.OPENED
tsb DIB+S.DIB.S
ldx #0
2019-08-02 14:36:49 +00:00
ldy #0
2017-11-23 16:51:52 +00:00
.1 lda L.SHIFT,x Get relocated LO BYTE
sta Shift.L.LO,y
inx
2017-11-23 16:51:52 +00:00
lda L.SHIFT,x Get relocated HI BYTE
sta Shift.L.HI,y
inx
iny
2019-08-02 14:36:49 +00:00
cpy #6
bne .1
2017-11-23 16:51:52 +00:00
ldx #0 SHIFT.L1 = SHIFT.R6 !!!
2019-08-02 14:36:49 +00:00
ldy #5
2017-11-23 16:51:52 +00:00
.2 lda L.SHIFT,x Get relocated LO BYTE
sta Shift.R.LO,y
2017-11-23 16:51:52 +00:00
inx
lda L.SHIFT,x Get relocated HI BYTE
sta Shift.R.HI,y
2017-11-23 16:51:52 +00:00
inx
dey
2019-08-02 14:36:49 +00:00
bpl .2
2015-03-14 21:48:35 +00:00
*--------------------------------------
2019-01-09 16:42:20 +00:00
CONTROL lda DCB+S.DCB.GFX.DEVID NON STANDARD
2019-01-08 16:29:26 +00:00
cmp A2osX.ASCREEN
beq .8
sta A2osX.ASCREEN
ldy #0
2019-08-26 06:29:18 +00:00
2018-12-19 07:12:58 +00:00
bit DCB+S.DCB.GFX.S
2019-08-26 06:29:18 +00:00
bpl .1 //c,EVE mode
2019-08-26 06:29:18 +00:00
ldy #CONTROL.EVE-CONTROL.80C
2019-08-26 06:29:18 +00:00
.1 ldx CONTROL.80C,y
beq .8 Ending 0
sta $C000,x
iny
bra .1
2019-08-02 14:36:49 +00:00
.8 clc
rts
CLOSE.IOE lda #MLI.E.IO
sec
rts
2016-06-07 06:10:18 +00:00
*--------------------------------------
2019-08-02 14:36:49 +00:00
CLOSE lda #S.DIB.S.OPENED
bit DIB+S.DIB.S
beq CLOSE.IOE
trb DIB+S.DIB.S
ldx #0
lda DCB+S.DCB.GFX.DEVID
.1 cmp A2osX.SCRNDEVS,x
bne .2
stz A2osX.SCRNDEVS,x
.2 inx
cpx #K.SCR.MAX
bne .1
clc
rts
2017-11-14 16:57:34 +00:00
*--------------------------------------
2018-12-20 16:23:43 +00:00
WRITE >STYA ZPIOCTL NON STANDARD
2019-01-10 07:00:45 +00:00
sta SET80STORE
2018-12-19 07:12:58 +00:00
lda (ZPIOCTL) Get Cmd
2017-11-14 16:57:34 +00:00
.1 tax
ldy CB.CmdLen,x
2018-12-19 07:12:58 +00:00
.2 lda (ZPIOCTL),y
2017-11-14 16:57:34 +00:00
sta CB.Cache,y
dey
bpl .2
2017-11-15 16:29:23 +00:00
2017-11-14 16:57:34 +00:00
.3 jsr .10
2017-11-16 07:12:03 +00:00
clc
2017-11-14 16:57:34 +00:00
rts
.10 jmp (J.Cmds,x)
*--------------------------------------
* IN:
* Y = LO
2017-11-14 16:57:34 +00:00
* A = HI
* OUT:
* A = DIV
* X = MOD
*--------------------------------------
2017-11-14 16:57:34 +00:00
DIVMOD7YA dec
bmi .2
clc
beq .1
2017-11-15 16:29:23 +00:00
lda DIV7.512,y
adc #$49
ldx MOD7.512,y
rts
.1 lda DIV7.256,y
adc #$24
ldx MOD7.256,y
rts
.2 lda DIV7.0,y
ldx MOD7.0,y
rts
2015-03-14 21:48:35 +00:00
*--------------------------------------
* IN:
* Y,A = num1 (16)
* X = num2 (8)
* OUT:
* Y,A = (Y,A) * X
*--------------------------------------
YAMultX stx ZPTmpByte
sty ZPTmpWord
sta ZPTmpWord+1
ldy #0 Result LO
tya Result HI
bra .3
.1 pha
tya
clc
adc ZPTmpWord
tay
pla
adc ZPTmpWord+1
.2 asl ZPTmpWord
rol ZPTmpWord+1
.3 lsr ZPTmpByte
bcs .1
bne .2
rts
*--------------------------------------
2018-12-19 07:12:58 +00:00
.INB USR/SRC/DRV/DHGR.DRV.S.BLT
.INB USR/SRC/DRV/DHGR.DRV.S.LBUF
.INB USR/SRC/DRV/DHGR.DRV.S.LINE
.INB USR/SRC/DRV/DHGR.DRV.S.PIX
.INB USR/SRC/DRV/DHGR.DRV.S.RECT
*--------------------------------------
2015-06-03 18:30:57 +00:00
DRV.CS.END
*--------------------------------------
2018-12-19 07:12:58 +00:00
.INB USR/SRC/DRV/DHGR.DRV.G
*--------------------------------------
2019-08-26 06:29:18 +00:00
CONTROL.80C .DA #SETIOUDIS
.DA #CLRTEXT
.DA #SETHIRES
2019-08-26 06:29:18 +00:00
.DA #CLR80DISP
2019-08-26 06:29:18 +00:00
.DA #SETAN3
.DA #CLRAN3
.DA #SETAN3
.DA #CLRAN3
.DA #SET80DISP
2019-08-26 06:29:18 +00:00
.DA #SETAN3
.DA #CLRAN3
.DA #SETAN3
2019-08-26 06:29:18 +00:00
.DA #0
CONTROL.EVE .DA #SETIOUDIS
.DA #CLRTEXT
.DA #SETHIRES
2019-08-26 06:29:18 +00:00
.DA #HR1.OFF
.DA #HR2.ON
.DA #HR3.ON
.DA #0
*--------------------------------------
2019-08-02 14:36:49 +00:00
Shift.L.LO .BS 6
Shift.L.HI .BS 6
Shift.R.LO .BS 6
Shift.R.HI .BS 6
*--------------------------------------
2017-11-14 16:57:34 +00:00
CB.CmdLen .DA S.CB.Y1+1 SETPIXEL
.DA S.CB.Y1+1 GETPIXEL
.DA S.CB.X2+1 HLINE
2017-11-15 16:29:23 +00:00
.DA S.CB.Y2+1 VLINE
2017-11-14 16:57:34 +00:00
.DA S.CB.Y2+1 FILLRECT
.DA S.CB.DstPtr+1 BITBLT
.DA S.CB.DstPtr+1 GETRECTBUFSIZE
2017-11-14 16:57:34 +00:00
*--------------------------------------
CB.Cache .BS S.CB
BM.Cache .BS S.BM
2017-11-14 16:57:34 +00:00
*--------------------------------------
LBUF.MASK .BS 81 81 because of sta LBUF.DATA+1,x!!!
LBUF.DATA .BS 81
*--------------------------------------
2018-12-19 07:12:58 +00:00
DIB .DA #0
.DA #0,#0,#0
>PSTR "Apple II DHGR"
.BS 3
2018-07-19 15:33:55 +00:00
.DA #S.DIB.T.GFX
.DA #0
2018-12-19 07:12:58 +00:00
.DA K.VER
*--------------------------------------
2018-12-19 07:12:58 +00:00
DCB .DA #S.DCB.T.GFX
2018-12-20 16:23:43 +00:00
.BS 1 DEV.ID
2019-08-26 06:29:18 +00:00
.DA #0 S.DCB.GFX.S default to 0
2018-12-19 07:12:58 +00:00
.DA #S.CB.M.MONO+S.CB.M.C16 F
.DA 560 W
.DA 192 H
2016-06-22 21:12:09 +00:00
*--------------------------------------
2018-12-19 07:12:58 +00:00
DRV.END
2019-01-09 16:42:20 +00:00
.LIST ON
2018-12-20 16:23:43 +00:00
DRV.CS.SIZE .EQ DRV.CS.END-DRV.CS.START
DRV.SIZE .EQ DRV.END-DRV.CS.START
2019-01-09 16:42:20 +00:00
.LIST OFF
2015-03-14 21:48:35 +00:00
MAN
2018-12-19 07:12:58 +00:00
SAVE USR/SRC/DRV/DHGR.DRV.S
2015-03-14 21:48:35 +00:00
ASM