2016-10-17 15:47:50 +00:00
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PR#3
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PREFIX /A2OSX.SRC
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NEW
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INC 1
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AUTO 6
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.LIST OFF
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*--------------------------------------
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* WIZnet W5100 IO Registers
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*--------------------------------------
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.MA AR.SELECT
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lda /W5100.AR.]1
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sta W5100.AR,x
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lda #W5100.AR.]1
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sta W5100.AR+1,x
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.EM
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*--------------------------------------
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2017-02-17 22:04:53 +00:00
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W5100.MR .EQ $C084 Mode Register
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2016-10-17 15:47:50 +00:00
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W5100.MR.RST .EQ %10000000
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W5100.MR.PB .EQ %00010000
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W5100.MR.PPPOE .EQ %00001000
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W5100.MR.AI .EQ %00000010
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W5100.MR.IND .EQ %00000001
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2017-02-17 22:04:53 +00:00
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W5100.AR .EQ $C085 Memory Pointer
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2016-10-17 15:47:50 +00:00
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W5100.AR.GAR .EQ $0001
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W5100.AR.SUBR .EQ $0005
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W5100.AR.SHAR .EQ $0009
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W5100.AR.SIPR .EQ $000F
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W5100.AR.IR .EQ $0015
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W5100.AR.IMR .EQ $0016
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W5100.AR.RTR .EQ $0017
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W5100.AR.RCR .EQ $0019
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W5100.AR.RMSR .EQ $001A
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W5100.AR.TMSR .EQ $001B
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W5100.AR.PATR .EQ $001C
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W5100.AR.PTIMER .EQ $0028
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W5100.AR.PMAGIC .EQ $0029
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W5100.AR.UIPR .EQ $002A
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W5100.AR.UPORT .EQ $002E
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W5100.AR.S0.MR .EQ $0400
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W5100.AR.S0.MR.MULTI .EQ $80
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W5100.AR.S0.MR.MF .EQ $40
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W5100.AR.S0.MR.NDMC .EQ $20
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W5100.AR.S0.MR.TCP .EQ $01
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W5100.AR.S0.MR.UDP .EQ $02
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W5100.AR.S0.MR.IPRAW .EQ $03
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W5100.AR.S0.MR.MACRAW .EQ $04
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W5100.AR.S0.MR.PPPOE .EQ $05
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W5100.AR.S0.CR .EQ $0401
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W5100.AR.S0.IR .EQ $0402
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W5100.AR.S0.SR .EQ $0403
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W5100.AR.S0.PORT .EQ $0404
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W5100.AR.S0.DHAR .EQ $0406
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W5100.AR.S0.DIPR .EQ $040C
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W5100.AR.S0.DPORT .EQ $0410
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W5100.AR.S0.MSSR .EQ $0412
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W5100.AR.S0.PROTO .EQ $0414
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W5100.AR.S0.TOS .EQ $0415
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W5100.AR.S0.TTL .EQ $0416
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W5100.AR.S0.TX.FSR .EQ $0420
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W5100.AR.S0.TX.RD .EQ $0422
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W5100.AR.S0.TX.WR .EQ $0424
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W5100.AR.S0.RX.RSR .EQ $0426
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W5100.AR.S0.RX.RD .EQ $0428
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2017-02-17 22:04:53 +00:00
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W5100.DR .EQ $C087
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2016-10-17 15:47:50 +00:00
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*--------------------------------------
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TX.BASE .EQ $4000
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RX.BASE .EQ $6000
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RXTX.MASK .EQ $1FFF
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*--------------------------------------
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MAN
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2017-02-04 22:07:06 +00:00
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SAVE /A2OSX.DEV/INC/NET.W5100.I
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