Apple-2-SW
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A2osX
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CPU Speed:test code

This commit is contained in:
burniouf 2023-01-18 08:19:41 +01:00
parent eaa728fa9f
commit 104360d2fa
3 changed files with 44 additions and 43 deletions
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BIN
.Floppies/A2OSX.BUILD.po
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22
BIN/UNAME.S.txt
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@ -29,7 +29,7 @@ bAltCPU .BS 1
bKernelVersion .BS 1
bKernelBuild .BS 1
bKernelMode .BS 1
bKernelClk .BS 1
bKernelHz .BS 1
bFSID .BS 1
ZS.END .ED
*--------------------------------------
@ -74,6 +74,7 @@ L.KERNEL.MODES .DA KERNEL.POLLING
.DA KERNEL.PREEMPT
L.FSID .DA FSID.PRODOS
.DA FSID.FX
L.KERNEL.HZ .DA KERNEL.HZ
.DA 0
*--------------------------------------
CS.INIT clc
@ -161,20 +162,15 @@ CS.RUN.PRINT bit bHostName
>LDYA pData
jsr CS.RUN.PRINTYA
.7 bit bKernelMode
bpl .8
jsr CS.RUN.KMode
.8 bit bKernelClk
.8 bit bKernelHz
bpl .9
jsr CS.RUN.HZ
.9 bit bFSID
bpl .10
@ -281,6 +277,11 @@ CS.RUN.TYPESUBT lda A2osX.HWType
.8 rts
*--------------------------------------
CS.RUN.HZ >PUSHW L.KERNEL.HZ
>PUSHB A2osX.HZ
>PUSHBI 1
jmp CS.RUN.PRINTF
*--------------------------------------
CS.RUN.FSID ldx #0
bit A2osX.FSID
bpl .1
@ -375,7 +376,7 @@ OptionVars .DA #bHostName,#bHostName
.DA #bKernelVersion,#bKernelVersion
.DA #bKernelBuild,#bKernelBuild
.DA #bKernelMode,#bKernelMode
.DA #bKernelClk,#bKernelClk
.DA #bKernelHz,#bKernelHz
.DA #bFSID,#bFSID
*--------------------------------------
MSG.USAGE .CS "Usage : UNAME\r\n"
@ -409,8 +410,7 @@ KERNEL.VER .AZ "A2osX_%d.%02d"
KERNEL.POLLING .AZ "Polling_Mode"
KERNEL.IRQ .AZ "IRQ_Mode"
KERNEL.PREEMPT .AZ "Preemptive_Mode"
KERNEL.50 .AZ "50hz"
KERNEL.60 .AZ "60hz"
KERNEL.HZ .AZ "%d0hz"
FSID.PRODOS .AZ "ProDOS"
FSID.FX .AZ "FX"
*--------------------------------------

65
SYS/KERNEL.S.INIT.txt
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@ -473,6 +473,10 @@ CPU.Init >PUSHWI MSG.CPU
lda A2osX.HWType
cmp #A2osX.HWType.IIc
beq CPU.Init2c
*--------------------------------------
* VBL = 20.000us 50hz, 16.666 60hz
*--------------------------------------
ldx A2osX.HZ
.1 bit VBL //e : Wait VBL high....
bpl .1
@ -480,27 +484,23 @@ CPU.Init >PUSHWI MSG.CPU
.2 lda VBL //e : wait VBL low
bmi .2
.3 ldx A2osX.HZ
.3 pha (3)
.4 pha (3)
pla (4)
nop
nop
nop
pha (3)
pla (4)
dex
bne .4
lda CPU.Hz2L-5,x (5) 50Hz = 36, 60Hz = 29
iny
cpy #100
bne .5
.4 dec (2)
bne .4 (3)
iny (2) 38*5+10 = 200us
cpy #100 (3)
bne .5 (3)
inc A2osX.CPUSPEED+1
ldy #0
.5 eor VBL
.5 pla
eor VBL
bpl .3
lda VBL
@ -568,6 +568,8 @@ CPU.InitOk plp
>SYSCALL2 printf
rts
*--------------------------------------
CPU.Hz2L .DA #36,#29
*--------------------------------------
CPU.Init.Z80 >PUSHWI MSG.Z80
>PUSHBI 0
>SYSCALL2 printf
@ -662,7 +664,7 @@ DetectZ80 ldx #Z80Code.Size
DevMgrInit >LDYAI MSG.DEV
>SYSCALL2 puts
jsr DevMgrInit.VXD
jsr DevMgr.VXD
lda DEVCNT
sta .1+1
@ -704,13 +706,13 @@ DevMgrInit >LDYAI MSG.DEV
cmp #$FF /RAM is always $FF00
bne .2
jsr DevMgrInit.RAM
jsr DevMgr.RAM
bra .8 keep slot free
.2 cmp #$D0 Disk II Driver is $D000
bne .3
jsr DevMgrInit.DII
jsr DevMgr.DII
lda #A2osX.S.DII
bra .7 Go mark slot as USED
@ -719,7 +721,7 @@ DevMgrInit >LDYAI MSG.DEV
cmp #$C0
bcs .4 $C0 .. $CF, in slot ROM
jsr DevMgrInit.USR Outside ROM/LC space, User loaded BLK dev
jsr DevMgr.USR Outside ROM/LC space, User loaded BLK dev
bra .8 keep slot free
.4 ldx #SmartPort.SIG-SmartPort.OFS-1
@ -736,14 +738,14 @@ DevMgrInit >LDYAI MSG.DEV
lda (ZPPtr1),y
bne .6 $Cn07=00 : SmartPort
jsr DevMgrInit.SP
jsr DevMgr.SP
lda #A2osX.S.SP
bra .7
.53 jsr DevMgrInit.RSP Remapped SP devices....
.53 jsr DevMgr.RSP Remapped SP devices....
bra .8 don't mark slot as busy
.6 jsr DevMgrInit.BLK
.6 jsr DevMgr.BLK
lda #A2osX.S.BLK
.7 ldx FD.BDEV+S.FD.DEV.BUSID
@ -756,19 +758,19 @@ DevMgrInit >LDYAI MSG.DEV
.80 clc
rts
*--------------------------------------
DevMgrInit.RAM ldx #0
DevMgr.RAM ldx #0
.HS 2C BIT ABS
*--------------------------------------
DevMgrInit.DII ldx #2
DevMgr.DII ldx #2
.HS 2C BIT ABS
*--------------------------------------
DevMgrInit.USR ldx #4
DevMgr.USR ldx #4
.HS 2C BIT ABS
*--------------------------------------
DevMgrInit.BLK ldx #6
bra DevMgrInit.AddBDev
DevMgr.BLK ldx #6
bra DevMgr.AddBDev
*--------------------------------------
DevMgrInit.SP ldy #$ff
DevMgr.SP ldy #$ff
lda (ZPPtr1),y
clc
adc #3 Compute smartport entry point
@ -777,10 +779,9 @@ DevMgrInit.SP ldy #$ff
ldx #8
.HS 2C BIT ABS
DevMgrInit.RSP ldx #10
DevMgr.RSP ldx #10
*--------------------------------------
DevMgrInit.AddBDev
>LDYA DRV.BLKDEVX,x
DevMgr.AddBDev >LDYA DRV.BLKDEVX,x
>STYA FD.BDEV+S.FD.DEV.DRVPTR
>PUSHWI MSG.BLKDEV
@ -796,7 +797,7 @@ DevMgrInit.AddBDev
rts
*--------------------------------------
DevMgrInit.VXD >LDYAI VSD.PATCH
DevMgr.VXD >LDYAI VSD.PATCH
jsr .10
bcc .8