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https://github.com/A2osX/A2osX.git
synced 2024-06-08 08:33:37 +00:00
Kernel 0.93+
This commit is contained in:
Rémy GIBERT
parent
70357a5547
commit
8737f2669d
Binary file not shown.
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@ -15,7 +15,7 @@ AUTO 4,1
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.INB INC/NET.HTTP.I
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*--------------------------------------
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RESP.BUFSIZE .EQ 1024
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TIMEOUT.MAX .EQ 200 20 sec.
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TIMEOUT.MAX .EQ 50 5 sec.
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*--------------------------------------
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.DUMMY
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.OR ZPBIN
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@ -50,11 +50,14 @@ Dev.Detect >STYA ARGS
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>SYSCALL puts
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ldx #$70
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ldy #7
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.1 lda A2osX.S,y IO based detection, avoid scanning in Disk Controller IO!!!!
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bne .2
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lda L91C96.BSR+1,x
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cmp #DEVID
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beq .3
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.2 dec FD.DEV.NAME+3
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txa
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sec
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@ -62,32 +65,38 @@ Dev.Detect >STYA ARGS
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tax
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dey
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bne .1
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>LDYA L.MSG.DETECT.KO
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>SYSCALL puts
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lda #MLI.E.NODEV
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sec
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rts
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.3 stx DEVSLOTx0
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sty DEVSLOT0x
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jsr Dev.ParseArgs
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bcs .9
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.8 >PUSHW L.FD.DEV.NAME
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>PUSHBI 2
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>LDYA L.MSG.DETECT.OK
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>SYSCALL printf
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>PUSHWI DRV.END
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>PUSHWI DRV.CS.END-DRV.CS.START
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>PUSHWI DRV.CS.START
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>LDYA L.DRV.CS.START
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>SYSCALL InsDrv
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bcs .9
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>STYA FD.DEV+S.FD.DEV.DRVPTR
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>PUSHW L.FD.DEV.NAME
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>LDYA L.FD.DEV
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>SYSCALL MKDEV
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bcs .9
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ldx DEVSLOT0x
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lda #A2osX.S.NIC
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sta A2osX.S,x
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@ -125,7 +134,7 @@ Dev.ParseArgs >LDYA ARGS
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CS.END
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ARGS .BS 2
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MSG.DETECT .AZ "LanCeGS/SMSC91C96 Driver."
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MSG.DETECT.OK .AZ "LanCeGS/SMSC91C96 Installed As Device : %S\r\n"
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MSG.DETECT.OK .AZ "LanCeGS/SMSC91C96 Installed As Device : %s\r\n"
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MSG.DETECT.KO .AZ "Hardware Not Found."
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SSCANF.MAC .AZ "%h:%h:%h:%h:%h:%h"
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*--------------------------------------
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@ -158,7 +167,6 @@ DRV.CS.START cld
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.DA CLOSE
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.DA READ
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.DA WRITE
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.DA A2osX.BADCALL IRQ
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.DA 0 end or relocation
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*--------------------------------------
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STATUS >STYA ZPIOCTL
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@ -168,6 +176,7 @@ STATUS >STYA ZPIOCTL
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beq .1
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cmp #S.IOCTL.STATCODE.GETDIB
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bne STATUS.DCB
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ldx #S.DIB-1
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.HS 2C bit abs
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.1 ldx #3
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@ -178,12 +187,16 @@ STATUS >STYA ZPIOCTL
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iny
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lda (ZPIOCTL),y
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sta .3+2
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.2 lda DIB,x
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.3 sta $ffff,x SELF MODIFIED
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dex
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bpl .2
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clc
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rts
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STATUS.DCB cmp #S.IOCTL.STATCODE.GETDCB
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bne STATUS.9
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@ -206,13 +219,16 @@ STATUS.DCB cmp #S.IOCTL.STATCODE.GETDCB
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lda #S.DCB.NIC.LINK.FD
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tsb DCB+S.DCB.NIC.LINK
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.1 ldy #S.IOCTL.BUFPTR
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lda (ZPIOCTL),y
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sta .4+1
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iny
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lda (ZPIOCTL),y
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sta .4+2
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ldx #S.DCB.NIC-1
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.3 lda DCB,x
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.4 sta $ffff,x SELF MODIFIED
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dex
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@ -220,6 +236,7 @@ STATUS.DCB cmp #S.IOCTL.STATCODE.GETDCB
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clc
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rts
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STATUS.9 lda #MLI.E.BADCTL
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sec
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rts
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@ -227,6 +244,7 @@ STATUS.9 lda #MLI.E.BADCTL
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OPEN lda #S.DIB.S.OPENED
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bit DIB+S.DIB.S
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bne .9
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jsr CLOSE
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* ldx DEVSLOTx0 Done by CLOSE
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@ -239,6 +257,7 @@ OPEN lda #S.DIB.S.OPENED
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
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sta L91C96.0.RCR+1,x
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lda #1
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sta L91C96.BSR,x
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lda #L91C96.1.CR.NOWAIT
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@ -256,6 +275,7 @@ OPEN lda #S.DIB.S.OPENED
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iny
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cpy #6
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bne .1
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bra .3
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.2 lda S.DCB.NIC.MAC,y
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@ -264,6 +284,7 @@ OPEN lda #S.DIB.S.OPENED
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iny
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cpy #6
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bne .2
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.3 ldx DEVSLOTx0
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lda #L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
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sta L91C96.1.CTR,x
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@ -277,17 +298,24 @@ OPEN lda #S.DIB.S.OPENED
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rts
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*--------------------------------------
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CLOSE ldx DEVSLOTx0
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stz L91C96.BSR,x
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lda #L91C96.0.RCR.RESET
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.RESET
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sta L91C96.0.RCR+1,x
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lda $C019 we can use VBL as we are not on //c
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.1 eor $C019
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bpl .1
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lda $C019
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.2 eor $C019
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bpl .2
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stz L91C96.0.RCR,x
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stz L91C96.0.RCR+1,x
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clc
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@ -297,17 +325,16 @@ READ php
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sei
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>STYA ZPIOCTL
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ldx DEVSLOTx0
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lda #2
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sta L91C96.BSR,x
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lda L91C96.2.IST,x
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and #L91C96.2.IST.RCV
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bne .1
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lda #E.NODATA
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.9 plp
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sec
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rts
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beq READWRITE.9
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.1 lda #L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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sta L91C96.2.PTR,x
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lda /L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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@ -321,26 +348,32 @@ READ php
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asl if odd, CS
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lda L91C96.2.DATA,x get lo byte count
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sbc #5 compute Size
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sta Size
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pha
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ldy #S.IOCTL.BYTECNT
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sta (ZPIOCTL),y
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eor #$ff
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sta Counter
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lda L91C96.2.DATA,x get hi byte count
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sbc #0
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sta Size+1
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iny
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sta (ZPIOCTL),y
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eor #$ff
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sta Counter+1
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eor #$ff
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ply
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ply Y,A = Size
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>SYSCALL2 getmem
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bcs .9
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bcs READWRITE.99
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>STYA ZPBufPtr
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phx
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phy
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ldy #S.IOCTL.BUFPTR+1
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sta (ZPIOCTL),y
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dey
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@ -349,39 +382,53 @@ READ php
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ldx DEVSLOTx0
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ldy #0
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.2 inc Counter
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bne .21
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inc Counter+1
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beq .4
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.21 lda L91C96.2.DATA,x
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sta (ZPBufPtr),y
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iny
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bne .3
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inc ZPBufPtr+1
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.3 inc Counter
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bne .31
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inc Counter+1
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beq .4
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.31 lda L91C96.2.DATA,x
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sta (ZPBufPtr),y
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iny
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bne .2
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inc ZPBufPtr+1
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bra .2
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.4 lda #L91C96.2.MMUCR.REMREL
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sta L91C96.2.MMUCR,x
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.8 pla hMem
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plp
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clc
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rts
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*--------------------------------------
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READWRITE.9 lda #E.NODATA
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READWRITE.99 plp
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sec
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rts
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*--------------------------------------
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WRITE php
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sei
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>STYA ZPIOCTL
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ldx DEVSLOTx0
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lda #2
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sta L91C96.BSR,x
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@ -395,27 +442,30 @@ WRITE php
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adc #6 3 WORDs more Status, len & Control
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bne .10
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clc LO byte is 0, no need for an extra empty page
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.10 iny
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lda (ZPIOCTL),y
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sta Size+1
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eor #$ff
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sta Counter+1
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eor #$ff
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adc #0
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.1 ora #L91C96.2.MMUCR.ALLOC
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sta L91C96.2.MMUCR,x
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ldy #0
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.2 lda L91C96.2.IST,x
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and #L91C96.2.IST.ALLOC
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bne .3
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dey
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bne .2
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lda #E.NODATA
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.9 plp
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sec
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rts
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bra READWRITE.9
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.3 lda L91C96.2.AAR,x
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sta L91C96.2.PNR,x
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@ -429,8 +479,10 @@ WRITE php
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iny
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lda (ZPIOCTL),y
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sta ZPBufPtr+1
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ldy #S.ETH.SRCMAC+5 Add Src MAC Address
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ldx #5
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.4 lda S.DCB.NIC.MAC,x
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sta (ZPBufPtr),y
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dey
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@ -440,29 +492,39 @@ WRITE php
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ldx DEVSLOTx0
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stz L91C96.2.DATA,x write fake status word
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stz L91C96.2.DATA,x
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lda Size
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pha
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eor #$01
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lsr
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pla
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adc #$05 add 5 if odd, 6 if even
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sta L91C96.2.DATA,x
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lda Size+1
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adc #$00
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sta L91C96.2.DATA,x
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ldy #2
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.5 inc Counter
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bne .51
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inc Counter+1
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beq .70
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.51 lda (ZPBufPtr),y
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iny
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bne .6
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inc ZPBufPtr+1
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.6 inc Counter
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bne .61
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inc Counter+1
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beq .71
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.61 sta L91C96.2.DATA,x
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lda (ZPBufPtr),y
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sta L91C96.2.DATA,x
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@ -470,15 +532,19 @@ WRITE php
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bne .5
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inc ZPBufPtr+1
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bra .5
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.70 lda #0
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sta L91C96.2.DATA,x
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sta L91C96.2.DATA,x
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bra .8
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.71 sta L91C96.2.DATA,x
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lda #%00100000 signal an extra (odd) byte
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sta L91C96.2.DATA,x
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.8 lda #L91C96.2.MMUCR.NQPKT
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sta L91C96.2.MMUCR,x
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plp
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clc
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rts
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@ -107,8 +107,8 @@ Dev.Detect >STYA ARGS
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ldx DEVSLOT0x
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lda #A2osX.S.NIC
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sta A2osX.S,x
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* clc.9
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rts
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* clc
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.9 rts
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*--------------------------------------
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Dev.ParseArgs >LDYA ARGS
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>STYA ZPArgPTR
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