Kernel 0.94++

This commit is contained in:
Rémy GIBERT 2021-05-31 12:10:53 +02:00
parent bb846e562b
commit e27576aeef
6 changed files with 95 additions and 88 deletions

Binary file not shown.

Binary file not shown.

View File

@ -161,33 +161,35 @@ CS.DOEVENT sec
CS.QUIT clc
rts
*--------------------------------------
NSC.Init lda RDC3ROM
php
NSC.Init php
sei
lda RDC3ROM
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
sta CLRC3ROM
ldx #7
ldx #8
.1 ldy #8
.2 lda $C304
lsr
ror DS1216E.DETECT,x
ror DS1216E.DETECT-1,x
dey
bne .2
dex
bpl .1
bne .1
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 rts
.8 plp
rts
*--------------------------------------
NSC.Read php
sei
@ -196,7 +198,7 @@ NSC.Read php
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
sta CLRC3ROM
jsr NSC.Select
@ -214,9 +216,9 @@ NSC.Read php
bpl .1
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 plp
rts
@ -228,7 +230,7 @@ NSC.Write php
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
sta CLRC3ROM
jsr NSC.Select
@ -255,9 +257,9 @@ NSC.Write php
bpl .3
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 plp
rts

View File

@ -358,7 +358,7 @@ LDR.ClkDevScan php
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
sta CLRC3ROM
sta $C300
@ -375,13 +375,14 @@ LDR.ClkDevScan php
dex
bne .1
sta $C300
lda $C304 Reset DS1216E comparison register with READ A2=1
ldy #8 Read 8 bytes...
ldx #8 Read 8 bytes...
.3 ldx #8 ....of 8 bits
.3 ldy #8 ....of 8 bits
lda DS1216E.SIG-1,y
lda DS1216E.SIG-1,x
.4 lsr
bcs .5
@ -391,10 +392,10 @@ LDR.ClkDevScan php
.5 bit $C301 Write Pattern bit in A0, with A2=0
.50 dex
.50 dey
bne .4
dey
dex
bne .3
ldx #8
@ -412,9 +413,9 @@ LDR.ClkDevScan php
bne .6
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 plp

View File

@ -14,7 +14,7 @@ NCLK.START php
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM ... after this
sta CLRC3ROM ... after this
sta $C300
lda $C304 Reset DS1216E comparison register with READ A2=1
@ -98,9 +98,9 @@ NCLK.START php
sta TIMELO+1
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 plp
rts

View File

@ -21,99 +21,114 @@ NSC.Init >LDYAI NSC.MSG0
beq .1
>LDYAI NSC.MSG1
jmp NSC.Print
bra NSC.Print
.1 jsr NSC.Detect
bcc .2
>LDYAI NSC.MSG2
jmp NSC.Print
bra NSC.Print
.2 jsr NSC.Install
lda MACHID
ora #MACHID.CLK
sta MACHID
lda #MACHID.CLK
tsb MACHID
>LDYAI NSC.MSG3
jmp NSC.Print
* jmp NSC.Print
*--------------------------------------
NSC.Print sty TmpPtr1
sta TmpPtr1+1
ldy #0
.1 lda (TmpPtr1),y
beq .8
jsr COUT
iny
bne .1
.8 jmp CROUT
*--------------------------------------
DS1216E.DATA1 .EQ $10
DS1216E.DATA2 .EQ $18
*--------------------------------------
NSC.Detect lda RDC3ROM
php
NSC.Detect php
sei
sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
lda RDC3ROM
php
* sta CLRC8ROM Make cards release $C8xx space
sta CLRC3ROM
sta $C300
ldx #7
ldx #8
.1 ldy #8
.2 lda $C304
lsr
ror DS1216E.DATA1,x
ror DS1216E.DATA1-1,x
dey
bne .2
dex
bpl .1
bne .1
sta $C300
lda $C304 Reset DS1216E comparison register with READ A2=1
ldy #7 Read 8 bytes...
ldx #8 Read 8 bytes...
.3 lda DS1216E.PATTERN,y
phy
.3 ldy #8 ....of 8 bits
ldy #8 ....of 8 bits
lda DS1216E.PATTERN-1,x
.4 lsr
bcs .5
.4 ldx #0
bit $C300
bra .50
lsr
bcc .5
.5 bit $C301 Write Pattern bit in A0, with A2=0
inx
.5 bit $C300,x Write Pattern bit in A0, with A2=0
dey
.50 dey
bne .4
ply
dey
bpl .3
dex
bne .3
ldx #7
ldx #8
.6 ldy #8
.7 lda $C304
lsr
ror DS1216E.DATA2,x
ror DS1216E.DATA2-1,x
dey
bne .7
dex
bpl .6
bne .6
plp
bmi .8
bpl .8
sta CLRC3ROM
sta SETC3ROM
.8 ldx #7
.8 plp
.81 lda DS1216E.DATA1,x
cmp DS1216E.DATA2,x
ldx #8
.81 lda DS1216E.DATA1-1,x
cmp DS1216E.DATA2-1,x
bne .9
dex
bpl .81
bne .81
sec
rts
@ -130,6 +145,7 @@ NSC.Install lda DATETIME+1
sta TmpPtr1+1
sbc /NSCDRV.B.START
sta offset+1
ldy #1
ldx #0
@ -175,18 +191,6 @@ NSCDRV.RELOC .DA NSCDRV.R1+1
* .DA NSCDRV.R9+1
.DA #0
*--------------------------------------
NSC.Print sty TmpPtr1
sta TmpPtr1+1
ldy #0
.1 lda (TmpPtr1),y
beq .8
jsr COUT
iny
bne .1
.8 jmp CROUT
*--------------------------------------
NSC.MSG0 .AZ -"NSC 'No-Slot-Clock'/DS1216E Driver For A2osX"
NSC.MSG1 .AZ -"Clock Already Present!"
NSC.MSG2 .AZ -"No DS1216E Detected!"
@ -203,7 +207,7 @@ NSCDRV php
php
* sta CLRC8ROM Make cards release $C8xx space
sta SETC3ROM
sta CLRC3ROM
sta $C300
lda $C304 Reset DS1216E comparison register with READ A2=1
@ -212,9 +216,7 @@ NSCDRV php
NSCDRV.1 ldy #8 ....of 8 bits
NSCDRV.R1 lda DS1216E.PATTERN-1,y
phy
NSCDRV.R1 lda DS1216E.PATTERN-1,x
NSCDRV.2 lsr
bcs NSCDRV.21
@ -227,7 +229,7 @@ NSCDRV.21 bit $C301 Write Pattern bit in A0, with A2=0
NSCDRV.22 dey
bne NSCDRV.2
dey
dex
bne NSCDRV.1
ldx #8
@ -238,6 +240,7 @@ NSCDRV.5 pha
lda $C304 Read Byte...
lsr
pla
ror
dey
@ -264,7 +267,7 @@ NSCDRV.R4 sta DS1216E.DATA-1,x
dex
bne NSCDRV.4
pha
pha DS1216E.DATA
NSCDRV.R7 lda DS1216E.DATA+1 Get MM
asl
@ -275,21 +278,22 @@ NSCDRV.R7 lda DS1216E.DATA+1 Get MM
NSCDRV.R8 ora DS1216E.DATA+2 Get DD
sta DATELO
* NSCDRV.R9 lda DS1216E.DATA Get YY
*NSCDRV.R9 lda DS1216E.DATA Get YY
pla
rol
sta DATELO+1
NSCDRV.R5 lda DS1216E.DATA+4 Get HH
sta TIMELO+1
NSCDRV.R6 lda DS1216E.DATA+5 Get mm
sta TIMELO
plp
bmi .8
NSCDRV.R5 lda DS1216E.DATA+4 Get HH
sta TIMELO+1
sta CLRC3ROM
plp
bpl .8
sta SETC3ROM
.8 plp
rts