PR#3
PREFIX /A2OSX.SRC
NEW
INC 1
AUTO 6
				.LIST OFF
*--------------------------------------
CPU.Init		>LDAXI MSG.CPU
				jsr PrintCStrAX
				
				jsr Detect6502			A = CPU type
				sta A2osX.CPUTYPE
				lda MSG.CPUTYPEH,y
				tax
				lda MSG.CPUTYPEL,y
				jsr PrintCStrAX

CPU.Init.Speed	lda MACHID
				and #MACHID.TYPE
				cmp #MACHID.TYPE.IIc
				beq CPU.Init.Z80
				
				>LDAXI MSG.CPU.SPEED
				jsr PrintCStrAX

				stz A2osX.RANDOM16
				stz A2osX.RANDOM16+1
				
				php
				sei
				
.1				bit VBL
				bpl .2

.2				bit VBL
				bmi .2

				ldx #0					Count LO
				lda #0					Count HI
				
.3				ldy #3					(2)
				
.4				nop						(2)
				dey						(2)
				bne .4					(2*)
				
				inc A2osX.RANDOM16		(6)
				bne .5					(2*)
				
				inc A2osX.RANDOM16+1	(6)
				bit VBL					(4)
				bpl .3					(2*)
				bmi .6
				
.5				nop						(2)
				nop						(2)
				nop						(2)
				bit VBL					(4)
				bpl .3					(2*)
				
.6				plp

				stz A2osX.CPUSPEED
				
.7				sec
				lda A2osX.RANDOM16
				sbc #100
				tax
				lda A2osX.RANDOM16+1
				sbc /100
				bcc .8
				
				stx A2osX.RANDOM16
				sta A2osX.RANDOM16+1
				inc A2osX.CPUSPEED
				bra .7

.8				lda A2osX.RANDOM16
				sta A2osX.CPUSPEED+1
				pha						push CPU speed LO
				lda A2osX.CPUSPEED
				pha						push CPU speed HI
				>LDAXI MSG.CPU.SPEEDOK
				jsr PrintCStrAX

CPU.Init.Z80	>LDAXI MSG.Z80
				jsr PrintCStrAX
				jsr DetectZ80
				bcs .9
				sta A2osX.Z80SLOT
				pha 					Push  Z80Slot
				
				>LDAXI MSG.Z80.OK
				jsr PrintCStrAX
				rts
				
.9				>LDAXI MSG.Z80.KO
				jsr PrintCStrAX
				rts
*--------------------------------------
* Out:
*  A = $60, 6502
*  A = $61, 65C02
*  A = $62, R65C02
*  A = $63, 65C816
*--------------------------------------
Detect6502		ldy #0					Test 6502 BCD bug
				sed
				lda #$99
				clc
				adc #$01
				cld
				bmi .9					BUG!, we have 6502

				ldy #3					test 65C816 TYX Instruction
				ldx #0
				.OP 65816
				tyx						TYX: if 65C816, x becomes non-zero
				.OP 65C02
				bne .9					worked! 65C816

				dey						y=2 -> R65C02
				ldx $EA					save zp $EA
				stz $EA					store 0 in $EA
*				.OP 65R02
				.HS F7EA				For compatibility with A2osX.ASM
*				smb 7,$EA				if not Rockwell, assemble as nop nop
*				.OP	65C02
				asl $EA					cs if Rockwell
				stx $EA					restore zp $EA
				bcs .9
				
				dey						y=1 -> 65C02
				
.9				tya
				ora #$60
				rts
*--------------------------------------
* Out:
*  A = Z80 Slot
*--------------------------------------
DetectZ80		ldx #Z80Code.Size
.1				lda Z80Code.Start-1,x
				sta $1000-1,x			00000H for Z80
				dex
				bne .1
				
				stz ZPQuickPtr1
				lda #$C1
				sta ZPQuickPtr1+1
				
.2				sta (ZPQuickPtr1)
				lda $100D
				bmi .8
				inc ZPQuickPtr1+1
				lda ZPQuickPtr1+1
				cmp #$C8
				beq .9					CS
				clc
				adc #$20
				sta $100A
				bra .2
				
.8				lda ZPQuickPtr1+1
				and #$0F
				clc
.9				rts
*--------------------------------------
Z80Code.Start	.HS	31FFFF				START:	LD SP,0FFFFH		Init Stack
				.HS	3EFF						LD A,0FFH			Set Flag
				.HS	320D00						LD (FLAG),A
				.HS	3200E1						LD (0E100H),A		Back to 6502
				.HS	18F3						JR START			Loop
				.HS 00					FLAG:	.DB 0
Z80Code.End		.EQ *
Z80Code.Size	.EQ Z80Code.End-Z80Code.Start
*--------------------------------------
MSG.CPU			>CSTRING "Checking CPU..."
MSG.CPU.SPEED	>CSTRING "Detecting CPU Speed..."
MSG.CPUTYPEL	.DA #MSG.6502
				.DA #MSG.65C02
				.DA #MSG.65R02
				.DA #MSG.65816
MSG.CPUTYPEH	.DA /MSG.6502
				.DA /MSG.65C02
				.DA /MSG.65R02
				.DA /MSG.65816
MSG.6502		>CSTRING "6502.\n"
MSG.65C02		>CSTRING "65C02.\n"
MSG.65R02		>CSTRING "65R02.\n"
MSG.65816		>CSTRING "65816.\n"
MSG.CPU.SPEEDOK	>CSTRING "%d.%02d Mhz.\n"
MSG.Z80			>CSTRING "Detecting Z80 CPU..."
MSG.Z80.OK		>CSTRING "Detected In Slot %d.\n"
MSG.Z80.KO		>CSTRING "Not Detected.\n"
*--------------------------------------
MAN
SAVE SYS/KERNEL.S.CPU
LOAD SYS/KERNEL.S
ASM