NEW
  AUTO 3,1
*--------------------------------------
LBUF.SetBounds1YA	
				jsr DIVMOD7YA			A=DIV, X=MOD
				sta LBUF.C1

				lda C1.MASK,x			
				sta LBUF.C1.MASK
				lda C1.DATA,x
				sta LBUF.C1.DATA
				rts
*--------------------------------------
LBUF.SetBounds2YA
				jsr DIVMOD7YA			A=DIV, X=MOD
				sta LBUF.C2
				cmp LBUF.C1				C1=C2, go combine in C1
				beq .1
			
				lda C2.MASK,x
				sta LBUF.C2.MASK
				lda C2.DATA,x
				sta LBUF.C2.DATA
				rts

.1				lda C1.MASK,x
				ora C2.MASK,x
				sta	LBUF.C1.MASK
				lda C1.DATA,x
				ora C2.DATA,x
				sta LBUF.C1.DATA
				rts
*--------------------------------------
LBUF.DrawAtY	lda BASEL,y				setup line Base Ptr
				sta ZPBasePtr
				lda BASEH,y
				sta ZPBasePtr+1

				lda CB.Cache+S.CB.OP
				and #$F
				tax
				jmp (J.LBUF.DrawAtY,x)
*--------------------------------------
LBUF.DrawAtY.SET
LBUF.DrawAtY.AND.SET
				ldx LBUF.C1				x C1->C2

				>X2PageY

				lda (ZPBasePtr),y		Clear screen at C1
				and LBUF.C1.MASK		with MASK bits
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
				and LBUF.C1.DATA		set ONLY bits starting at X1 mod 7
				ora ZPTmpByte			ora with screen bits
				sta (ZPBasePtr),y		update screen

				inx
				cpx LBUF.C2
				beq .2					C1=C2, go setup C2

				bcs .8					C1+1 > C2, we are done...

.1				>X2PageY

				lda LBUF.DATA,x			set all bytes between C1+1 & C2-1
				sta (ZPBasePtr),y

				inx
				cpx LBUF.C2
				bcc .1
				
.2				>X2PageY

				lda (ZPBasePtr),y		Get C2
				and LBUF.C2.MASK		clear ONLY bits ending at X2 mod 7
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
				and LBUF.C2.DATA		set ONLY bits ending at X2 mod 7
				ora ZPTmpByte
				sta (ZPBasePtr),y		update screen

.8				rts
*--------------------------------------		
LBUF.DrawAtY.XOR
LBUF.DrawAtY.AND.XOR
				lda #$51				EOR (Indirect),Y
				bra LBUF.DrawAtY.XXX
*--------------------------------------
LBUF.DrawAtY.ORA
				lda #$11				ORA (Indirect),Y
LBUF.DrawAtY.XXX
				sta .10+1
				sta .20+1
				sta .30+1

				ldx LBUF.C1				x C1->C2

				>X2PageY

				lda (ZPBasePtr),y		Get C1
				and LBUF.C1.MASK		clear ONLY bits starting at X1 mod 7
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
				and LBUF.C1.DATA		set ONLY bits starting at X1 mod 7
				ora ZPTmpByte
.10			ora (ZPBasePtr),y
				sta (ZPBasePtr),y		update screen
				inx
				cpx LBUF.C2
				beq .2					C1=C2, go setup C2

				bcs .8					C1+1 > C2, we are done...			

.1				>X2PageY

				lda LBUF.DATA,x			set all bytes between C1+1 & C2-1
.20			ora (ZPBasePtr),y
				sta (ZPBasePtr),y

				inx
				cpx LBUF.C2
				bne .1

.2				>X2PageY

				lda (ZPBasePtr),y		Get C2
				and LBUF.C2.MASK		clear ONLY bits ending at X2 mod 7
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
				and LBUF.C2.DATA		set ONLY bits ending at X2 mod 7
				ora ZPTmpByte
.30			ora (ZPBasePtr),y
				sta (ZPBasePtr),y		update screen	

.8				rts
*--------------------------------------
LBUF.DrawAtY.AND.ORA
				ldx LBUF.C1				x C1->C2

				>X2PageY

				lda LBUF.MASK,x			get MASK bits
				ora LBUF.C1.MASK		clear ONLY bits starting at X1 mod 7

				cpx LBUF.C2
				bne .1

				ora LBUF.C2.MASK		special case : C1=C2
				and (ZPBasePtr),y
				sta ZPTmpByte
				
				lda LBUF.DATA,x	
				and LBUF.C1.DATA
				and LBUF.C2.DATA
				ora ZPTmpByte
				sta (ZPBasePtr),y		update screen
				rts

.1				and (ZPBasePtr),y		Clear screen at C1
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
			and LBUF.C1.DATA			set ONLY bits starting at X1 mod 7
			ora ZPTmpByte				ora with screen bits
				
				bra .3

.2				>X2PageY

				lda (ZPBasePtr),y
			and LBUF.MASK,x
			ora LBUF.DATA,x				set all bytes between C1+1 & C2-1

.3				sta (ZPBasePtr),y		update screen

				inx
				cpx LBUF.C2
				bne .2

				>X2PageY

				lda LBUF.MASK,x			get MASK bits
				ora LBUF.C2.MASK
				and (ZPBasePtr),y
				sta ZPTmpByte

				lda LBUF.DATA,x			get DATA bits
			and LBUF.C2.DATA			set ONLY bits ending at X2 mod 7
			ora ZPTmpByte
				sta (ZPBasePtr),y		update screen

.8				rts
*--------------------------------------
MAN
SAVE usr/src/drv/dhgr.drv.s.lbuf
LOAD usr/src/drv/dhgr.drv.s
ASM