PR#3 PREFIX /A2OSX.BUILD LOMEM $A00 INC 1 AUTO 6 .LIST OFF *-------------------------------------- LBUF.SetBounds1YA jsr DIVMOD7YA A=DIV, X=MOD sta LBUF.C1 tay lda C1.MASK,x sta LBUF.C1.MASK lda C1.DATA,x sta LBUF.C1.DATA rts *-------------------------------------- LBUF.SetBounds2YA jsr DIVMOD7YA A=DIV, X=MOD sta LBUF.C2 tay cmp LBUF.C1 C1=C2, go combine in C1 beq .1 lda C2.MASK,x sta LBUF.C2.MASK lda C2.DATA,x sta LBUF.C2.DATA rts .1 lda C1.MASK,x and C2.MASK,x sta LBUF.C1.MASK lda C1.DATA,x and C2.DATA,x sta LBUF.C2.DATA rts *-------------------------------------- LBUF.DrawAtY lda BASEL,y setup line Base Ptr sta ZPBasePtr lda BASEH,y sta ZPBasePtr+1 lda CB.Cache+S.CB.OP bit #S.CB.OP.RESTORE bne .8 bit #S.CB.OP.SAVE beq .1 lda CB.Cache+S.CB.OP .1 and #$f tax jmp (J.LBUF.DrawAtY,x) .8 rts *-------------------------------------- LBUF.DrawAtY.XOR ldx LBUF.C1 x C1->C2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C1 and LBUF.C1.MASK clear ONLY bits starting at X1 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C1.DATA set ONLY bits starting at X1 mod 7 ora GBYTE sta (ZPBasePtr),y update screen inx cpx LBUF.C2 beq .2 C1=C2, go setup C2 bcs .8 C1+1 > C2, we are done... .1 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda LBUF.DATA,x set all bytes between C1+1 & C2-1 sta (ZPBasePtr),y inx cpx LBUF.C2 bne .1 .2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C2 and LBUF.C2.MASK clear ONLY bits ending at X2 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C2.DATA set ONLY bits ending at X2 mod 7 ora GBYTE sta (ZPBasePtr),y update screen .8 rts *-------------------------------------- LBUF.DrawAtY.SET ldx LBUF.C1 x C1->C2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C1 and LBUF.C1.MASK clear ONLY bits starting at X1 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C1.DATA set ONLY bits starting at X1 mod 7 ora GBYTE sta (ZPBasePtr),y update screen inx cpx LBUF.C2 beq .2 C1=C2, go setup C2 bcs .8 C1+1 > C2, we are done... .1 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda LBUF.DATA,x set all bytes between C1+1 & C2-1 sta (ZPBasePtr),y inx cpx LBUF.C2 bne .1 .2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C2 and LBUF.C2.MASK clear ONLY bits ending at X2 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C2.DATA set ONLY bits ending at X2 mod 7 ora GBYTE sta (ZPBasePtr),y update screen .8 rts *-------------------------------------- LBUF.DrawAtY.ORA ldx LBUF.C1 x C1->C2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C1 and LBUF.C1.MASK clear ONLY bits starting at X1 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C1.DATA set ONLY bits starting at X1 mod 7 ora GBYTE sta (ZPBasePtr),y update screen inx cpx LBUF.C2 beq .2 C1=C2, go setup C2 bcs .8 C1+1 > C2, we are done... .1 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda LBUF.DATA,x set all bytes between C1+1 & C2-1 sta (ZPBasePtr),y inx cpx LBUF.C2 bne .1 .2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C2 and LBUF.C2.MASK clear ONLY bits ending at X2 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C2.DATA set ONLY bits ending at X2 mod 7 ora GBYTE sta (ZPBasePtr),y update screen .8 rts *-------------------------------------- LBUF.DrawAtY.AND ldx LBUF.C1 x C1->C2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C1 and LBUF.C1.MASK clear ONLY bits starting at X1 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C1.DATA set ONLY bits starting at X1 mod 7 ora GBYTE sta (ZPBasePtr),y update screen inx cpx LBUF.C2 beq .2 C1=C2, go setup C2 bcs .8 C1+1 > C2, we are done... .1 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda LBUF.DATA,x set all bytes between C1+1 & C2-1 sta (ZPBasePtr),y inx cpx LBUF.C2 bne .1 .2 ldy COL.BANK,x sta $C000,y ldy COL.OFS,x lda (ZPBasePtr),y Get C2 and LBUF.C2.MASK clear ONLY bits ending at X2 mod 7 sta GBYTE lda LBUF.DATA,x get DATA bits and LBUF.C2.DATA set ONLY bits ending at X2 mod 7 ora GBYTE sta (ZPBasePtr),y update screen .8 rts *-------------------------------------- MAN SAVE /A2OSX.SRC/DRV/DHGR.DRV.S.LBUF LOAD /A2OSX.SRC/DRV/DHGR.DRV.S ASM