mirror of
https://github.com/A2osX/A2osX.git
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9a7d20a7e1
FORMAT: new switches & checks SH:BREAK in FOR and WHILE ASM / S-C MASM: new directives, CString support and .HX LC / UC:bugfix DHGR.DRV:bugfix LIBGUI:wip CC:wip
884 lines
26 KiB
Plaintext
884 lines
26 KiB
Plaintext
NEW
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AUTO 3,1
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* disk ii driver. object code = xrw_0
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* $5300-5A00 moved to language card bank 1 at $D000
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*--------------------------------------
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blockio cld $D8 to flag language card bank 1 (main)
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jsr rsetphse
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lda q7l,x turn off write enable
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nop
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nop
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jsr docheck
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bcs L5334 branch if block # is out of range
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ldy #$05
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L5310 asl
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rol ibtrk
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dey
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bne L5310
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asl
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bcc L531C
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ora #$10 adjust for upper 4 bits of track
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L531C lsr
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lsr
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lsr
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lsr
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pha save sector # across call
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jsr regrwts
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pla
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bcs L5330 if error
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inc buf+1
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adc #$02
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jsr regrwts get 2nd half of block
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dec buf+1
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L5330 lda ibstat
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rts
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L5334 lda #$27 i/o error
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sec
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rts
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* read/write a track/sector
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regrwts ldy #$01 retry count
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sty seekcnt only one recalibrate per call
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sta ibsect
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lda unitnum get slot # for this operation
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and #$70
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sta A2L
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* make sure other drives in other slots are stopped
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jsr chkprev
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* now check if the motor is on, then start it
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jsr chkdrv
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php save test results
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lda #$E8
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sta montimeh
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lda unitnum determine drive 1 or 2.
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cmp iobpdn same drive used before ?
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sta iobpdn save it for next time.
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php keep results of compare.
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asl get drive # into carry.
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lda motoron,x turn on the drive.
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bcc L5362 branch if drive 1 selected.
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inx select drive 2.
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L5362 lda drv0en,x
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plp was it the same drive ?
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beq L5372 yes.
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plp indicate drive off by setting z-flag.
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ldy #$07 150ms delay before stepping.
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L536B jsr mswait
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dey
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bne L536B
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php now zero flag set.
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L5372 lda A4L make sure this command needs seeking.
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beq L537C branch if status check.
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lda ibtrk get destination track
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jsr myseek and go to it.
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* now at desired track. was the motor already on ?
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L537C plp was motor on ?
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bne L538E if so, don't wait.
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* motor was off, wait for it to speed up
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L537F lda #$01 wait 100us for each count in montime
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jsr mswait
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lda montimeh
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bmi L537F count up to 0000
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* motor should be up to speed,
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* if it looks stopped then the drive is not present
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jsr chkdrv is drive present ?
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beq hndlerr branch if no drive
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* now check: if it is not the format disk command,
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* locate the correct sector for this operation
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L538E lda A4L get command #
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beq L53FD if 0 then status command
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lsr set carry = 1 for read, 0 for write.
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bcs L5398 must prenibblize for write
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jsr prenib16
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L5398 ldy #$40 64 retries
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sty retrycnt
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L539D ldx A2L get slot #.
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jsr rdadr16 read next address field.
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bcc L53BE branch if read ok.
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L53A4 dec retrycnt one less chance.
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bpl L539D branch to retry.
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lda #$27 anticipate a bad drive error.
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dec seekcnt can only recalibrate once.
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bne hndlerr
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lda curtrk
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pha save track
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asl
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adc #$10 pretend track is 8 > curtrk
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ldy #$40
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sty retrycnt reset retries to 64 max.
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bne L53CC always.
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* have now read an address field. make sure this is
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* the correct track, sector and volume.
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L53BE ldy track check track
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cpy curtrk
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beq L53D5 ok
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* recalibrating from this track
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lda curtrk preserve destination track
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pha
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tya
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asl
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L53CC jsr settrk
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pla
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jsr myseek
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bcc L539D always taken, go recalibrate
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* drive is on right track, check volume mismatch
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L53D5 lda sect is this the right sector ?
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cmp ibsect
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bne L53A4 no, try another sector.
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lda A4L read or write ?
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lsr the carry will tell.
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bcc L53F4 branch if write
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jsr read16
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bcs L53A4 if bad read
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L53E7 lda #$00
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.HS D0 bne branch never taken (skip 1 byte)
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hndlerr sec
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sta ibstat error #
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ldx A2L slot offset
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lda motoroff,x turn off
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rts
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L53F4 jsr write16 write nibbles
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statdne bcc L53E7 if no errors.
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lda #$2B disk write protected.
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bne hndlerr always
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L53FD ldx A2L
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lda q6h,x test for write protected
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lda q7l,x
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rol write protect-->carry-->bit 0=1
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lda q6l,x keep in read mode
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jmp statdne
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myseek asl assume two phase stepper
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sta track save destination track * 2
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jsr alloff turn all phases off to be sure.
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jsr drvindx get index to previous track
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lda iobpdn,x for current drive.
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sta curtrk current position.
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lda track where to go next.
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sta iobpdn,x
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jsr seek move head there
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alloff ldy #$03 turn off all phases before returning.
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L5427 tya (send phase in acc)
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jsr clrphase carry clear, phases should be turned off
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dey
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bpl L5427
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lsr curtrk divide back down
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clc
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rts
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* fast seek subroutine
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*
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* on entry:
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* x = slot# times $10
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* acc = desired half-track (single phase)
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* curtrk = current halftrack
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*
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* on exit:
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* a,y = uncertain
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* x = undisturbed
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* curtrk & trkn = final halftrack.
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* prior = prior halftrack if seek was required.
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* montimel,h are incremented by the # of 100us quantums required by
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* seek for motor on time overlap.
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*
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* variables used: curtrk, trkn, countn, prior, A2L, montimel, montimeh
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seek sta trkn save target track.
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cmp curtrk on desired track ?
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beq setphase yes, energize phase and return
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lda #$00
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sta trkcnt half track count.
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L5440 lda curtrk save curtrk for delayed turnoff
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sta prior
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sec
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sbc trkn delta-tracks.
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beq L5483 branch if curtrk = destination
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bcs mvout move out, not in.
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eor #$FF calculate tracks to go.
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inc curtrk increment current track (in).
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bcc L545A always taken.
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mvout adc #$FE calculate tracks to go.
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dec curtrk decrement current track (out).
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L545A cmp trkcnt
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bcc L5462 and 'tracks moved'
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lda trkcnt
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L5462 cmp #$09
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bcs L5468 if trkcnt > 8 then leave y alone (y=8)
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tay else set acceleration index in y
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sec
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L5468 jsr setphase
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lda ontable,y for 'ontime'
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jsr mswait (100us intervals)
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lda prior
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clc for phaseoff
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jsr clrphase turn off prior phase
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lda offtable,y then wait 'offtime'
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jsr mswait (100us intervals)
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inc trkcnt count of 'tracks moved'
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bne L5440 always taken
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L5483 jsr mswait settle 25 msec
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clc set for phase off
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setphase lda curtrk get current track
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clrphase and #$03 mask for 1 of 4 phases
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rol double for phaseon/off index
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ora A2L
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tax
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lda phaseoff,x turn on/off one phase
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ldx A2L restore x reg
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rts and return
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* 7-bit to 6-bit 'deniblize' table (16-sector format)
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*
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* valid codes are $96 to $FF only. codes with more than one pair of
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* adjacent zeroes or with no adjacent ones (except bit 7) are excluded.
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*
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* nibles in the ranges of $A0-$A3, $C0-$C7, $E0-$E3 are used for
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* other tables since no valid nibles are in these ranges.
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dnibl .HS 0004FFFF080CFF10 aligned to page boundary minus $96
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.HS 1418
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twobit3 .HS 008040C0FFFF used in fast prenib as lookup for 2-bit quantities.
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.HS 1C20FFFFFF24282C
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.HS 3034FFFF383C4044
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.HS 484CFF5054585C60
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.HS 6468
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twobit2 .HS 00201030 used in fast prenib.
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endmrks .HS DEAAEBFF table using 'unused' nibbles ($C4,$C5,$C6,$C7)
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.HS FFFFFF6CFF70
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.HS 7478FFFFFF7CFFFF
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.HS 8084FF888C909498
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.HS 9CA0
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twobit1 .HS 0008040CFFA4 used in fast prenib.
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.HS A8ACFFB0B4B8BCC0
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.HS C4C8FFFFCCD0D4D8
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.HS DCE0FFE4E8ECF0F4
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.HS F8FC
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* 6-bit to 2-bit conversion tables:
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*
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* dnibl2 abcdef-->0000FE
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* dnibl3 abcdef-->0000DC
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* dnibl4 abcdef-->0000BA
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* origin = $D200 (page boundary)
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* page align the following tables:
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dnibl2 .HS 00
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dnibl3 .HS 00
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dnibl4 .HS 00
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* 6-bit to 7-bit nibl conversion table
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*
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* codes with more than one pair of adjacent zeroes
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* or with no adjacent ones (except B7) are excluded.
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nibl .HS 960200
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.HS 00970100009A0300
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.HS 009B0002009D0202
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.HS 009E0102009F0302
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.HS 00A6000100A70201
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.HS 00AB010100AC0301
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.HS 00AD000300AE0203
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.HS 00AF010300B20303
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.HS 00B3000002B40200
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.HS 02B5010002B60300
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.HS 02B7000202B90202
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.HS 02BA010202BB0302
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.HS 02BC000102BD0201
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.HS 02BE010102BF0301
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.HS 02CB000302CD0203
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.HS 02CE010302CF0303
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.HS 02D3000001D60200
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.HS 01D7010001D90300
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.HS 01DA000201DB0202
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.HS 01DC010201DD0302
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.HS 01DE000101DF0201
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.HS 01E5010101E60301
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.HS 01E7000301E90203
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.HS 01EA010301EB0303
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.HS 01EC000003ED0200
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.HS 03EE010003EF0300
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.HS 03F2000203F30202
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.HS 03F4010203F50302
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.HS 03F6000103F70201
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.HS 03F9010103FA0301
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.HS 03FB000303FC0203
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.HS 03FD010303FE0303
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.HS 03FF
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* nibl buffer 'nbuf2' must be on a page boundary !!!
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nbuf2 .BS 86 nibl buffer for read/write of low 2-bits of each byte.
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ibtrk .HS 00
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ibsect .HS 00
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ibstat .HS 00
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iobpdn .HS 00
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curtrk .HS 00
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.HS 00000000000000 for slots 1 thru 7
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.HS 00000000000000 drives 1 & 2
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retrycnt .HS 00
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seekcnt .HS 00
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trkcnt .EQ * halftracks moved count.
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countn .EQ * 'must find' count.
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last .HS 00 'odd bit' nibls.
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csum .HS 00 used for address header cksum
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csstv .HS 00
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sect .HS 00
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track .EQ *
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montimel .HS 00
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montimeh .HS 00 also 'volume'
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prior .HS 00
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trkn .HS 00
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* phase on, off time tables
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* in 100 usec intervals (seek)
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ontable .HS 013028
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.HS 24201E1D1C1C
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offtable .HS 702C
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.HS 26221F1E1D1C1C
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* mswait subroutine
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*
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* delays a specified number of 100 usec intervals for motor timing.
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* on entry: acc holds number of 100 usec intervals to delay.
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* on exit: acc = 0, x = 0, y = unchanged, carry set.
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* montimel, montimeh are incremented once per 100 usec interval
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* for motor on timing.
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mswait ldx #$11 delay 86 usec
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.1 dex
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bne .1
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inc montimel
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bne .2
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inc montimeh
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.2 sec
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sbc #$01
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bne mswait
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rts
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* read address field subroutine (16-sector format)
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*
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* reads volume, track and sector.
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* on entry: x = slot# times $10, read mode (q6l,q7l)
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* on exit: carry set if error, else if no error:
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* acc=$AA, y=0, x=unchanged, carry clear,
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* ccstv contains chksum,sector,track & volume read.
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* uses temps: count,last,csum & 4 bytes at ccstv
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* expects: original 10-sector normal density nibls (4-bit) odd bits then even.
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* observe 'no page cross' warnings on some branches !!!
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rdadr16 ldy #$FC
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sty countn 'must find' count
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L569D iny
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bne L56A5 low order of count.
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inc countn (2k nibles to find address mark
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beq rderr else error)
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L56A5 lda q6l,x read nibl
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bpl L56A5 *** no page cross ***
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L56AA cmp #$D5 address mark 1 ?
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bne L569D
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nop nibl delay
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L56AF lda q6l,x
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bpl L56AF *** no page cross ***
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cmp #$AA address mark 2 ?
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bne L56AA if not, is it address mark 1 ?
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ldy #$03 index for 4 byte read
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L56BA lda q6l,x
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bpl L56BA *** no page cross ***
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cmp #$96 address mark 3 ?
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bne L56AA if not, is it address mark 1
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sei no interrupts until address is tested.
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lda #$00 init checksum
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L56C6 sta csum
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L56C9 lda q6l,x read 'odd bit' nibl
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bpl L56C9 *** no page cross ***
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rol align odd bits, '1' into lsb.
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sta last save them.
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L56D2 lda q6l,x read 'even bit' nibl
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bpl L56D2 *** no page cross ***
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and last merge odd and even bits.
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sta csstv,y store data byte.
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eor csum
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dey
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bpl L56C6 loop on 4 data bytes.
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tay if final checksum non-zero,
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bne rderr then error.
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L56E6 lda q6l,x first bit-slip nibl
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bpl L56E6 *** no page cross ***
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cmp #$DE
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bne rderr
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nop delay
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L56F0 lda q6l,x second bit-slip nible
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bpl L56F0 *** no page cross ***
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cmp #$AA
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bne rderr
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clc normal read ok
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rts
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rderr sec
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rts
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* read subroutine (16-sector format)
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*
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* reads encoded bytes into nbuf1 and nbuf2.
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* first reads nbuf2 high to low, then nbuf1 low to high.
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* on entry: x=slot# times $10, read mode (q6l,q7l)
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* on exit: carry set if error, else if no error:
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* acc=$AA, x=unchanged, y=0, carry clear.
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* observe 'no page cross' on some branches !!
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read16 txa get slot #
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ora #$8C prepare mods to read routine.
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sta rd4+1 warning: the read routine is
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sta rd5+1 self modified !!
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sta rd6+1
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sta rd7+1
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sta rd8+1
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lda buf modify storage addresses also
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ldy buf+1
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sta ref3+1
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sty ref3+2
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sec
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sbc #$54
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bcs L571F branch if no borrow
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dey
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L571F sta ref2+1
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sty ref2+2
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sec
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sbc #$57
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bcs L572B branch if no borrow
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dey
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L572B sta ref1+1
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sty ref1+2
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ldy #$20 32 tries to find
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L5733 dey
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beq L576D branch if can't find data header marks
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L5736 lda q6l,x
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bpl L5736
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L573B eor #$D5 1st data mark
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bne L5733
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nop delay
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L5740 lda q6l,x
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bpl L5740
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cmp #$AA 2nd data mark.
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bne L573B if not, check for 1st again
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nop
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L574A lda q6l,x
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bpl L574A
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cmp #$AD 3rd data mark
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bne L573B if not, check for data mark 1 again
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ldy #$AA
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lda #$00
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L5757 sta pcl use z-page for keeping checksum
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rd4 ldx q6l+$60 warning: self modified
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bpl rd4
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lda dnibl-$96,x
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sta nbuf2-$AA,y save the two-bit groups in nbuf.
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eor pcl update checksum.
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iny next position in nbuf.
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bne L5757 loop for all $56 two-bit groups.
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ldy #$AA now read directly into user buffer.
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bne rd5 always taken.
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L576D sec error
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rts
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ref1 sta $1000,y warning: self modified
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rd5 ldx q6l+$60 warning: self modified
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bpl rd5
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eor dnibl-$96,x get actual 6-bit data from dnib table.
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ldx nbuf2-$AA,y get associated two-bit pattern
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eor dnibl2,x and combine to form whole byte.
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iny
|
||
bne ref1 loop for $56 bytes.
|
||
pha save for now, no time to store...
|
||
and #$FC strip low bits.
|
||
ldy #$AA prepare for next $56 bytes
|
||
|
||
rd6 ldx q6l+$60 warning: self modified
|
||
bpl rd6
|
||
eor dnibl-$96,x
|
||
ldx nbuf2-$AA,y
|
||
eor dnibl3,x
|
||
ref2 sta $1000,y warning: self modified
|
||
iny
|
||
bne rd6 loop unil this group of $56 read
|
||
|
||
rd7 ldx q6l+$60 warning: self modified
|
||
bpl rd7
|
||
and #$FC
|
||
ldy #$AC last group is $54 long
|
||
L57A5 eor dnibl-$96,x
|
||
ldx nbuf2-$AC,y
|
||
eor dnibl4,x combine to form full byte
|
||
ref3 sta $1000,y warning: self modified
|
||
|
||
rd8 ldx q6l+$60 warning: self modified
|
||
bpl rd8
|
||
iny
|
||
bne L57A5
|
||
and #$FC
|
||
eor dnibl-$96,x checksum ok ?
|
||
bne L57CC error if not.
|
||
ldx A2L test end marks.
|
||
L57C2 lda q6l,x
|
||
bpl L57C2
|
||
cmp #$DE
|
||
clc
|
||
beq L57CD branch if good trailer
|
||
L57CC sec
|
||
L57CD pla place last byte into user buffer
|
||
ldy #$55
|
||
sta (buf),y
|
||
rts
|
||
|
||
* set the slot dependent track location
|
||
|
||
settrk jsr drvindx get index to drive #
|
||
sta iobpdn,x
|
||
rts
|
||
|
||
* determine if motor is stopped
|
||
*
|
||
* if stopped, controller's shift register will not be changing.
|
||
* return y = 0 and zero flag set if it is stopped.
|
||
|
||
chkdrv ldx A2L
|
||
chkdrv0 ldy #$00 init loop counter.
|
||
.1 lda q6l,x read the shift register.
|
||
jsr ckdrts delay
|
||
pha
|
||
pla more delay.
|
||
cmp q6l,x has shift reg changed ?
|
||
bne ckdrts yes, motor is moving.
|
||
lda #$28 anticipate error.
|
||
dey no, dec retry counter
|
||
bne .1 and try 256 times.
|
||
ckdrts rts
|
||
|
||
drvindx pha preserve acc across call
|
||
lda A4L+1
|
||
lsr
|
||
lsr
|
||
lsr
|
||
lsr
|
||
cmp #$08
|
||
and #$07
|
||
rol
|
||
tax index to table.
|
||
pla restore acc
|
||
rts
|
||
|
||
* write subroutine (16 sector format)
|
||
*
|
||
* writes data from nbuf1 and buf. first nbuf2, high to low then direct
|
||
* from (buf), low to high. assumes 1 usec cycle time. self modified code !!
|
||
*
|
||
* on entry: x = slotnum times 16
|
||
*
|
||
* on exit: carry set if error (write protect violation).
|
||
* if no error, acc=uncertain, x=unchanged, y=0, carry clear.
|
||
|
||
write16 sec anticipate write protect error
|
||
lda q6h,x
|
||
lda q7l,x sense write protect flag
|
||
bpl L580C
|
||
jmp wexit exit if write protected
|
||
|
||
* timing is critical. a one micro-second cycle time is assumed.
|
||
* number in () is how many micro-seconds per instruction or subroutine
|
||
|
||
L580C lda nbuf2
|
||
sta pcl
|
||
lda #$FF sync data.
|
||
sta q7h,x (5) goto write mode
|
||
ora q6l,x (4)
|
||
ldy #$04 (2) for five nibls
|
||
nop (2)
|
||
pha (3)
|
||
pla (4)
|
||
wsync pha (3) exact timing.
|
||
pla (4) exact timing.
|
||
jsr wnibl7 (13,9,6) write sync.
|
||
dey (2)
|
||
bne wsync (3-) must not cross page !
|
||
lda #$D5 (2) 1st data mark
|
||
jsr wnibl9 (15,9,6)
|
||
lda #$AA (2) 2nd data mark
|
||
jsr wnibl9 (15,9,6)
|
||
lda #$AD (2) 3rd data mark
|
||
jsr wnibl9 (15,9,6)
|
||
tya (2) zero checksum
|
||
ldy #$56 (2) nbuf2 index
|
||
bne L583D (3) branch always
|
||
|
||
* total time in this write byte loop must = 32us !!!
|
||
|
||
L583A lda nbuf2,y (4) prior 6-bit nibl
|
||
L583D eor nbuf2-1,y (5) xor with current
|
||
tax (2) index to 7-bit nibl
|
||
lda nibl,x (4) must not cross page boundary
|
||
ldx A2L (3) restore slot index
|
||
sta q6h,x (5) store encoded byte
|
||
lda q6l,x (4) handshake
|
||
dey (2)
|
||
bne L583A (3-) must not cross page boundary
|
||
|
||
* end of write byte loop
|
||
|
||
lda pcl (3) get prior nibl (from nbuf2)
|
||
wrefd1 ldy #$00 (2) warning: load value modified by prenib.
|
||
wrefa1 eor $1000,y (4) warning: address modified by prenib.
|
||
and #$FC (2) strip low 2 bits
|
||
tax (2) index to nibl table
|
||
lda nibl,x (4)
|
||
wrefd2 ldx #$60 (2) warning: value modified by prenib.
|
||
sta q6h,x (5) write nibl
|
||
lda q6l,x (4) handshake
|
||
wrefa2 lda $1000,y (4) prior nibl. warning: address modified by prenib.
|
||
iny (2) all done with this page ?
|
||
bne wrefa1 (3-) loop until page end.
|
||
lda pch (3) get next (precalculated & translated) nibl.
|
||
beq L58C0 (2+) branch if code written was page aligned.
|
||
lda A2H (3) get byte address of last byte to be written.
|
||
beq L58B3 (2+) branch if only 1 byte left to write.
|
||
lsr (2) test for odd or even last byte (carry set/clear)
|
||
lda pch (3) restore nibl to acc.
|
||
sta q6h,x (5)
|
||
lda q6l,x (4)
|
||
lda A1L (3) = byte 0 of 2nd page xor'd with byte 1 if
|
||
nop (2) above test set carry.
|
||
iny (2) y=1
|
||
bcs L5899 (2+) branch if last byte to be odd.
|
||
wrefa3 eor $1100,y (4) warning: address modified by prenib.
|
||
and #$FC (2) strip low 2 bits.
|
||
tax (2) index to nibl table
|
||
lda nibl,x (4) get nibl
|
||
wrefd3 ldx #$60 (2) restore slot index. warning: modified by prenib
|
||
sta q6h,x (5)
|
||
lda q6l,x (4)
|
||
wrefa4 lda $1100,y (4) warning: modified by prenib
|
||
iny (2) got prior nibl, point to next
|
||
wrefa5 eor $1100,y (4) warning: modified by prenib
|
||
L5899 cpy A2H (3) set carry if this is the last nibl
|
||
and #$FC (2) strip low 2 bits
|
||
tax (2)
|
||
lda nibl,x (4)
|
||
wrefd4 ldx #$60 (2) restore slot. warning: modified by prenib
|
||
sta q6h,x (5)
|
||
lda q6l,x (4)
|
||
wrefa6 lda $1100,y (4) get prior nibl. warning: modified by prenib
|
||
iny (2)
|
||
bcc wrefa3 (3-) branch if not the last.
|
||
bcs L58B1 (3) waste 3 cycles, branch always.
|
||
L58B1 bcs L58C0 (3) branch always.
|
||
L58B3 lda >pch (4) absolute reference to zero page
|
||
sta q6h,x (5)
|
||
lda q6l,x (4)
|
||
pha (3) waste 14 micro-seconds total
|
||
pla (4)
|
||
pha (3)
|
||
pla (4)
|
||
L58C0 ldx A1H (3) use last nibl (anded with $FC) for checksum
|
||
lda nibl,x (4)
|
||
wrefd5 ldx #$60 (2) restore slot. warning: modified by prenib
|
||
sta q6h,x (5)
|
||
lda q6l,x (4)
|
||
ldy #$00 (2) set y = index end mark table.
|
||
pha (3) waste another 11 micro-seconds
|
||
pla (4)
|
||
nop (2)
|
||
nop (2)
|
||
L58D3 lda endmrks,y (4) dm4, dm5, dm6 and turn off byte.
|
||
jsr wnibl (15,6) write it
|
||
iny (2)
|
||
cpy #$04 (2) have all end marks been written ?
|
||
bne L58D3 (3) if not.
|
||
clc (2,9)
|
||
wexit lda q7l,x out of write mode
|
||
lda q6l,x to read mode.
|
||
rts return from write.
|
||
|
||
* 7-bit nibl write subroutines
|
||
|
||
wnibl9 clc (2) 9 cycles, then write.
|
||
wnibl7 pha (3) 7 cycles, then write.
|
||
pla (4)
|
||
wnibl sta q6h,x (5) nibl write
|
||
ora q6l,x (4) clobbers acc, not carry
|
||
rts (6)
|
||
|
||
* preniblize subroutine (16 sector format)
|
||
*
|
||
* converts 256 bytes of user data in (buf) into 6 bit nibls in nbuf2.
|
||
* high 6 bits are translated directly by the write routines.
|
||
*
|
||
* on entry: buf is 2-byte pointer to 256 bytes of user data.
|
||
*
|
||
* on exit: a,x,y undefined. write routine modified to do direct conversion
|
||
* of high 6 bits of user's buffer data.
|
||
|
||
prenib16 lda buf self-modify the addresses because of
|
||
ldy buf+1 the fast timing required.
|
||
clc all offsets are minus $AA.
|
||
adc #$02 the highest set is buf+$AC.
|
||
bcc L58FA branch if no carry,
|
||
iny otherwise add carry to high address.
|
||
L58FA sta prn3+1 self mod 3
|
||
sty prn3+2
|
||
sec
|
||
sbc #$56 middle set is buf+$56.
|
||
bcs L5906 branch if no borrow,
|
||
dey otherwise deduct from high.
|
||
L5906 sta prn2+1 self mod 2
|
||
sty prn2+2
|
||
sec
|
||
sbc #$56 low set is exactly buf
|
||
bcs L5912
|
||
dey
|
||
L5912 sta prn1+1 self mod 1
|
||
sty prn1+2
|
||
ldy #$AA count up to 0.
|
||
prn1 lda $1000,y warning: self modified. get byte from lowest group.
|
||
and #$03 strip high 6 bits.
|
||
tax index to 2 bit equivalent.
|
||
lda twobit1,x
|
||
pha save pattern
|
||
prn2 lda $1056,y warning: self modified. get byte from middle group.
|
||
and #$03
|
||
tax
|
||
pla restore pattern.
|
||
ora twobit2,x combine 2nd group with 1st.
|
||
pha save new pattern.
|
||
prn3 lda $10AC,y warning: self modified. get byte from highest group.
|
||
and #$03
|
||
tax
|
||
pla restore new pattern
|
||
ora twobit3,x and form final nibl.
|
||
pha
|
||
tya
|
||
eor #$FF
|
||
tax
|
||
pla
|
||
sta nbuf2,x save in nibl buffer.
|
||
iny inc to next set.
|
||
bne prn1 loop until all $56 nibls formed.
|
||
ldy buf now prepare data bytes for write16 subr.
|
||
dey prepare end address.
|
||
sty A2H
|
||
lda buf
|
||
sta wrefd1+1 warning: the following storage addresses
|
||
beq L595F starting with 'wref' are refs into code
|
||
eor #$FF space, changed by this routine.
|
||
tay index to last byte of page in (buf).
|
||
lda (buf),y pre-niblize the last byte of the page
|
||
iny with the first byte of the next page.
|
||
eor (buf),y
|
||
and #$FC
|
||
tax
|
||
lda nibl,x get disk 7-bit nible equivalent.
|
||
L595F sta pch
|
||
beq L596F branch if data to be written is page
|
||
lda A2H aligned. check if last byte is even
|
||
lsr or odd address. shift even/odd -> carry.
|
||
lda (buf),y if even, then leave intact.
|
||
bcc L596D branch if odd.
|
||
iny if even, then pre-xor with byte 1.
|
||
eor (buf),y
|
||
L596D sta A1L save result for write routine.
|
||
L596F ldy #$FF index to last byte of data to write.
|
||
lda (buf),y to be used as a checksum.
|
||
and #$FC strip extra bits
|
||
sta A1H and save it.
|
||
ldy buf+1 now modify address references to
|
||
sty wrefa1+2 user data.
|
||
sty wrefa2+2
|
||
iny
|
||
sty wrefa3+2
|
||
sty wrefa4+2
|
||
sty wrefa5+2
|
||
sty wrefa6+2
|
||
ldx A2L and lastly, index references to
|
||
stx wrefd2+1 controller.
|
||
stx wrefd3+1
|
||
stx wrefd4+1
|
||
stx wrefd5+1
|
||
rts
|
||
chkprev eor iobpdn same slot as last ?
|
||
asl
|
||
beq L59BD
|
||
lda #$01
|
||
sta montimeh
|
||
L59A6 lda iobpdn
|
||
and #$70
|
||
tax
|
||
beq L59BD branch if no previous ever (boot only).
|
||
jsr chkdrv0 check if previous drive running.
|
||
beq L59BD branch if stopped.
|
||
lda #$01 delay
|
||
jsr mswait
|
||
lda montimeh
|
||
bne L59A6
|
||
L59BD rts
|
||
rsetphse lda unitnum get unit number.
|
||
and #$7F mask off high bit.
|
||
tax
|
||
|
||
* clear all the phases and force read mode
|
||
|
||
lda phaseoff+0,x make sure all motor phases are off.
|
||
lda phaseoff+2,x
|
||
lda phaseoff+4,x
|
||
lda phaseoff+6,x
|
||
rts
|
||
docheck lda A4L command #.
|
||
cmp #$04 is the command allowed ?
|
||
bcs L59E6 if not.
|
||
lda bloknml
|
||
ldx bloknml+1
|
||
stx ibtrk calculate block's track and sector.
|
||
beq L59E8 branch if block # is in range,
|
||
dex else test further.
|
||
bne L59E6 taken if bad range.
|
||
cmp #$18 must be < $118
|
||
bcc L59E8 then ok.
|
||
L59E6 sec error.
|
||
rts
|
||
L59E8 clc
|
||
rts end of obj xrw_0
|
||
|
||
.HS 0000 pad bytes to $D6EC (pathbuf-$14)
|
||
|
||
* variables used by mli for smartport interface
|
||
|
||
spstatlist .HS 00000000 ref pathbuf-$14 smartport status list buffer
|
||
spunit .HS 0000000000000000 ref pathbuf-$10smartport unit numbers
|
||
.HS 0000000000000000
|
||
|
||
* pathname buffer starts at this page boundary (pathbuf = $D700)
|
||
*--------------------------------------
|
||
MAN
|
||
SAVE usr/src/prodos.203/prodos.s.xrw
|
||
LOAD usr/src/prodos.203/prodos.s
|
||
ASM
|