mirror of
https://github.com/A2osX/A2osX.git
synced 2024-12-01 14:50:10 +00:00
1048 lines
26 KiB
Plaintext
1048 lines
26 KiB
Plaintext
NEW
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AUTO 3,1
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*--------------------------------------
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XRW.START cld $D8 to flag language card bank 1 (main)
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lda unitnum get unit number.
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pha
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lsr
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lsr
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lsr
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lsr
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sta XRW.UnitIndex
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pla
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and #$7F mask off high bit.
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sta A2L 0SSS0000 for IO indexing
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* make sure other drives in other slots are stopped
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eor XRW.LastUnitUsed same slot as last ?
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asl
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beq L59BD
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lda #$01
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sta montimeh
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L59A6 lda XRW.LastUnitUsed
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and #$70
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tax
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beq L59BD branch if no previous ever (boot only).
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jsr XRW.CheckMotorOnX check if previous drive running.
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beq L59BD branch if stopped.
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jsr XRW.Wait100ms
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lda montimeh
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bne L59A6
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L59BD jsr XRW.AllPhaseOff make sure all motor phases are off.
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lda IO.D2.ReadMode,x turn off write enable X = slot $S0
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nop
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nop
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lda A4L command #.
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cmp #$04 is the command allowed ?
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bcs .9 if not.
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lda bloknml
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ldx bloknml+1
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stx XRW.ReqTrack calculate block's track and sector.
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ldy #$05
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.11 asl
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rol XRW.ReqTrack
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dey
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bne .11
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asl
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bcc .12
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ora #$10 adjust for upper 4 bits of track
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.12 lsr
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lsr
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lsr
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lsr
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pha save sector # across call
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jsr regrwts
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pla
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bcs .3 if error
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inc buf+1
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adc #$02
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jsr regrwts get 2nd half of block
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dec buf+1
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.3 lda ibstat
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rts
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.9 lda #MLI.E.IO
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sec
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rts
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*--------------------------------------
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* read/write a track/sector
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regrwts ldy #$01 retry count
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sty XRW.Recalibrate only one recalibrate per call
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sta XRW.ReqSector
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* now check if the motor is on, then start it
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jsr XRW.CheckMotorOn
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php save test results
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lda #$E8
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sta montimeh
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lda unitnum determine drive 1 or 2.
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cmp XRW.LastUnitUsed same drive used before ?
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sta XRW.LastUnitUsed save it for next time.
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php keep results of compare.
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asl get drive # into carry.
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lda IO.D2.DrvOn,x turn on the drive.
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bcc L5362 branch if drive 1 selected.
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inx select drive 2.
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L5362 lda IO.D2.DrvSel1,x
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plp was it the same drive ?
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beq L5372 yes.
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plp indicate drive off by setting z-flag.
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lda #6 6x256 -> 1500ms delay before stepping.
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jsr XRW.Wait100msA
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php now zero flag set.
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L5372 lda A4L make sure this command needs seeking.
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beq L537C branch if status check.
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lda XRW.ReqTrack get destination track
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jsr XRW.Seek and go to it.
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* now at desired track. was the motor already on ?
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L537C plp was motor on ?
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bne L538E if so, don't wait.
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* motor was off, wait for it to speed up
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L537F jsr XRW.Wait100ms wait 100us for each count in montime
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lda montimeh
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bmi L537F count up to 0000
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* motor should be up to speed,
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* if it looks stopped then the drive is not present
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jsr XRW.CheckMotorOn is drive present ?
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beq hndlerr branch if no drive
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* now check: if it is not the status disk command,
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* locate the correct sector for this operation
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L538E lda A4L get command #
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beq L53FD if 0 then status command
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lsr set carry = 1 for read, 0 for write.
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bcs L5398 must prenibblize for write
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jsr XRW.PreNibble
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L5398 ldy #64
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sty XRW.RetryCnt
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L539D jsr XRW.ReadAddr read next address field.
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bcc L53BE branch if read ok.
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L53A4 dec XRW.RetryCnt one less chance.
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bpl L539D branch to retry.
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lda #MLI.E.IO anticipate a bad drive error.
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dec XRW.Recalibrate can only recalibrate once.
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bne hndlerr
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lda XRW.CurrentTrack
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pha save track
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clc
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adc #8 pretend track is 8 > curtrk
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ldy #64
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sty XRW.RetryCnt reset retries to 64 max.
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bra L53CC always.
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* have now read an address field. make sure this is
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* the correct track, sector and volume.
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L53BE ldy XRW.AddrField.T
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cpy XRW.CurrentTrack
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beq L53D5 ok
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* recalibrating from this track
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lda XRW.CurrentTrack preserve destination track
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pha
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tya
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L53CC ldy XRW.UnitIndex get index to drive #
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sta XRW.D2Trk-1,y set the slot dependent track location
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pla
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jsr XRW.Seek
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bra L539D
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* drive is on right track, check volume mismatch
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L53D5 lda XRW.AddrField.S is this the right sector ?
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cmp XRW.ReqSector
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bne L53A4 no, try another sector.
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lda A4L read or write ?
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lsr the carry will tell.
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bcc L53F4 branch if write
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jsr XRW.Read
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bcs L53A4 if bad read
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L53E7 lda #$00
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.HS D0 bne branch never taken (skip 1 byte)
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hndlerr sec
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sta ibstat error #
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ldx A2L slot offset
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lda IO.D2.DrvOff,x turn off
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rts
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*--------------------------------------
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L53F4 jsr XRW.Write
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statdne bcc L53E7 if no errors.
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lda #MLI.E.WRTPROT disk write protected.
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bne hndlerr always
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L53FD ldx A2L
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lda IO.D2.ReadProt,x test for write protected
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lda IO.D2.ReadMode,x
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rol write protect-->carry-->bit 0=1
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lda IO.D2.RData,x keep in read mode
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bra statdne
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*--------------------------------------
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* determine if motor is stopped
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*
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* if stopped, controller's shift register will not be changing.
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* return y = 0 and zero flag set if it is stopped.
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*--------------------------------------
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XRW.CheckMotorOn
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ldx A2L
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XRW.CheckMotorOnX
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ldy #0 init loop counter.
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.1 lda IO.D2.RData,x read the shift register.
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jsr .9 delay
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pha
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pla more delay.
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cmp IO.D2.RData,x has shift reg changed ?
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bne .9 yes, motor is moving.
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lda #MLI.E.NODEV anticipate error.
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dey no, dec retry counter
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bne .1 and try 256 times.
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.9 rts
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*--------------------------------------
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* preniblize subroutine (16 sector format)
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*
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* converts 256 bytes of user data in (buf) into 6 bit nibls in nbuf2.
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* high 6 bits are translated directly by the write routines.
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*
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* on entry: buf is 2-byte pointer to 256 bytes of user data.
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*
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* on exit: a,x,y undefined. write routine modified to do direct conversion
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* of high 6 bits of user's buffer data.
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*--------------------------------------
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XRW.PreNibble lda buf self-modify the addresses because of
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ldy buf+1 the fast timing required.
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clc all offsets are minus $AA.
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adc #$02 the highest set is buf+$AC.
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bcc L58FA branch if no carry,
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iny otherwise add carry to high address.
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L58FA sta prn3+1 self mod 3
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sty prn3+2
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sec
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sbc #$56 middle set is buf+$56.
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bcs L5906 branch if no borrow,
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dey otherwise deduct from high.
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L5906 sta prn2+1 self mod 2
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sty prn2+2
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sec
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sbc #$56 low set is exactly buf
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bcs L5912
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dey
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L5912 sta prn1+1 self mod 1
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sty prn1+2
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ldy #$AA count up to 0.
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prn1 lda $1000,y warning: self modified. get byte from lowest group.
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and #$03 strip high 6 bits.
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tax index to 2 bit equivalent.
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lda XRW.0000XX00,x
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pha save pattern
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prn2 lda $1056,y warning: self modified. get byte from middle group.
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and #$03
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tax
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pla restore pattern.
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ora XRW.00XX0000,x combine 2nd group with 1st.
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pha save new pattern.
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prn3 lda $10AC,y warning: self modified. get byte from highest group.
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and #$03
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tax
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pla restore new pattern
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ora XRW.XX000000,x and form final nibl.
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pha
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tya
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eor #$FF
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tax
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pla
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sta nbuf2,x save in nibl buffer.
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iny inc to next set.
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bne prn1 loop until all $56 nibls formed.
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ldy buf now prepare data bytes for write16 subr.
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dey prepare end address.
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sty A2H
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lda buf
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sta wrefd1+1 warning: the following storage addresses
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beq L595F starting with 'wref' are refs into code
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eor #$FF space, changed by this routine.
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tay index to last byte of page in (buf).
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lda (buf),y pre-niblize the last byte of the page
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iny with the first byte of the next page.
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eor (buf),y
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and #$FC
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tax
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lda XRW.FC2Nib,x get disk 7-bit nible equivalent.
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L595F sta pch
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beq L596F branch if data to be written is page aligned.
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lda A2H check if last byte is even
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lsr or odd address. shift even/odd -> carry.
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lda (buf),y if even, then leave intact.
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bcc L596D branch if odd.
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iny if even, then pre-xor with byte 1.
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eor (buf),y
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L596D sta A1L save result for write routine.
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L596F ldy #$FF index to last byte of data to write.
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lda (buf),y to be used as a checksum.
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and #$FC strip extra bits
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sta A1H and save it.
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ldy buf+1 now modify address references to
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sty wrefa1+2 user data.
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sty wrefa2+2
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iny
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sty wrefa3+2
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sty wrefa4+2
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sty wrefa5+2
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sty wrefa6+2
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ldx A2L and lastly, index references to
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stx wrefd2+1 controller.
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stx wrefd3+1
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stx wrefd4+1
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stx wrefd5+1
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rts
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*--------------------------------------
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* write subroutine (16 sector format)
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*
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* writes data from nbuf1 and buf. first nbuf2, high to low then direct
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* from (buf), low to high. assumes 1 usec cycle time. self modified code !!
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*
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* on entry: x = slotnum times 16
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*
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* on exit: carry set if error (write protect violation).
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* if no error, acc=uncertain, x=unchanged, y=0, carry clear.
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*--------------------------------------
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XRW.Write sec anticipate write protect error
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lda IO.D2.ReadProt,x
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lda IO.D2.ReadMode,x sense write protect flag
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bpl .1
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jmp wexit exit if write protected
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* timing is critical. a one micro-second cycle time is assumed.
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* number in () is how many micro-seconds per instruction or subroutine
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.1 lda nbuf2
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sta pcl
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lda #$FF sync data.
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sta IO.D2.WriteMode,x (5) goto write mode
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ora IO.D2.WShift,x (4)
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ldy #$04 (2) for five nibls
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nop (2)
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pha (3)
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pla (4)
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wsync pha (3) exact timing.
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pla (4) exact timing.
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jsr wnibl7 (13,9,6) write sync.
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dey (2)
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bne wsync (3-) must not cross page !
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lda #$D5 (2) 1st data mark
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jsr wnibl9 (15,9,6)
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lda #$AA (2) 2nd data mark
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jsr wnibl9 (15,9,6)
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lda #$AD (2) 3rd data mark
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jsr wnibl9 (15,9,6)
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tya (2) zero checksum
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ldy #$56 (2) nbuf2 index
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bne L583D (3) branch always
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* total time in this write byte loop must = 32us !!!
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L583A lda nbuf2,y (4) prior 6-bit nibl
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*L583D eor nbuf2-1,y (5) xor with current (4+1 : PAGE CROSS)
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L583D eor nbuf2-1,y (4) xor with current (NO MORE PAGE CROSS)
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tax (2) index to 7-bit nibl
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lda XRW.FC2Nib,x (4) must not cross page boundary
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* ldx A2L (3) restore slot index
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ldx >A2L (4) absolute reference to zero page
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sta IO.D2.WLoad,x (5) store encoded byte
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lda IO.D2.WShift,x (4) handshake
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dey (2)
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bne L583A (3-) must not cross page boundary
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* end of write byte loop
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lda pcl (3) get prior nibl (from nbuf2)
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wrefd1 ldy #$00 (2) warning: load value modified by prenib.
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wrefa1 eor $1000,y (4) warning: address modified by prenib.
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and #$FC (2) strip low 2 bits
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tax (2) index to nibl table
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lda XRW.FC2Nib,x (4)
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wrefd2 ldx #$60 (2) warning: value modified by prenib.
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sta IO.D2.WLoad,x (5) write nibl
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lda IO.D2.WShift,x (4) handshake
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wrefa2 lda $1000,y (4) prior nibl. warning: address modified by prenib.
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iny (2) all done with this page ?
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bne wrefa1 (3-) loop until page end.
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lda pch (3) get next (precalculated & translated) nibl.
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beq L58C0 (2+) branch if code written was page aligned.
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lda A2H (3) get byte address of last byte to be written.
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beq L58B3 (2+) branch if only 1 byte left to write.
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lsr (2) test for odd or even last byte (carry set/clear)
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lda pch (3) restore nibl to acc.
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sta IO.D2.WLoad,x (5)
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lda IO.D2.WShift,x (4)
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lda A1L (3) = byte 0 of 2nd page xor'd with byte 1 if
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nop (2) above test set carry.
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iny (2) y=1
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bcs L5899 (2+) branch if last byte to be odd.
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wrefa3 eor $1100,y (4) warning: address modified by prenib.
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and #$FC (2) strip low 2 bits.
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tax (2) index to nibl table
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lda XRW.FC2Nib,x (4) get nibl
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wrefd3 ldx #$60 (2) restore slot index. warning: modified by prenib
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sta IO.D2.WLoad,x (5)
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lda IO.D2.WShift,x (4)
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wrefa4 lda $1100,y (4) warning: modified by prenib
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iny (2) got prior nibl, point to next
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wrefa5 eor $1100,y (4) warning: modified by prenib
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L5899 cpy A2H (3) set carry if this is the last nibl
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and #$FC (2) strip low 2 bits
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tax (2)
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lda XRW.FC2Nib,x (4)
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wrefd4 ldx #$60 (2) restore slot. warning: modified by prenib
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sta IO.D2.WLoad,x (5)
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lda IO.D2.WShift,x (4)
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wrefa6 lda $1100,y (4) get prior nibl. warning: modified by prenib
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iny (2)
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bcc wrefa3 (3-) branch if not the last.
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bcs L58B1 (3) waste 3 cycles, branch always.
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L58B1 bcs L58C0 (3) branch always.
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L58B3 lda >pch (4) absolute reference to zero page
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sta IO.D2.WLoad,x (5)
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lda IO.D2.WShift,x (4)
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pha (3) waste 14 micro-seconds total
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pla (4)
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pha (3)
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pla (4)
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L58C0 ldx A1H (3) use last nibl (anded with $FC) for checksum
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lda XRW.FC2Nib,x (4)
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wrefd5 ldx #$60 (2) restore slot. warning: modified by prenib
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sta IO.D2.WLoad,x (5)
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lda IO.D2.WShift,x (4)
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ldy #$00 (2) set y = index end mark table.
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pha (3) waste another 11 micro-seconds
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pla (4)
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nop (2)
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nop (2)
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L58D3 lda XRW.EndDataMark,y (4) dm4, dm5, dm6 and turn off byte.
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jsr wnibl (15,6) write it
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iny (2)
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cpy #$04 (2) have all end marks been written ?
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bne L58D3 (3) if not.
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clc (2,9)
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wexit lda IO.D2.ReadMode,x out of write mode
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lda IO.D2.WShift,x to read mode.
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rts return from write.
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* 7-bit nibl write subroutines
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wnibl9 clc (2) 9 cycles, then write.
|
||
wnibl7 pha (3) 7 cycles, then write.
|
||
pla (4)
|
||
wnibl sta IO.D2.WLoad,x (5) nibl write
|
||
ora IO.D2.WShift,x (4) clobbers acc, not carry
|
||
rts (6)
|
||
*--------------------------------------
|
||
* delays a specified number of 100 usec intervals for motor timing.
|
||
* on entry: acc holds number of 100 usec intervals to delay.
|
||
* on exit: acc = 0, x = 0, y = unchanged, carry set.
|
||
* montimel, montimeh are incremented once per 100 usec interval
|
||
* for motor on timing.
|
||
*--------------------------------------
|
||
XRW.Wait100ms lda #1
|
||
|
||
XRW.Wait100msA
|
||
.1 ldx #$11 delay 86 usec
|
||
|
||
.2 dex
|
||
bne .2
|
||
|
||
inc montimel
|
||
bne .3
|
||
|
||
inc montimeh
|
||
|
||
.3 sec
|
||
sbc #$01
|
||
bne .1
|
||
|
||
rts
|
||
*--------------------------------------
|
||
* read subroutine (16-sector format)
|
||
*
|
||
* reads encoded bytes into nbuf1 and nbuf2.
|
||
* first reads nbuf2 high to low, then nbuf1 low to high.
|
||
* on entry: x=slot# times $10, read mode
|
||
* on exit: carry set if error, else if no error:
|
||
* acc=$AA, x=unchanged, y=0, carry clear.
|
||
* observe 'no page cross' on some branches !!
|
||
*--------------------------------------
|
||
XRW.Read txa get slot #
|
||
ora #$8C prepare mods to read routine.
|
||
sta rd4+1 warning: the read routine is
|
||
sta rd5+1 self modified !!
|
||
sta rd6+1
|
||
sta rd7+1
|
||
sta rd8+1
|
||
|
||
lda buf modify storage addresses also
|
||
ldy buf+1
|
||
sta ref3+1
|
||
sty ref3+2
|
||
sec
|
||
sbc #$54
|
||
bcs L571F branch if no borrow
|
||
|
||
dey
|
||
|
||
L571F sta ref2+1
|
||
sty ref2+2
|
||
sec
|
||
sbc #$57
|
||
bcs L572B branch if no borrow
|
||
|
||
dey
|
||
|
||
L572B sta ref1+1
|
||
sty ref1+2
|
||
|
||
ldy #$20 32 tries to find
|
||
|
||
L5733 dey
|
||
beq L576D branch if can't find data header marks
|
||
|
||
L5736 lda IO.D2.RData,x
|
||
bpl L5736
|
||
|
||
L573B eor #$D5 1st data mark
|
||
bne L5733
|
||
|
||
nop delay
|
||
|
||
L5740 lda IO.D2.RData,x
|
||
bpl L5740
|
||
|
||
cmp #$AA 2nd data mark.
|
||
bne L573B if not, check for 1st again
|
||
|
||
nop
|
||
|
||
L574A lda IO.D2.RData,x
|
||
bpl L574A
|
||
|
||
cmp #$AD 3rd data mark
|
||
bne L573B if not, check for data mark 1 again
|
||
|
||
ldy #$AA
|
||
lda #$00
|
||
|
||
L5757 sta pcl use z-page for keeping checksum
|
||
|
||
rd4 ldx IO.D2.RData+$60 warning: self modified
|
||
bpl rd4
|
||
|
||
lda XRW.Nib2FC-$96,x
|
||
sta nbuf2-$AA,y save the two-bit groups in nbuf.
|
||
eor pcl update checksum.
|
||
iny next position in nbuf.
|
||
bne L5757 loop for all $56 two-bit groups.
|
||
|
||
ldy #$AA now read directly into user buffer.
|
||
bne rd5 always taken.
|
||
|
||
L576D sec error
|
||
rts
|
||
|
||
ref1 sta $1000,y warning: self modified
|
||
|
||
rd5 ldx IO.D2.RData+$60 warning: self modified
|
||
bpl rd5
|
||
|
||
eor XRW.Nib2FC-$96,x get actual 6-bit data from dnib table.
|
||
ldx nbuf2-$AA,y get associated two-bit pattern
|
||
eor dnibl2,x and combine to form whole byte.
|
||
iny
|
||
bne ref1 loop for $56 bytes.
|
||
|
||
pha save for now, no time to store...
|
||
and #$FC strip low bits.
|
||
ldy #$AA prepare for next $56 bytes
|
||
|
||
rd6 ldx IO.D2.RData+$60 warning: self modified
|
||
bpl rd6
|
||
|
||
eor XRW.Nib2FC-$96,x
|
||
ldx nbuf2-$AA,y
|
||
eor dnibl3,x
|
||
ref2 sta $1000,y warning: self modified
|
||
iny
|
||
bne rd6 loop unil this group of $56 read
|
||
|
||
rd7 ldx IO.D2.RData+$60 warning: self modified
|
||
bpl rd7
|
||
|
||
and #$FC
|
||
ldy #$AC last group is $54 long
|
||
|
||
L57A5 eor XRW.Nib2FC-$96,x
|
||
ldx nbuf2-$AC,y
|
||
eor dnibl4,x combine to form full byte
|
||
ref3 sta $1000,y warning: self modified
|
||
|
||
rd8 ldx IO.D2.RData+$60 warning: self modified
|
||
bpl rd8
|
||
|
||
iny
|
||
bne L57A5
|
||
|
||
and #$FC
|
||
eor XRW.Nib2FC-$96,x checksum ok ?
|
||
bne L57CC error if not.
|
||
|
||
ldx A2L test end marks.
|
||
|
||
L57C2 lda IO.D2.RData,x
|
||
bpl L57C2
|
||
|
||
cmp #$DE
|
||
|
||
clc
|
||
beq L57CD branch if good trailer
|
||
|
||
L57CC sec
|
||
|
||
L57CD pla place last byte into user buffer
|
||
ldy #$55
|
||
sta (buf),y
|
||
rts
|
||
*--------------------------------------
|
||
* fast seek subroutine
|
||
* A = desired track
|
||
* XRW.CurrentTrack = current rack
|
||
*
|
||
* montimel,h are incremented by the # of 100us quantums required by seek for motor on time overlap.
|
||
* variables used: XRW.CurrentTrack, A2L, montimel, montimeh
|
||
*--------------------------------------
|
||
XRW.Seek ldx XRW.UnitIndex
|
||
|
||
pha save target track
|
||
|
||
jsr XRW.Trk2Qtrk
|
||
sta XRW.TargetQTrack
|
||
|
||
lda XRW.D2Trk-1,x
|
||
|
||
jsr XRW.Trk2Qtrk
|
||
sta XRW.CurrentQTrack
|
||
|
||
pla
|
||
sta XRW.CurrentTrack will be current track at the end
|
||
sta XRW.D2Trk-1,x
|
||
|
||
.1 lda XRW.TargetQTrack
|
||
cmp XRW.CurrentQTrack
|
||
beq .8
|
||
|
||
bcc .2
|
||
|
||
* sec
|
||
lda #0 CurrentQTrack>TargetQTrack, must move in
|
||
bra .3
|
||
|
||
.2 lda #$ff CurrentQTrack<TargetQTrack, must move out
|
||
|
||
.3 adc XRW.CurrentQTrack
|
||
sta XRW.CurrentQTrack
|
||
|
||
jsr XRW.PhaseOn
|
||
|
||
lda #$30
|
||
jsr XRW.Wait100msA Trash X
|
||
|
||
jsr XRW.AllPhaseOff
|
||
|
||
lda #$70
|
||
jsr XRW.Wait100msA Trash X
|
||
bra .1
|
||
|
||
.8 rts
|
||
*--------------------------------------
|
||
XRW.PhaseOn pha
|
||
jsr .7
|
||
pla
|
||
|
||
bit #1 1,3,5,7 ?
|
||
beq .8
|
||
|
||
inc
|
||
|
||
.7 and #6 mask for 0,2,4,6
|
||
ora A2L Slot $n0
|
||
tax
|
||
lda IO.D2.Ph0On,x turn on one phase
|
||
.8 rts
|
||
*--------------------------------------
|
||
XRW.AllPhaseOff ldx A2L
|
||
|
||
lda IO.D2.Ph0Off,x
|
||
lda IO.D2.Ph1Off,x
|
||
lda IO.D2.Ph2Off,x
|
||
lda IO.D2.Ph3Off,x
|
||
rts
|
||
*--------------------------------------
|
||
XRW.Trk2Qtrk asl x2
|
||
sta .1+1
|
||
|
||
bit XRW.D2VolNum-1,x
|
||
bmi .1 x4
|
||
|
||
lsr x3
|
||
|
||
.1 adc #$ff SELF MODIFIED
|
||
rts
|
||
*--------------------------------------
|
||
* read address field subroutine (16-sector format)
|
||
*
|
||
* reads volume, track and sector.
|
||
* on entry: x = slot# times $10, read mode
|
||
* on exit: carry set if error, else if no error:
|
||
* acc=$AA, y=0, x=unchanged, carry clear,
|
||
* ccstv contains chksum,sector,track & volume read.
|
||
* uses temps: count,last,csum & 4 bytes at ccstv
|
||
* expects: original 10-sector normal density nibls (4-bit) odd bits then even.
|
||
* observe 'no page cross' warnings on some branches !!!
|
||
*--------------------------------------
|
||
XRW.ReadAddr ldy #$FC
|
||
sty XRW.CheckSum init nibble counter to $FCFC
|
||
|
||
ldx A2L get slot #
|
||
|
||
L569D iny
|
||
bne L56A5 counter LO
|
||
|
||
inc XRW.CheckSum counter HI
|
||
beq rderr
|
||
|
||
L56A5 lda IO.D2.RData,x read nibl
|
||
bpl L56A5 *** no page cross ***
|
||
|
||
L56AA cmp #$D5 address mark 1 ?
|
||
bne L569D
|
||
|
||
nop nibl delay
|
||
|
||
L56AF lda IO.D2.RData,x
|
||
bpl L56AF *** no page cross ***
|
||
|
||
cmp #$AA address mark 2 ?
|
||
bne L56AA if not, is it address mark 1 ?
|
||
|
||
ldy #$03 index for 4 byte read
|
||
|
||
L56BA lda IO.D2.RData,x
|
||
bpl L56BA *** no page cross ***
|
||
|
||
cmp #$96 address mark 3 ?
|
||
bne L56AA if not, is it address mark 1
|
||
|
||
sei ???ALREADY DONE by XDOS.devmgr??? no interrupts until address is tested.
|
||
lda #$00 init checksum
|
||
|
||
L56C6 sta XRW.CheckSum
|
||
|
||
L56C9 lda IO.D2.RData,x read 'odd bit' nibl
|
||
bpl L56C9 *** no page cross ***
|
||
|
||
rol align odd bits, '1' into lsb.
|
||
sta XRW.Temp4x4 save them.
|
||
|
||
L56D2 lda IO.D2.RData,x read 'even bit' nibl
|
||
bpl L56D2 *** no page cross ***
|
||
|
||
and XRW.Temp4x4 merge odd and even bits.
|
||
sta XRW.AddrField.C,y store data byte.
|
||
eor XRW.CheckSum
|
||
dey
|
||
bpl L56C6 loop on 4 data bytes.
|
||
|
||
tay if final checksum non-zero,
|
||
bne rderr then error.
|
||
|
||
L56E6 lda IO.D2.RData,x first bit-slip nibl
|
||
bpl L56E6 *** no page cross ***
|
||
|
||
cmp #$DE
|
||
bne rderr
|
||
|
||
lda XRW.AddrField.V
|
||
|
||
ldy XRW.UnitIndex
|
||
sta XRW.D2VolNum-1,y
|
||
|
||
clc normal read ok
|
||
rts
|
||
|
||
rderr sec
|
||
rts
|
||
*--------------------------------------
|
||
.LIST ON
|
||
XRW.FREE .EQ $D540-*
|
||
.LIST OFF
|
||
.BS $D540-*
|
||
*--------------------------------------
|
||
* nibl buffer 'nbuf2' must fit in a page
|
||
*--------------------------------------
|
||
nbuf2 .BS $56 nibl buffer for read/write of low 2-bits of each byte.
|
||
*--------------------------------------
|
||
* 7-bit to 6-bit 'deniblize' table (16-sector format)
|
||
*
|
||
* valid codes are $96 to $FF only. codes with more than one pair of
|
||
* adjacent zeroes or with no adjacent ones (except bit 7) are excluded.
|
||
*
|
||
* nibbles in the ranges of $A0-$A3, $C0-$C7, $E0-$E3 are used for
|
||
* other tables since no valid nibbles are in these ranges.
|
||
* aligned to page boundary + $96
|
||
*--------------------------------------
|
||
XRW.Nib2FC .HS 0004
|
||
* .HS FFFF
|
||
XRW.UnitIndex .HS 00
|
||
XRW.LastUnitUsed .HS 00
|
||
.HS 080C
|
||
* .HS FF
|
||
XRW.Recalibrate .HS 00
|
||
.HS 101418
|
||
XRW.XX000000 .HS 008040C0 used in fast prenib as lookup for 2-bit quantities.
|
||
* .HS FFFF
|
||
montimel .HS 00
|
||
montimeh .HS 00
|
||
.HS 1C20
|
||
.HS FFFFFF
|
||
.HS 24282C3034
|
||
* .HS FFFF
|
||
XRW.ReqTrack .HS 00
|
||
XRW.ReqSector .HS 00
|
||
.HS 383C4044484C
|
||
* .HS FF
|
||
XRW.CurrentTrack .HS 00
|
||
.HS 5054585C606468
|
||
XRW.00XX0000 .HS 00201030 used in fast prenib.
|
||
XRW.EndDataMark .HS DEAAEB table using 'unused' nibbles ($C4,$C5,$C6,$C7)
|
||
* .HS FFFFFFFF
|
||
XRW.AddrField.C .HS 00 AddrField Checksum
|
||
XRW.AddrField.S .HS 00 AddrField Sector
|
||
XRW.AddrField.T .HS 00 AddrField Track
|
||
XRW.AddrField.V .HS 00 AddrField Volume
|
||
.HS 6C
|
||
* .HS FF
|
||
ibstat .HS 00
|
||
.HS 707478
|
||
.HS FFFFFF
|
||
.HS 7C
|
||
* .HS FFFF
|
||
XRW.Temp4x4 .HS 00
|
||
XRW.CheckSum .HS 00 used for address header cksum
|
||
.HS 8084
|
||
* .HS FF
|
||
XRW.RetryCnt .HS 00
|
||
.HS 888C9094989CA0
|
||
XRW.0000XX00 .HS 0008040C used in fast prenib.
|
||
* .HS FF
|
||
XRW.CurrentQTrack .HS 00
|
||
.HS A4A8AC
|
||
* .HS FF
|
||
XRW.TargetQTrack .HS 00
|
||
.HS B0B4B8BCC0C4C8
|
||
.HS FFFF
|
||
.HS CCD0D4D8DCE0
|
||
.HS FF
|
||
.HS E4E8ECF0F4F8FC
|
||
*--------------------------------------
|
||
* 6-bit to 2-bit conversion tables:
|
||
*
|
||
* origin = $D600 (page boundary)
|
||
*
|
||
* dnibl2 abcdef-->0000FE
|
||
* dnibl3 abcdef-->0000DC
|
||
* dnibl4 abcdef-->0000BA
|
||
* page align the following tables:
|
||
*--------------------------------------
|
||
* FC-bits to nibble conversion table (256 bytes)
|
||
*
|
||
* codes with more than one pair of adjacent zeroes
|
||
* or with no adjacent ones (except B7) are excluded.
|
||
*--------------------------------------
|
||
dnibl2 .HS 00
|
||
dnibl3 .HS 00
|
||
dnibl4 .HS 00
|
||
XRW.FC2Nib .HS 96
|
||
.HS 02000097
|
||
.HS 0100009A
|
||
.HS 0300009B
|
||
.HS 0002009D
|
||
.HS 0202009E
|
||
.HS 0102009F
|
||
.HS 030200A6
|
||
.HS 000100A7
|
||
.HS 020100AB
|
||
.HS 010100AC
|
||
.HS 030100AD
|
||
.HS 000300AE
|
||
.HS 020300AF
|
||
.HS 010300B2
|
||
.HS 030300B3
|
||
.HS 000002B4
|
||
.HS 020002B5
|
||
.HS 010002B6
|
||
.HS 030002B7
|
||
.HS 000202B9
|
||
.HS 020202BA
|
||
.HS 010202BB
|
||
.HS 030202BC
|
||
.HS 000102BD
|
||
.HS 020102BE
|
||
.HS 010102BF
|
||
.HS 030102CB
|
||
.HS 000302CD
|
||
.HS 020302CE
|
||
.HS 010302CF
|
||
.HS 030302D3
|
||
.HS 000001D6
|
||
.HS 020001D7
|
||
.HS 010001D9
|
||
.HS 030001DA
|
||
.HS 000201DB
|
||
.HS 020201DC
|
||
.HS 010201DD
|
||
.HS 030201DE
|
||
.HS 000101DF
|
||
.HS 020101E5
|
||
.HS 010101E6
|
||
.HS 030101E7
|
||
.HS 000301E9
|
||
.HS 020301EA
|
||
.HS 010301EB
|
||
.HS 030301EC
|
||
.HS 000003ED
|
||
.HS 020003EE
|
||
.HS 010003EF
|
||
.HS 030003F2
|
||
.HS 000203F3
|
||
.HS 020203F4
|
||
.HS 010203F5
|
||
.HS 030203F6
|
||
.HS 000103F7
|
||
.HS 020103F9
|
||
.HS 010103FA
|
||
.HS 030103FB
|
||
.HS 000303FC
|
||
.HS 020303FD
|
||
.HS 010303FE
|
||
.HS 030303FF
|
||
*--------------------------------------
|
||
XRW.LEN .EQ *-XRW.START
|
||
MAN
|
||
SAVE USR/SRC/PRODOS.FX/PRODOS.S.XRW
|
||
LOAD USR/SRC/PRODOS.FX/PRODOS.S
|
||
ASM
|