mirror of
https://github.com/A2osX/A2osX.git
synced 2024-11-22 00:32:44 +00:00
6adfe9fdda
- NEW A2OSX.BUILD media, old one corrupted by ProDOS.FX bug - most of BIN/SBIN/LIBS reASMed with .95 API
164 lines
2.8 KiB
Plaintext
164 lines
2.8 KiB
Plaintext
NEW
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AUTO 3,1
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*--------------------------------------
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* HLINE X1,X2 at Y1 (XOR,SET,ORA)
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*--------------------------------------
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HLINE lda CB.Cache+S.CB.M
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cmp #S.CB.M.MONO
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bne HLINE.C16
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HLINE.MONO >LDYA CB.Cache+S.CB.X1
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jsr LBUF.SetBounds1YA
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>LDYA CB.Cache+S.CB.X2
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jsr LBUF.SetBounds2YA
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lda CB.Cache+S.CB.COLOR
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beq .1
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lda #%01111111
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.1 ldx LBUF.C1
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.2 sta LBUF.DATA,x
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cpx LBUF.C2
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inx
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bcc .2
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ldy CB.Cache+S.CB.Y1
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jmp LBUF.DrawAtY
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HLINE.C16 lda CB.Cache+S.CB.X1
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and #%11111100
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tay
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lda CB.Cache+S.CB.X1+1
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jsr LBUF.SetBounds1YA
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lda CB.Cache+S.CB.X2
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ora #%00000011
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tay
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lda CB.Cache+S.CB.X2+1
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jsr LBUF.SetBounds2YA
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lda CB.Cache+S.CB.COLOR
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asl
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asl
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clc
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adc L.Color.Pixels
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sta ZPTmpWord
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lda L.Color.Pixels+1
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adc #0
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sta ZPTmpWord+1
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ldx LBUF.C1
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.1 txa
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and #3 Compute index in Palette (Mod 4)
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tay
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.2 lda (ZPTmpWord),y
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sta LBUF.DATA,x
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cpx LBUF.C2
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inx
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bcc .1
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ldy CB.Cache+S.CB.Y1
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jmp LBUF.DrawAtY
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*--------------------------------------
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* VLINE Y1,Y2 at X1 (XOR,SET,ORA)
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*--------------------------------------
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VLINE lda CB.Cache+S.CB.M
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cmp #S.CB.M.MONO
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bne VLINE.C16
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VLINE.MONO >LDYA CB.Cache+S.CB.X1
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jsr DIVMOD7YA X = MOD 7
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lsr
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sta ZPTmpByte Save COL (DIV)
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ldy #IO.SETPAGE2
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bcc .1
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dey CLRPAGE2
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.1 sta $C000,y Select proper BANK
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ldy CB.Cache+S.CB.Y1
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clc
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lda CB.Cache+S.CB.OP
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* cmp #S.CB.OP.XOR
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beq VLINE.MONO.XOR
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lda CB.Cache+S.CB.COLOR
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bne VLINE.MONO.WHITE
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VLINE.MONO.BLACK
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.1 lda BASEL,y
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adc ZPTmpByte
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sta ZPBasePtr
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lda BASEH,y
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sta ZPBasePtr+1
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lda (ZPBasePtr)
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and Mono.NMasks,x
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sta (ZPBasePtr)
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cpy CB.Cache+S.CB.Y2
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iny
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bcc .1
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rts
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VLINE.MONO.WHITE
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lda #$1D ORA abs,x
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.HS 2C BIT ABS
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VLINE.MONO.XOR
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lda #$5D EOR abs,x
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sta .2
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.1 lda BASEL,y
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adc ZPTmpByte
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sta ZPBasePtr
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lda BASEH,y
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sta ZPBasePtr+1
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lda (ZPBasePtr)
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.2 eor Mono.Masks,x SELF MODIFIED
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sta (ZPBasePtr)
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cpy CB.Cache+S.CB.Y2
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iny
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bcc .1
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rts
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*--------------------------------------
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VLINE.C16 lda CB.Cache+S.CB.X1
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lsr CB.Cache+S.CB.X1+1 divide by 4
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ror
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lsr CB.Cache+S.CB.X1+1
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ror
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tay Y=X/4 (range 0->139)
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ldx CB.Cache+S.CB.Y1
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.1 phy
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phx
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jsr SETPIXEL.C16.YX
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plx
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ply
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cpy CB.Cache+S.CB.Y2
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iny
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bcc .1
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rts
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*--------------------------------------
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MAN
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SAVE usr/src/drv/dhgr.drv.s.line
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LOAD usr/src/drv/dhgr.drv.s
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ASM
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