A2osX/DRV/DHGR.DRV.S.PIX.txt
2021-06-05 17:48:54 +02:00

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NEW
AUTO 3,1
*--------------------------------------
* SETPIXEL
* 1 : OP (XOR,SET,ORA)
* 2 : Mode
* 3 : Color
* 4 : SrcX1
* 6 : SrcY1
*--------------------------------------
SETPIXEL lda CB.Cache+S.CB.M
bit #S.CB.M.C16
bne SETPIXEL.C16
SETPIXEL.MONO >LDYA CB.Cache+S.CB.X1
jsr DIVMOD7YA
lsr
php
ldy CB.Cache+S.CB.Y1
clc
adc BASEL,y
sta ZPBasePtr
lda BASEH,y
sta ZPBasePtr+1
plp
ldy #0
bcs .1
iny
.1 sta CLRPAGE2,y Select proper BANK
lda CB.Cache+S.CB.OP
* cmp #S.CB.OP.XOR
beq SETPIXEL.MONO.XOR
lda CB.Cache+S.CB.COLOR
bne SETPIXEL.MONO.WHITE
SETPIXEL.MONO.BLACK
lda (ZPBasePtr)
and Mono.NMasks,x
sta (ZPBasePtr)
rts
SETPIXEL.MONO.WHITE
lda (ZPBasePtr)
and #$7f Clear Color Bit
ora Mono.Masks,x
sta (ZPBasePtr)
rts
SETPIXEL.MONO.XOR
lda (ZPBasePtr)
and #$7f Clear Color Bit
eor Mono.Masks,x
sta (ZPBasePtr)
rts
SETPIXEL.C16 lda CB.Cache+S.CB.X1
lsr CB.Cache+S.CB.X1+1 divide by 4
ror
lsr CB.Cache+S.CB.X1+1
ror
tay Y=X/4 (range 0->139)
ldx CB.Cache+S.CB.Y1
* Y = PixelX (0,139), X = PixelY (0,191)
SETPIXEL.C16.YX lda DIV7.0,y PixelX MOD 7 (range 0->19)
asl times 2 (range 0->38)
* clc
adc BASEL,x setup line Base Ptr (cc by asl)
sta ZPBasePtr ZPBasePtr now point to first of...
lda BASEH,x
sta ZPBasePtr+1 ...the 4 columns
lda MOD7.0,y get pixelX MOD7
asl times 4 to compute index in MASK tables
asl
tax set in X for Masks,NMasks
lda CB.Cache+S.CB.COLOR
asl times 4 to compute index in PIXELS table
asl
tay
lda Color.Masks,x bits in 1st byte to light?
beq .10
sta SETPAGE2
jsr .81
.10 inx
iny
lda Color.Masks,x
beq .11
jsr .80
.11 inc ZPBasePtr
inx
iny
lda Color.Masks,x
beq .12
sta SETPAGE2
jsr .81
.12 inx
iny
lda Color.Masks,x
beq .88
.80 sta CLRPAGE2
.81 and Color.Pixels,y apply color
sta ZPTmpByte
lda (ZPBasePtr)
and Color.NMasks,x reset existing pixel,
ora ZPTmpByte
sta (ZPBasePtr)
.88 rts
*--------------------------------------
* GETPIXEL
*--------------------------------------
GETPIXEL rts
*--------------------------------------
MAN
SAVE usr/src/drv/dhgr.drv.s.pix
LOAD usr/src/drv/dhgr.drv.s
ASM