]SIZE    EQU   WPAR3      
]ADDR1   EQU   WPAR1      
]ADDR2   EQU   WPAR2      
MEMMOVE
         LDA   ]ADDR2     
         SEC   
         SBC   ]ADDR1     
         TAX   
         LDA   ]ADDR2+1
         SBC   ]ADDR1+1   
                          
         TAY   
         TXA   
         CMP   ]SIZE
         TYA
         SBC   ]SIZE+1    
         BCS   :DOLEFT    
         JSR   :MVERHT
         JMP   :MREXIT
:DOLEFT
         JSR   :MVELEFT
:EXIT
         JMP   :MREXIT
:MVELEFT
         LDY   #0         
         LDX   ]SIZE+1    
         BEQ   :MLPART    
:MLPAGE
         LDA   (]ADDR1),Y 
         STA   (]ADDR2),Y 
         INY              
         BNE   :MLPAGE    
         INC   ]ADDR1+1   
         INC   ]ADDR2+1   
         DEX              
         BNE   :MLPAGE    
                          
:MLPART
         LDX   ]SIZE      
         BEQ   :MLEXIT    
                          
                          
:MLLAST
         LDA   (]ADDR1),Y 
         STA   (]ADDR2),Y 
         INY              
         DEX              
         BNE   :MLLAST    
:MLEXIT
         JMP   :MREXIT
:MVERHT
         LDA   ]SIZE+1    
         CLC   
         ADC   ]ADDR1+1   
         STA   ]ADDR1+1   
         LDA   ]SIZE+1    
         CLC   
         ADC   ]ADDR2+1   
         STA   ]ADDR2+1   
         LDY   ]SIZE      
         BEQ   :MRPAGE    
:MR0
         DEY              
         LDA   (]ADDR1),Y 
         STA   (]ADDR2),Y 
         CPY   #0         
         BNE   :MR0       
:MRPAGE
         LDX   ]SIZE+1    
         BEQ   :MREXIT    
:MR1
         DEC   ]ADDR1+1   
         DEC   ]ADDR2+1   
:MR2
         DEY              
         LDA   (]ADDR1),Y 
         STA   (]ADDR2),Y 
         CPY   #0         
         BNE   :MR2       
         DEX   
         BNE   :MR1       
:MREXIT
         RTS
