Removed redundant PHP/SEI .. CLI from auxmem.vdu.s

This commit is contained in:
Bobbi Webber-Manners 2022-09-20 15:18:17 -04:00
parent 91b95ecfda
commit 8a19df857b
2 changed files with 6 additions and 27 deletions

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@ -365,13 +365,10 @@ PRCHR4 JSR CHARADDR ; Find character address
STA [VDUADDR],Y STA [VDUADDR],Y
>>> WRTAUX >>> WRTAUX
BRA PRCHR8 BRA PRCHR8
PRCHR5 PHP ; Disable IRQs while PRCHR5 BCC PRCHR6 ; Aux memory
SEI ; toggling memory
BCC PRCHR6 ; Aux memory
>>> WRTMAIN >>> WRTMAIN
PRCHR6 STA (VDUADDR),Y ; Store it PRCHR6 STA (VDUADDR),Y ; Store it
PRCHR7 >>> WRTAUX PRCHR7 >>> WRTAUX
PLP ; Restore IRQs
PRCHR8 PLA PRCHR8 PLA
BIT VDUSCREEN BIT VDUSCREEN
BPL GETCHROK BPL GETCHROK
@ -385,13 +382,10 @@ BYTE87
GETCHRC JSR CHARADDR ; Find character address GETCHRC JSR CHARADDR ; Find character address
BIT VDUBANK BIT VDUBANK
BMI GETCHRGS BMI GETCHRGS
PHP ; Disable IRQs while
SEI ; toggling memory
BCC GETCHR6 ; Aux memory BCC GETCHR6 ; Aux memory
STA $C002 ; Read main memory STA $C002 ; Read main memory
GETCHR6 LDA (VDUADDR),Y ; Get character GETCHR6 LDA (VDUADDR),Y ; Get character
STA $C003 ; Read aux memory STA $C003 ; Read aux memory
PLP ; Restore IRQs
TAY ; Convert character TAY ; Convert character
AND #$A0 AND #$A0
BNE GETCHR7 BNE GETCHR7
@ -403,13 +397,10 @@ GETCHR7 TYA
LDY VDUMODE ; Y=MODE LDY VDUMODE ; Y=MODE
TAX ; X=char TAX ; X=char
GETCHROK RTS GETCHROK RTS
GETCHRGS PHP ; Disable IRQs while GETCHRGS BCC GETCHR8 ; Aux memory
SEI ; toggling memory
BCC GETCHR8 ; Aux memory
STA $C002 ; Read main memory STA $C002 ; Read main memory
GETCHR8 LDA [VDUADDR],Y ; Get character GETCHR8 LDA [VDUADDR],Y ; Get character
STA $C003 ; Read aux memory STA $C003 ; Read aux memory
PLP ; Restore IRQs
TAY ; Convert character TAY ; Convert character
AND #$A0 AND #$A0
BNE GETCHR9 BNE GETCHR9
@ -666,23 +657,17 @@ CLREOL JSR CHARADDR ; Set VDUADDR=>start of line
BCS :MAIN ; Odd cols in main mem BCS :MAIN ; Odd cols in main mem
STA (VDUADDR),Y ; Even cols in aux STA (VDUADDR),Y ; Even cols in aux
BRA :SKIPMAIN BRA :SKIPMAIN
:MAIN PHP :MAIN >>> WRTMAIN
SEI
>>> WRTMAIN
STA (VDUADDR),Y STA (VDUADDR),Y
>>> WRTAUX >>> WRTAUX
PLP
:SKIPMAIN INX :SKIPMAIN INX
CPX TXTWINRGT CPX TXTWINRGT
BMI :L1 BMI :L1
BRA CLREOLDONE BRA CLREOLDONE
:FORTY LDA #$A0 :FORTY LDA #$A0
:L2 PHP :L2 >>> WRTMAIN
SEI
>>> WRTMAIN
STA (VDUADDR),Y STA (VDUADDR),Y
>>> WRTAUX >>> WRTAUX
PLP
INY INY
CPY TXTWINRGT CPY TXTWINRGT
BMI :L2 BMI :L2
@ -810,30 +795,24 @@ DOSCR1LINE INC TXTWINRGT
LDA (VDUADDR),Y ; Even cols in aux LDA (VDUADDR),Y ; Even cols in aux
STA (VDUADDR2),Y STA (VDUADDR2),Y
BRA :SKIPMAIN BRA :SKIPMAIN
:MAIN PHP :MAIN >>> WRTMAIN
SEI
>>> WRTMAIN
STA $C002 ; Read main memory STA $C002 ; Read main memory
LDA (VDUADDR),Y LDA (VDUADDR),Y
STA (VDUADDR2),Y STA (VDUADDR2),Y
STA $C003 ; Read aux memory STA $C003 ; Read aux memory
>>> WRTAUX >>> WRTAUX
PLP
:SKIPMAIN INX :SKIPMAIN INX
CPX TXTWINRGT CPX TXTWINRGT
BMI :L1 BMI :L1
BRA SCR1LNDONE BRA SCR1LNDONE
:FORTY TXA :FORTY TXA
TAY TAY
:L2 PHP :L2 >>> WRTMAIN
SEI
>>> WRTMAIN
STA $C002 ; Read main memory STA $C002 ; Read main memory
LDA (VDUADDR),Y LDA (VDUADDR),Y
STA (VDUADDR2),Y STA (VDUADDR2),Y
STA $C003 ; Read aux memory STA $C003 ; Read aux memory
>>> WRTAUX >>> WRTAUX
PLP
INY INY
CPY TXTWINRGT CPY TXTWINRGT
BMI :L2 BMI :L2