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Deleted commented out code. Cleaned up ZP use.

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Bobbi Webber-Manners
2022-12-11 17:59:43 -05:00
parent b06ff0d5f1
commit a339ce1bd5
1 changed files with 10 additions and 91 deletions
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101
auxmem.init.s
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@@ -22,8 +22,6 @@ ZP1 EQU $90 ; $90-$9f are spare Econet space
ZP2 EQU $92 ZP2 EQU $92
ZP3 EQU $94 ZP3 EQU $94
*STRTBCKL EQU $9D ; *TO DO* No longer needed to preserve
*STRTBCKH EQU $9E
MOSSHIM MOSSHIM
ORG AUXMOS ; MOS shim implementation ORG AUXMOS ; MOS shim implementation
@@ -55,19 +53,19 @@ MOSINIT SEI ; Ensure IRQs disabled
BRA :NORELOC BRA :NORELOC
:RELOC LDA #<AUXMOS1 ; Source :RELOC LDA #<AUXMOS1 ; Source
STA A1L STA ZP1+0
LDA #>AUXMOS1 LDA #>AUXMOS1
STA A1H STA ZP1+1
LDA #<AUXMOS ; Dest LDA #<AUXMOS ; Dest
STA A2L STA ZP2+0
LDA #>AUXMOS LDA #>AUXMOS
STA A2H ; Y=0 from earlier STA ZP2+1 ; Y=0 from earlier
:L1 LDA (A1L),Y ; Copy from source :L1 LDA (ZP1),Y ; Copy from source
STA (A2L),Y ; to dest STA (ZP2),Y ; to dest
INY INY
BNE :L1 ; Do 256 bytes BNE :L1 ; Do 256 bytes
INC A1H ; Update source INC ZP1+1 ; Update source
INC A2H ; Update dest INC ZP2+1 ; Update dest
BMI :L1 ; Loop until wrap past &FFFF BMI :L1 ; Loop until wrap past &FFFF
* *
:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y :L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
@@ -75,86 +73,6 @@ MOSINIT SEI ; Ensure IRQs disabled
INY ; to proper place INY ; to proper place
BNE :L2 BNE :L2
*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
* STA A1L
* LDA #>MOSVEC-MOSINIT+AUXMOS1
* STA A1H
* LDA #<MOSVEND-MOSINIT+AUXMOS1
* STA A2L
* LDA #>MOSVEND-MOSINIT+AUXMOS1
* STA A2H
* LDA #<MOSAPI
* STA A4L
* LDA #>MOSAPI
* STA A4H
*:L2 LDA (A1L)
* STA (A4L)
* LDA A1H
* CMP A2H
* BNE :S5
* LDA A1L
* CMP A2L
* BNE :S5
* LDA #<AUXMOS1 ; Relocate MOS shim
* STA A1L
* LDA #>AUXMOS1
* STA A1H
* LDA #<EAUXMOS1
* STA A2L
* LDA #>EAUXMOS1
* STA A2H
* LDA #<AUXMOS
* STA A4L
* LDA #>AUXMOS
* STA A4H
*:L1 LDA (A1L)
* STA (A4L)
* LDA A1H
* CMP A2H
* BNE :S1
* LDA A1L
* CMP A2L
* BNE :S1
* BRA :S4
*:S1 INC A1L
* BNE :S2
* INC A1H
*:S2 INC A4L
* BNE :S3
* INC A4H
*:S3 BRA :L1
*
*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
* STA A1L
* LDA #>MOSVEC-MOSINIT+AUXMOS1
* STA A1H
* LDA #<MOSVEND-MOSINIT+AUXMOS1
* STA A2L
* LDA #>MOSVEND-MOSINIT+AUXMOS1
* STA A2H
* LDA #<MOSAPI
* STA A4L
* LDA #>MOSAPI
* STA A4H
*:L2 LDA (A1L)
* STA (A4L)
* LDA A1H
* CMP A2H
* BNE :S5
* LDA A1L
* CMP A2L
* BNE :S5
* BRA :S8
*:S5 INC A1L
* BNE :S6
* INC A1H
*:S6 INC A4L
* BNE :S7
* INC A4H
*:S7 BRA :L2
:S8
LDA #$EA ; NOP opcode LDA #$EA ; NOP opcode
STA :MODBRA+0 ; Next time around, we're already STA :MODBRA+0 ; Next time around, we're already
STA :MODBRA+1 ; in high memory STA :MODBRA+1 ; in high memory
@@ -296,8 +214,9 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
RTS ; %000x1xxx host type, 'A'pple RTS ; %000x1xxx host type, 'A'pple
BYTE00A BRK BYTE00A BRK
DB $F7 DB $F7
HELLO ASC 'Applecorn MOS 2022-11-08' HELLO ASC 'Applecorn MOS 2022-11-11'
DB $00 ; Unify MOS messages DB $00 ; Unify MOS messages
* TO DO: Move into RAM * TO DO: Move into RAM
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow GSSPEED DB $00 ; $80 if GS is fast, $00 for slow