Apple-2-SW/Applecorn
1
0
Fork 0
mirror of https://github.com/bobbimanners/Applecorn.git synced 2025-08-10 06:24:58 +00:00
Code Issues Projects Releases Wiki Activity

Faster and smaller coordinate conversion (thx @xot)

Browse Source
This commit is contained in:
Bobbi Webber-Manners
2021-09-21 17:02:20 -04:00
parent 0c5425611c
commit a485abfc77
2 changed files with 47 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
applecorn.po
View File

Binary file not shown.

127
auxmem.gfx.s
View File

@@ -6,94 +6,61 @@
* Convert high-resolution screen coordinates * Convert high-resolution screen coordinates
* from 1280x1024 to 280x192 * from 1280x1024 to 280x192
CVTCOORD CVTCOORD
* X-coordinate in VDUQ+5,+6 1280/4*7/8=280 * X-coordinate in VDUQ+5,+6 1280*7/32=280
LDA VDUQ+5 ; X-coord -> ZP1 and ZP2 LDA VDUQ+6 ; X-coord -> ZP1 and ZP2
STA ZP1+0
STA ZP2+0
LDA VDUQ+6
STA ZP1+1 STA ZP1+1
STA ZP2+1 STA ZP2+1
CLC ; ZP1 divide by 2 (0-639 now) LDA VDUQ+5
ROR ZP1+1 STA ZP1+0
ROR ZP1+0 ASL A ; ZP2 *= 8
CLC ; ZP1 divide by 2 (0-319 now) ROL ZP2+1
ROR ZP1+1 ASL A
ROR ZP1+0 ROL ZP2+1
CLC ; ZP1+ZP2->ZP2 ASL A
LDA ZP1+0 ROL ZP2+1
ADC ZP2+0 SEC ; ZP2-ZP1->ZP2
SBC ZP1+0
STA ZP2+0 STA ZP2+0
LDA ZP1+1
ADC ZP2+1
STA ZP2+1
CLC ; ZP1+ZP2->ZP2
LDA ZP1+0
ADC ZP2+0
STA ZP2+0
LDA ZP1+1
ADC ZP2+1
STA ZP2+1
CLC ; ZP1+ZP2->ZP2
LDA ZP1+0
ADC ZP2+0
STA ZP2+0
LDA ZP1+1
ADC ZP2+1
STA ZP2+1
CLC ; ZP2 divide by 2
ROR ZP2+1
ROR ZP2+0
CLC ; ZP2 divide by 2
ROR ZP2+1
ROR ZP2+0
CLC ; ZP2 divide by 2
ROR ZP2+1
ROR ZP2+0
LDA ZP2+0
STA VDUQ+5
LDA ZP2+1 LDA ZP2+1
STA VDUQ+6 SBC ZP1+1
LSR A ; ZP2 /= 32
* Y-coordinate in VDUQ+7,+8 1024/4*3/4=192
LDA VDUQ+7 ; Y-coord -> ZP1
STA ZP1+0
LDA VDUQ+8
STA ZP1+1
CLC ; ZP1 divide by 2 (0-512 now)
ROR ZP1+1
ROR ZP1+0
CLC ; ZP1 divide by 2 (0-256 now)
ROR ZP1+1
ROR ZP1+0
LDA ZP1+0 ; Copy ZP1->ZP2
STA ZP2+0
LDA ZP1+1
STA ZP2+1
CLC ; ZP1+ZP2->ZP2
LDA ZP1+0
ADC ZP2+0
STA ZP2+0
LDA ZP1+1
ADC ZP2+1
STA ZP2+1
CLC ; ZP1+ZP2->ZP2
LDA ZP1+0
ADC ZP2+0
STA ZP2+0
LDA ZP1+1
ADC ZP2+1
STA ZP2+1
CLC ; ZP2 divide by 2
ROR ZP2+1
ROR ZP2+0 ROR ZP2+0
CLC ; ZP2 divide by 2 LSR A
ROR ZP2+1
ROR ZP2+0 ROR ZP2+0
LSR A
ROR ZP2+0
LSR A
ROR ZP2+0
LSR A
ROR ZP2+0
STA VDUQ+6 ; ZP2 -> X-coord
LDA ZP2+0 LDA ZP2+0
STA VDUQ+5
* Y-coordinate in VDUQ+7,+8 1024*3/16=192
LDA VDUQ+8 ; Y-coord -> ZP1
STA ZP1+1
STA ZP2+1
LDA VDUQ+7
STA ZP1+0
ASL A ; ZP2 *= 2
ROL ZP2+1
CLC ; ZP2+ZP1->ZP2
ADC ZP1+0
STA ZP2+0
LDA ZP2+1
ADC ZP1+1
LSR A ; ZP2 /= 16
ROR ZP2+0
LSR A
ROR ZP2+0
LSR A
ROR ZP2+0
LSR A
STA VDUQ+8 ; ZP2 -> Y-coord
LDA ZP2+0
ROR
STA VDUQ+7 STA VDUQ+7
LDA ZP2+1
STA VDUQ+8
RTS RTS
* Add coordinates to XPIXEL, YPIXEL * Add coordinates to XPIXEL, YPIXEL