mirror of
https://github.com/bobbimanners/Applecorn.git
synced 2025-01-16 01:31:08 +00:00
Merge pull request #216 from jgharston/main
Moved soft key stuff to CHARIO.
This commit is contained in:
Bobbi Webber-Manners
GitHub
commit
b06ff0d5f1
221
auxmem.chario.s
221
auxmem.chario.s
@ -54,79 +54,13 @@ FXESCEFFECT EQU BYTEVARBASE+230
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FX200VAR EQU BYTEVARBASE+200
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FX200VAR EQU BYTEVARBASE+200
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FXSOFTLEN EQU BYTEVARBASE+216
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FXSOFTLEN EQU BYTEVARBASE+216
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FXSOFTOK EQU BYTEVARBASE+244
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FXSOFTOK EQU BYTEVARBASE+244
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SOFTKEYOFF EQU $03FF ; *TEMP*
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FX254VAR EQU BYTEVARBASE+254
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FX254VAR EQU BYTEVARBASE+254
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FX2VAR EQU BYTEVARBASE+$B1
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FX2VAR EQU BYTEVARBASE+$B1
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FX3VAR EQU BYTEVARBASE+$EC
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FX3VAR EQU BYTEVARBASE+$EC
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FX4VAR EQU BYTEVARBASE+$ED
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FX4VAR EQU BYTEVARBASE+$ED
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KEYBUF EQU $400 ; *KEY buffer from $400-$7FF
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; Beware of the screen holes!
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KEYBUFFREE EQU KEYBUF + $20 ; Free space word
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* *KEY <num> <GSTRANS string>
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* ---------------------------
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STARKEY LDA FXSOFTLEN
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BNE ERRKEYUSED ; Key being expanded
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JSR SCANDEC
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CMP #$10
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BCC STARKEY1
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ERRBADKEY BRK
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DB $FB
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ASC 'Bad key'
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ERRKEYUSED BRK
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DB $FA
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ASC 'Key in use'
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BRK
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STARKEY1 ASL A ; Key num * 2
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PHA ; Preserve for later
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JSR SKIPCOMMA
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LDA KEYBUFFREE+0 ; Free space LS byte
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STA OSTEXT+0
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PLX ; Recover key num * 2
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PHX
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STA KEYBUF,X ; Store LS byte start address
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LDA KEYBUFFREE+1 ; Free space MS byte
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STA OSTEXT+1
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PLX ; Recover key num * 2
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STA KEYBUF+1,X ; Store MS byte start address
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:L1 LDA (OSLPTR),Y ; Read char from input
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STA (OSTEXT) ; Store in buffer
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PHA
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INY ; Advance source index
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JSR INCKEYPTR ; Advance dest pointer
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PLA
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CMP #$0D ; Carriage return?
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BNE :L1
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:S1 LDA OSTEXT+0
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STA KEYBUFFREE+0 ; Free space LS byte
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LDA OSTEXT+1
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STA KEYBUFFREE+1 ; Free space MS byte
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RTS
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* Increment OSTEXT, skipping over screen holes
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* Screen holes are $478-$47F, $4F8-$4FF
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* $578-$57F, $5F8-$5FF
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* $678-$67F, $6F8-$6FF
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* $778-$77F, $7F8-$7FF
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INCKEYPTR LDA OSTEXT+0 ; Least significant byte
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INC A
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STA OSTEXT+0
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AND #$F8
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CMP #$78 ; If $78 to $7F
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BEQ :HOLE78
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CMP #$F8 ; If $F8 to $FF
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BEQ :HOLEF8
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RTS
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:HOLE78 LDA #$80
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STA OSTEXT+0
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RTS
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:HOLEF8 STZ OSTEXT+0
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INC OSTEXT+1
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RTS
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* OSWRCH handler
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* OSWRCH handler
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****************
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****************
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@ -181,6 +115,7 @@ KBDINIT LDX #DEFBYTEEND-DEFBYTE-1
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STA BYTEVARBASE+DEFBYTELOW,X
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STA BYTEVARBASE+DEFBYTELOW,X
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DEX
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DEX
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BPL :KBDINITLP
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BPL :KBDINITLP
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JSR SOFTKEYCHK ; Clear soft keys
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LDX #$C0
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LDX #$C0
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STX FX254VAR ; b7-b4=default KBD map, b3-b0=default MODE
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STX FX254VAR ; b7-b4=default KBD map, b3-b0=default MODE
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BIT SETV ; Set V
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BIT SETV ; Set V
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@ -327,6 +262,149 @@ NEGCALL >>> XF2MAIN,MACHRD ; Try to read Machine ID
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* KERNEL/KEYBOARD.S
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* KERNEL/KEYBOARD.S
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*******************
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*******************
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* SOFT KEY PROCESSING
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=====================
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* *KEY <num> <GSTRANS string>
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* ---------------------------
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STARKEY LDA FXSOFTLEN
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BNE ERRKEYUSED ; Key being expanded
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JSR SCANDEC
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CMP #$10
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BCC STARKEY1
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ERRBADKEY BRK
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DB $FB
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ASC 'Bad key'
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ERRKEYUSED BRK
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DB $FA
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ASC 'Key in use'
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BRK
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* A slightly fiddly procedure, as we need to check the new
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* definition is valid before we insert it, we can't bomb
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* out halfway through inserting a string, and we mustn't
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* have mainmem paged in while parsing the string as the
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* string might be "underneath" the memory we've paged in,
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* we don't know how long the new definition is and if
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* it will fit into memory until after we've parsed it, so
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* we either have to store it to a temp area or parse it
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* twice.
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*
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* All this, and we need a structure that is reasonably coded,
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* but with the priority to be easy for KEYREAD to extract
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* from (as called more often), even if at expense of storing
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* being more complex.
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*
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* Optimisations:
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* BBC doesn't care if the new definition is valid, it removes
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* the current definition before parsing, so a parse error
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* results in the definition being cleared.
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* eg *KEY 1 HELLO, *KEY 1 "X gives Bad string and key 1=""
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*
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* BBC uses (simplified):
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* SOFTBUF+key+0 -> start of definition
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* SOFTBUF+key+1 -> after last byte of definition
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* SOFTBUF+16 -> free space after end of last definition
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* definitions stored in order of creation
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*
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* Master uses:
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* SOFTBUF+key -> lo.start of definition
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* SOFTBUF+key+17 -> hi.start of definition
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* SOFTBUF+key+1 -> lo.after last byte definition
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* SOFTBUF+key+18 -> hi.after last byte definition
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* SOFTBUF+16/33 -> free space after last byte last definition
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* definitions stored in key order
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*
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* Bobbi's initial layout:
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* 00/01 - 1E/1F -> pointers to start of each string
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* 20/21 -> pointer to end of all strings
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*
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* Bobbi's initial scheme:
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KEYBUF EQU $400 ; *KEY buffer from $400-$7FF
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; Beware of the screen holes!
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KEYBUFFREE EQU KEYBUF + $20 ; Free space word
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STARKEY1
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ASL A ; Key num * 2
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PHA ; Preserve for later
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JSR SKIPCOMMA
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LDA KEYBUFFREE+0 ; Free space LS byte
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STA OSTEXT+0
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PLX ; Recover key num * 2
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PHX
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STA KEYBUF,X ; Store LS byte start address
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LDA KEYBUFFREE+1 ; Free space MS byte
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STA OSTEXT+1
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PLX ; Recover key num * 2
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STA KEYBUF+1,X ; Store MS byte start address
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:L1 LDA (OSLPTR),Y ; Read char from input
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STA (OSTEXT) ; Store in buffer
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PHA
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INY ; Advance source index
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JSR INCKEYPTR ; Advance dest pointer
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PLA
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CMP #$0D ; Carriage return?
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BNE :L1
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:S1 LDA OSTEXT+0
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STA KEYBUFFREE+0 ; Free space LS byte
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LDA OSTEXT+1
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STA KEYBUFFREE+1 ; Free space MS byte
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RTS
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* Increment OSTEXT, skipping over screen holes
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* Screen holes are $478-$47F, $4F8-$4FF
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* $578-$57F, $5F8-$5FF
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* $678-$67F, $6F8-$6FF
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* $778-$77F, $7F8-$7FF
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INCKEYPTR LDA OSTEXT+0 ; Least significant byte
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INC A
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STA OSTEXT+0
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AND #$F8
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CMP #$78 ; If $78 to $7F
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BEQ :HOLE78
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CMP #$F8 ; If $F8 to $FF
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BEQ :HOLEF8
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RTS
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:HOLE78 LDA #$80
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STA OSTEXT+0
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RTS
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:HOLEF8 STZ OSTEXT+0
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INC OSTEXT+1
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RTS
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* OSBYTE &12 - Clear soft keys
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* ----------------------------
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SOFTKEYCHK LDA FXSOFTOK
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BEQ BYTE12OK ; Soft keys ok, exit
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BYTE12 LDX #120 ; 120 bytes in each half page
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STX FXSOFTOK ; Soft keys being updated
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* Bobbi's initial scheme
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PHP
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SEI ; Prevent IRQs while writing
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STZ WRMAINRAM ; Write to main mem
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BYTE12LP STZ $0400-1,X ; Could be more efficient
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STZ $0480-1,X
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STZ $0500-1,X
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STZ $0580-1,X
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STZ $0600-1,X
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STZ $0680-1,X
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STZ $0700-1,X
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STZ $0780-1,X
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DEX
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BNE BYTE12LP
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LDA #<KEYBUFFREE+2 ; Initialize start of *KEY free-space
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STA KEYBUFFREE+0
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LDA #>KEYBUFFREE
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STA KEYBUFFREE+1
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STA WRCARDRAM ; Restore writing to aux
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PLP ; And restore IRQs
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*
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STX FXSOFTOK ; Soft keys updated
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BYTE12OK RTS
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* KEYREAD
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* KEYREAD
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************************
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************************
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* Test for and read from input,
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* Test for and read from input,
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@ -345,12 +423,14 @@ KEYREAD LDY FXEXEC ; See if EXEC file is open
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KEYREAD1
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KEYREAD1
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*
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*
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* TO DO: expand current soft key
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* TO DO: expand current soft key
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* LDA SOFTKEYLEN
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* LDA FXSOFTLEN
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* BEQ KEYREAD2
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* BEQ KEYREAD2
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* LDX SOFTKEYOFF
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* LDX SOFTKEYOFF
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* page in main memory
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* LDA SOFTKEYS,X
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* LDA SOFTKEYS,X
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* page out main memory
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* INC SOFTKEYOFF
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* INC SOFTKEYOFF
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* DEC SOFTKEYLEN
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* DEC FXSOFTLEN
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* CLC
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* CLC
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* RTS
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* RTS
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* KEYREAD2
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* KEYREAD2
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@ -524,8 +604,9 @@ BYTE7E STA KBDACK ; Flush keyboard
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BEQ BYTE7E2
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BEQ BYTE7E2
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CLI ; Allow IRQs while flushing
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CLI ; Allow IRQs while flushing
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STX FXLINES ; Clear scroll counter
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STX FXLINES ; Clear scroll counter
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STX FXSOFTLEN ; Cancel soft key expansion
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JSR CMDEXEC0 ; Close any EXEC file
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JSR CMDEXEC0 ; Close any EXEC file
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* JSR BUFFLUSHALL ; Flush all buffers
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* JSR BUFFLUSHALL ; Flush all buffers (this should do FXSOFTLEN)
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BYTE7E2 LDX #$FF ; X=$FF, Escape was pending
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BYTE7E2 LDX #$FF ; X=$FF, Escape was pending
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BYTE7C CLC ; &7C = clear escape condition
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BYTE7C CLC ; &7C = clear escape condition
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BYTE7D ROR ESCFLAG ; $7D = set escape condition
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BYTE7D ROR ESCFLAG ; $7D = set escape condition
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141
auxmem.init.s
141
auxmem.init.s
@ -55,26 +55,106 @@ MOSINIT SEI ; Ensure IRQs disabled
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BRA :NORELOC
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BRA :NORELOC
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:RELOC LDA #<AUXMOS1 ; Source
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:RELOC LDA #<AUXMOS1 ; Source
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STA OSLPTR+0
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STA A1L
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LDA #>AUXMOS1
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LDA #>AUXMOS1
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STA OSLPTR+1
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STA A1H
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LDA #<AUXMOS ; Dest
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LDA #<AUXMOS ; Dest
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STA OSTEXT+0
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STA A2L
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LDA #>AUXMOS
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LDA #>AUXMOS
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STA OSTEXT+1 ; Y=0 from earlier
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STA A2H ; Y=0 from earlier
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:L1 LDA (OSLPTR),Y ; Copy from source
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:L1 LDA (A1L),Y ; Copy from source
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STA (OSTEXT),Y ; to dest
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STA (A2L),Y ; to dest
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INY
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INY
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BNE :L1 ; Do 256 bytes
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BNE :L1 ; Do 256 bytes
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INC OSLPTR+1 ; Update source
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INC A1H ; Update source
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INC OSTEXT+1 ; Update dest
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INC A2H ; Update dest
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BMI :L1 ; Loop until wrap past &FFFF
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BMI :L1 ; Loop until wrap past &FFFF
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*
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:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
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:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
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STA $FF00,Y ; Copy MOS API and vectors
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STA $FF00,Y ; Copy MOS API and vectors
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INY ; to proper place
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INY ; to proper place
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BNE :L2
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BNE :L2
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*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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* STA A1L
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* LDA #>MOSVEC-MOSINIT+AUXMOS1
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* STA A1H
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* LDA #<MOSVEND-MOSINIT+AUXMOS1
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* STA A2L
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* LDA #>MOSVEND-MOSINIT+AUXMOS1
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* STA A2H
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* LDA #<MOSAPI
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* STA A4L
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* LDA #>MOSAPI
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* STA A4H
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*:L2 LDA (A1L)
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* STA (A4L)
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* LDA A1H
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* CMP A2H
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* BNE :S5
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* LDA A1L
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* CMP A2L
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* BNE :S5
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* LDA #<AUXMOS1 ; Relocate MOS shim
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* STA A1L
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* LDA #>AUXMOS1
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* STA A1H
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* LDA #<EAUXMOS1
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* STA A2L
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* LDA #>EAUXMOS1
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* STA A2H
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* LDA #<AUXMOS
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* STA A4L
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||||||
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* LDA #>AUXMOS
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* STA A4H
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*:L1 LDA (A1L)
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* STA (A4L)
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|
* LDA A1H
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* CMP A2H
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* BNE :S1
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* LDA A1L
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* CMP A2L
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* BNE :S1
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* BRA :S4
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*:S1 INC A1L
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* BNE :S2
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* INC A1H
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*:S2 INC A4L
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* BNE :S3
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* INC A4H
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*:S3 BRA :L1
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*
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*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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* STA A1L
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* LDA #>MOSVEC-MOSINIT+AUXMOS1
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* STA A1H
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* LDA #<MOSVEND-MOSINIT+AUXMOS1
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* STA A2L
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* LDA #>MOSVEND-MOSINIT+AUXMOS1
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* STA A2H
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* LDA #<MOSAPI
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||||||
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* STA A4L
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||||||
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* LDA #>MOSAPI
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||||||
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* STA A4H
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||||||
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*:L2 LDA (A1L)
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||||||
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* STA (A4L)
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||||||
|
* LDA A1H
|
||||||
|
* CMP A2H
|
||||||
|
* BNE :S5
|
||||||
|
* LDA A1L
|
||||||
|
* CMP A2L
|
||||||
|
* BNE :S5
|
||||||
|
* BRA :S8
|
||||||
|
*:S5 INC A1L
|
||||||
|
* BNE :S6
|
||||||
|
* INC A1H
|
||||||
|
*:S6 INC A4L
|
||||||
|
* BNE :S7
|
||||||
|
* INC A4H
|
||||||
|
*:S7 BRA :L2
|
||||||
|
|
||||||
|
:S8
|
||||||
LDA #$EA ; NOP opcode
|
LDA #$EA ; NOP opcode
|
||||||
STA :MODBRA+0 ; Next time around, we're already
|
STA :MODBRA+0 ; Next time around, we're already
|
||||||
STA :MODBRA+1 ; in high memory
|
STA :MODBRA+1 ; in high memory
|
||||||
@ -91,39 +171,30 @@ MOSINIT SEI ; Ensure IRQs disabled
|
|||||||
MOSHIGH SEI ; Ensure IRQs disabled
|
MOSHIGH SEI ; Ensure IRQs disabled
|
||||||
LDX #$FF
|
LDX #$FF
|
||||||
TXS ; Initialise stack
|
TXS ; Initialise stack
|
||||||
INX ; X=$00
|
PHY ; Stack ResetType
|
||||||
LDA FXLANG ; Y=ResetType, A=Language
|
LDA FXLANG ; A=Language
|
||||||
|
LDY FXSOFTOK ; A=Language, Y=Soft Keys Ok
|
||||||
|
|
||||||
|
INX ; X=$00
|
||||||
:SCLR STZ $0000,X ; Clear Kernel memory
|
:SCLR STZ $0000,X ; Clear Kernel memory
|
||||||
STZ $0200,X
|
STZ $0200,X
|
||||||
STZ $0300,X
|
STZ $0300,X
|
||||||
INX
|
INX
|
||||||
BNE :SCLR
|
BNE :SCLR
|
||||||
:KCLR STZ $0400,X ; Clear *KEY buffer (avoid scrn holes)
|
|
||||||
STZ $0500,X
|
|
||||||
STZ $0600,X
|
|
||||||
STZ $0700,X
|
|
||||||
STZ $0480,X
|
|
||||||
STZ $0580,X
|
|
||||||
STZ $0680,X
|
|
||||||
STZ $0780,X
|
|
||||||
INX
|
|
||||||
CPX #$78
|
|
||||||
BNE :KCLR
|
|
||||||
|
|
||||||
LDA #<KEYBUFFREE+2 ; Initialize start of *KEY free-space
|
|
||||||
STA KEYBUFFREE+0
|
|
||||||
LDA #>KEYBUFFREE
|
|
||||||
STA KEYBUFFREE+1
|
|
||||||
|
|
||||||
STY FXRESET ; Set ResetType
|
|
||||||
STA FXLANG ; Current language
|
STA FXLANG ; Current language
|
||||||
|
STY FXSOFTOK ; Soft key validity
|
||||||
|
PLA
|
||||||
|
STA FXRESET ; Set ResetType
|
||||||
|
BEQ :INITPG2 ; Soft Reset, preserve settings
|
||||||
|
DEX ; X=$FF
|
||||||
|
STX FXLANG ; Current language=none
|
||||||
|
STX FXSOFTOK ; Invalidate soft keys
|
||||||
|
|
||||||
LDX #ENDVEC-DEFVEC-1
|
:INITPG2 LDX #ENDVEC-DEFVEC-1
|
||||||
:INITPG2 LDA DEFVEC,X ; Set up vectors
|
:INITPG2LP LDA DEFVEC,X ; Set up vectors
|
||||||
STA $200,X
|
STA $200,X
|
||||||
DEX
|
DEX
|
||||||
BPL :INITPG2
|
BPL :INITPG2LP
|
||||||
|
|
||||||
LDA CYAREG ; GS speed register
|
LDA CYAREG ; GS speed register
|
||||||
AND #$80 ; Speed bit only
|
AND #$80 ; Speed bit only
|
||||||
@ -138,10 +209,8 @@ MOSHIGH SEI ; Ensure IRQs disabled
|
|||||||
BEQ :INITSOFT ; Soft reset, skip past
|
BEQ :INITSOFT ; Soft reset, skip past
|
||||||
LDA #7 ; Beep on HardReset/PowerReset
|
LDA #7 ; Beep on HardReset/PowerReset
|
||||||
JSR OSWRCH
|
JSR OSWRCH
|
||||||
LDA #$FF
|
|
||||||
STA FXLANG ; Current language=none
|
|
||||||
*
|
*
|
||||||
* AppleII MOS beeps anyway, so always get a Beep
|
* AppleII MOS beeps anyway, so we always get a Beep
|
||||||
* APPLECORN startup -> BBC Beep
|
* APPLECORN startup -> BBC Beep
|
||||||
* Press Ctrl-Reset -> AppleII Beep
|
* Press Ctrl-Reset -> AppleII Beep
|
||||||
*
|
*
|
||||||
@ -227,7 +296,7 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
|
|||||||
RTS ; %000x1xxx host type, 'A'pple
|
RTS ; %000x1xxx host type, 'A'pple
|
||||||
BYTE00A BRK
|
BYTE00A BRK
|
||||||
DB $F7
|
DB $F7
|
||||||
HELLO ASC 'Applecorn MOS 2022-12-07'
|
HELLO ASC 'Applecorn MOS 2022-11-08'
|
||||||
DB $00 ; Unify MOS messages
|
DB $00 ; Unify MOS messages
|
||||||
* TO DO: Move into RAM
|
* TO DO: Move into RAM
|
||||||
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow
|
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user