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Reset Ensoniq on Ctrl-Reset. Fixes #185.

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Bobbi Webber-Manners 2022-11-04 21:27:20 -04:00
parent 8eefb97f1d
commit b691b0e3f8
4 changed files with 11 additions and 7 deletions
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BIN
applecorn.po
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2
auxmem.init.s
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@ -213,7 +213,7 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
RTS ; %000x1xxx host type, 'A'pple
BYTE00A BRK
DB $F7
HELLO ASC 'Applecorn MOS 2022-11-03'
HELLO ASC 'Applecorn MOS 2022-11-04'
DB $00 ; Unify MOS messages
* TO DO: Move into RAM
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow

9
mainmem.init.s
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@ -15,6 +15,7 @@ A2IRQ >>> IENTMAIN ; IENTMAIN does not do CLI
A2IRQ2 PHP ; Fake things to look like IRQ
JMP (A2IRQV) ; Call Apple II ProDOS ISR
* BRK handler in main memory. Used on Apple IIgs only.
GSBRK >>> XF2AUX,GSBRKAUX
@ -27,8 +28,14 @@ RESET TSX
LDA AN1OFF ; AN1 off
LDA AN2ON ; AN2 on
LDA AN3ON ; AN3 on
JSR RESETHW ; Reset hardware
>>> XF2AUX,AUXMOS
RTS
* Reset hardware
RESETHW SEC
JSR IDROUTINE ; See if this is a GS
BCS :NOTGS
JSR ENSQINIT ; Initialize Ensoniq
:NOTGS RTS

7
mainmem.ldr.s
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@ -111,12 +111,9 @@ DISCONN LDA MACHID
STA DEVADR32+1
DEC DEVCNT
:S1 SEC
JSR IDROUTINE ; See if we have a GS
BCS :NOTGS
JSR ENSQINIT ; Initialize Ensoniq
:S1 JSR ROMMENU ; This really needs to happen elsewhere
:NOTGS JSR ROMMENU ; This really needs to happen elsewhere
JSR RESETHW ; Reset any hardware required
LDA #<:FDFILE
STA OPENPL+1