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https://github.com/bobbimanners/Applecorn.git
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CLG sorta working in SHR modes
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applecorn.po
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applecorn.po
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auxmem.shr.s
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auxmem.shr.s
@ -8,10 +8,73 @@
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SCB320 EQU $00 ; SCB for 320 mode
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SCB640 EQU $80 ; SCB for 640 mode
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* Colours in the following order.
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* For 16 colour modes ...
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* BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE, ...
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* For 4 colour modes ...
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* BLACK, RED, YELLOW, WHITE
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PALETTE320 DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $00 ; GREEN
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DB $80, $08 ; YELLOW
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DB $08, $00 ; BLUE
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DB $08, $08 ; MAGENTA
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DB $88, $00 ; CYAN
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DB $80, $08 ; YELLOW
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DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $00 ; GREEN
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DB $80, $08 ; YELLOW
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DB $08, $00 ; BLUE
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DB $08, $08 ; MAGENTA
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DB $88, $00 ; CYAN
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DB $80, $08 ; YELLOW
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DB $88, $08 ; WHITE
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PALETTE640 DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $08 ; YELLOW
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DB $88, $08 ; WHITE
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DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $08 ; YELLOW
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DB $88, $08 ; WHITE
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DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $08 ; YELLOW
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DB $88, $08 ; WHITE
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DB $00, $00 ; BLACK
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DB $00, $08 ; RED
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DB $80, $08 ; YELLOW
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DB $88, $08 ; WHITE
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* Enable SHR mode
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SHRVDU22 JSR VDU12 ; Clear text and HGR screen
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SHRVDU22 JSR VDU12 ; Clear text and SHR screen
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LDA #$80 ; Most significant bit
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TSB NEWVIDEO ; Enable SHR mode
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LDA #$E1 ; SHR memory bank
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STA VDUBANK
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LDA VDUPIXELS ; Pixels per byte
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CMP #$02 ; 2 is 320-mode (MODE 1)
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BNE :MODE0
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LDA SCB320 ; SCB for 320-mode
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LDY #00 ; Palette offset
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BRA :S1
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:MODE0 LDA SCB640 ; SCB for 640-mode
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LDY #32 ; Palette offset
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:S1 LDX #$00
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:L1 STAL $E19D00,X ; SCBs begin at $9D00 in $E1
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INX
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CPX #200 ; 200 lines so 200 SCBs
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BNE :L1
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LDX #$00
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:L2 LDA PALETTE320,Y ; Offset n Y computed above
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STAL $E119E00,X ; Palettes begin at $9E00 in $E1
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INX
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INY
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CPX #16 ; 16 colours in palette
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BNE :L2
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RTS
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@ -41,7 +104,20 @@ SHRCLREOL
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* VDU16 (CLG) clears the whole SHR screen right now
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SHRCLEAR
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SHRCLEAR CLC ; 816 native mode
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XCE
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REP #$10 ; 16 bit index
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MX %10 ; Tell Merlin
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LDX #$0000
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LDA #$00
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:L1 STAL $E12000,X ; SHR screen @ E1:2000
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INX
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CPX #$7D00
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BNE :L1
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SEP #$10 ; Back to 8 bit index
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MX %11 ; Tell Merlin
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SEC ; Back to 6502 emu mode
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XCE
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RTS
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