Apple-2-SW/Applecorn
1
0
Fork 0
mirror of https://github.com/bobbimanners/Applecorn.git synced 2024-12-27 23:31:04 +00:00
Code Issues Projects Releases Wiki Activity

Merge pull request #195 from jgharston/main

Browse Source 
Startup sets LastBreak flag
This commit is contained in:
Bobbi Webber-Manners 2022-11-07 20:52:12 -05:00 committed by GitHub
commit cbfa45dd7c
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
auxmem.init.s
View File

@ -119,6 +119,8 @@ MOSHIGH SEI ; Ensure IRQs disabled
STA $0300,X
INX
BNE :SCLR
INC BYTEVARBASE+$FD ; Last reset=Hard
* TO DO: Do this properly
LDX #ENDVEC-DEFVEC-1
:INITPG2 LDA DEFVEC,X ; Set up vectors
@ -208,7 +210,7 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
RTS ; %000x1xxx host type, 'A'pple
BYTE00A BRK
DB $F7
HELLO ASC 'Applecorn MOS 2022-11-07'
HELLO ASC 'Applecorn MOS 2022-11-04'
DB $00 ; Unify MOS messages
* TO DO: Move into RAM
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow