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https://github.com/bobbimanners/Applecorn.git
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Merge pull request #201 from jgharston/main
Current language preserved over Break
This commit is contained in:
Bobbi Webber-Manners
GitHub
commit
ed6a9a5257
208
auxmem.init.s
208
auxmem.init.s
@ -3,6 +3,8 @@
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*
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*
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* Initialization code running in Apple //e aux memory
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* Initialization code running in Apple //e aux memory
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* 08-Nov-2022 ResetType OSBYTE set
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* 08-Nov-2022 ResetType OSBYTE set
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* 09-Nov-2022 Current language re-entered, reset on Power/Hard Reset
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* BUG: If Ctrl-Break pressed during a service call, wrong ROM gets paged in
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***********************************************************
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***********************************************************
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@ -10,6 +12,10 @@
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***********************************************************
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***********************************************************
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MAXROM EQU $F9 ; Max sideways ROM number
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MAXROM EQU $F9 ; Max sideways ROM number
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FXLANG EQU BYTEVARBASE+$FC ; Current language
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FXRESET EQU BYTEVARBASE+$FD ; Last Reset type
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FXOPTIONS EQU BYTEVARBASE+$FF ; Startup options
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ZP1 EQU $90 ; $90-$9f are spare Econet space
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ZP1 EQU $90 ; $90-$9f are spare Econet space
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; so safe to use
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; so safe to use
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@ -30,7 +36,7 @@ MOSSHIM
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*
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*
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* Initially executing at $2000 until copied to $D000
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* Initially executing at $2000 until copied to $D000
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*
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*
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* When running APLCORN.SYSTEM:
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* When first run from loading from disk:
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* Code will be at $2000-$4FFF, then copied to $D000-$FFFF
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* Code will be at $2000-$4FFF, then copied to $D000-$FFFF
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* When Ctrl-Reset pressed:
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* When Ctrl-Reset pressed:
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* AUX RESET code jumps to MAIN $D000
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* AUX RESET code jumps to MAIN $D000
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@ -44,67 +50,109 @@ MOSINIT SEI ; Ensure IRQs disabled
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LDA LCBANK1 ; LC RAM Rd/Wt, 1st 4K bank
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LDA LCBANK1 ; LC RAM Rd/Wt, 1st 4K bank
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LDA LCBANK1
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LDA LCBANK1
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LDY #$00 ; $02=Soft Reset
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LDY #$00 ; $00=Soft Reset
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:MODBRA BRA :RELOC ; NOPped out on first run
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:MODBRA BRA :RELOC ; NOPped out on first run
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BRA :NORELOC
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BRA :NORELOC
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:RELOC LDA #<AUXMOS1 ; Relocate MOS shim
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:RELOC LDA #<AUXMOS1 ; Source
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STA A1L
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STA A1L
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LDA #>AUXMOS1
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LDA #>AUXMOS1
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STA A1H
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STA A1H
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LDA #<EAUXMOS1
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LDA #<AUXMOS ; Dest
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STA A2L
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STA A2L
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LDA #>EAUXMOS1
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STA A2H
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LDA #<AUXMOS
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STA A4L
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LDA #>AUXMOS
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LDA #>AUXMOS
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STA A4H
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STA A2H ; Y=0 from earlier
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:L1 LDA (A1L)
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:L1 LDA (A1L),Y ; Copy from source
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STA (A4L)
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STA (A2L),Y ; to dest
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LDA A1H
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INY
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CMP A2H
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BNE :L1 ; Do 256 bytes
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BNE :S1
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INC A1H ; Update source
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LDA A1L
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INC A2H ; Update dest
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CMP A2L
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BMI :L1 ; Loop until wrap past &FFFF
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BNE :S1
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*
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BRA :S4
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:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
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:S1 INC A1L
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STA $FF00,Y ; Copy MOS API and vectors
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BNE :S2
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INY ; to proper place
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INC A1H
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BNE :L2
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:S2 INC A4L
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BNE :S3
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INC A4H
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:S3 BRA :L1
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:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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STA A1L
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* STA A1L
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LDA #>MOSVEC-MOSINIT+AUXMOS1
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* LDA #>MOSVEC-MOSINIT+AUXMOS1
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STA A1H
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* STA A1H
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LDA #<MOSVEND-MOSINIT+AUXMOS1
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* LDA #<MOSVEND-MOSINIT+AUXMOS1
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STA A2L
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* STA A2L
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LDA #>MOSVEND-MOSINIT+AUXMOS1
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* LDA #>MOSVEND-MOSINIT+AUXMOS1
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STA A2H
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* STA A2H
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LDA #<MOSAPI
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* LDA #<MOSAPI
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STA A4L
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* STA A4L
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LDA #>MOSAPI
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* LDA #>MOSAPI
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STA A4H
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* STA A4H
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:L2 LDA (A1L)
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*:L2 LDA (A1L)
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STA (A4L)
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* STA (A4L)
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LDA A1H
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* LDA A1H
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CMP A2H
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* CMP A2H
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BNE :S5
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* BNE :S5
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LDA A1L
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* LDA A1L
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CMP A2L
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* CMP A2L
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BNE :S5
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* BNE :S5
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BRA :S8
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:S5 INC A1L
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* LDA #<AUXMOS1 ; Relocate MOS shim
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BNE :S6
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* STA A1L
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INC A1H
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* LDA #>AUXMOS1
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:S6 INC A4L
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* STA A1H
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BNE :S7
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* LDA #<EAUXMOS1
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INC A4H
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* STA A2L
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:S7 BRA :L2
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* LDA #>EAUXMOS1
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* STA A2H
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* LDA #<AUXMOS
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* STA A4L
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* LDA #>AUXMOS
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* STA A4H
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*:L1 LDA (A1L)
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* STA (A4L)
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* LDA A1H
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* CMP A2H
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* BNE :S1
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* LDA A1L
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* CMP A2L
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* BNE :S1
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* BRA :S4
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*:S1 INC A1L
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* BNE :S2
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* INC A1H
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*:S2 INC A4L
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* BNE :S3
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* INC A4H
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*:S3 BRA :L1
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*
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*:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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* STA A1L
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* LDA #>MOSVEC-MOSINIT+AUXMOS1
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* STA A1H
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* LDA #<MOSVEND-MOSINIT+AUXMOS1
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* STA A2L
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* LDA #>MOSVEND-MOSINIT+AUXMOS1
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* STA A2H
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* LDA #<MOSAPI
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* STA A4L
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* LDA #>MOSAPI
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* STA A4H
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*:L2 LDA (A1L)
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* STA (A4L)
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* LDA A1H
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* CMP A2H
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* BNE :S5
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* LDA A1L
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* CMP A2L
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* BNE :S5
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* BRA :S8
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*:S5 INC A1L
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* BNE :S6
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* INC A1H
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*:S6 INC A4L
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* BNE :S7
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* INC A4H
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*:S7 BRA :L2
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:S8
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:S8
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LDA #$EA ; NOP opcode
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LDA #$EA ; NOP opcode
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@ -124,13 +172,15 @@ MOSHIGH SEI ; Ensure IRQs disabled
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LDX #$FF
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LDX #$FF
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TXS ; Initialise stack
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TXS ; Initialise stack
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INX ; X=$00
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INX ; X=$00
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TXA
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LDA FXLANG ; Y=ResetType, A=Language
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:SCLR STA $0000,X ; Clear Kernel memory
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STA $0200,X
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:SCLR STZ $0000,X ; Clear Kernel memory
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STA $0300,X
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STZ $0200,X
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STZ $0300,X
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INX
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INX
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BNE :SCLR
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BNE :SCLR
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STY BYTEVARBASE+$FD ; Set ResetType
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STY FXRESET ; Set ResetType
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STA FXLANG ; Current language
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LDX #ENDVEC-DEFVEC-1
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LDX #ENDVEC-DEFVEC-1
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:INITPG2 LDA DEFVEC,X ; Set up vectors
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:INITPG2 LDA DEFVEC,X ; Set up vectors
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@ -146,19 +196,33 @@ MOSHIGH SEI ; Ensure IRQs disabled
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JSR KBDINIT ; Returns A=startup MODE
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JSR KBDINIT ; Returns A=startup MODE
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JSR VDUINIT ; Initialise VDU driver
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JSR VDUINIT ; Initialise VDU driver
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JSR PRHELLO
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JSR PRHELLO
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LDA BYTEVARBASE+$FD ; Get ResetType
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JSR OSNEWL
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BEQ :INITSOFT
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LDA FXRESET ; Get ResetType
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LDA #7 ; Beep on HardReset
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BEQ :INITSOFT ; Soft reset, skip past
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LDA #7 ; Beep on HardReset/PowerReset
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JSR OSWRCH
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JSR OSWRCH
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LDA #$FF
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STA FXLANG ; Current language=none
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*
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* AppleII MOS beeps anyway, so always get a Beep
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* AppleII MOS beeps anyway, so always get a Beep
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* BRUN APPLECORN -> BBC Beep
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* APPLECORN startup -> BBC Beep
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* Ctrl-Reset -> AppleII Beep
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* Press Ctrl-Reset -> AppleII Beep
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*
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*
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:INITSOFT JSR OSNEWL
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* Find a language to enter
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LDX MAXROM ; *TEMP* X=language to enter
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:INITSOFT LDX FXLANG ; Get current language
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* TO DO: SoftReset->Use CURRLANG, HardReset->Search for language
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BPL :INITLANG ; b7=ok, use it
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LDX ROMMAX ; Look for a language
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:FINDLANG JSR ROMSELECT ; Bring ROM X into memory
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BIT $8006 ; Check ROM type
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BVS :INITLANG ; b6=set, use it
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DEX ; Step down to next ROM
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BPL :FINDLANG ; Loop until all tested
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BRK ; No language found
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DB $F9
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ASC 'No Language'
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BRK
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*
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*
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CLC ; CLC=Entering from RESET
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:INITLANG CLC ; CLC=Entering from RESET
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* OSBYTE $8E - Enter language ROM
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* OSBYTE $8E - Enter language ROM
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*********************************
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*********************************
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@ -166,6 +230,7 @@ MOSHIGH SEI ; Ensure IRQs disabled
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*
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*
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BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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JSR ROMSELECT ; Bring ROM X into memory
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JSR ROMSELECT ; Bring ROM X into memory
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STX FXLANG ; Set as current language ROM
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LDA #$00
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LDA #$00
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STA FAULT+0
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STA FAULT+0
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LDA #$80
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LDA #$80
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@ -175,7 +240,6 @@ BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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STY FAULT+0 ; FAULT pointing to version string
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STY FAULT+0 ; FAULT pointing to version string
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JSR OSNEWL
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JSR OSNEWL
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JSR OSNEWL
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JSR OSNEWL
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STX BYTEVARBASE+$FC ; Set current language ROM
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PLP ; Get entry type back
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PLP ; Get entry type back
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LDA #$01 ; $01=Entering code with a header
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LDA #$01 ; $01=Entering code with a header
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JMP ROMAUXADDR
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JMP ROMAUXADDR
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@ -186,8 +250,8 @@ BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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* X=service call, Y=parameter
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* X=service call, Y=parameter
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*
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*
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* SERVICE TAX ; Enter here with A=Service Num
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* SERVICE TAX ; Enter here with A=Service Num
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BYTE8F
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SERVICEX
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SERVICEX LDA $F4 ; Enter here with X=Service Number
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BYTE8F LDA $F4 ; Enter here with X=Service Number
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PHA ; Save current ROM
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PHA ; Save current ROM
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*DEBUG
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*DEBUG
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LDA $E0
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LDA $E0
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@ -198,7 +262,7 @@ SERVICEX LDA $F4 ; Enter here with X=Service Number
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:SERVDEBUG
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:SERVDEBUG
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*DEBUG
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*DEBUG
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TXA ; A=service number
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TXA ; A=service number
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LDX MAXROM ; Start at highest ROM
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LDX ROMMAX ; Start at highest ROM
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:SERVLP JSR ROMSELECT ; Bring it into memory
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:SERVLP JSR ROMSELECT ; Bring it into memory
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BIT $8006
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BIT $8006
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BPL :SERVSKIP ; No service entry
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BPL :SERVSKIP ; No service entry
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@ -226,7 +290,7 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
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RTS ; %000x1xxx host type, 'A'pple
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RTS ; %000x1xxx host type, 'A'pple
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BYTE00A BRK
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BYTE00A BRK
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DB $F7
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DB $F7
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HELLO ASC 'Applecorn MOS 2022-11-08'
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HELLO ASC 'Applecorn MOS 2022-11-04'
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DB $00 ; Unify MOS messages
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DB $00 ; Unify MOS messages
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* TO DO: Move into RAM
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* TO DO: Move into RAM
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GSSPEED DB $00 ; $80 if GS is fast, $00 for slow
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GSSPEED DB $00 ; $80 if GS is fast, $00 for slow
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