2014-12-04 17:43:58 +00:00
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.syntax unified
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.cpu cortex-m0
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.align 2
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.thumb
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.thumb_func
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.include "registers.inc"
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.text
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// void uart_init()
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.global uart_init
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.type uart_init, %function
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uart_init:
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// 0) Set to provide I/O clock
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ldr r0, =#SYSAHBCLKCTRL
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ldr r1, [r0]
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ldr r2, =#CLK_IOCON
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orrs r1, r1, r2
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str r1, [r0]
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// 1) IO port configuration to use UART
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ldr r0, =#IOCON_PIO1_6
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2014-12-10 15:27:35 +00:00
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movs r1, #(PIO_BASE | FUNC_RXD | MODE_UP)
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2014-12-04 17:43:58 +00:00
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str r1, [r0]
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ldr r0, =#IOCON_PIO1_7
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movs r1, #(PIO_BASE | FUNC_TXD)
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str r1, [r0]
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// 2) Set to provide UART clock
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ldr r0, =#SYSAHBCLKCTRL
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ldr r1, [r0]
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ldr r2, =#CLK_UART
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orrs r1, r1, r2
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str r1, [r0]
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// 3) Set clock divider to enable UART clock
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ldr r0, =#UARTCLKDIV
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movs r1, #1
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str r1, [r0]
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// UART_PCLK = 12MHz, BR = 115200
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// DLM=0, DLL=4, DIVADDVAL = 5, MULVAL = 8
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ldr r0, =#U0LCR
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movs r1, #DLAB_ENABLE
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str r1, [r0]
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ldr r0, =#U0DLM
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movs r1, #0
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str r1, [r0]
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ldr r0, =#U0DLL
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movs r1, #4
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str r1, [r0]
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ldr r0, =#U0FDR
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movs r1, #((8 << MULVAL_SHIFT) | 5)
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str r1, [r0]
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// Configure as 8-bit, 1 stop bit, no parity mode
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ldr r0, =#U0LCR
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movs r1, #(WORD_LEN_8 | STOP_BIT_1)
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str r1, [r0]
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// Reset FIFO
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ldr r0, =#U0FCR
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movs r1, #(FIFO_ENABLE | RX_RESET | TX_RESET)
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str r1, [r0]
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mov pc, lr
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.size uart_init, .-uart_init
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2014-12-10 15:27:35 +00:00
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// int uart_ready();
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.global uart_ready
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.type uart_ready, %function
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uart_ready:
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ldr r0, =#U0LSR
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ldr r0, [r0]
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movs r1, #LSR_RDR
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ands r0, r0, r1
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bne 1f
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movs r0, #0
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mov pc, lr
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1:
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movs r0, #1
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mov pc, lr
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.size uart_ready, .-uart_ready
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// int uart_getc();
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.global uart_getc
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.type uart_getc, %function
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uart_getc:
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ldr r0, =#U0RBR
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ldr r0, [r0]
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mov pc, lr
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.size uart_getc, .-uart_getc
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2014-12-04 17:43:58 +00:00
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// void uart_putc(char c);
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.global uart_putc
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.type uart_putc, %function
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uart_putc:
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ldr r1, =#U0LSR
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movs r2, #LSR_THRE
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1:
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ldr r3, [r1]
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ands r3, r2, r3
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beq 1b
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ldr r1, =#U0THR
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str r0, [r1]
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mov pc, lr
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.size uart_putc, .-uart_putc
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// void uart_putstr(const char* str);
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.global uart_putstr
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.type uart_putstr, %function
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uart_putstr:
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push {r4, lr}
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mov r4, r0
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1:
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ldrb r0, [r4]
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movs r0, r0
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beq 1f
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bl uart_putc
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movs r0, #1
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adds r4, r4, r0
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b 1b
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1:
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pop {r4, pc}
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.size uart_putstr, .-uart_putstr
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// void uart_putx(char x);
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.global uart_putx
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.type uart_putx, %function
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uart_putx:
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push {lr}
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movs r1, #10
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cmp r0, r1
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bhs 1f
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movs r1, #'0'
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adds r0, r0, r1
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bl uart_putc
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pop {pc}
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1:
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movs r1, #('a' - 10)
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adds r0, r0, r1
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bl uart_putc
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pop {pc}
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.size uart_putx, .-uart_putx
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// void uart_puthex(char n);
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.global uart_puthex
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.type uart_puthex, %function
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uart_puthex:
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push {lr}
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push {r0}
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lsrs r0, r0, #4
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bl uart_putx
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pop {r0}
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movs r1, #0xf
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ands r0, r0, r1
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bl uart_putx
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pop {pc}
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.size uart_puthex, .-uart_puthex
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// void uart_puthex16(short n);
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.global uart_puthex16
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.type uart_puthex16, %function
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uart_puthex16:
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push {lr}
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push {r0}
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lsrs r0, r0, #8
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bl uart_puthex
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pop {r0}
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movs r1, #0xff
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ands r0, r0, r1
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bl uart_puthex
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pop {pc}
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.size uart_puthex16, .-uart_puthex16
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2014-12-08 19:54:33 +00:00
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// void uart_putd(char n);
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.global uart_putd
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.type uart_putd, %function
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uart_putd:
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push {lr}
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movs r1, #0
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movs r2, #100
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movs r3, #0
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1:
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subs r0, r0, r2
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bcc 1f
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adds r1, r1, #1
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b 1b
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1:
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adds r0, r0, r2
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cmp r1, #0
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beq 2f
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push {r0}
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mov r0, r1
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bl uart_putx
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pop {r0}
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movs r3, #1
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2:
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movs r1, #0
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movs r2, #10
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1:
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subs r0, r0, r2
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bcc 1f
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adds r1, r1, #1
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b 1b
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1:
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adds r0, r0, r2
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cmp r1, #0
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bne 1f
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cmp r3, #0
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beq 2f
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1:
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push {r0}
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mov r0, r1
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bl uart_putx
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pop {r0}
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movs r3, #1
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2:
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movs r1, #0
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movs r2, #1
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1:
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subs r0, r0, r2
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bcc 1f
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adds r1, r1, #1
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b 1b
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1:
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mov r0, r1
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bl uart_putx
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pop {pc}
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