More ramtest stuff
This commit is contained in:
Zane Kaminski
parent
69095871ae
commit
71cafa58a5
8
Makefile
8
Makefile
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@ -35,13 +35,17 @@ obj/util.o: obj util.c
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cc65 util.c $(cflags) -o obj/util.s
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ca65 obj/util.s -o obj/util.o
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obj/ramtest.o: obj ramtest.c
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cc65 ramtest.c $(cflags) -o obj/ramtest.s
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ca65 obj/ramtest.s -o obj/ramtest.o
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obj/gwconio.o: obj gwconio.s
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ca65 gwconio.s -o obj/gwconio.o
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bin/main.sys: bin obj/main.o obj/ram2e.o obj/ram2gs.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o
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bin/main.sys: bin obj/main.o obj/ram2e.o obj/ram2gs.o obj/ram2gs_asm.o obj/util.o obj/ramtest.o obj/gwconio.o
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ld65 -o bin/main.sys obj/main.o obj/ram2gs.o obj/ram2e.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o -C apple2-system.cfg --lib apple2.lib -D __EXEHDR__=0
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bin/main.dbg.sys: bin obj/main.o obj/ram2e.dbg.o obj/ram2gs.dbg.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o
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bin/main.dbg.sys: bin obj/main.o obj/ram2e.dbg.o obj/ram2gs.dbg.o obj/ram2gs_asm.o obj/util.o obj/ramtest.o obj/gwconio.o
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ld65 -o bin/main.dbg.sys obj/main.o obj/ram2gs.dbg.o obj/ram2e.dbg.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o -C apple2-system.cfg --lib apple2.lib -D __EXEHDR__=0
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GWRAM.po: bin/main.sys
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BIN
bin/GWRAM.dbg.po
BIN
bin/GWRAM.dbg.po
Binary file not shown.
BIN
bin/GWRAM.po
BIN
bin/GWRAM.po
Binary file not shown.
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@ -36,7 +36,7 @@
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.I16
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.endmacro
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.segment "CODE"
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.code
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.proc _gsram_getsize: near
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.A8
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114
ramtest.c
114
ramtest.c
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@ -9,12 +9,49 @@
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#include "gwconio.h"
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#include "ramtestpat.c"
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#define TEST_SIZE 8*1024*1024
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#define TEST_SIZE (8*1024*1024)
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#define BANK_SIZE (65536)
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#define NUM_BANKS (TEST_SIZE/BANK_SIZE)
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static char getpat(uint32_t i) {
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return ramtestpat[i % RAMTESTPAT_SIZE];
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}
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char test_run() {
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// Put copy stub in low RAM
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for (uint32_t a = 0; a < TEST_SIZE) {
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wr(a, getpat(a));
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uint32_t i;
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uint8_t ah;
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// Put read/write stubs in low RAM
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for (ah = 0, i = 0; ah < NUM_BANKS; ah++) {
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uint16_t al = 0;
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// Copy 0x0000-01FF
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*((char*)_test_wr1_dm1 + 1) = getpat(i);
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for (; al < 0x200; al++, i++) {
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_test_wr1_dm1:
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__asm__("lda #$00");
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__asm__("sta $C009"); // SETALTZP
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_test_wr1_am1:
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__asm__("lda $0000");
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__asm__("sta $C008"); // SETSTDZP
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}
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// Copy 0x0200-BFFF
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for (; al < 0xC000; al++, i++) {
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}
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// Copy 0xC000-CFFF to LC2 D000-DFFF
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for (; al < 0xD000; al++, i++) {
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}
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// Copy 0xD000-FFFF to LC1 D000-FFFF
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for (; al != 0x0000; al++, i++) {
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}
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}
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for (uint32_t a = 0; a < TEST_SIZE) {
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@ -25,47 +62,42 @@ char test_run() {
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return 0;
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}
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static inline char getpat(uint32_t a) {
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return ramtestpat[a % RAMTESTPAT_SIZE];
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static void rd_zplc() {
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_rd_zplc:
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__asm__("sta $C009"); // SETALTZP
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_rd_zplc_am1:
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__asm__("lda $0000");
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__asm__("sta $C008"); // SETSTDZP
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__asm__("rts");
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}
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static char rd(uint32_t a) {
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uint16_t al = a & 0xFFFF;
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if (al < 0x0200) { return rd_zplc(a); }
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else if (al < 0xC000) { return rd_mid(a); }
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else if (al < 0xD000) { return rd_lc2(a); }
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else { return rd_zplc(a); }
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static void rd_main() {
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_rd_main:
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__asm__("sta $C003"); // WRCARDRAM
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_rd_main_am1:
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__asm__("lda $0000");
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__asm__("sta $C002"); // WRMAINRAM
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__asm__("rts");
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}
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static char rd_zplc(uint32_t a) {
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static void wr_zplc() {
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_wr_zplc:
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_wr_zplc_dm1:
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__asm__("lda #$00");
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__asm__("sta $C009"); // SETALTZP
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_wr_zplc_am1:
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__asm__("lda $0000");
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__asm__("sta $C008"); // SETSTDZP
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__asm__("rts");
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}
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static char rd_mid(uint32_t a) {
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static void wr_main() {
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_wr_main:
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_wr_zplc_dm1:
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__asm__("lda #$00");
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__asm__("sta $C005"); // WRCARDRAM
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_wr_main_am1:
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__asm__("lda $0000");
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__asm__("sta $C004"); // WRMAINRAM
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__asm__("rts");
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}
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static char rd_lc2(uint32_t a) {
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}
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static char wr(uint32_t a, char d) {
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uint16_t al = a & 0xFFFF;
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if (al < 0x0200) { wr_zplc(a, d); }
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else if (al < 0xC000) { wr_mid(a, d); }
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else if (al < 0xD000) { wr_lc2(a, d); }
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else { wr_zplc(a, d); }
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}
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static char rd_zplc(uint32_t a) {
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}
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static char rd_mid(uint32_t a) {
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}
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static char rd_lc2(uint32_t a) {
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}
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@ -0,0 +1,190 @@
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.autoimport on
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.importzp sp
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.export rtst_run
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.import rtst_pat
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.import rtst_scratch
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.code
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.proc ramtest_run: near
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; Preamble
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php ; Push status
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sei ; Disable interrupts
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phx ; Push X
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phy ; Push Y
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; Save entire ZP
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ldx #0 ; X = 0
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savezp:
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lda $00,X
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sta rtst_scratch,X
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inx
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bne savezp
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; Set bank counter and address to 0
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lda #0
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sta $04
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sta $03
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sta $02
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; Set pattern address to 0xA000
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lda #$A0
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sta $01
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lda #$00
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sta $00
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bankloop:
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; Store 0x0000-01FF
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; Store 0x0200-BFFF
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; Switch to LC2
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; Store in 0xD000-DFFF
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; Switch to LC1
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; Store in 0xD000-FFFF
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; Increment bank and repeat if < 128
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inc $04
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lda $04
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cmp #$80
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blt bankloop
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; Restore entire ZP
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ldx #0 ; X = 0
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savezp:
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lda rtst_scratch,X
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sta $00,X
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inx
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bne savezp
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; Postamble
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ply ; Pull Y
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plx ; Pull X
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plp ; Pull status
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.endproc
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.proc ramtest_incpat: near
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; Increment pattern pointer
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inc $00 ; Increment low byte
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bne incpat1 ; If low byte nonzero, skip incrementing high byte
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inc $01 ; If low byte zero, increment high byte
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bne incpat2 ; Unconditional branch to return
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beq incpat2
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; Check if pointer == 0xB001
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; if low byte didn't roll around
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incpat1:
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lda $01 ; Load high byte of pointer
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cmp #$B0 ; Check == 0xB0
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bne incpat2 ; If not, goto return
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lda $00 ; Load low byte of pointer
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cmp #$01 ; Check == 0x01
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bne incpat2 ; If not, goto return
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; Otherwise fall through
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; Reset pattern pointer
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lda #$A0
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sta $01
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lda #$00
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sta $00
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incpat2:
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rts
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.endproc
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.proc ramtest_wr256zp: near
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; Set up to copy
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ldy $02 ; Y = address lo
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sty wr256zp_am1_1+1 ; Set 1st address lo = 0
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sty wr256zp_am1_2+1 ; Set 2nd address lo = 0
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ldy $03 ; Y = address hi
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sty wr256zp_am1_1+2 ; Set 1st address hi
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sty wr256zp_am1_2+2 ; Set 2nd address hi
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ldy #0 ; Y = 0
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wr256zp_loop:
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; Load two pattern bytes
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lda ($00) ; A = next pattern byte
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jsr ramtest_incpat ; Increment pattern pointer
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ldx ($00) ; Y = next pattern byte
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jsr ramtest_incpat ; Increment pattern pointer
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; Switch into ALTZP, store two pattern bytes, switch back
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sta $C009 ; SETALTZP
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wr256zp_am1_1:
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sta $0000,Y ; Store in RAM
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iny ; Y++
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wr256zp_am1_2:
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stx $0000,Y ; Store in RAM
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iny ; Y++
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sta $C008 ; SETSTDZP
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; Repeat
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bne wr256zp_loop ; Repeat until X rolls over (256 times)
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; Success exit
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rts
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.endproc
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.proc ramtest_wr256mn: near
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; Set up to copy
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ldy $02 ; Y = address lo
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sty wr256zp_am1_1+1 ; Set 1st address lo
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sty wr256zp_am1_2+1 ; Set 2nd address lo
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ldy $03 ; Y = address hi
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sty wr256zp_am1_1+2 ; Set 1st address hi
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sty wr256zp_am1_2+2 ; Set 2nd address hi
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ldy #0 ; Y = 0
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wr256mn_loop:
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; Load two pattern bytes
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lda ($00) ; A = next pattern byte
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jsr ramtest_incpat ; Increment pattern pointer
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ldx ($00) ; Y = next pattern byte
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jsr ramtest_incpat ; Increment pattern pointer
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; RAMWRTON, store two pattern bytes, RAMWRTOFF
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sta $C009 ; RAMWRTON
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wr256mn_am1_1:
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sta $0000,Y ; Store in RAM
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iny ; X++
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wr256mn_am1_2:
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stx $0000,Y ; Store in RAM
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iny ; X++
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sta $C008 ; RAMWRTOFF
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; Repeat
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bne wr256mn_loop ; Repeat until X rolls over (256 times)
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; Success exit
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rts
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.endproc
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.proc ramtest_vfy256zp: near
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; Set up to verify
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ldx #0 ; X = 0
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stx vfy256zp_am1+1 ; Address lo = 0
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sty vfy256zp_am1+2 ; Address hi = Y
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ldy #0 ; Y = 0
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vfy256zp_loop:
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; Switch into ALTZP, load byte from RAM, switch back
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sta $C009 ; SETALTZP
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vfy256zp_am1:
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lda $0000,X ; A = next RAM byte
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sta $C008 ; SETSTDZP
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; Compare loaded byte from RAM with pattern
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cmp ($00),Y ; Compare with pattern byte
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bne vfy256zp_vfail
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jsr ramtest_incpat ; Increment pattern pointer
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inx
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; Repeat
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bne vfy256zp_loop ; Repeat until X rolls over (256 times)
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; Success exit
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rts
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; Fail exit
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vfy256zp_vfail:
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lda #$FF
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rts
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.endproc
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